aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/jz4740/gpio.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/jz4740/gpio.c')
-rw-r--r--arch/mips/jz4740/gpio.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index bd2fc29b95e0..73031f7fc827 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -306,7 +306,7 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
306 uint32_t flag; 306 uint32_t flag;
307 unsigned int gpio_irq; 307 unsigned int gpio_irq;
308 unsigned int gpio_bank; 308 unsigned int gpio_bank;
309 struct jz_gpio_chip *chip = get_irq_desc_data(desc); 309 struct jz_gpio_chip *chip = irq_desc_get_handler_data(desc);
310 310
311 gpio_bank = JZ4740_IRQ_GPIO0 - irq; 311 gpio_bank = JZ4740_IRQ_GPIO0 - irq;
312 312
@@ -416,7 +416,7 @@ static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
416 chip->wakeup &= ~IRQ_TO_BIT(data->irq); 416 chip->wakeup &= ~IRQ_TO_BIT(data->irq);
417 spin_unlock(&chip->lock); 417 spin_unlock(&chip->lock);
418 418
419 set_irq_wake(chip->irq, on); 419 irq_set_irq_wake(chip->irq, on);
420 return 0; 420 return 0;
421} 421}
422 422
@@ -510,14 +510,14 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
510 gpiochip_add(&chip->gpio_chip); 510 gpiochip_add(&chip->gpio_chip);
511 511
512 chip->irq = JZ4740_IRQ_INTC_GPIO(id); 512 chip->irq = JZ4740_IRQ_INTC_GPIO(id);
513 set_irq_data(chip->irq, chip); 513 irq_set_handler_data(chip->irq, chip);
514 set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler); 514 irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler);
515 515
516 for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { 516 for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) {
517 irq_set_lockdep_class(irq, &gpio_lock_class); 517 irq_set_lockdep_class(irq, &gpio_lock_class);
518 set_irq_chip_data(irq, chip); 518 irq_set_chip_data(irq, chip);
519 set_irq_chip_and_handler(irq, &jz_gpio_irq_chip, 519 irq_set_chip_and_handler(irq, &jz_gpio_irq_chip,
520 handle_level_irq); 520 handle_level_irq);
521 } 521 }
522 522
523 return 0; 523 return 0;