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-rw-r--r--arch/mips/jazz/irq.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index ae25b480723e..d7f8a782aae4 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void)
97 if (pending & IE_IRQ4) { 97 if (pending & IE_IRQ4) {
98 r4030_read_reg32(JAZZ_TIMER_REGISTER); 98 r4030_read_reg32(JAZZ_TIMER_REGISTER);
99 do_IRQ(JAZZ_TIMER_IRQ); 99 do_IRQ(JAZZ_TIMER_IRQ);
100 } else if (pending & IE_IRQ2) 100 } else if (pending & IE_IRQ2) {
101 do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); 101 irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
102 else if (pending & IE_IRQ1) { 102 do_IRQ(irq);
103 } else if (pending & IE_IRQ1) {
103 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; 104 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
104 if (likely(irq > 0)) 105 if (likely(irq > 0))
105 do_IRQ(irq + JAZZ_IRQ_START - 1); 106 do_IRQ(irq + JAZZ_IRQ_START - 1);
@@ -117,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode,
117struct clock_event_device r4030_clockevent = { 118struct clock_event_device r4030_clockevent = {
118 .name = "r4030", 119 .name = "r4030",
119 .features = CLOCK_EVT_FEAT_PERIODIC, 120 .features = CLOCK_EVT_FEAT_PERIODIC,
120 .rating = 100, 121 .rating = 300,
121 .irq = JAZZ_TIMER_IRQ, 122 .irq = JAZZ_TIMER_IRQ,
122 .cpumask = CPU_MASK_CPU0,
123 .set_mode = r4030_set_mode, 123 .set_mode = r4030_set_mode,
124}; 124};
125 125
126static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) 126static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
127{ 127{
128 r4030_clockevent.event_handler(&r4030_clockevent); 128 struct clock_event_device *cd = dev_id;
129 129
130 cd->event_handler(cd);
130 return IRQ_HANDLED; 131 return IRQ_HANDLED;
131} 132}
132 133
@@ -134,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = {
134 .handler = r4030_timer_interrupt, 135 .handler = r4030_timer_interrupt,
135 .flags = IRQF_DISABLED, 136 .flags = IRQF_DISABLED,
136 .mask = CPU_MASK_CPU0, 137 .mask = CPU_MASK_CPU0,
137 .name = "timer", 138 .name = "R4030 timer",
138}; 139};
139 140
140void __init plat_time_init(void) 141void __init plat_time_init(void)
141{ 142{
142 struct irqaction *irq = &r4030_timer_irqaction; 143 struct clock_event_device *cd = &r4030_clockevent;
144 struct irqaction *action = &r4030_timer_irqaction;
145 unsigned int cpu = smp_processor_id();
143 146
144 BUG_ON(HZ != 100); 147 BUG_ON(HZ != 100);
145 148
149 cd->cpumask = cpumask_of_cpu(cpu);
150 clockevents_register_device(cd);
151 action->dev_id = cd;
152 setup_irq(JAZZ_TIMER_IRQ, action);
153
146 /* 154 /*
147 * Set clock to 100Hz. 155 * Set clock to 100Hz.
148 * 156 *
@@ -150,8 +158,5 @@ void __init plat_time_init(void)
150 * a programmable 4-bit divider. This makes it fairly inflexible. 158 * a programmable 4-bit divider. This makes it fairly inflexible.
151 */ 159 */
152 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 160 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
153 setup_irq(JAZZ_TIMER_IRQ, irq);
154
155 clockevents_register_device(&r4030_clockevent);
156 setup_pit_timer(); 161 setup_pit_timer();
157} 162}