1 files changed, 12 insertions, 3 deletions

diff --git a/arch/mips/include/asm/dec/kn05.h b/arch/mips/include/asm/dec/kn05.h
index 56d22dc8803a..8e14f677e5ef 100644
--- a/arch/mips/include/asm/dec/kn05.h
+++ b/arch/mips/include/asm/dec/kn05.h
@@ -49,12 +49,20 @@
 #define KN4K_RES_15     (15*IOASIC_SLOT_SIZE)   /* unused? */
 
 /*
+ * MB ASIC interrupt bits.
+ */
+#define KN4K_MB_INR_MB          4       /* ??? */
+#define KN4K_MB_INR_MT          3       /* memory, I/O bus read/write errors */
+#define KN4K_MB_INR_RES_2       2       /* unused */
+#define KN4K_MB_INR_RTC         1       /* RTC */
+#define KN4K_MB_INR_TC          0       /* I/O ASIC cascade */
+
+/*
  * Bits for the MB interrupt register.
  * The register appears read-only.
  */
-#define KN4K_MB_INT_TC          (1<<0)          /* TURBOchannel? */
-#define KN4K_MB_INT_RTC         (1<<1)          /* RTC? */
-#define KN4K_MB_INT_MT          (1<<3)          /* I/O ASIC cascade */
+#define KN4K_MB_INT_IRQ         (0x1f<<0)       /* CPU Int[4:0] status. */
+#define KN4K_MB_INT_IRQ_N(n)    (1<<(n))        /* Individual status bits. */
 
 /*
  * Bits for the MB control & status register.
@@ -70,6 +78,7 @@
 #define KN4K_MB_CSR_NC          (1<<14)         /* ??? */
 #define KN4K_MB_CSR_EE          (1<<15)         /* (bus) Exception Enable? */
 #define KN4K_MB_CSR_MSK         (0x1f<<16)      /* CPU Int[4:0] mask */
+#define KN4K_MB_CSR_MSK_N(n)    (1<<((n)+16))   /* Individual mask bits. */
 #define KN4K_MB_CSR_FW          (1<<21)         /* ??? */
 #define KN4K_MB_CSR_W           (1<<31)         /* ??? */