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-rw-r--r--arch/mips/include/asm/mach-ath79/ar71xx_regs.h3
-rw-r--r--arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h13
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/irq.h10
-rw-r--r--arch/mips/include/asm/module.h1
-rw-r--r--arch/mips/include/asm/r4k-timer.h8
7 files changed, 20 insertions, 18 deletions
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 1caa78ad06d5..dde504477fac 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -393,7 +393,8 @@
393#define AR71XX_GPIO_REG_FUNC 0x28 393#define AR71XX_GPIO_REG_FUNC 0x28
394 394
395#define AR71XX_GPIO_COUNT 16 395#define AR71XX_GPIO_COUNT 16
396#define AR724X_GPIO_COUNT 18 396#define AR7240_GPIO_COUNT 18
397#define AR7241_GPIO_COUNT 20
397#define AR913X_GPIO_COUNT 22 398#define AR913X_GPIO_COUNT 22
398#define AR933X_GPIO_COUNT 30 399#define AR933X_GPIO_COUNT 30
399#define AR934X_GPIO_COUNT 23 400#define AR934X_GPIO_COUNT 23
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
index 4476fa03bf36..6ddae926bf79 100644
--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -42,7 +42,6 @@
42#define cpu_has_mips64r1 0 42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0 43#define cpu_has_mips64r2 0
44 44
45#define cpu_has_dsp 0
46#define cpu_has_mipsmt 0 45#define cpu_has_mipsmt 0
47 46
48#define cpu_has_64bits 0 47#define cpu_has_64bits 0
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
index 7d98dbe5d4b5..c9bae1362606 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
@@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void);
9 9
10struct bcm63xx_spi_pdata { 10struct bcm63xx_spi_pdata {
11 unsigned int fifo_size; 11 unsigned int fifo_size;
12 unsigned int msg_type_shift;
13 unsigned int msg_ctl_width;
12 int bus_num; 14 int bus_num;
13 int num_chipselect; 15 int num_chipselect;
14 u32 speed_hz; 16 u32 speed_hz;
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 4ccc2a748aff..61f2a2a5099d 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1054,7 +1054,8 @@
1054#define SPI_6338_FILL_BYTE 0x07 1054#define SPI_6338_FILL_BYTE 0x07
1055#define SPI_6338_MSG_TAIL 0x09 1055#define SPI_6338_MSG_TAIL 0x09
1056#define SPI_6338_RX_TAIL 0x0b 1056#define SPI_6338_RX_TAIL 0x0b
1057#define SPI_6338_MSG_CTL 0x40 1057#define SPI_6338_MSG_CTL 0x40 /* 8-bits register */
1058#define SPI_6338_MSG_CTL_WIDTH 8
1058#define SPI_6338_MSG_DATA 0x41 1059#define SPI_6338_MSG_DATA 0x41
1059#define SPI_6338_MSG_DATA_SIZE 0x3f 1060#define SPI_6338_MSG_DATA_SIZE 0x3f
1060#define SPI_6338_RX_DATA 0x80 1061#define SPI_6338_RX_DATA 0x80
@@ -1070,7 +1071,8 @@
1070#define SPI_6348_FILL_BYTE 0x07 1071#define SPI_6348_FILL_BYTE 0x07
1071#define SPI_6348_MSG_TAIL 0x09 1072#define SPI_6348_MSG_TAIL 0x09
1072#define SPI_6348_RX_TAIL 0x0b 1073#define SPI_6348_RX_TAIL 0x0b
1073#define SPI_6348_MSG_CTL 0x40 1074#define SPI_6348_MSG_CTL 0x40 /* 8-bits register */
1075#define SPI_6348_MSG_CTL_WIDTH 8
1074#define SPI_6348_MSG_DATA 0x41 1076#define SPI_6348_MSG_DATA 0x41
1075#define SPI_6348_MSG_DATA_SIZE 0x3f 1077#define SPI_6348_MSG_DATA_SIZE 0x3f
1076#define SPI_6348_RX_DATA 0x80 1078#define SPI_6348_RX_DATA 0x80
@@ -1078,6 +1080,7 @@
1078 1080
1079/* BCM 6358 SPI core */ 1081/* BCM 6358 SPI core */
1080#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */ 1082#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
1083#define SPI_6358_MSG_CTL_WIDTH 16
1081#define SPI_6358_MSG_DATA 0x02 1084#define SPI_6358_MSG_DATA 0x02
1082#define SPI_6358_MSG_DATA_SIZE 0x21e 1085#define SPI_6358_MSG_DATA_SIZE 0x21e
1083#define SPI_6358_RX_DATA 0x400 1086#define SPI_6358_RX_DATA 0x400
@@ -1094,6 +1097,7 @@
1094 1097
1095/* BCM 6358 SPI core */ 1098/* BCM 6358 SPI core */
1096#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */ 1099#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */
1100#define SPI_6368_MSG_CTL_WIDTH 16
1097#define SPI_6368_MSG_DATA 0x02 1101#define SPI_6368_MSG_DATA 0x02
1098#define SPI_6368_MSG_DATA_SIZE 0x21e 1102#define SPI_6368_MSG_DATA_SIZE 0x21e
1099#define SPI_6368_RX_DATA 0x400 1103#define SPI_6368_RX_DATA 0x400
@@ -1115,7 +1119,10 @@
1115#define SPI_HD_W 0x01 1119#define SPI_HD_W 0x01
1116#define SPI_HD_R 0x02 1120#define SPI_HD_R 0x02
1117#define SPI_BYTE_CNT_SHIFT 0 1121#define SPI_BYTE_CNT_SHIFT 0
1118#define SPI_MSG_TYPE_SHIFT 14 1122#define SPI_6338_MSG_TYPE_SHIFT 6
1123#define SPI_6348_MSG_TYPE_SHIFT 6
1124#define SPI_6358_MSG_TYPE_SHIFT 14
1125#define SPI_6368_MSG_TYPE_SHIFT 14
1119 1126
1120/* Command */ 1127/* Command */
1121#define SPI_CMD_NOOP 0x00 1128#define SPI_CMD_NOOP 0x00
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index 418992042f6f..c22a3078bf11 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -21,14 +21,10 @@ enum octeon_irq {
21 OCTEON_IRQ_TIMER, 21 OCTEON_IRQ_TIMER,
22/* sources in CIU_INTX_EN0 */ 22/* sources in CIU_INTX_EN0 */
23 OCTEON_IRQ_WORKQ0, 23 OCTEON_IRQ_WORKQ0,
24 OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16, 24 OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
25 OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16,
26 OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, 25 OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
27 OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, 26 OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
28 OCTEON_IRQ_MBOX1, 27 OCTEON_IRQ_MBOX1,
29 OCTEON_IRQ_UART0,
30 OCTEON_IRQ_UART1,
31 OCTEON_IRQ_UART2,
32 OCTEON_IRQ_PCI_INT0, 28 OCTEON_IRQ_PCI_INT0,
33 OCTEON_IRQ_PCI_INT1, 29 OCTEON_IRQ_PCI_INT1,
34 OCTEON_IRQ_PCI_INT2, 30 OCTEON_IRQ_PCI_INT2,
@@ -38,8 +34,6 @@ enum octeon_irq {
38 OCTEON_IRQ_PCI_MSI2, 34 OCTEON_IRQ_PCI_MSI2,
39 OCTEON_IRQ_PCI_MSI3, 35 OCTEON_IRQ_PCI_MSI3,
40 36
41 OCTEON_IRQ_TWSI,
42 OCTEON_IRQ_TWSI2,
43 OCTEON_IRQ_RML, 37 OCTEON_IRQ_RML,
44 OCTEON_IRQ_TIMER0, 38 OCTEON_IRQ_TIMER0,
45 OCTEON_IRQ_TIMER1, 39 OCTEON_IRQ_TIMER1,
@@ -47,8 +41,6 @@ enum octeon_irq {
47 OCTEON_IRQ_TIMER3, 41 OCTEON_IRQ_TIMER3,
48 OCTEON_IRQ_USB0, 42 OCTEON_IRQ_USB0,
49 OCTEON_IRQ_USB1, 43 OCTEON_IRQ_USB1,
50 OCTEON_IRQ_MII0,
51 OCTEON_IRQ_MII1,
52 OCTEON_IRQ_BOOTDMA, 44 OCTEON_IRQ_BOOTDMA,
53#ifndef CONFIG_PCI_MSI 45#ifndef CONFIG_PCI_MSI
54 OCTEON_IRQ_LAST = 127 46 OCTEON_IRQ_LAST = 127
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index 7531ecd654d6..dca8bce8c7ab 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -10,6 +10,7 @@ struct mod_arch_specific {
10 struct list_head dbe_list; 10 struct list_head dbe_list;
11 const struct exception_table_entry *dbe_start; 11 const struct exception_table_entry *dbe_start;
12 const struct exception_table_entry *dbe_end; 12 const struct exception_table_entry *dbe_end;
13 struct mips_hi16 *r_mips_hi16_list;
13}; 14};
14 15
15typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ 16typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
diff --git a/arch/mips/include/asm/r4k-timer.h b/arch/mips/include/asm/r4k-timer.h
index a37d12b3b61c..afe9e0e03fe9 100644
--- a/arch/mips/include/asm/r4k-timer.h
+++ b/arch/mips/include/asm/r4k-timer.h
@@ -12,16 +12,16 @@
12 12
13#ifdef CONFIG_SYNC_R4K 13#ifdef CONFIG_SYNC_R4K
14 14
15extern void synchronise_count_master(void); 15extern void synchronise_count_master(int cpu);
16extern void synchronise_count_slave(void); 16extern void synchronise_count_slave(int cpu);
17 17
18#else 18#else
19 19
20static inline void synchronise_count_master(void) 20static inline void synchronise_count_master(int cpu)
21{ 21{
22} 22}
23 23
24static inline void synchronise_count_slave(void) 24static inline void synchronise_count_slave(int cpu)
25{ 25{
26} 26}
27 27