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-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h4
-rw-r--r--arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h4
-rw-r--r--arch/mips/include/asm/mipsregs.h209
-rw-r--r--arch/mips/include/asm/signal.h2
4 files changed, 192 insertions, 27 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
index 62d6a3b4d3b7..4e0b6bc1165e 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
@@ -9,10 +9,8 @@
9 * 9 *
10 * Initialized the local nvram copy from the target address and checks 10 * Initialized the local nvram copy from the target address and checks
11 * its checksum. 11 * its checksum.
12 *
13 * Returns 0 on success.
14 */ 12 */
15int __init bcm63xx_nvram_init(void *nvram); 13void bcm63xx_nvram_init(void *nvram);
16 14
17/** 15/**
18 * bcm63xx_nvram_get_name() - returns the board name according to nvram 16 * bcm63xx_nvram_get_name() - returns the board name according to nvram
diff --git a/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
index d9c828419037..193c0912d38e 100644
--- a/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
@@ -28,11 +28,7 @@
28/* #define cpu_has_prefetch ? */ 28/* #define cpu_has_prefetch ? */
29#define cpu_has_mcheck 1 29#define cpu_has_mcheck 1
30/* #define cpu_has_ejtag ? */ 30/* #define cpu_has_ejtag ? */
31#ifdef CONFIG_CPU_HAS_LLSC
32#define cpu_has_llsc 1 31#define cpu_has_llsc 1
33#else
34#define cpu_has_llsc 0
35#endif
36/* #define cpu_has_vtag_icache ? */ 32/* #define cpu_has_vtag_icache ? */
37/* #define cpu_has_dc_aliases ? */ 33/* #define cpu_has_dc_aliases ? */
38/* #define cpu_has_ic_fills_f_dc ? */ 34/* #define cpu_has_ic_fills_f_dc ? */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 12b70c25906a..0da44d422f5b 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1166,7 +1166,10 @@ do { \
1166 unsigned int __dspctl; \ 1166 unsigned int __dspctl; \
1167 \ 1167 \
1168 __asm__ __volatile__( \ 1168 __asm__ __volatile__( \
1169 " .set push \n" \
1170 " .set dsp \n" \
1169 " rddsp %0, %x1 \n" \ 1171 " rddsp %0, %x1 \n" \
1172 " .set pop \n" \
1170 : "=r" (__dspctl) \ 1173 : "=r" (__dspctl) \
1171 : "i" (mask)); \ 1174 : "i" (mask)); \
1172 __dspctl; \ 1175 __dspctl; \
@@ -1175,30 +1178,198 @@ do { \
1175#define wrdsp(val, mask) \ 1178#define wrdsp(val, mask) \
1176do { \ 1179do { \
1177 __asm__ __volatile__( \ 1180 __asm__ __volatile__( \
1181 " .set push \n" \
1182 " .set dsp \n" \
1178 " wrdsp %0, %x1 \n" \ 1183 " wrdsp %0, %x1 \n" \
1184 " .set pop \n" \
1179 : \ 1185 : \
1180 : "r" (val), "i" (mask)); \ 1186 : "r" (val), "i" (mask)); \
1181} while (0) 1187} while (0)
1182 1188
1183#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;}) 1189#define mflo0() \
1184#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;}) 1190({ \
1185#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;}) 1191 long mflo0; \
1186#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;}) 1192 __asm__( \
1187 1193 " .set push \n" \
1188#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;}) 1194 " .set dsp \n" \
1189#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;}) 1195 " mflo %0, $ac0 \n" \
1190#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;}) 1196 " .set pop \n" \
1191#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;}) 1197 : "=r" (mflo0)); \
1192 1198 mflo0; \
1193#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x)) 1199})
1194#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x)) 1200
1195#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x)) 1201#define mflo1() \
1196#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x)) 1202({ \
1197 1203 long mflo1; \
1198#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x)) 1204 __asm__( \
1199#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x)) 1205 " .set push \n" \
1200#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x)) 1206 " .set dsp \n" \
1201#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x)) 1207 " mflo %0, $ac1 \n" \
1208 " .set pop \n" \
1209 : "=r" (mflo1)); \
1210 mflo1; \
1211})
1212
1213#define mflo2() \
1214({ \
1215 long mflo2; \
1216 __asm__( \
1217 " .set push \n" \
1218 " .set dsp \n" \
1219 " mflo %0, $ac2 \n" \
1220 " .set pop \n" \
1221 : "=r" (mflo2)); \
1222 mflo2; \
1223})
1224
1225#define mflo3() \
1226({ \
1227 long mflo3; \
1228 __asm__( \
1229 " .set push \n" \
1230 " .set dsp \n" \
1231 " mflo %0, $ac3 \n" \
1232 " .set pop \n" \
1233 : "=r" (mflo3)); \
1234 mflo3; \
1235})
1236
1237#define mfhi0() \
1238({ \
1239 long mfhi0; \
1240 __asm__( \
1241 " .set push \n" \
1242 " .set dsp \n" \
1243 " mfhi %0, $ac0 \n" \
1244 " .set pop \n" \
1245 : "=r" (mfhi0)); \
1246 mfhi0; \
1247})
1248
1249#define mfhi1() \
1250({ \
1251 long mfhi1; \
1252 __asm__( \
1253 " .set push \n" \
1254 " .set dsp \n" \
1255 " mfhi %0, $ac1 \n" \
1256 " .set pop \n" \
1257 : "=r" (mfhi1)); \
1258 mfhi1; \
1259})
1260
1261#define mfhi2() \
1262({ \
1263 long mfhi2; \
1264 __asm__( \
1265 " .set push \n" \
1266 " .set dsp \n" \
1267 " mfhi %0, $ac2 \n" \
1268 " .set pop \n" \
1269 : "=r" (mfhi2)); \
1270 mfhi2; \
1271})
1272
1273#define mfhi3() \
1274({ \
1275 long mfhi3; \
1276 __asm__( \
1277 " .set push \n" \
1278 " .set dsp \n" \
1279 " mfhi %0, $ac3 \n" \
1280 " .set pop \n" \
1281 : "=r" (mfhi3)); \
1282 mfhi3; \
1283})
1284
1285
1286#define mtlo0(x) \
1287({ \
1288 __asm__( \
1289 " .set push \n" \
1290 " .set dsp \n" \
1291 " mtlo %0, $ac0 \n" \
1292 " .set pop \n" \
1293 : \
1294 : "r" (x)); \
1295})
1296
1297#define mtlo1(x) \
1298({ \
1299 __asm__( \
1300 " .set push \n" \
1301 " .set dsp \n" \
1302 " mtlo %0, $ac1 \n" \
1303 " .set pop \n" \
1304 : \
1305 : "r" (x)); \
1306})
1307
1308#define mtlo2(x) \
1309({ \
1310 __asm__( \
1311 " .set push \n" \
1312 " .set dsp \n" \
1313 " mtlo %0, $ac2 \n" \
1314 " .set pop \n" \
1315 : \
1316 : "r" (x)); \
1317})
1318
1319#define mtlo3(x) \
1320({ \
1321 __asm__( \
1322 " .set push \n" \
1323 " .set dsp \n" \
1324 " mtlo %0, $ac3 \n" \
1325 " .set pop \n" \
1326 : \
1327 : "r" (x)); \
1328})
1329
1330#define mthi0(x) \
1331({ \
1332 __asm__( \
1333 " .set push \n" \
1334 " .set dsp \n" \
1335 " mthi %0, $ac0 \n" \
1336 " .set pop \n" \
1337 : \
1338 : "r" (x)); \
1339})
1340
1341#define mthi1(x) \
1342({ \
1343 __asm__( \
1344 " .set push \n" \
1345 " .set dsp \n" \
1346 " mthi %0, $ac1 \n" \
1347 " .set pop \n" \
1348 : \
1349 : "r" (x)); \
1350})
1351
1352#define mthi2(x) \
1353({ \
1354 __asm__( \
1355 " .set push \n" \
1356 " .set dsp \n" \
1357 " mthi %0, $ac2 \n" \
1358 " .set pop \n" \
1359 : \
1360 : "r" (x)); \
1361})
1362
1363#define mthi3(x) \
1364({ \
1365 __asm__( \
1366 " .set push \n" \
1367 " .set dsp \n" \
1368 " mthi %0, $ac3 \n" \
1369 " .set pop \n" \
1370 : \
1371 : "r" (x)); \
1372})
1202 1373
1203#else 1374#else
1204 1375
diff --git a/arch/mips/include/asm/signal.h b/arch/mips/include/asm/signal.h
index 197f6367c201..8efe5a9e2c3e 100644
--- a/arch/mips/include/asm/signal.h
+++ b/arch/mips/include/asm/signal.h
@@ -21,6 +21,6 @@
21#include <asm/sigcontext.h> 21#include <asm/sigcontext.h>
22#include <asm/siginfo.h> 22#include <asm/siginfo.h>
23 23
24#define __ARCH_HAS_ODD_SIGACTION 24#define __ARCH_HAS_IRIX_SIGACTION
25 25
26#endif /* _ASM_SIGNAL_H */ 26#endif /* _ASM_SIGNAL_H */
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