aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-l2d-defs.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-l2d-defs.h171
1 files changed, 170 insertions, 1 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
index 60543e0e77fc..11a456215638 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
@@ -4,7 +4,7 @@
4 * Contact: support@caviumnetworks.com 4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK 5 * This file is part of the OCTEON SDK
6 * 6 *
7 * Copyright (c) 2003-2010 Cavium Networks 7 * Copyright (c) 2003-2012 Cavium Networks
8 * 8 *
9 * This file is free software; you can redistribute it and/or modify 9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as 10 * it under the terms of the GNU General Public License, Version 2, as
@@ -44,9 +44,15 @@
44union cvmx_l2d_bst0 { 44union cvmx_l2d_bst0 {
45 uint64_t u64; 45 uint64_t u64;
46 struct cvmx_l2d_bst0_s { 46 struct cvmx_l2d_bst0_s {
47#ifdef __BIG_ENDIAN_BITFIELD
47 uint64_t reserved_35_63:29; 48 uint64_t reserved_35_63:29;
48 uint64_t ftl:1; 49 uint64_t ftl:1;
49 uint64_t q0stat:34; 50 uint64_t q0stat:34;
51#else
52 uint64_t q0stat:34;
53 uint64_t ftl:1;
54 uint64_t reserved_35_63:29;
55#endif
50 } s; 56 } s;
51 struct cvmx_l2d_bst0_s cn30xx; 57 struct cvmx_l2d_bst0_s cn30xx;
52 struct cvmx_l2d_bst0_s cn31xx; 58 struct cvmx_l2d_bst0_s cn31xx;
@@ -64,8 +70,13 @@ union cvmx_l2d_bst0 {
64union cvmx_l2d_bst1 { 70union cvmx_l2d_bst1 {
65 uint64_t u64; 71 uint64_t u64;
66 struct cvmx_l2d_bst1_s { 72 struct cvmx_l2d_bst1_s {
73#ifdef __BIG_ENDIAN_BITFIELD
67 uint64_t reserved_34_63:30; 74 uint64_t reserved_34_63:30;
68 uint64_t q1stat:34; 75 uint64_t q1stat:34;
76#else
77 uint64_t q1stat:34;
78 uint64_t reserved_34_63:30;
79#endif
69 } s; 80 } s;
70 struct cvmx_l2d_bst1_s cn30xx; 81 struct cvmx_l2d_bst1_s cn30xx;
71 struct cvmx_l2d_bst1_s cn31xx; 82 struct cvmx_l2d_bst1_s cn31xx;
@@ -83,8 +94,13 @@ union cvmx_l2d_bst1 {
83union cvmx_l2d_bst2 { 94union cvmx_l2d_bst2 {
84 uint64_t u64; 95 uint64_t u64;
85 struct cvmx_l2d_bst2_s { 96 struct cvmx_l2d_bst2_s {
97#ifdef __BIG_ENDIAN_BITFIELD
86 uint64_t reserved_34_63:30; 98 uint64_t reserved_34_63:30;
87 uint64_t q2stat:34; 99 uint64_t q2stat:34;
100#else
101 uint64_t q2stat:34;
102 uint64_t reserved_34_63:30;
103#endif
88 } s; 104 } s;
89 struct cvmx_l2d_bst2_s cn30xx; 105 struct cvmx_l2d_bst2_s cn30xx;
90 struct cvmx_l2d_bst2_s cn31xx; 106 struct cvmx_l2d_bst2_s cn31xx;
@@ -102,8 +118,13 @@ union cvmx_l2d_bst2 {
102union cvmx_l2d_bst3 { 118union cvmx_l2d_bst3 {
103 uint64_t u64; 119 uint64_t u64;
104 struct cvmx_l2d_bst3_s { 120 struct cvmx_l2d_bst3_s {
121#ifdef __BIG_ENDIAN_BITFIELD
105 uint64_t reserved_34_63:30; 122 uint64_t reserved_34_63:30;
106 uint64_t q3stat:34; 123 uint64_t q3stat:34;
124#else
125 uint64_t q3stat:34;
126 uint64_t reserved_34_63:30;
127#endif
107 } s; 128 } s;
108 struct cvmx_l2d_bst3_s cn30xx; 129 struct cvmx_l2d_bst3_s cn30xx;
109 struct cvmx_l2d_bst3_s cn31xx; 130 struct cvmx_l2d_bst3_s cn31xx;
@@ -121,6 +142,7 @@ union cvmx_l2d_bst3 {
121union cvmx_l2d_err { 142union cvmx_l2d_err {
122 uint64_t u64; 143 uint64_t u64;
123 struct cvmx_l2d_err_s { 144 struct cvmx_l2d_err_s {
145#ifdef __BIG_ENDIAN_BITFIELD
124 uint64_t reserved_6_63:58; 146 uint64_t reserved_6_63:58;
125 uint64_t bmhclsel:1; 147 uint64_t bmhclsel:1;
126 uint64_t ded_err:1; 148 uint64_t ded_err:1;
@@ -128,6 +150,15 @@ union cvmx_l2d_err {
128 uint64_t ded_intena:1; 150 uint64_t ded_intena:1;
129 uint64_t sec_intena:1; 151 uint64_t sec_intena:1;
130 uint64_t ecc_ena:1; 152 uint64_t ecc_ena:1;
153#else
154 uint64_t ecc_ena:1;
155 uint64_t sec_intena:1;
156 uint64_t ded_intena:1;
157 uint64_t sec_err:1;
158 uint64_t ded_err:1;
159 uint64_t bmhclsel:1;
160 uint64_t reserved_6_63:58;
161#endif
131 } s; 162 } s;
132 struct cvmx_l2d_err_s cn30xx; 163 struct cvmx_l2d_err_s cn30xx;
133 struct cvmx_l2d_err_s cn31xx; 164 struct cvmx_l2d_err_s cn31xx;
@@ -145,48 +176,97 @@ union cvmx_l2d_err {
145union cvmx_l2d_fadr { 176union cvmx_l2d_fadr {
146 uint64_t u64; 177 uint64_t u64;
147 struct cvmx_l2d_fadr_s { 178 struct cvmx_l2d_fadr_s {
179#ifdef __BIG_ENDIAN_BITFIELD
148 uint64_t reserved_19_63:45; 180 uint64_t reserved_19_63:45;
149 uint64_t fadru:1; 181 uint64_t fadru:1;
150 uint64_t fowmsk:4; 182 uint64_t fowmsk:4;
151 uint64_t fset:3; 183 uint64_t fset:3;
152 uint64_t fadr:11; 184 uint64_t fadr:11;
185#else
186 uint64_t fadr:11;
187 uint64_t fset:3;
188 uint64_t fowmsk:4;
189 uint64_t fadru:1;
190 uint64_t reserved_19_63:45;
191#endif
153 } s; 192 } s;
154 struct cvmx_l2d_fadr_cn30xx { 193 struct cvmx_l2d_fadr_cn30xx {
194#ifdef __BIG_ENDIAN_BITFIELD
155 uint64_t reserved_18_63:46; 195 uint64_t reserved_18_63:46;
156 uint64_t fowmsk:4; 196 uint64_t fowmsk:4;
157 uint64_t reserved_13_13:1; 197 uint64_t reserved_13_13:1;
158 uint64_t fset:2; 198 uint64_t fset:2;
159 uint64_t reserved_9_10:2; 199 uint64_t reserved_9_10:2;
160 uint64_t fadr:9; 200 uint64_t fadr:9;
201#else
202 uint64_t fadr:9;
203 uint64_t reserved_9_10:2;
204 uint64_t fset:2;
205 uint64_t reserved_13_13:1;
206 uint64_t fowmsk:4;
207 uint64_t reserved_18_63:46;
208#endif
161 } cn30xx; 209 } cn30xx;
162 struct cvmx_l2d_fadr_cn31xx { 210 struct cvmx_l2d_fadr_cn31xx {
211#ifdef __BIG_ENDIAN_BITFIELD
163 uint64_t reserved_18_63:46; 212 uint64_t reserved_18_63:46;
164 uint64_t fowmsk:4; 213 uint64_t fowmsk:4;
165 uint64_t reserved_13_13:1; 214 uint64_t reserved_13_13:1;
166 uint64_t fset:2; 215 uint64_t fset:2;
167 uint64_t reserved_10_10:1; 216 uint64_t reserved_10_10:1;
168 uint64_t fadr:10; 217 uint64_t fadr:10;
218#else
219 uint64_t fadr:10;
220 uint64_t reserved_10_10:1;
221 uint64_t fset:2;
222 uint64_t reserved_13_13:1;
223 uint64_t fowmsk:4;
224 uint64_t reserved_18_63:46;
225#endif
169 } cn31xx; 226 } cn31xx;
170 struct cvmx_l2d_fadr_cn38xx { 227 struct cvmx_l2d_fadr_cn38xx {
228#ifdef __BIG_ENDIAN_BITFIELD
171 uint64_t reserved_18_63:46; 229 uint64_t reserved_18_63:46;
172 uint64_t fowmsk:4; 230 uint64_t fowmsk:4;
173 uint64_t fset:3; 231 uint64_t fset:3;
174 uint64_t fadr:11; 232 uint64_t fadr:11;
233#else
234 uint64_t fadr:11;
235 uint64_t fset:3;
236 uint64_t fowmsk:4;
237 uint64_t reserved_18_63:46;
238#endif
175 } cn38xx; 239 } cn38xx;
176 struct cvmx_l2d_fadr_cn38xx cn38xxp2; 240 struct cvmx_l2d_fadr_cn38xx cn38xxp2;
177 struct cvmx_l2d_fadr_cn50xx { 241 struct cvmx_l2d_fadr_cn50xx {
242#ifdef __BIG_ENDIAN_BITFIELD
178 uint64_t reserved_18_63:46; 243 uint64_t reserved_18_63:46;
179 uint64_t fowmsk:4; 244 uint64_t fowmsk:4;
180 uint64_t fset:3; 245 uint64_t fset:3;
181 uint64_t reserved_8_10:3; 246 uint64_t reserved_8_10:3;
182 uint64_t fadr:8; 247 uint64_t fadr:8;
248#else
249 uint64_t fadr:8;
250 uint64_t reserved_8_10:3;
251 uint64_t fset:3;
252 uint64_t fowmsk:4;
253 uint64_t reserved_18_63:46;
254#endif
183 } cn50xx; 255 } cn50xx;
184 struct cvmx_l2d_fadr_cn52xx { 256 struct cvmx_l2d_fadr_cn52xx {
257#ifdef __BIG_ENDIAN_BITFIELD
185 uint64_t reserved_18_63:46; 258 uint64_t reserved_18_63:46;
186 uint64_t fowmsk:4; 259 uint64_t fowmsk:4;
187 uint64_t fset:3; 260 uint64_t fset:3;
188 uint64_t reserved_10_10:1; 261 uint64_t reserved_10_10:1;
189 uint64_t fadr:10; 262 uint64_t fadr:10;
263#else
264 uint64_t fadr:10;
265 uint64_t reserved_10_10:1;
266 uint64_t fset:3;
267 uint64_t fowmsk:4;
268 uint64_t reserved_18_63:46;
269#endif
190 } cn52xx; 270 } cn52xx;
191 struct cvmx_l2d_fadr_cn52xx cn52xxp1; 271 struct cvmx_l2d_fadr_cn52xx cn52xxp1;
192 struct cvmx_l2d_fadr_s cn56xx; 272 struct cvmx_l2d_fadr_s cn56xx;
@@ -198,9 +278,15 @@ union cvmx_l2d_fadr {
198union cvmx_l2d_fsyn0 { 278union cvmx_l2d_fsyn0 {
199 uint64_t u64; 279 uint64_t u64;
200 struct cvmx_l2d_fsyn0_s { 280 struct cvmx_l2d_fsyn0_s {
281#ifdef __BIG_ENDIAN_BITFIELD
201 uint64_t reserved_20_63:44; 282 uint64_t reserved_20_63:44;
202 uint64_t fsyn_ow1:10; 283 uint64_t fsyn_ow1:10;
203 uint64_t fsyn_ow0:10; 284 uint64_t fsyn_ow0:10;
285#else
286 uint64_t fsyn_ow0:10;
287 uint64_t fsyn_ow1:10;
288 uint64_t reserved_20_63:44;
289#endif
204 } s; 290 } s;
205 struct cvmx_l2d_fsyn0_s cn30xx; 291 struct cvmx_l2d_fsyn0_s cn30xx;
206 struct cvmx_l2d_fsyn0_s cn31xx; 292 struct cvmx_l2d_fsyn0_s cn31xx;
@@ -218,9 +304,15 @@ union cvmx_l2d_fsyn0 {
218union cvmx_l2d_fsyn1 { 304union cvmx_l2d_fsyn1 {
219 uint64_t u64; 305 uint64_t u64;
220 struct cvmx_l2d_fsyn1_s { 306 struct cvmx_l2d_fsyn1_s {
307#ifdef __BIG_ENDIAN_BITFIELD
221 uint64_t reserved_20_63:44; 308 uint64_t reserved_20_63:44;
222 uint64_t fsyn_ow3:10; 309 uint64_t fsyn_ow3:10;
223 uint64_t fsyn_ow2:10; 310 uint64_t fsyn_ow2:10;
311#else
312 uint64_t fsyn_ow2:10;
313 uint64_t fsyn_ow3:10;
314 uint64_t reserved_20_63:44;
315#endif
224 } s; 316 } s;
225 struct cvmx_l2d_fsyn1_s cn30xx; 317 struct cvmx_l2d_fsyn1_s cn30xx;
226 struct cvmx_l2d_fsyn1_s cn31xx; 318 struct cvmx_l2d_fsyn1_s cn31xx;
@@ -238,8 +330,13 @@ union cvmx_l2d_fsyn1 {
238union cvmx_l2d_fus0 { 330union cvmx_l2d_fus0 {
239 uint64_t u64; 331 uint64_t u64;
240 struct cvmx_l2d_fus0_s { 332 struct cvmx_l2d_fus0_s {
333#ifdef __BIG_ENDIAN_BITFIELD
241 uint64_t reserved_34_63:30; 334 uint64_t reserved_34_63:30;
242 uint64_t q0fus:34; 335 uint64_t q0fus:34;
336#else
337 uint64_t q0fus:34;
338 uint64_t reserved_34_63:30;
339#endif
243 } s; 340 } s;
244 struct cvmx_l2d_fus0_s cn30xx; 341 struct cvmx_l2d_fus0_s cn30xx;
245 struct cvmx_l2d_fus0_s cn31xx; 342 struct cvmx_l2d_fus0_s cn31xx;
@@ -257,8 +354,13 @@ union cvmx_l2d_fus0 {
257union cvmx_l2d_fus1 { 354union cvmx_l2d_fus1 {
258 uint64_t u64; 355 uint64_t u64;
259 struct cvmx_l2d_fus1_s { 356 struct cvmx_l2d_fus1_s {
357#ifdef __BIG_ENDIAN_BITFIELD
260 uint64_t reserved_34_63:30; 358 uint64_t reserved_34_63:30;
261 uint64_t q1fus:34; 359 uint64_t q1fus:34;
360#else
361 uint64_t q1fus:34;
362 uint64_t reserved_34_63:30;
363#endif
262 } s; 364 } s;
263 struct cvmx_l2d_fus1_s cn30xx; 365 struct cvmx_l2d_fus1_s cn30xx;
264 struct cvmx_l2d_fus1_s cn31xx; 366 struct cvmx_l2d_fus1_s cn31xx;
@@ -276,8 +378,13 @@ union cvmx_l2d_fus1 {
276union cvmx_l2d_fus2 { 378union cvmx_l2d_fus2 {
277 uint64_t u64; 379 uint64_t u64;
278 struct cvmx_l2d_fus2_s { 380 struct cvmx_l2d_fus2_s {
381#ifdef __BIG_ENDIAN_BITFIELD
279 uint64_t reserved_34_63:30; 382 uint64_t reserved_34_63:30;
280 uint64_t q2fus:34; 383 uint64_t q2fus:34;
384#else
385 uint64_t q2fus:34;
386 uint64_t reserved_34_63:30;
387#endif
281 } s; 388 } s;
282 struct cvmx_l2d_fus2_s cn30xx; 389 struct cvmx_l2d_fus2_s cn30xx;
283 struct cvmx_l2d_fus2_s cn31xx; 390 struct cvmx_l2d_fus2_s cn31xx;
@@ -295,61 +402,123 @@ union cvmx_l2d_fus2 {
295union cvmx_l2d_fus3 { 402union cvmx_l2d_fus3 {
296 uint64_t u64; 403 uint64_t u64;
297 struct cvmx_l2d_fus3_s { 404 struct cvmx_l2d_fus3_s {
405#ifdef __BIG_ENDIAN_BITFIELD
298 uint64_t reserved_40_63:24; 406 uint64_t reserved_40_63:24;
299 uint64_t ema_ctl:3; 407 uint64_t ema_ctl:3;
300 uint64_t reserved_34_36:3; 408 uint64_t reserved_34_36:3;
301 uint64_t q3fus:34; 409 uint64_t q3fus:34;
410#else
411 uint64_t q3fus:34;
412 uint64_t reserved_34_36:3;
413 uint64_t ema_ctl:3;
414 uint64_t reserved_40_63:24;
415#endif
302 } s; 416 } s;
303 struct cvmx_l2d_fus3_cn30xx { 417 struct cvmx_l2d_fus3_cn30xx {
418#ifdef __BIG_ENDIAN_BITFIELD
304 uint64_t reserved_35_63:29; 419 uint64_t reserved_35_63:29;
305 uint64_t crip_64k:1; 420 uint64_t crip_64k:1;
306 uint64_t q3fus:34; 421 uint64_t q3fus:34;
422#else
423 uint64_t q3fus:34;
424 uint64_t crip_64k:1;
425 uint64_t reserved_35_63:29;
426#endif
307 } cn30xx; 427 } cn30xx;
308 struct cvmx_l2d_fus3_cn31xx { 428 struct cvmx_l2d_fus3_cn31xx {
429#ifdef __BIG_ENDIAN_BITFIELD
309 uint64_t reserved_35_63:29; 430 uint64_t reserved_35_63:29;
310 uint64_t crip_128k:1; 431 uint64_t crip_128k:1;
311 uint64_t q3fus:34; 432 uint64_t q3fus:34;
433#else
434 uint64_t q3fus:34;
435 uint64_t crip_128k:1;
436 uint64_t reserved_35_63:29;
437#endif
312 } cn31xx; 438 } cn31xx;
313 struct cvmx_l2d_fus3_cn38xx { 439 struct cvmx_l2d_fus3_cn38xx {
440#ifdef __BIG_ENDIAN_BITFIELD
314 uint64_t reserved_36_63:28; 441 uint64_t reserved_36_63:28;
315 uint64_t crip_256k:1; 442 uint64_t crip_256k:1;
316 uint64_t crip_512k:1; 443 uint64_t crip_512k:1;
317 uint64_t q3fus:34; 444 uint64_t q3fus:34;
445#else
446 uint64_t q3fus:34;
447 uint64_t crip_512k:1;
448 uint64_t crip_256k:1;
449 uint64_t reserved_36_63:28;
450#endif
318 } cn38xx; 451 } cn38xx;
319 struct cvmx_l2d_fus3_cn38xx cn38xxp2; 452 struct cvmx_l2d_fus3_cn38xx cn38xxp2;
320 struct cvmx_l2d_fus3_cn50xx { 453 struct cvmx_l2d_fus3_cn50xx {
454#ifdef __BIG_ENDIAN_BITFIELD
321 uint64_t reserved_40_63:24; 455 uint64_t reserved_40_63:24;
322 uint64_t ema_ctl:3; 456 uint64_t ema_ctl:3;
323 uint64_t reserved_36_36:1; 457 uint64_t reserved_36_36:1;
324 uint64_t crip_32k:1; 458 uint64_t crip_32k:1;
325 uint64_t crip_64k:1; 459 uint64_t crip_64k:1;
326 uint64_t q3fus:34; 460 uint64_t q3fus:34;
461#else
462 uint64_t q3fus:34;
463 uint64_t crip_64k:1;
464 uint64_t crip_32k:1;
465 uint64_t reserved_36_36:1;
466 uint64_t ema_ctl:3;
467 uint64_t reserved_40_63:24;
468#endif
327 } cn50xx; 469 } cn50xx;
328 struct cvmx_l2d_fus3_cn52xx { 470 struct cvmx_l2d_fus3_cn52xx {
471#ifdef __BIG_ENDIAN_BITFIELD
329 uint64_t reserved_40_63:24; 472 uint64_t reserved_40_63:24;
330 uint64_t ema_ctl:3; 473 uint64_t ema_ctl:3;
331 uint64_t reserved_36_36:1; 474 uint64_t reserved_36_36:1;
332 uint64_t crip_128k:1; 475 uint64_t crip_128k:1;
333 uint64_t crip_256k:1; 476 uint64_t crip_256k:1;
334 uint64_t q3fus:34; 477 uint64_t q3fus:34;
478#else
479 uint64_t q3fus:34;
480 uint64_t crip_256k:1;
481 uint64_t crip_128k:1;
482 uint64_t reserved_36_36:1;
483 uint64_t ema_ctl:3;
484 uint64_t reserved_40_63:24;
485#endif
335 } cn52xx; 486 } cn52xx;
336 struct cvmx_l2d_fus3_cn52xx cn52xxp1; 487 struct cvmx_l2d_fus3_cn52xx cn52xxp1;
337 struct cvmx_l2d_fus3_cn56xx { 488 struct cvmx_l2d_fus3_cn56xx {
489#ifdef __BIG_ENDIAN_BITFIELD
338 uint64_t reserved_40_63:24; 490 uint64_t reserved_40_63:24;
339 uint64_t ema_ctl:3; 491 uint64_t ema_ctl:3;
340 uint64_t reserved_36_36:1; 492 uint64_t reserved_36_36:1;
341 uint64_t crip_512k:1; 493 uint64_t crip_512k:1;
342 uint64_t crip_1024k:1; 494 uint64_t crip_1024k:1;
343 uint64_t q3fus:34; 495 uint64_t q3fus:34;
496#else
497 uint64_t q3fus:34;
498 uint64_t crip_1024k:1;
499 uint64_t crip_512k:1;
500 uint64_t reserved_36_36:1;
501 uint64_t ema_ctl:3;
502 uint64_t reserved_40_63:24;
503#endif
344 } cn56xx; 504 } cn56xx;
345 struct cvmx_l2d_fus3_cn56xx cn56xxp1; 505 struct cvmx_l2d_fus3_cn56xx cn56xxp1;
346 struct cvmx_l2d_fus3_cn58xx { 506 struct cvmx_l2d_fus3_cn58xx {
507#ifdef __BIG_ENDIAN_BITFIELD
347 uint64_t reserved_39_63:25; 508 uint64_t reserved_39_63:25;
348 uint64_t ema_ctl:2; 509 uint64_t ema_ctl:2;
349 uint64_t reserved_36_36:1; 510 uint64_t reserved_36_36:1;
350 uint64_t crip_512k:1; 511 uint64_t crip_512k:1;
351 uint64_t crip_1024k:1; 512 uint64_t crip_1024k:1;
352 uint64_t q3fus:34; 513 uint64_t q3fus:34;
514#else
515 uint64_t q3fus:34;
516 uint64_t crip_1024k:1;
517 uint64_t crip_512k:1;
518 uint64_t reserved_36_36:1;
519 uint64_t ema_ctl:2;
520 uint64_t reserved_39_63:25;
521#endif
353 } cn58xx; 522 } cn58xx;
354 struct cvmx_l2d_fus3_cn58xx cn58xxp1; 523 struct cvmx_l2d_fus3_cn58xx cn58xxp1;
355}; 524};