1 files changed, 8 insertions, 5 deletions

diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index d9743536a621..6083db586500 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 #include <linux/slab.h>
 #include <asm/cacheflush.h>
+#include <asm/hazards.h>
 #include <asm/tlbflush.h>
 #ifdef CONFIG_MIPS_MT_SMTC
 #include <asm/mipsmtregs.h>
@@ -36,11 +37,13 @@ extern unsigned long pgd_current[];
 #ifdef CONFIG_32BIT
 #define TLBMISS_HANDLER_SETUP()                                         \
         write_c0_context((unsigned long) smp_processor_id() << 25);     \
+        back_to_back_c0_hazard();                                       \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 #ifdef CONFIG_64BIT
 #define TLBMISS_HANDLER_SETUP()                                         \
         write_c0_context((unsigned long) smp_processor_id() << 26);     \
+        back_to_back_c0_hazard();                                       \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 
@@ -165,12 +168,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
          * having ASID_MASK smaller than the hardware maximum,
          * make sure no "soft" bits become "hard"...
          */
-        write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK)
-                        | (cpu_context(cpu, next) & ASID_MASK));
+        write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
+                         cpu_asid(cpu, next));
         ehb(); /* Make sure it propagates to TCStatus */
         evpe(mtflags);
 #else
-        write_c0_entryhi(cpu_context(cpu, next));
+        write_c0_entryhi(cpu_asid(cpu, next));
 #endif /* CONFIG_MIPS_MT_SMTC */
         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 
@@ -226,11 +229,11 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
         }
         /* See comments for similar code above */
         write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
-                         (cpu_context(cpu, next) & ASID_MASK));
+                         cpu_asid(cpu, next));
         ehb(); /* Make sure it propagates to TCStatus */
         evpe(mtflags);
 #else
-        write_c0_entryhi(cpu_context(cpu, next));
+        write_c0_entryhi(cpu_asid(cpu, next));
 #endif /* CONFIG_MIPS_MT_SMTC */
         TLBMISS_HANDLER_SETUP_PGD(next->pgd);