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-rw-r--r--arch/mips/include/asm/mipsregs.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index cf3b580c3df6..b46cd220a018 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1324,7 +1324,7 @@ do { \
1324/* 1324/*
1325 * Macros to access the floating point coprocessor control registers 1325 * Macros to access the floating point coprocessor control registers
1326 */ 1326 */
1327#define read_32bit_cp1_register(source) \ 1327#define _read_32bit_cp1_register(source, gas_hardfloat) \
1328({ \ 1328({ \
1329 int __res; \ 1329 int __res; \
1330 \ 1330 \
@@ -1334,12 +1334,21 @@ do { \
1334 " # gas fails to assemble cfc1 for some archs, \n" \ 1334 " # gas fails to assemble cfc1 for some archs, \n" \
1335 " # like Octeon. \n" \ 1335 " # like Octeon. \n" \
1336 " .set mips1 \n" \ 1336 " .set mips1 \n" \
1337 " "STR(gas_hardfloat)" \n" \
1337 " cfc1 %0,"STR(source)" \n" \ 1338 " cfc1 %0,"STR(source)" \n" \
1338 " .set pop \n" \ 1339 " .set pop \n" \
1339 : "=r" (__res)); \ 1340 : "=r" (__res)); \
1340 __res; \ 1341 __res; \
1341}) 1342})
1342 1343
1344#ifdef GAS_HAS_SET_HARDFLOAT
1345#define read_32bit_cp1_register(source) \
1346 _read_32bit_cp1_register(source, .set hardfloat)
1347#else
1348#define read_32bit_cp1_register(source) \
1349 _read_32bit_cp1_register(source, )
1350#endif
1351
1343#ifdef HAVE_AS_DSP 1352#ifdef HAVE_AS_DSP
1344#define rddsp(mask) \ 1353#define rddsp(mask) \
1345({ \ 1354({ \