aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/mach-bcm47xx
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/include/asm/mach-bcm47xx')
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/bcm47xx.h25
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h59
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h25
3 files changed, 109 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
new file mode 100644
index 000000000000..d008f47a28bd
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#ifndef __ASM_BCM47XX_H
20#define __ASM_BCM47XX_H
21
22/* SSB bus */
23extern struct ssb_bus ssb_bcm47xx;
24
25#endif /* __ASM_BCM47XX_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
new file mode 100644
index 000000000000..cfc8f4d618ce
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -0,0 +1,59 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#ifndef __BCM47XX_GPIO_H
10#define __BCM47XX_GPIO_H
11
12#define BCM47XX_EXTIF_GPIO_LINES 5
13#define BCM47XX_CHIPCO_GPIO_LINES 16
14
15extern int bcm47xx_gpio_to_irq(unsigned gpio);
16extern int bcm47xx_gpio_get_value(unsigned gpio);
17extern void bcm47xx_gpio_set_value(unsigned gpio, int value);
18extern int bcm47xx_gpio_direction_input(unsigned gpio);
19extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
20
21static inline int gpio_request(unsigned gpio, const char *label)
22{
23 return 0;
24}
25
26static inline void gpio_free(unsigned gpio)
27{
28}
29
30static inline int gpio_to_irq(unsigned gpio)
31{
32 return bcm47xx_gpio_to_irq(gpio);
33}
34
35static inline int gpio_get_value(unsigned gpio)
36{
37 return bcm47xx_gpio_get_value(gpio);
38}
39
40static inline void gpio_set_value(unsigned gpio, int value)
41{
42 bcm47xx_gpio_set_value(gpio, value);
43}
44
45static inline int gpio_direction_input(unsigned gpio)
46{
47 return bcm47xx_gpio_direction_input(gpio);
48}
49
50static inline int gpio_direction_output(unsigned gpio, int value)
51{
52 return bcm47xx_gpio_direction_output(gpio, value);
53}
54
55
56/* cansleep wrappers */
57#include <asm-generic/gpio.h>
58
59#endif /* __BCM47XX_GPIO_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
new file mode 100644
index 000000000000..4a2b7986b582
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
9#define __ASM_MIPS_MACH_BCM947XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */