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-rw-r--r--arch/mips/include/asm/io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 5b017f23e243..b04e4de5dd2e 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -242,7 +242,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
242 * This version of ioremap ensures that the memory is marked uncachable 242 * This version of ioremap ensures that the memory is marked uncachable
243 * on the CPU as well as honouring existing caching rules from things like 243 * on the CPU as well as honouring existing caching rules from things like
244 * the PCI bus. Note that there are other caches and buffers on many 244 * the PCI bus. Note that there are other caches and buffers on many
245 * busses. In paticular driver authors should read up on PCI writes 245 * busses. In particular driver authors should read up on PCI writes
246 * 246 *
247 * It's useful if some control registers are in such an area and 247 * It's useful if some control registers are in such an area and
248 * write combining or read caching is not desirable: 248 * write combining or read caching is not desirable: