1 files changed, 17 insertions, 17 deletions
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 28b1edf19501..d0a2a68ca600 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -31,24 +31,24 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
                "       sc      %2, %1                                  \n"
                "       beqzl   %2, 1b                                  \n"
                "       .set    mips0                                   \n"
-                : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy)
+                : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
-                : GCC_OFF12_ASM() (*m), "Jr" (val)
+                : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
                : "memory");
        } else if (kernel_uses_llsc) {
                unsigned long dummy;
                do {
                        __asm__ __volatile__(
-                        "       .set    arch=r4000                      \n"
+                        "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"
                        "       ll      %0, %3          # xchg_u32      \n"
                        "       .set    mips0                           \n"
                        "       move    %2, %z4                         \n"
-                        "       .set    arch=r4000                      \n"
+                        "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"
                        "       sc      %2, %1                          \n"
                        "       .set    mips0                           \n"
-                        : "=&r" (retval), "=" GCC_OFF12_ASM() (*m),
+                        : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
                          "=&r" (dummy)
-                        : GCC_OFF12_ASM() (*m), "Jr" (val)
+                        : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
                        : "memory");
                } while (unlikely(!dummy));
        } else {
@@ -82,22 +82,22 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
                "       scd     %2, %1                                  \n"
                "       beqzl   %2, 1b                                  \n"
                "       .set    mips0                                   \n"
-                : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy)
+                : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
-                : GCC_OFF12_ASM() (*m), "Jr" (val)
+                : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
                : "memory");
        } else if (kernel_uses_llsc) {
                unsigned long dummy;
                do {
                        __asm__ __volatile__(
-                        "       .set    arch=r4000                      \n"
+                        "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"
                        "       lld     %0, %3          # xchg_u64      \n"
                        "       move    %2, %z4                         \n"
                        "       scd     %2, %1                          \n"
                        "       .set    mips0                           \n"
-                        : "=&r" (retval), "=" GCC_OFF12_ASM() (*m),
+                        : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
                          "=&r" (dummy)
-                        : GCC_OFF12_ASM() (*m), "Jr" (val)
+                        : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
                        : "memory");
                } while (unlikely(!dummy));
        } else {
@@ -158,25 +158,25 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
                "       beqzl   $1, 1b                          \n"     \
                "2:                                             \n"     \
                "       .set    pop                             \n"     \
-                : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m)               \
+                : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m)           \
-                : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new)          \
+                : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new)              \
                : "memory");                                            \
        } else if (kernel_uses_llsc) {                                  \
                __asm__ __volatile__(                                   \
                "       .set    push                            \n"     \
                "       .set    noat                            \n"     \
-                "       .set    arch=r4000                      \n"     \
+                "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"     \
                "1:     " ld "  %0, %2          # __cmpxchg_asm \n"     \
                "       bne     %0, %z3, 2f                     \n"     \
                "       .set    mips0                           \n"     \
                "       move    $1, %z4                         \n"     \
-                "       .set    arch=r4000                      \n"     \
+                "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"     \
                "       " st "  $1, %1                          \n"     \
                "       beqz    $1, 1b                          \n"     \
                "       .set    pop                             \n"     \
                "2:                                             \n"     \
-                : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m)               \
+                : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m)           \
-                : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new)          \
+                : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new)              \
                : "memory");                                            \
        } else {                                                        \
                unsigned long __flags;                                  \

diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 28b1edf19501..d0a2a68ca600 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h
@@ -31,24 +31,24 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
31	" sc %2, %1 \n"	31	" sc %2, %1 \n"
32	" beqzl %2, 1b \n"	32	" beqzl %2, 1b \n"
33	" .set mips0 \n"	33	" .set mips0 \n"
34	: "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy)	34	: "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
35	: GCC_OFF12_ASM() (*m), "Jr" (val)	35	: GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
36	: "memory");	36	: "memory");
37	} else if (kernel_uses_llsc) {	37	} else if (kernel_uses_llsc) {
38	unsigned long dummy;	38	unsigned long dummy;
39		39
40	do {	40	do {
41	__asm__ __volatile__(	41	__asm__ __volatile__(
42	" .set arch=r4000 \n"	42	" .set "MIPS_ISA_ARCH_LEVEL" \n"
43	" ll %0, %3 # xchg_u32 \n"	43	" ll %0, %3 # xchg_u32 \n"
44	" .set mips0 \n"	44	" .set mips0 \n"
45	" move %2, %z4 \n"	45	" move %2, %z4 \n"
46	" .set arch=r4000 \n"	46	" .set "MIPS_ISA_ARCH_LEVEL" \n"
47	" sc %2, %1 \n"	47	" sc %2, %1 \n"
48	" .set mips0 \n"	48	" .set mips0 \n"
49	: "=&r" (retval), "=" GCC_OFF12_ASM() (*m),	49	: "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
50	"=&r" (dummy)	50	"=&r" (dummy)
51	: GCC_OFF12_ASM() (*m), "Jr" (val)	51	: GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
52	: "memory");	52	: "memory");
53	} while (unlikely(!dummy));	53	} while (unlikely(!dummy));
54	} else {	54	} else {
@@ -82,22 +82,22 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
82	" scd %2, %1 \n"	82	" scd %2, %1 \n"
83	" beqzl %2, 1b \n"	83	" beqzl %2, 1b \n"
84	" .set mips0 \n"	84	" .set mips0 \n"
85	: "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy)	85	: "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
86	: GCC_OFF12_ASM() (*m), "Jr" (val)	86	: GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
87	: "memory");	87	: "memory");
88	} else if (kernel_uses_llsc) {	88	} else if (kernel_uses_llsc) {
89	unsigned long dummy;	89	unsigned long dummy;
90		90
91	do {	91	do {
92	__asm__ __volatile__(	92	__asm__ __volatile__(
93	" .set arch=r4000 \n"	93	" .set "MIPS_ISA_ARCH_LEVEL" \n"
94	" lld %0, %3 # xchg_u64 \n"	94	" lld %0, %3 # xchg_u64 \n"
95	" move %2, %z4 \n"	95	" move %2, %z4 \n"
96	" scd %2, %1 \n"	96	" scd %2, %1 \n"
97	" .set mips0 \n"	97	" .set mips0 \n"
98	: "=&r" (retval), "=" GCC_OFF12_ASM() (*m),	98	: "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
99	"=&r" (dummy)	99	"=&r" (dummy)
100	: GCC_OFF12_ASM() (*m), "Jr" (val)	100	: GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
101	: "memory");	101	: "memory");
102	} while (unlikely(!dummy));	102	} while (unlikely(!dummy));
103	} else {	103	} else {
@@ -158,25 +158,25 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
158	" beqzl $1, 1b \n" \	158	" beqzl $1, 1b \n" \
159	"2: \n" \	159	"2: \n" \
160	" .set pop \n" \	160	" .set pop \n" \
161	: "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \	161	: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
162	: GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \	162	: GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \
163	: "memory"); \	163	: "memory"); \
164	} else if (kernel_uses_llsc) { \	164	} else if (kernel_uses_llsc) { \
165	__asm__ __volatile__( \	165	__asm__ __volatile__( \
166	" .set push \n" \	166	" .set push \n" \
167	" .set noat \n" \	167	" .set noat \n" \
168	" .set arch=r4000 \n" \	168	" .set "MIPS_ISA_ARCH_LEVEL" \n" \
169	"1: " ld " %0, %2 # __cmpxchg_asm \n" \	169	"1: " ld " %0, %2 # __cmpxchg_asm \n" \
170	" bne %0, %z3, 2f \n" \	170	" bne %0, %z3, 2f \n" \
171	" .set mips0 \n" \	171	" .set mips0 \n" \
172	" move $1, %z4 \n" \	172	" move $1, %z4 \n" \
173	" .set arch=r4000 \n" \	173	" .set "MIPS_ISA_ARCH_LEVEL" \n" \
174	" " st " $1, %1 \n" \	174	" " st " $1, %1 \n" \
175	" beqz $1, 1b \n" \	175	" beqz $1, 1b \n" \
176	" .set pop \n" \	176	" .set pop \n" \
177	"2: \n" \	177	"2: \n" \
178	: "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \	178	: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
179	: GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \	179	: GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \
180	: "memory"); \	180	: "memory"); \
181	} else { \	181	} else { \
182	unsigned long __flags; \	182	unsigned long __flags; \