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Diffstat (limited to 'arch/mips/include/asm/branch.h')
-rw-r--r--arch/mips/include/asm/branch.h22
1 files changed, 17 insertions, 5 deletions
diff --git a/arch/mips/include/asm/branch.h b/arch/mips/include/asm/branch.h
index 888766ae1f85..40bb9ebcc7aa 100644
--- a/arch/mips/include/asm/branch.h
+++ b/arch/mips/include/asm/branch.h
@@ -11,6 +11,13 @@
11#include <asm/ptrace.h> 11#include <asm/ptrace.h>
12#include <asm/inst.h> 12#include <asm/inst.h>
13 13
14extern int __isa_exception_epc(struct pt_regs *regs);
15extern int __compute_return_epc(struct pt_regs *regs);
16extern int __compute_return_epc_for_insn(struct pt_regs *regs,
17 union mips_instruction insn);
18extern int __microMIPS_compute_return_epc(struct pt_regs *regs);
19
20
14static inline int delay_slot(struct pt_regs *regs) 21static inline int delay_slot(struct pt_regs *regs)
15{ 22{
16 return regs->cp0_cause & CAUSEF_BD; 23 return regs->cp0_cause & CAUSEF_BD;
@@ -18,20 +25,25 @@ static inline int delay_slot(struct pt_regs *regs)
18 25
19static inline unsigned long exception_epc(struct pt_regs *regs) 26static inline unsigned long exception_epc(struct pt_regs *regs)
20{ 27{
21 if (!delay_slot(regs)) 28 if (likely(!delay_slot(regs)))
22 return regs->cp0_epc; 29 return regs->cp0_epc;
23 30
31 if (get_isa16_mode(regs->cp0_epc))
32 return __isa_exception_epc(regs);
33
24 return regs->cp0_epc + 4; 34 return regs->cp0_epc + 4;
25} 35}
26 36
27#define BRANCH_LIKELY_TAKEN 0x0001 37#define BRANCH_LIKELY_TAKEN 0x0001
28 38
29extern int __compute_return_epc(struct pt_regs *regs);
30extern int __compute_return_epc_for_insn(struct pt_regs *regs,
31 union mips_instruction insn);
32
33static inline int compute_return_epc(struct pt_regs *regs) 39static inline int compute_return_epc(struct pt_regs *regs)
34{ 40{
41 if (get_isa16_mode(regs->cp0_epc)) {
42 if (cpu_has_mmips)
43 return __microMIPS_compute_return_epc(regs);
44 return regs->cp0_epc;
45 }
46
35 if (!delay_slot(regs)) { 47 if (!delay_slot(regs)) {
36 regs->cp0_epc += 4; 48 regs->cp0_epc += 4;
37 return 0; 49 return 0;