4 files changed, 29 insertions, 63 deletions

diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index cb41954fc321..824e08c73798 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -17,80 +17,48 @@
 #include <asm/dec/ioasic_addrs.h>
 #include <asm/dec/ioasic_ints.h>
 
-
 static int ioasic_irq_base;
 
-
-static inline void unmask_ioasic_irq(unsigned int irq)
+static void unmask_ioasic_irq(struct irq_data *d)
 {
         u32 simr;
 
         simr = ioasic_read(IO_REG_SIMR);
-        simr |= (1 << (irq - ioasic_irq_base));
+        simr |= (1 << (d->irq - ioasic_irq_base));
         ioasic_write(IO_REG_SIMR, simr);
 }
 
-static inline void mask_ioasic_irq(unsigned int irq)
+static void mask_ioasic_irq(struct irq_data *d)
 {
         u32 simr;
 
         simr = ioasic_read(IO_REG_SIMR);
-        simr &= ~(1 << (irq - ioasic_irq_base));
+        simr &= ~(1 << (d->irq - ioasic_irq_base));
         ioasic_write(IO_REG_SIMR, simr);
 }
 
-static inline void clear_ioasic_irq(unsigned int irq)
+static void ack_ioasic_irq(struct irq_data *d)
 {
-        u32 sir;
-
-        sir = ~(1 << (irq - ioasic_irq_base));
-        ioasic_write(IO_REG_SIR, sir);
-}
-
-static inline void ack_ioasic_irq(unsigned int irq)
-{
-        mask_ioasic_irq(irq);
+        mask_ioasic_irq(d);
         fast_iob();
 }
 
-static inline void end_ioasic_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                unmask_ioasic_irq(irq);
-}
-
 static struct irq_chip ioasic_irq_type = {
         .name = "IO-ASIC",
-        .ack = ack_ioasic_irq,
-        .mask = mask_ioasic_irq,
-        .mask_ack = ack_ioasic_irq,
-        .unmask = unmask_ioasic_irq,
+        .irq_ack = ack_ioasic_irq,
+        .irq_mask = mask_ioasic_irq,
+        .irq_mask_ack = ack_ioasic_irq,
+        .irq_unmask = unmask_ioasic_irq,
 };
 
-
-#define unmask_ioasic_dma_irq unmask_ioasic_irq
-
-#define mask_ioasic_dma_irq mask_ioasic_irq
-
-#define ack_ioasic_dma_irq ack_ioasic_irq
-
-static inline void end_ioasic_dma_irq(unsigned int irq)
-{
-        clear_ioasic_irq(irq);
-        fast_iob();
-        end_ioasic_irq(irq);
-}
-
 static struct irq_chip ioasic_dma_irq_type = {
         .name = "IO-ASIC-DMA",
-        .ack = ack_ioasic_dma_irq,
-        .mask = mask_ioasic_dma_irq,
-        .mask_ack = ack_ioasic_dma_irq,
-        .unmask = unmask_ioasic_dma_irq,
-        .end = end_ioasic_dma_irq,
+        .irq_ack = ack_ioasic_irq,
+        .irq_mask = mask_ioasic_irq,
+        .irq_mask_ack = ack_ioasic_irq,
+        .irq_unmask = unmask_ioasic_irq,
 };
 
-
 void __init init_ioasic_irqs(int base)
 {
         int i;
@@ -100,10 +68,10 @@ void __init init_ioasic_irqs(int base)
         fast_iob();
 
         for (i = base; i < base + IO_INR_DMA; i++)
-                set_irq_chip_and_handler(i, &ioasic_irq_type,
+                irq_set_chip_and_handler(i, &ioasic_irq_type,
                                          handle_level_irq);
         for (; i < base + IO_IRQ_LINES; i++)
-                set_irq_chip(i, &ioasic_dma_irq_type);
+                irq_set_chip(i, &ioasic_dma_irq_type);
 
         ioasic_irq_base = base;
 }
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index ed90a8deabcc..37199f742c45 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -27,43 +27,40 @@
  */
 u32 cached_kn02_csr;
 
-
 static int kn02_irq_base;
 
-
-static inline void unmask_kn02_irq(unsigned int irq)
+static void unmask_kn02_irq(struct irq_data *d)
 {
         volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
                                                        KN02_CSR);
 
-        cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
+        cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16));
         *csr = cached_kn02_csr;
 }
 
-static inline void mask_kn02_irq(unsigned int irq)
+static void mask_kn02_irq(struct irq_data *d)
 {
         volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
                                                        KN02_CSR);
 
-        cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
+        cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16));
         *csr = cached_kn02_csr;
 }
 
-static void ack_kn02_irq(unsigned int irq)
+static void ack_kn02_irq(struct irq_data *d)
 {
-        mask_kn02_irq(irq);
+        mask_kn02_irq(d);
         iob();
 }
 
 static struct irq_chip kn02_irq_type = {
         .name = "KN02-CSR",
-        .ack = ack_kn02_irq,
-        .mask = mask_kn02_irq,
-        .mask_ack = ack_kn02_irq,
-        .unmask = unmask_kn02_irq,
+        .irq_ack = ack_kn02_irq,
+        .irq_mask = mask_kn02_irq,
+        .irq_mask_ack = ack_kn02_irq,
+        .irq_unmask = unmask_kn02_irq,
 };
 
-
 void __init init_kn02_irqs(int base)
 {
         volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
@@ -76,7 +73,7 @@ void __init init_kn02_irqs(int base)
         iob();
 
         for (i = base; i < base + KN02_IRQ_LINES; i++)
-                set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &kn02_irq_type, handle_level_irq);
 
         kn02_irq_base = base;
 }
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index bd5431e1f408..fa45e924be05 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -18,6 +18,7 @@
 #include <linux/spinlock.h>
 #include <linux/types.h>
 #include <linux/pm.h>
+#include <linux/irq.h>
 
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 02f505f23c32..ea57f39e6736 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -104,7 +104,7 @@ int rtc_mips_set_mmss(unsigned long nowtime)
                 CMOS_WRITE(real_seconds, RTC_SECONDS);
                 CMOS_WRITE(real_minutes, RTC_MINUTES);
         } else {
-                printk(KERN_WARNING
+                printk_once(KERN_NOTICE
                        "set_rtc_mmss: can't update from %d to %d\n",
                        cmos_minutes, real_minutes);
                 retval = -1;