diff options
Diffstat (limited to 'arch/mips/bcm47xx/nvram.c')
-rw-r--r-- | arch/mips/bcm47xx/nvram.c | 87 |
1 files changed, 60 insertions, 27 deletions
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index 48a4c70b3842..64613678ce84 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c | |||
@@ -23,39 +23,13 @@ | |||
23 | 23 | ||
24 | static char nvram_buf[NVRAM_SPACE]; | 24 | static char nvram_buf[NVRAM_SPACE]; |
25 | 25 | ||
26 | /* Probe for NVRAM header */ | 26 | static void nvram_find_and_copy(u32 base, u32 lim) |
27 | static void early_nvram_init(void) | ||
28 | { | 27 | { |
29 | #ifdef CONFIG_BCM47XX_SSB | ||
30 | struct ssb_mipscore *mcore_ssb; | ||
31 | #endif | ||
32 | #ifdef CONFIG_BCM47XX_BCMA | ||
33 | struct bcma_drv_cc *bcma_cc; | ||
34 | #endif | ||
35 | struct nvram_header *header; | 28 | struct nvram_header *header; |
36 | int i; | 29 | int i; |
37 | u32 base = 0; | ||
38 | u32 lim = 0; | ||
39 | u32 off; | 30 | u32 off; |
40 | u32 *src, *dst; | 31 | u32 *src, *dst; |
41 | 32 | ||
42 | switch (bcm47xx_bus_type) { | ||
43 | #ifdef CONFIG_BCM47XX_SSB | ||
44 | case BCM47XX_BUS_TYPE_SSB: | ||
45 | mcore_ssb = &bcm47xx_bus.ssb.mipscore; | ||
46 | base = mcore_ssb->pflash.window; | ||
47 | lim = mcore_ssb->pflash.window_size; | ||
48 | break; | ||
49 | #endif | ||
50 | #ifdef CONFIG_BCM47XX_BCMA | ||
51 | case BCM47XX_BUS_TYPE_BCMA: | ||
52 | bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc; | ||
53 | base = bcma_cc->pflash.window; | ||
54 | lim = bcma_cc->pflash.window_size; | ||
55 | break; | ||
56 | #endif | ||
57 | } | ||
58 | |||
59 | off = FLASH_MIN; | 33 | off = FLASH_MIN; |
60 | while (off <= lim) { | 34 | while (off <= lim) { |
61 | /* Windowed flash access */ | 35 | /* Windowed flash access */ |
@@ -86,6 +60,65 @@ found: | |||
86 | *dst++ = le32_to_cpu(*src++); | 60 | *dst++ = le32_to_cpu(*src++); |
87 | } | 61 | } |
88 | 62 | ||
63 | #ifdef CONFIG_BCM47XX_SSB | ||
64 | static void nvram_init_ssb(void) | ||
65 | { | ||
66 | struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore; | ||
67 | u32 base; | ||
68 | u32 lim; | ||
69 | |||
70 | if (mcore->pflash.present) { | ||
71 | base = mcore->pflash.window; | ||
72 | lim = mcore->pflash.window_size; | ||
73 | } else { | ||
74 | pr_err("Couldn't find supported flash memory\n"); | ||
75 | return; | ||
76 | } | ||
77 | |||
78 | nvram_find_and_copy(base, lim); | ||
79 | } | ||
80 | #endif | ||
81 | |||
82 | #ifdef CONFIG_BCM47XX_BCMA | ||
83 | static void nvram_init_bcma(void) | ||
84 | { | ||
85 | struct bcma_drv_cc *cc = &bcm47xx_bus.bcma.bus.drv_cc; | ||
86 | u32 base; | ||
87 | u32 lim; | ||
88 | |||
89 | if (cc->pflash.present) { | ||
90 | base = cc->pflash.window; | ||
91 | lim = cc->pflash.window_size; | ||
92 | #ifdef CONFIG_BCMA_SFLASH | ||
93 | } else if (cc->sflash.present) { | ||
94 | base = cc->sflash.window; | ||
95 | lim = cc->sflash.size; | ||
96 | #endif | ||
97 | } else { | ||
98 | pr_err("Couldn't find supported flash memory\n"); | ||
99 | return; | ||
100 | } | ||
101 | |||
102 | nvram_find_and_copy(base, lim); | ||
103 | } | ||
104 | #endif | ||
105 | |||
106 | static void early_nvram_init(void) | ||
107 | { | ||
108 | switch (bcm47xx_bus_type) { | ||
109 | #ifdef CONFIG_BCM47XX_SSB | ||
110 | case BCM47XX_BUS_TYPE_SSB: | ||
111 | nvram_init_ssb(); | ||
112 | break; | ||
113 | #endif | ||
114 | #ifdef CONFIG_BCM47XX_BCMA | ||
115 | case BCM47XX_BUS_TYPE_BCMA: | ||
116 | nvram_init_bcma(); | ||
117 | break; | ||
118 | #endif | ||
119 | } | ||
120 | } | ||
121 | |||
89 | int nvram_getenv(char *name, char *val, size_t val_len) | 122 | int nvram_getenv(char *name, char *val, size_t val_len) |
90 | { | 123 | { |
91 | char *var, *value, *end, *eq; | 124 | char *var, *value, *end, *eq; |