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-rw-r--r--arch/mips/basler/excite/Makefile1
-rw-r--r--arch/mips/basler/excite/excite_dbg_io.c121
-rw-r--r--arch/mips/basler/excite/excite_irq.c7
-rw-r--r--arch/mips/basler/excite/excite_setup.c4
4 files changed, 2 insertions, 131 deletions
diff --git a/arch/mips/basler/excite/Makefile b/arch/mips/basler/excite/Makefile
index 519142c2e4ef..cff29cf46d03 100644
--- a/arch/mips/basler/excite/Makefile
+++ b/arch/mips/basler/excite/Makefile
@@ -5,5 +5,4 @@
5obj-$(CONFIG_BASLER_EXCITE) += excite_irq.o excite_prom.o excite_setup.o \ 5obj-$(CONFIG_BASLER_EXCITE) += excite_irq.o excite_prom.o excite_setup.o \
6 excite_device.o excite_procfs.o 6 excite_device.o excite_procfs.o
7 7
8obj-$(CONFIG_KGDB) += excite_dbg_io.o
9obj-m += excite_iodev.o 8obj-m += excite_iodev.o
diff --git a/arch/mips/basler/excite/excite_dbg_io.c b/arch/mips/basler/excite/excite_dbg_io.c
deleted file mode 100644
index d289e3a868cf..000000000000
--- a/arch/mips/basler/excite/excite_dbg_io.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (C) 2004 by Basler Vision Technologies AG
3 * Author: Thomas Koeller <thomas.koeller@baslerweb.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/linkage.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <asm/gdb-stub.h>
24#include <asm/rm9k-ocd.h>
25#include <excite.h>
26
27#if defined(CONFIG_SERIAL_8250) && CONFIG_SERIAL_8250_NR_UARTS > 1
28#error Debug port used by serial driver
29#endif
30
31#define UART_CLK 25000000
32#define BASE_BAUD (UART_CLK / 16)
33#define REGISTER_BASE_0 0x0208UL
34#define REGISTER_BASE_1 0x0238UL
35
36#define REGISTER_BASE_DBG REGISTER_BASE_1
37
38#define CPRR 0x0004
39#define UACFG 0x0200
40#define UAINTS 0x0204
41#define UARBR (REGISTER_BASE_DBG + 0x0000)
42#define UATHR (REGISTER_BASE_DBG + 0x0004)
43#define UADLL (REGISTER_BASE_DBG + 0x0008)
44#define UAIER (REGISTER_BASE_DBG + 0x000c)
45#define UADLH (REGISTER_BASE_DBG + 0x0010)
46#define UAIIR (REGISTER_BASE_DBG + 0x0014)
47#define UAFCR (REGISTER_BASE_DBG + 0x0018)
48#define UALCR (REGISTER_BASE_DBG + 0x001c)
49#define UAMCR (REGISTER_BASE_DBG + 0x0020)
50#define UALSR (REGISTER_BASE_DBG + 0x0024)
51#define UAMSR (REGISTER_BASE_DBG + 0x0028)
52#define UASCR (REGISTER_BASE_DBG + 0x002c)
53
54#define PARITY_NONE 0
55#define PARITY_ODD 0x08
56#define PARITY_EVEN 0x18
57#define PARITY_MARK 0x28
58#define PARITY_SPACE 0x38
59
60#define DATA_5BIT 0x0
61#define DATA_6BIT 0x1
62#define DATA_7BIT 0x2
63#define DATA_8BIT 0x3
64
65#define STOP_1BIT 0x0
66#define STOP_2BIT 0x4
67
68#define BAUD_DBG 57600
69#define PARITY_DBG PARITY_NONE
70#define DATA_DBG DATA_8BIT
71#define STOP_DBG STOP_1BIT
72
73/* Initialize the serial port for KGDB debugging */
74void __init excite_kgdb_init(void)
75{
76 const u32 divisor = BASE_BAUD / BAUD_DBG;
77
78 /* Take the UART out of reset */
79 titan_writel(0x00ff1cff, CPRR);
80 titan_writel(0x00000000, UACFG);
81 titan_writel(0x00000002, UACFG);
82
83 titan_writel(0x0, UALCR);
84 titan_writel(0x0, UAIER);
85
86 /* Disable FIFOs */
87 titan_writel(0x00, UAFCR);
88
89 titan_writel(0x80, UALCR);
90 titan_writel(divisor & 0xff, UADLL);
91 titan_writel((divisor & 0xff00) >> 8, UADLH);
92 titan_writel(0x0, UALCR);
93
94 titan_writel(DATA_DBG | PARITY_DBG | STOP_DBG, UALCR);
95
96 /* Enable receiver interrupt */
97 titan_readl(UARBR);
98 titan_writel(0x1, UAIER);
99}
100
101int getDebugChar(void)
102{
103 while (!(titan_readl(UALSR) & 0x1));
104 return titan_readl(UARBR);
105}
106
107int putDebugChar(int data)
108{
109 while (!(titan_readl(UALSR) & 0x20));
110 titan_writel(data, UATHR);
111 return 1;
112}
113
114/* KGDB interrupt handler */
115asmlinkage void excite_kgdb_inthdl(void)
116{
117 if (unlikely(
118 ((titan_readl(UAIIR) & 0x7) == 4)
119 && ((titan_readl(UARBR) & 0xff) == 0x3)))
120 set_async_breakpoint(&regs->cp0_epc);
121}
diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c
index 4903e067916b..934e0a6b1011 100644
--- a/arch/mips/basler/excite/excite_irq.c
+++ b/arch/mips/basler/excite/excite_irq.c
@@ -50,10 +50,6 @@ void __init arch_init_irq(void)
50 mips_cpu_irq_init(); 50 mips_cpu_irq_init();
51 rm7k_cpu_irq_init(); 51 rm7k_cpu_irq_init();
52 rm9k_cpu_irq_init(); 52 rm9k_cpu_irq_init();
53
54#ifdef CONFIG_KGDB
55 excite_kgdb_init();
56#endif
57} 53}
58 54
59asmlinkage void plat_irq_dispatch(void) 55asmlinkage void plat_irq_dispatch(void)
@@ -90,9 +86,6 @@ asmlinkage void plat_irq_dispatch(void)
90 msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20)); 86 msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20));
91 if ((pending & (1 << TITAN_IRQ)) && msgint) { 87 if ((pending & (1 << TITAN_IRQ)) && msgint) {
92 ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10)); 88 ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
93#if defined(CONFIG_KGDB)
94 excite_kgdb_inthdl();
95#endif
96 do_IRQ(TITAN_IRQ); 89 do_IRQ(TITAN_IRQ);
97 return; 90 return;
98 } 91 }
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 6dd8f0d46d09..d66b3b8edf2a 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -95,13 +95,13 @@ static int __init excite_init_console(void)
95 /* Take the DUART out of reset */ 95 /* Take the DUART out of reset */
96 titan_writel(0x00ff1cff, CPRR); 96 titan_writel(0x00ff1cff, CPRR);
97 97
98#if defined(CONFIG_KGDB) || (CONFIG_SERIAL_8250_NR_UARTS > 1) 98#if (CONFIG_SERIAL_8250_NR_UARTS > 1)
99 /* Enable both ports */ 99 /* Enable both ports */
100 titan_writel(MASK_SER0 | MASK_SER1, UACFG); 100 titan_writel(MASK_SER0 | MASK_SER1, UACFG);
101#else 101#else
102 /* Enable port #0 only */ 102 /* Enable port #0 only */
103 titan_writel(MASK_SER0, UACFG); 103 titan_writel(MASK_SER0, UACFG);
104#endif /* defined(CONFIG_KGDB) */ 104#endif
105 105
106 /* 106 /*
107 * Set up serial port #0. Do not use autodetection; the result is 107 * Set up serial port #0. Do not use autodetection; the result is
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-24 13:27:37 -0400