diff options
Diffstat (limited to 'arch/mips/alchemy/devboards/db1x00/platform.c')
-rw-r--r-- | arch/mips/alchemy/devboards/db1x00/platform.c | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c new file mode 100644 index 000000000000..978d5ab3d678 --- /dev/null +++ b/arch/mips/alchemy/devboards/db1x00/platform.c | |||
@@ -0,0 +1,118 @@ | |||
1 | /* | ||
2 | * DBAu1xxx board platform device registration | ||
3 | * | ||
4 | * Copyright (C) 2009 Manuel Lauss | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | |||
24 | #include <asm/mach-au1x00/au1xxx.h> | ||
25 | #include <asm/mach-db1x00/bcsr.h> | ||
26 | #include "../platform.h" | ||
27 | |||
28 | /* DB1xxx PCMCIA interrupt sources: | ||
29 | * CD0/1 GPIO0/3 | ||
30 | * STSCHG0/1 GPIO1/4 | ||
31 | * CARD0/1 GPIO2/5 | ||
32 | * Db1550: 0/1, 21/22, 3/5 | ||
33 | */ | ||
34 | |||
35 | #define DB1XXX_HAS_PCMCIA | ||
36 | #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) | ||
37 | |||
38 | #if defined(CONFIG_MIPS_DB1000) | ||
39 | #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT | ||
40 | #define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT | ||
41 | #define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT | ||
42 | #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT | ||
43 | #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT | ||
44 | #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT | ||
45 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
46 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
47 | #elif defined(CONFIG_MIPS_DB1100) | ||
48 | #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT | ||
49 | #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT | ||
50 | #define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT | ||
51 | #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT | ||
52 | #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT | ||
53 | #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT | ||
54 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
55 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
56 | #elif defined(CONFIG_MIPS_DB1500) | ||
57 | #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT | ||
58 | #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT | ||
59 | #define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT | ||
60 | #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT | ||
61 | #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT | ||
62 | #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT | ||
63 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
64 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
65 | #elif defined(CONFIG_MIPS_DB1550) | ||
66 | #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT | ||
67 | #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT | ||
68 | #define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT | ||
69 | #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT | ||
70 | #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT | ||
71 | #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT | ||
72 | #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ | ||
73 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
74 | #else | ||
75 | /* other board: no PCMCIA */ | ||
76 | #undef DB1XXX_HAS_PCMCIA | ||
77 | #undef F_SWAPPED | ||
78 | #define F_SWAPPED 0 | ||
79 | #if defined(CONFIG_MIPS_BOSPORUS) | ||
80 | #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */ | ||
81 | #define BOARD_FLASH_WIDTH 2 /* 16-bits */ | ||
82 | #elif defined(CONFIG_MIPS_MIRAGE) | ||
83 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
84 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
85 | #endif | ||
86 | #endif | ||
87 | |||
88 | static int __init db1xxx_dev_init(void) | ||
89 | { | ||
90 | #ifdef DB1XXX_HAS_PCMCIA | ||
91 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, | ||
92 | PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, | ||
93 | PCMCIA_MEM_PHYS_ADDR, | ||
94 | PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, | ||
95 | PCMCIA_IO_PHYS_ADDR, | ||
96 | PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, | ||
97 | DB1XXX_PCMCIA_CARD0, | ||
98 | DB1XXX_PCMCIA_CD0, | ||
99 | /*DB1XXX_PCMCIA_STSCHG0*/0, | ||
100 | 0, | ||
101 | 0); | ||
102 | |||
103 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000, | ||
104 | PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, | ||
105 | PCMCIA_MEM_PHYS_ADDR + 0x004000000, | ||
106 | PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, | ||
107 | PCMCIA_IO_PHYS_ADDR + 0x004000000, | ||
108 | PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, | ||
109 | DB1XXX_PCMCIA_CARD1, | ||
110 | DB1XXX_PCMCIA_CD1, | ||
111 | /*DB1XXX_PCMCIA_STSCHG1*/0, | ||
112 | 0, | ||
113 | 1); | ||
114 | #endif | ||
115 | db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED); | ||
116 | return 0; | ||
117 | } | ||
118 | device_initcall(db1xxx_dev_init); | ||