diff options
Diffstat (limited to 'arch/microblaze/kernel/head.S')
| -rw-r--r-- | arch/microblaze/kernel/head.S | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S index 0db20b5abb54..778a5ce2e4fc 100644 --- a/arch/microblaze/kernel/head.S +++ b/arch/microblaze/kernel/head.S | |||
| @@ -62,15 +62,14 @@ real_start: | |||
| 62 | andi r1, r1, ~2 | 62 | andi r1, r1, ~2 |
| 63 | mts rmsr, r1 | 63 | mts rmsr, r1 |
| 64 | /* | 64 | /* |
| 65 | * Here is checking mechanism which check if Microblaze has msr instructions | 65 | * According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc' |
| 66 | * We load msr and compare it with previous r1 value - if is the same, | 66 | * if the msrclr instruction is not enabled. We use this to detect |
| 67 | * msr instructions works if not - cpu don't have them. | 67 | * if the opcode is available, by issuing msrclr and then testing the result. |
| 68 | * r8 == 0 - msr instructions are implemented | ||
| 69 | * r8 != 0 - msr instructions are not implemented | ||
| 68 | */ | 70 | */ |
| 69 | /* r8=0 - I have msr instr, 1 - I don't have them */ | 71 | msrclr r8, 0 /* clear nothing - just read msr for test */ |
| 70 | rsubi r0, r0, 1 /* set the carry bit */ | 72 | cmpu r8, r8, r1 /* r1 must contain msr reg content */ |
| 71 | msrclr r0, 0x4 /* try to clear it */ | ||
| 72 | /* read the carry bit, r8 will be '0' if msrclr exists */ | ||
| 73 | addik r8, r0, 0 | ||
| 74 | 73 | ||
| 75 | /* r7 may point to an FDT, or there may be one linked in. | 74 | /* r7 may point to an FDT, or there may be one linked in. |
| 76 | if it's in r7, we've got to save it away ASAP. | 75 | if it's in r7, we've got to save it away ASAP. |