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-rw-r--r--arch/m68knommu/platform/54xx/Makefile (renamed from arch/m68knommu/platform/548x/Makefile)0
-rw-r--r--arch/m68knommu/platform/54xx/config.c (renamed from arch/m68knommu/platform/548x/config.c)32
-rw-r--r--arch/m68knommu/platform/68328/entry.S7
-rw-r--r--arch/m68knommu/platform/68328/ints.c4
-rw-r--r--arch/m68knommu/platform/68360/entry.S7
-rw-r--r--arch/m68knommu/platform/coldfire/Makefile4
-rw-r--r--arch/m68knommu/platform/coldfire/cache.c48
-rw-r--r--arch/m68knommu/platform/coldfire/entry.S61
-rw-r--r--arch/m68knommu/platform/coldfire/head.S26
9 files changed, 107 insertions, 82 deletions
diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile
index e6035e7a2d3f..e6035e7a2d3f 100644
--- a/arch/m68knommu/platform/548x/Makefile
+++ b/arch/m68knommu/platform/54xx/Makefile
diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c
index 9888846bd1cf..78130984db95 100644
--- a/arch/m68knommu/platform/548x/config.c
+++ b/arch/m68knommu/platform/54xx/config.c
@@ -1,7 +1,7 @@
1/***************************************************************************/ 1/***************************************************************************/
2 2
3/* 3/*
4 * linux/arch/m68knommu/platform/548x/config.c 4 * linux/arch/m68knommu/platform/54xx/config.c
5 * 5 *
6 * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be> 6 * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7 */ 7 */
@@ -15,13 +15,13 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/machdep.h> 16#include <asm/machdep.h>
17#include <asm/coldfire.h> 17#include <asm/coldfire.h>
18#include <asm/m548xsim.h> 18#include <asm/m54xxsim.h>
19#include <asm/mcfuart.h> 19#include <asm/mcfuart.h>
20#include <asm/m548xgpt.h> 20#include <asm/m54xxgpt.h>
21 21
22/***************************************************************************/ 22/***************************************************************************/
23 23
24static struct mcf_platform_uart m548x_uart_platform[] = { 24static struct mcf_platform_uart m54xx_uart_platform[] = {
25 { 25 {
26 .mapbase = MCF_MBAR + MCFUART_BASE1, 26 .mapbase = MCF_MBAR + MCFUART_BASE1,
27 .irq = 64 + 35, 27 .irq = 64 + 35,
@@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = {
40 }, 40 },
41}; 41};
42 42
43static struct platform_device m548x_uart = { 43static struct platform_device m54xx_uart = {
44 .name = "mcfuart", 44 .name = "mcfuart",
45 .id = 0, 45 .id = 0,
46 .dev.platform_data = m548x_uart_platform, 46 .dev.platform_data = m54xx_uart_platform,
47}; 47};
48 48
49static struct platform_device *m548x_devices[] __initdata = { 49static struct platform_device *m54xx_devices[] __initdata = {
50 &m548x_uart, 50 &m54xx_uart,
51}; 51};
52 52
53 53
54/***************************************************************************/ 54/***************************************************************************/
55 55
56static void __init m548x_uart_init_line(int line, int irq) 56static void __init m54xx_uart_init_line(int line, int irq)
57{ 57{
58 int rts_cts; 58 int rts_cts;
59 59
@@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq)
72 MCF_MBAR + MCF_PAR_PSC(line)); 72 MCF_MBAR + MCF_PAR_PSC(line));
73} 73}
74 74
75static void __init m548x_uarts_init(void) 75static void __init m54xx_uarts_init(void)
76{ 76{
77 const int nrlines = ARRAY_SIZE(m548x_uart_platform); 77 const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
78 int line; 78 int line;
79 79
80 for (line = 0; (line < nrlines); line++) 80 for (line = 0; (line < nrlines); line++)
81 m548x_uart_init_line(line, m548x_uart_platform[line].irq); 81 m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
82} 82}
83 83
84/***************************************************************************/ 84/***************************************************************************/
85 85
86static void mcf548x_reset(void) 86static void mcf54xx_reset(void)
87{ 87{
88 /* disable interrupts and enable the watchdog */ 88 /* disable interrupts and enable the watchdog */
89 asm("movew #0x2700, %sr\n"); 89 asm("movew #0x2700, %sr\n");
@@ -97,8 +97,8 @@ static void mcf548x_reset(void)
97 97
98void __init config_BSP(char *commandp, int size) 98void __init config_BSP(char *commandp, int size)
99{ 99{
100 mach_reset = mcf548x_reset; 100 mach_reset = mcf54xx_reset;
101 m548x_uarts_init(); 101 m54xx_uarts_init();
102} 102}
103 103
104/***************************************************************************/ 104/***************************************************************************/
@@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size)
106static int __init init_BSP(void) 106static int __init init_BSP(void)
107{ 107{
108 108
109 platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices)); 109 platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
110 return 0; 110 return 0;
111} 111}
112 112
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
index 27241e16a526..240a7a6e25c8 100644
--- a/arch/m68knommu/platform/68328/entry.S
+++ b/arch/m68knommu/platform/68328/entry.S
@@ -106,6 +106,7 @@ Luser_return:
106 movel %sp,%d1 /* get thread_info pointer */ 106 movel %sp,%d1 /* get thread_info pointer */
107 andl #-THREAD_SIZE,%d1 107 andl #-THREAD_SIZE,%d1
108 movel %d1,%a2 108 movel %d1,%a2
1091:
109 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
110 andl #_TIF_WORK_MASK,%d1 111 andl #_TIF_WORK_MASK,%d1
111 jne Lwork_to_do 112 jne Lwork_to_do
@@ -120,13 +121,11 @@ Lsignal_return:
120 subql #4,%sp /* dummy return address*/ 121 subql #4,%sp /* dummy return address*/
121 SAVE_SWITCH_STACK 122 SAVE_SWITCH_STACK
122 pea %sp@(SWITCH_STACK_SIZE) 123 pea %sp@(SWITCH_STACK_SIZE)
123 clrl %sp@-
124 bsrw do_signal 124 bsrw do_signal
125 addql #8,%sp 125 addql #4,%sp
126 RESTORE_SWITCH_STACK 126 RESTORE_SWITCH_STACK
127 addql #4,%sp 127 addql #4,%sp
128Lreturn: 128 jra 1b
129 RESTORE_ALL
130 129
131/* 130/*
132 * This is the main interrupt handler, responsible for calling process_int() 131 * This is the main interrupt handler, responsible for calling process_int()
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 865852806a17..2a3af193ccd3 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -179,8 +179,8 @@ void __init init_IRQ(void)
179 IMR = ~0; 179 IMR = ~0;
180 180
181 for (i = 0; (i < NR_IRQS); i++) { 181 for (i = 0; (i < NR_IRQS); i++) {
182 set_irq_chip(irq, &intc_irq_chip); 182 set_irq_chip(i, &intc_irq_chip);
183 set_irq_handler(irq, handle_level_irq); 183 set_irq_handler(i, handle_level_irq);
184 } 184 }
185} 185}
186 186
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
index c131c6e1d92d..8a28788c0eea 100644
--- a/arch/m68knommu/platform/68360/entry.S
+++ b/arch/m68knommu/platform/68360/entry.S
@@ -102,6 +102,7 @@ Luser_return:
102 movel %sp,%d1 /* get thread_info pointer */ 102 movel %sp,%d1 /* get thread_info pointer */
103 andl #-THREAD_SIZE,%d1 103 andl #-THREAD_SIZE,%d1
104 movel %d1,%a2 104 movel %d1,%a2
1051:
105 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 106 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
106 andl #_TIF_WORK_MASK,%d1 107 andl #_TIF_WORK_MASK,%d1
107 jne Lwork_to_do 108 jne Lwork_to_do
@@ -116,13 +117,11 @@ Lsignal_return:
116 subql #4,%sp /* dummy return address*/ 117 subql #4,%sp /* dummy return address*/
117 SAVE_SWITCH_STACK 118 SAVE_SWITCH_STACK
118 pea %sp@(SWITCH_STACK_SIZE) 119 pea %sp@(SWITCH_STACK_SIZE)
119 clrl %sp@-
120 bsrw do_signal 120 bsrw do_signal
121 addql #8,%sp 121 addql #4,%sp
122 RESTORE_SWITCH_STACK 122 RESTORE_SWITCH_STACK
123 addql #4,%sp 123 addql #4,%sp
124Lreturn: 124 jra 1b
125 RESTORE_ALL
126 125
127/* 126/*
128 * This is the main interrupt handler, responsible for calling do_IRQ() 127 * This is the main interrupt handler, responsible for calling do_IRQ()
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index 45f501fa4525..a8967baabd72 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -14,7 +14,7 @@
14 14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16 16
17obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o 17obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o
18obj-$(CONFIG_M5206) += timers.o intc.o 18obj-$(CONFIG_M5206) += timers.o intc.o
19obj-$(CONFIG_M5206e) += timers.o intc.o 19obj-$(CONFIG_M5206e) += timers.o intc.o
20obj-$(CONFIG_M520x) += pit.o intc-simr.o 20obj-$(CONFIG_M520x) += pit.o intc-simr.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_M528x) += pit.o intc-2.o
26obj-$(CONFIG_M5307) += timers.o intc.o 26obj-$(CONFIG_M5307) += timers.o intc.o
27obj-$(CONFIG_M532x) += timers.o intc-simr.o 27obj-$(CONFIG_M532x) += timers.o intc-simr.o
28obj-$(CONFIG_M5407) += timers.o intc.o 28obj-$(CONFIG_M5407) += timers.o intc.o
29obj-$(CONFIG_M548x) += sltimers.o intc-2.o 29obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
30 30
31obj-y += pinmux.o gpio.o 31obj-y += pinmux.o gpio.o
32extra-y := head.o 32extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c
new file mode 100644
index 000000000000..235d3c4f4f0f
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
1/***************************************************************************/
2
3/*
4 * cache.c -- general ColdFire Cache maintainence code
5 *
6 * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/coldfire.h>
13#include <asm/mcfsim.h>
14
15/***************************************************************************/
16#ifdef CACHE_PUSH
17/***************************************************************************/
18
19/*
20 * Use cpushl to push all dirty cache lines back to memory.
21 * Older versions of GAS don't seem to know how to generate the
22 * ColdFire cpushl instruction... Oh well, bit stuff it for now.
23 */
24
25void mcf_cache_push(void)
26{
27 __asm__ __volatile__ (
28 "clrl %%d0\n\t"
29 "1:\n\t"
30 "movel %%d0,%%a0\n\t"
31 "2:\n\t"
32 ".word 0xf468\n\t"
33 "addl %0,%%a0\n\t"
34 "cmpl %1,%%a0\n\t"
35 "blt 2b\n\t"
36 "addql #1,%%d0\n\t"
37 "cmpil %2,%%d0\n\t"
38 "bne 1b\n\t"
39 : /* No output */
40 : "i" (CACHE_LINE_SIZE),
41 "i" (DCACHE_SIZE / CACHE_WAYS),
42 "i" (CACHE_WAYS)
43 : "d0", "a0" );
44}
45
46/***************************************************************************/
47#endif /* CACHE_PUSH */
48/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index 5e92bed94b7e..4ddfc3da70d8 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -36,13 +36,16 @@
36#include <asm/asm-offsets.h> 36#include <asm/asm-offsets.h>
37#include <asm/entry.h> 37#include <asm/entry.h>
38 38
39#ifdef CONFIG_COLDFIRE_SW_A7
40/*
41 * Define software copies of the supervisor and user stack pointers.
42 */
39.bss 43.bss
40
41sw_ksp: 44sw_ksp:
42.long 0 45.long 0
43
44sw_usp: 46sw_usp:
45.long 0 47.long 0
48#endif /* CONFIG_COLDFIRE_SW_A7 */
46 49
47.text 50.text
48 51
@@ -51,7 +54,6 @@ sw_usp:
51.globl ret_from_exception 54.globl ret_from_exception
52.globl ret_from_signal 55.globl ret_from_signal
53.globl sys_call_table 56.globl sys_call_table
54.globl ret_from_interrupt
55.globl inthandler 57.globl inthandler
56.globl fasthandler 58.globl fasthandler
57 59
@@ -140,20 +142,7 @@ Luser_return:
140 jne Lwork_to_do /* still work to do */ 142 jne Lwork_to_do /* still work to do */
141 143
142Lreturn: 144Lreturn:
143 move #0x2700,%sr /* disable intrs */ 145 RESTORE_USER
144 movel sw_usp,%a0 /* get usp */
145 movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */
146 movel %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */
147 moveml %sp@,%d1-%d5/%a0-%a2
148 lea %sp@(32),%sp /* space for 8 regs */
149 movel %sp@+,%d0
150 addql #4,%sp /* orig d0 */
151 addl %sp@+,%sp /* stk adj */
152 addql #8,%sp /* remove exception */
153 movel %sp,sw_ksp /* save ksp */
154 subql #8,sw_usp /* set exception */
155 movel sw_usp,%sp /* restore usp */
156 rte
157 146
158Lwork_to_do: 147Lwork_to_do:
159 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ 148 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
@@ -167,12 +156,11 @@ Lsignal_return:
167 subql #4,%sp /* dummy return address */ 156 subql #4,%sp /* dummy return address */
168 SAVE_SWITCH_STACK 157 SAVE_SWITCH_STACK
169 pea %sp@(SWITCH_STACK_SIZE) 158 pea %sp@(SWITCH_STACK_SIZE)
170 clrl %sp@-
171 jsr do_signal 159 jsr do_signal
172 addql #8,%sp 160 addql #4,%sp
173 RESTORE_SWITCH_STACK 161 RESTORE_SWITCH_STACK
174 addql #4,%sp 162 addql #4,%sp
175 jmp Lreturn 163 jmp Luser_return
176 164
177/* 165/*
178 * This is the generic interrupt handler (for all hardware interrupt 166 * This is the generic interrupt handler (for all hardware interrupt
@@ -192,31 +180,7 @@ ENTRY(inthandler)
192 jbsr do_IRQ /* call high level irq handler */ 180 jbsr do_IRQ /* call high level irq handler */
193 lea %sp@(8),%sp /* pop args off stack */ 181 lea %sp@(8),%sp /* pop args off stack */
194 182
195 bra ret_from_interrupt /* this was fallthrough */ 183 bra ret_from_exception
196
197/*
198 * This is the fast interrupt handler (for certain hardware interrupt
199 * sources). Unlike the normal interrupt handler it just uses the
200 * current stack (doesn't care if it is user or kernel). It also
201 * doesn't bother doing the bottom half handlers.
202 */
203ENTRY(fasthandler)
204 SAVE_LOCAL
205
206 movew %sp@(PT_OFF_FORMATVEC),%d0
207 andl #0x03fc,%d0 /* mask out vector only */
208
209 movel %sp,%sp@- /* push regs arg */
210 lsrl #2,%d0 /* calculate real vector # */
211 movel %d0,%sp@- /* push vector number */
212 jbsr do_IRQ /* call high level irq handler */
213 lea %sp@(8),%sp /* pop args off stack */
214
215 RESTORE_LOCAL
216
217ENTRY(ret_from_interrupt)
218 /* the fasthandler is confusing me, haven't seen any user */
219 jmp ret_from_exception
220 184
221/* 185/*
222 * Beware - when entering resume, prev (the current task) is 186 * Beware - when entering resume, prev (the current task) is
@@ -227,9 +191,8 @@ ENTRY(ret_from_interrupt)
227 */ 191 */
228ENTRY(resume) 192ENTRY(resume)
229 movel %a0, %d1 /* get prev thread in d1 */ 193 movel %a0, %d1 /* get prev thread in d1 */
230 194 RDUSP
231 movel sw_usp,%d0 /* save usp */ 195 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
232 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
233 196
234 SAVE_SWITCH_STACK 197 SAVE_SWITCH_STACK
235 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */ 198 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
@@ -237,5 +200,5 @@ ENTRY(resume)
237 RESTORE_SWITCH_STACK 200 RESTORE_SWITCH_STACK
238 201
239 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */ 202 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
240 movel %a0, sw_usp 203 WRUSP
241 rts 204 rts
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 0b2d7c7adf79..d5977909ae5f 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -3,7 +3,7 @@
3/* 3/*
4 * head.S -- common startup code for ColdFire CPUs. 4 * head.S -- common startup code for ColdFire CPUs.
5 * 5 *
6 * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>. 6 * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
7 */ 7 */
8 8
9/*****************************************************************************/ 9/*****************************************************************************/
@@ -13,7 +13,6 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/coldfire.h> 15#include <asm/coldfire.h>
16#include <asm/mcfcache.h>
17#include <asm/mcfsim.h> 16#include <asm/mcfsim.h>
18#include <asm/thread_info.h> 17#include <asm/thread_info.h>
19 18
@@ -173,10 +172,27 @@ _start:
173 172
174 /* 173 /*
175 * Now that we know what the memory is, lets enable cache 174 * Now that we know what the memory is, lets enable cache
176 * and get things moving. This is Coldfire CPU specific. 175 * and get things moving. This is Coldfire CPU specific. Not
176 * all version cores have identical cache register setup. But
177 * it is very similar. Define the exact settings in the headers
178 * then the code here is the same for all.
177 */ 179 */
178 CACHE_ENABLE /* enable CPU cache */ 180 movel #CACHE_INIT,%d0 /* invalidate whole cache */
179 181 movec %d0,%CACR
182 nop
183 movel #ACR0_MODE,%d0 /* set RAM region for caching */
184 movec %d0,%ACR0
185 movel #ACR1_MODE,%d0 /* anything else to cache? */
186 movec %d0,%ACR1
187#ifdef ACR2_MODE
188 movel #ACR2_MODE,%d0
189 movec %d0,%ACR2
190 movel #ACR3_MODE,%d0
191 movec %d0,%ACR3
192#endif
193 movel #CACHE_MODE,%d0 /* enable cache */
194 movec %d0,%CACR
195 nop
180 196
181#ifdef CONFIG_ROMFS_FS 197#ifdef CONFIG_ROMFS_FS
182 /* 198 /*