diff options
Diffstat (limited to 'arch/m68knommu/platform/coldfire/pit.c')
-rw-r--r-- | arch/m68knommu/platform/coldfire/pit.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68knommu/platform/coldfire/pit.c index 61b96211f8ff..aebea19abd78 100644 --- a/arch/m68knommu/platform/coldfire/pit.c +++ b/arch/m68knommu/platform/coldfire/pit.c | |||
@@ -32,7 +32,6 @@ | |||
32 | */ | 32 | */ |
33 | #define FREQ ((MCF_CLK / 2) / 64) | 33 | #define FREQ ((MCF_CLK / 2) / 64) |
34 | #define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a)) | 34 | #define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a)) |
35 | #define INTC0 (MCF_IPSBAR + MCFICM_INTC0) | ||
36 | #define PIT_CYCLES_PER_JIFFY (FREQ / HZ) | 35 | #define PIT_CYCLES_PER_JIFFY (FREQ / HZ) |
37 | 36 | ||
38 | static u32 pit_cnt; | 37 | static u32 pit_cnt; |
@@ -147,15 +146,12 @@ static struct clocksource pit_clk = { | |||
147 | .read = pit_read_clk, | 146 | .read = pit_read_clk, |
148 | .shift = 20, | 147 | .shift = 20, |
149 | .mask = CLOCKSOURCE_MASK(32), | 148 | .mask = CLOCKSOURCE_MASK(32), |
150 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
151 | }; | 149 | }; |
152 | 150 | ||
153 | /***************************************************************************/ | 151 | /***************************************************************************/ |
154 | 152 | ||
155 | void hw_timer_init(void) | 153 | void hw_timer_init(void) |
156 | { | 154 | { |
157 | u32 imr; | ||
158 | |||
159 | cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id()); | 155 | cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id()); |
160 | cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); | 156 | cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); |
161 | cf_pit_clockevent.max_delta_ns = | 157 | cf_pit_clockevent.max_delta_ns = |
@@ -166,11 +162,6 @@ void hw_timer_init(void) | |||
166 | 162 | ||
167 | setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq); | 163 | setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq); |
168 | 164 | ||
169 | __raw_writeb(ICR_INTRCONF, INTC0 + MCFINTC_ICR0 + MCFINT_PIT1); | ||
170 | imr = __raw_readl(INTC0 + MCFPIT_IMR); | ||
171 | imr &= ~MCFPIT_IMR_IBIT; | ||
172 | __raw_writel(imr, INTC0 + MCFPIT_IMR); | ||
173 | |||
174 | pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift); | 165 | pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift); |
175 | clocksource_register(&pit_clk); | 166 | clocksource_register(&pit_clk); |
176 | } | 167 | } |