aboutsummaryrefslogtreecommitdiffstats
path: root/arch/m68knommu/platform/5249/config.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/m68knommu/platform/5249/config.c')
-rw-r--r--arch/m68knommu/platform/5249/config.c49
1 files changed, 16 insertions, 33 deletions
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index 93d998825925..646f5ba462fc 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -48,11 +48,11 @@ static void __init m5249_uart_init_line(int line, int irq)
48 if (line == 0) { 48 if (line == 0) {
49 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); 49 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
50 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); 50 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
51 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); 51 mcf_mapirq2imr(irq, MCFINTC_UART0);
52 } else if (line == 1) { 52 } else if (line == 1) {
53 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); 53 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
54 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); 54 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
55 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); 55 mcf_mapirq2imr(irq, MCFINTC_UART1);
56 } 56 }
57} 57}
58 58
@@ -65,38 +65,21 @@ static void __init m5249_uarts_init(void)
65 m5249_uart_init_line(line, m5249_uart_platform[line].irq); 65 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
66} 66}
67 67
68
69/***************************************************************************/ 68/***************************************************************************/
70 69
71void mcf_autovector(unsigned int vec) 70static void __init m5249_timers_init(void)
72{ 71{
73 volatile unsigned char *mbar; 72 /* Timer1 is always used as system timer */
74 73 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 if ((vec >= 25) && (vec <= 31)) { 74 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mbar = (volatile unsigned char *) MCF_MBAR; 75 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77 vec = 0x1 << (vec - 24); 76
78 *(mbar + MCFSIM_AVR) |= vec; 77#ifdef CONFIG_HIGHPROFILE
79 mcf_setimr(mcf_getimr() & ~vec); 78 /* Timer2 is to be used as a high speed profile timer */
80 } 79 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81} 80 MCF_MBAR + MCFSIM_TIMER2ICR);
82 81 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83/***************************************************************************/ 82#endif
84
85void mcf_settimericr(unsigned int timer, unsigned int level)
86{
87 volatile unsigned char *icrp;
88 unsigned int icr, imr;
89
90 if (timer <= 2) {
91 switch (timer) {
92 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
93 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
94 }
95
96 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
97 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
98 mcf_setimr(mcf_getimr() & ~imr);
99 }
100} 83}
101 84
102/***************************************************************************/ 85/***************************************************************************/
@@ -114,15 +97,15 @@ void m5249_cpu_reset(void)
114 97
115void __init config_BSP(char *commandp, int size) 98void __init config_BSP(char *commandp, int size)
116{ 99{
117 mcf_setimr(MCFSIM_IMR_MASKALL);
118 mach_reset = m5249_cpu_reset; 100 mach_reset = m5249_cpu_reset;
101 m5249_timers_init();
102 m5249_uarts_init();
119} 103}
120 104
121/***************************************************************************/ 105/***************************************************************************/
122 106
123static int __init init_BSP(void) 107static int __init init_BSP(void)
124{ 108{
125 m5249_uarts_init();
126 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices)); 109 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
127 return 0; 110 return 0;
128} 111}