diff options
Diffstat (limited to 'arch/m68knommu/platform/5206e/config.c')
-rw-r--r-- | arch/m68knommu/platform/5206e/config.c | 59 |
1 files changed, 22 insertions, 37 deletions
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c index 65887799db81..942397984c66 100644 --- a/arch/m68knommu/platform/5206e/config.c +++ b/arch/m68knommu/platform/5206e/config.c | |||
@@ -15,8 +15,8 @@ | |||
15 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
16 | #include <asm/coldfire.h> | 16 | #include <asm/coldfire.h> |
17 | #include <asm/mcfsim.h> | 17 | #include <asm/mcfsim.h> |
18 | #include <asm/mcfdma.h> | ||
19 | #include <asm/mcfuart.h> | 18 | #include <asm/mcfuart.h> |
19 | #include <asm/mcfdma.h> | ||
20 | 20 | ||
21 | /***************************************************************************/ | 21 | /***************************************************************************/ |
22 | 22 | ||
@@ -49,11 +49,11 @@ static void __init m5206e_uart_init_line(int line, int irq) | |||
49 | if (line == 0) { | 49 | if (line == 0) { |
50 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); | 50 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); |
51 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); | 51 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); |
52 | mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); | 52 | mcf_mapirq2imr(irq, MCFINTC_UART0); |
53 | } else if (line == 1) { | 53 | } else if (line == 1) { |
54 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); | 54 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); |
55 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); | 55 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); |
56 | mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); | 56 | mcf_mapirq2imr(irq, MCFINTC_UART1); |
57 | } | 57 | } |
58 | } | 58 | } |
59 | 59 | ||
@@ -68,38 +68,19 @@ static void __init m5206e_uarts_init(void) | |||
68 | 68 | ||
69 | /***************************************************************************/ | 69 | /***************************************************************************/ |
70 | 70 | ||
71 | void mcf_autovector(unsigned int vec) | 71 | static void __init m5206e_timers_init(void) |
72 | { | 72 | { |
73 | volatile unsigned char *mbar; | 73 | /* Timer1 is always used as system timer */ |
74 | unsigned char icr; | 74 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, |
75 | 75 | MCF_MBAR + MCFSIM_TIMER1ICR); | |
76 | if ((vec >= 25) && (vec <= 31)) { | 76 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); |
77 | vec -= 25; | 77 | |
78 | mbar = (volatile unsigned char *) MCF_MBAR; | 78 | #ifdef CONFIG_HIGHPROFILE |
79 | icr = MCFSIM_ICR_AUTOVEC | (vec << 3); | 79 | /* Timer2 is to be used as a high speed profile timer */ |
80 | *(mbar + MCFSIM_ICR1 + vec) = icr; | 80 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, |
81 | vec = 0x1 << (vec + 1); | 81 | MCF_MBAR + MCFSIM_TIMER2ICR); |
82 | mcf_setimr(mcf_getimr() & ~vec); | 82 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); |
83 | } | 83 | #endif |
84 | } | ||
85 | |||
86 | /***************************************************************************/ | ||
87 | |||
88 | void mcf_settimericr(unsigned int timer, unsigned int level) | ||
89 | { | ||
90 | volatile unsigned char *icrp; | ||
91 | unsigned int icr, imr; | ||
92 | |||
93 | if (timer <= 2) { | ||
94 | switch (timer) { | ||
95 | case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break; | ||
96 | default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break; | ||
97 | } | ||
98 | |||
99 | icrp = (volatile unsigned char *) (MCF_MBAR + icr); | ||
100 | *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; | ||
101 | mcf_setimr(mcf_getimr() & ~imr); | ||
102 | } | ||
103 | } | 84 | } |
104 | 85 | ||
105 | /***************************************************************************/ | 86 | /***************************************************************************/ |
@@ -117,8 +98,6 @@ void m5206e_cpu_reset(void) | |||
117 | 98 | ||
118 | void __init config_BSP(char *commandp, int size) | 99 | void __init config_BSP(char *commandp, int size) |
119 | { | 100 | { |
120 | mcf_setimr(MCFSIM_IMR_MASKALL); | ||
121 | |||
122 | #if defined(CONFIG_NETtel) | 101 | #if defined(CONFIG_NETtel) |
123 | /* Copy command line from FLASH to local buffer... */ | 102 | /* Copy command line from FLASH to local buffer... */ |
124 | memcpy(commandp, (char *) 0xf0004000, size); | 103 | memcpy(commandp, (char *) 0xf0004000, size); |
@@ -126,13 +105,19 @@ void __init config_BSP(char *commandp, int size) | |||
126 | #endif /* CONFIG_NETtel */ | 105 | #endif /* CONFIG_NETtel */ |
127 | 106 | ||
128 | mach_reset = m5206e_cpu_reset; | 107 | mach_reset = m5206e_cpu_reset; |
108 | m5206e_timers_init(); | ||
109 | m5206e_uarts_init(); | ||
110 | |||
111 | /* Only support the external interrupts on their primary level */ | ||
112 | mcf_mapirq2imr(25, MCFINTC_EINT1); | ||
113 | mcf_mapirq2imr(28, MCFINTC_EINT4); | ||
114 | mcf_mapirq2imr(31, MCFINTC_EINT7); | ||
129 | } | 115 | } |
130 | 116 | ||
131 | /***************************************************************************/ | 117 | /***************************************************************************/ |
132 | 118 | ||
133 | static int __init init_BSP(void) | 119 | static int __init init_BSP(void) |
134 | { | 120 | { |
135 | m5206e_uarts_init(); | ||
136 | platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); | 121 | platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); |
137 | return 0; | 122 | return 0; |
138 | } | 123 | } |