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Diffstat (limited to 'arch/m68knommu/platform/5206/config.c')
-rw-r--r--arch/m68knommu/platform/5206/config.c56
1 files changed, 21 insertions, 35 deletions
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
index f6f79874e9af..9c335465e66d 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -49,11 +49,11 @@ static void __init m5206_uart_init_line(int line, int irq)
49 if (line == 0) { 49 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); 50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); 51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); 52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) { 53 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); 54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); 55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); 56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 } 57 }
58} 58}
59 59
@@ -68,38 +68,19 @@ static void __init m5206_uarts_init(void)
68 68
69/***************************************************************************/ 69/***************************************************************************/
70 70
71void mcf_autovector(unsigned int vec) 71static void __init m5206_timers_init(void)
72{ 72{
73 volatile unsigned char *mbar; 73 /* Timer1 is always used as system timer */
74 unsigned char icr; 74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 if ((vec >= 25) && (vec <= 31)) { 76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77 vec -= 25; 77
78 mbar = (volatile unsigned char *) MCF_MBAR; 78#ifdef CONFIG_HIGHPROFILE
79 icr = MCFSIM_ICR_AUTOVEC | (vec << 3); 79 /* Timer2 is to be used as a high speed profile timer */
80 *(mbar + MCFSIM_ICR1 + vec) = icr; 80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 vec = 0x1 << (vec + 1); 81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_setimr(mcf_getimr() & ~vec); 82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83 } 83#endif
84}
85
86/***************************************************************************/
87
88void mcf_settimericr(unsigned int timer, unsigned int level)
89{
90 volatile unsigned char *icrp;
91 unsigned int icr, imr;
92
93 if (timer <= 2) {
94 switch (timer) {
95 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
96 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
97 }
98
99 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
100 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
101 mcf_setimr(mcf_getimr() & ~imr);
102 }
103} 84}
104 85
105/***************************************************************************/ 86/***************************************************************************/
@@ -117,15 +98,20 @@ void m5206_cpu_reset(void)
117 98
118void __init config_BSP(char *commandp, int size) 99void __init config_BSP(char *commandp, int size)
119{ 100{
120 mcf_setimr(MCFSIM_IMR_MASKALL);
121 mach_reset = m5206_cpu_reset; 101 mach_reset = m5206_cpu_reset;
102 m5206_timers_init();
103 m5206_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(28, MCFINTC_EINT4);
108 mcf_mapirq2imr(31, MCFINTC_EINT7);
122} 109}
123 110
124/***************************************************************************/ 111/***************************************************************************/
125 112
126static int __init init_BSP(void) 113static int __init init_BSP(void)
127{ 114{
128 m5206_uarts_init();
129 platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices)); 115 platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
130 return 0; 116 return 0;
131} 117}