1 files changed, 9 insertions, 9 deletions

diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
index f3cff26d6e74..0c7a1e8c77b0 100644
--- a/arch/m32r/platforms/usrv/setup.c
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -138,32 +138,32 @@ void __init init_IRQ(void)
                 once++;
 
         /* MFT2 : system timer */
-        set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
+        irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
                                  handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_mappi_irq(M32R_IRQ_MFT2);
 
 #if defined(CONFIG_SERIAL_M32R_SIO)
         /* SIO0_R : uart receive data */
-        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
+        irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
                                  handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
+        irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
                                  handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1_R : uart receive data */
-        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
+        irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
                                  handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
+        irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
                                  handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_S);
@@ -171,7 +171,7 @@ void __init init_IRQ(void)
 
         /* INT#67-#71: CFC#0 IREQ on PLD */
         for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
-                set_irq_chip_and_handler(PLD_IRQ_CF0 + i,
+                irq_set_chip_and_handler(PLD_IRQ_CF0 + i,
                                          &m32700ut_pld_irq_type,
                                          handle_level_irq);
                 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -181,14 +181,14 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
         /* INT#76: 16552D#0 IREQ on PLD */
-        set_irq_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
+        irq_set_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
                                  handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
                 = PLD_ICUCR_ISMOD03;    /* 'H' level sense */
         disable_m32700ut_pld_irq(PLD_IRQ_UART0);
 
         /* INT#77: 16552D#1 IREQ on PLD */
-        set_irq_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
+        irq_set_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
                                  handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
                 = PLD_ICUCR_ISMOD03;    /* 'H' level sense */
@@ -197,7 +197,7 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
         /* INT#80: AK4524 IREQ on PLD */
-        set_irq_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
+        irq_set_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
                                  handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
                 = PLD_ICUCR_ISMOD01;    /* 'L' level sense */