diff options
Diffstat (limited to 'arch/m32r/kernel/setup_oaks32r.c')
-rw-r--r-- | arch/m32r/kernel/setup_oaks32r.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c index 0e9e63538c0f..cd62598e3cea 100644 --- a/arch/m32r/kernel/setup_oaks32r.c +++ b/arch/m32r/kernel/setup_oaks32r.c | |||
@@ -7,7 +7,6 @@ | |||
7 | * Hitoshi Yamamoto, Mamoru Sakugawa | 7 | * Hitoshi Yamamoto, Mamoru Sakugawa |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/config.h> | ||
11 | #include <linux/irq.h> | 10 | #include <linux/irq.h> |
12 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
13 | #include <linux/init.h> | 12 | #include <linux/init.h> |
@@ -85,7 +84,7 @@ void __init init_IRQ(void) | |||
85 | #ifdef CONFIG_NE2000 | 84 | #ifdef CONFIG_NE2000 |
86 | /* INT3 : LAN controller (RTL8019AS) */ | 85 | /* INT3 : LAN controller (RTL8019AS) */ |
87 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; | 86 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; |
88 | irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type; | 87 | irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type; |
89 | irq_desc[M32R_IRQ_INT3].action = 0; | 88 | irq_desc[M32R_IRQ_INT3].action = 0; |
90 | irq_desc[M32R_IRQ_INT3].depth = 1; | 89 | irq_desc[M32R_IRQ_INT3].depth = 1; |
91 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 90 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -94,7 +93,7 @@ void __init init_IRQ(void) | |||
94 | 93 | ||
95 | /* MFT2 : system timer */ | 94 | /* MFT2 : system timer */ |
96 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 95 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
97 | irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type; | 96 | irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type; |
98 | irq_desc[M32R_IRQ_MFT2].action = 0; | 97 | irq_desc[M32R_IRQ_MFT2].action = 0; |
99 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 98 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
100 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 99 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -103,7 +102,7 @@ void __init init_IRQ(void) | |||
103 | #ifdef CONFIG_SERIAL_M32R_SIO | 102 | #ifdef CONFIG_SERIAL_M32R_SIO |
104 | /* SIO0_R : uart receive data */ | 103 | /* SIO0_R : uart receive data */ |
105 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 104 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
106 | irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type; | 105 | irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type; |
107 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 106 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
108 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 107 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
109 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 108 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -111,7 +110,7 @@ void __init init_IRQ(void) | |||
111 | 110 | ||
112 | /* SIO0_S : uart send data */ | 111 | /* SIO0_S : uart send data */ |
113 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 112 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
114 | irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type; | 113 | irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type; |
115 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 114 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
116 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 115 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
117 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 116 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -119,7 +118,7 @@ void __init init_IRQ(void) | |||
119 | 118 | ||
120 | /* SIO1_R : uart receive data */ | 119 | /* SIO1_R : uart receive data */ |
121 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 120 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
122 | irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type; | 121 | irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type; |
123 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 122 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
124 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 123 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
125 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 124 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -127,7 +126,7 @@ void __init init_IRQ(void) | |||
127 | 126 | ||
128 | /* SIO1_S : uart send data */ | 127 | /* SIO1_S : uart send data */ |
129 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 128 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
130 | irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type; | 129 | irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type; |
131 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 130 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
132 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 131 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
133 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 132 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |