diff options
Diffstat (limited to 'arch/ia64/pci/pci.c')
-rw-r--r-- | arch/ia64/pci/pci.c | 49 |
1 files changed, 27 insertions, 22 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index c0fca2c1c858..64aff520b899 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -131,6 +131,7 @@ alloc_pci_controller (int seg) | |||
131 | } | 131 | } |
132 | 132 | ||
133 | struct pci_root_info { | 133 | struct pci_root_info { |
134 | struct acpi_device *bridge; | ||
134 | struct pci_controller *controller; | 135 | struct pci_controller *controller; |
135 | char *name; | 136 | char *name; |
136 | }; | 137 | }; |
@@ -297,9 +298,20 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data) | |||
297 | window->offset = offset; | 298 | window->offset = offset; |
298 | 299 | ||
299 | if (insert_resource(root, &window->resource)) { | 300 | if (insert_resource(root, &window->resource)) { |
300 | printk(KERN_ERR "alloc 0x%llx-0x%llx from %s for %s failed\n", | 301 | dev_err(&info->bridge->dev, |
301 | window->resource.start, window->resource.end, | 302 | "can't allocate host bridge window %pR\n", |
302 | root->name, info->name); | 303 | &window->resource); |
304 | } else { | ||
305 | if (offset) | ||
306 | dev_info(&info->bridge->dev, "host bridge window %pR " | ||
307 | "(PCI address [%#llx-%#llx])\n", | ||
308 | &window->resource, | ||
309 | window->resource.start - offset, | ||
310 | window->resource.end - offset); | ||
311 | else | ||
312 | dev_info(&info->bridge->dev, | ||
313 | "host bridge window %pR\n", | ||
314 | &window->resource); | ||
303 | } | 315 | } |
304 | 316 | ||
305 | return AE_OK; | 317 | return AE_OK; |
@@ -308,9 +320,9 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data) | |||
308 | static void __devinit | 320 | static void __devinit |
309 | pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) | 321 | pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) |
310 | { | 322 | { |
311 | int i, j; | 323 | int i; |
312 | 324 | ||
313 | j = 0; | 325 | pci_bus_remove_resources(bus); |
314 | for (i = 0; i < ctrl->windows; i++) { | 326 | for (i = 0; i < ctrl->windows; i++) { |
315 | struct resource *res = &ctrl->window[i].resource; | 327 | struct resource *res = &ctrl->window[i].resource; |
316 | /* HP's firmware has a hack to work around a Windows bug. | 328 | /* HP's firmware has a hack to work around a Windows bug. |
@@ -318,12 +330,7 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) | |||
318 | if ((res->flags & IORESOURCE_MEM) && | 330 | if ((res->flags & IORESOURCE_MEM) && |
319 | (res->end - res->start < 16)) | 331 | (res->end - res->start < 16)) |
320 | continue; | 332 | continue; |
321 | if (j >= PCI_BUS_NUM_RESOURCES) { | 333 | pci_bus_add_resource(bus, res, 0); |
322 | printk("Ignoring range [%#llx-%#llx] (%lx)\n", | ||
323 | res->start, res->end, res->flags); | ||
324 | continue; | ||
325 | } | ||
326 | bus->resource[j++] = res; | ||
327 | } | 334 | } |
328 | } | 335 | } |
329 | 336 | ||
@@ -364,6 +371,7 @@ pci_acpi_scan_root(struct acpi_device *device, int domain, int bus) | |||
364 | goto out3; | 371 | goto out3; |
365 | 372 | ||
366 | sprintf(name, "PCI Bus %04x:%02x", domain, bus); | 373 | sprintf(name, "PCI Bus %04x:%02x", domain, bus); |
374 | info.bridge = device; | ||
367 | info.controller = controller; | 375 | info.controller = controller; |
368 | info.name = name; | 376 | info.name = name; |
369 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | 377 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, |
@@ -438,13 +446,12 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
438 | static int __devinit is_valid_resource(struct pci_dev *dev, int idx) | 446 | static int __devinit is_valid_resource(struct pci_dev *dev, int idx) |
439 | { | 447 | { |
440 | unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM; | 448 | unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM; |
441 | struct resource *devr = &dev->resource[idx]; | 449 | struct resource *devr = &dev->resource[idx], *busr; |
442 | 450 | ||
443 | if (!dev->bus) | 451 | if (!dev->bus) |
444 | return 0; | 452 | return 0; |
445 | for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) { | ||
446 | struct resource *busr = dev->bus->resource[i]; | ||
447 | 453 | ||
454 | pci_bus_for_each_resource(dev->bus, busr, i) { | ||
448 | if (!busr || ((busr->flags ^ devr->flags) & type_mask)) | 455 | if (!busr || ((busr->flags ^ devr->flags) & type_mask)) |
449 | continue; | 456 | continue; |
450 | if ((devr->start) && (devr->start >= busr->start) && | 457 | if ((devr->start) && (devr->start >= busr->start) && |
@@ -533,10 +540,11 @@ pcibios_disable_device (struct pci_dev *dev) | |||
533 | acpi_pci_irq_disable(dev); | 540 | acpi_pci_irq_disable(dev); |
534 | } | 541 | } |
535 | 542 | ||
536 | void | 543 | resource_size_t |
537 | pcibios_align_resource (void *data, struct resource *res, | 544 | pcibios_align_resource (void *data, const struct resource *res, |
538 | resource_size_t size, resource_size_t align) | 545 | resource_size_t size, resource_size_t align) |
539 | { | 546 | { |
547 | return res->start; | ||
540 | } | 548 | } |
541 | 549 | ||
542 | /* | 550 | /* |
@@ -720,9 +728,6 @@ int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size) | |||
720 | return ret; | 728 | return ret; |
721 | } | 729 | } |
722 | 730 | ||
723 | /* It's defined in drivers/pci/pci.c */ | ||
724 | extern u8 pci_cache_line_size; | ||
725 | |||
726 | /** | 731 | /** |
727 | * set_pci_cacheline_size - determine cacheline size for PCI devices | 732 | * set_pci_cacheline_size - determine cacheline size for PCI devices |
728 | * | 733 | * |
@@ -731,7 +736,7 @@ extern u8 pci_cache_line_size; | |||
731 | * | 736 | * |
732 | * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). | 737 | * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). |
733 | */ | 738 | */ |
734 | static void __init set_pci_cacheline_size(void) | 739 | static void __init set_pci_dfl_cacheline_size(void) |
735 | { | 740 | { |
736 | unsigned long levels, unique_caches; | 741 | unsigned long levels, unique_caches; |
737 | long status; | 742 | long status; |
@@ -751,7 +756,7 @@ static void __init set_pci_cacheline_size(void) | |||
751 | "(status=%ld)\n", __func__, status); | 756 | "(status=%ld)\n", __func__, status); |
752 | return; | 757 | return; |
753 | } | 758 | } |
754 | pci_cache_line_size = (1 << cci.pcci_line_size) / 4; | 759 | pci_dfl_cache_line_size = (1 << cci.pcci_line_size) / 4; |
755 | } | 760 | } |
756 | 761 | ||
757 | u64 ia64_dma_get_required_mask(struct device *dev) | 762 | u64 ia64_dma_get_required_mask(struct device *dev) |
@@ -782,7 +787,7 @@ EXPORT_SYMBOL_GPL(dma_get_required_mask); | |||
782 | 787 | ||
783 | static int __init pcibios_init(void) | 788 | static int __init pcibios_init(void) |
784 | { | 789 | { |
785 | set_pci_cacheline_size(); | 790 | set_pci_dfl_cacheline_size(); |
786 | return 0; | 791 | return 0; |
787 | } | 792 | } |
788 | 793 | ||