diff options
Diffstat (limited to 'arch/ia64/kvm/mmio.c')
-rw-r--r-- | arch/ia64/kvm/mmio.c | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/arch/ia64/kvm/mmio.c b/arch/ia64/kvm/mmio.c index 7f1a858bc69f..21f63fffc379 100644 --- a/arch/ia64/kvm/mmio.c +++ b/arch/ia64/kvm/mmio.c | |||
@@ -66,31 +66,25 @@ void lsapic_write(struct kvm_vcpu *v, unsigned long addr, | |||
66 | 66 | ||
67 | switch (addr) { | 67 | switch (addr) { |
68 | case PIB_OFST_INTA: | 68 | case PIB_OFST_INTA: |
69 | /*panic_domain(NULL, "Undefined write on PIB INTA\n");*/ | 69 | panic_vm(v, "Undefined write on PIB INTA\n"); |
70 | panic_vm(v); | ||
71 | break; | 70 | break; |
72 | case PIB_OFST_XTP: | 71 | case PIB_OFST_XTP: |
73 | if (length == 1) { | 72 | if (length == 1) { |
74 | vlsapic_write_xtp(v, val); | 73 | vlsapic_write_xtp(v, val); |
75 | } else { | 74 | } else { |
76 | /*panic_domain(NULL, | 75 | panic_vm(v, "Undefined write on PIB XTP\n"); |
77 | "Undefined write on PIB XTP\n");*/ | ||
78 | panic_vm(v); | ||
79 | } | 76 | } |
80 | break; | 77 | break; |
81 | default: | 78 | default: |
82 | if (PIB_LOW_HALF(addr)) { | 79 | if (PIB_LOW_HALF(addr)) { |
83 | /*lower half */ | 80 | /*Lower half */ |
84 | if (length != 8) | 81 | if (length != 8) |
85 | /*panic_domain(NULL, | 82 | panic_vm(v, "Can't LHF write with size %ld!\n", |
86 | "Can't LHF write with size %ld!\n", | 83 | length); |
87 | length);*/ | ||
88 | panic_vm(v); | ||
89 | else | 84 | else |
90 | vlsapic_write_ipi(v, addr, val); | 85 | vlsapic_write_ipi(v, addr, val); |
91 | } else { /* upper half | 86 | } else { /*Upper half */ |
92 | printk("IPI-UHF write %lx\n",addr);*/ | 87 | panic_vm(v, "IPI-UHF write %lx\n", addr); |
93 | panic_vm(v); | ||
94 | } | 88 | } |
95 | break; | 89 | break; |
96 | } | 90 | } |
@@ -108,22 +102,18 @@ unsigned long lsapic_read(struct kvm_vcpu *v, unsigned long addr, | |||
108 | if (length == 1) /* 1 byte load */ | 102 | if (length == 1) /* 1 byte load */ |
109 | ; /* There is no i8259, there is no INTA access*/ | 103 | ; /* There is no i8259, there is no INTA access*/ |
110 | else | 104 | else |
111 | /*panic_domain(NULL,"Undefined read on PIB INTA\n"); */ | 105 | panic_vm(v, "Undefined read on PIB INTA\n"); |
112 | panic_vm(v); | ||
113 | 106 | ||
114 | break; | 107 | break; |
115 | case PIB_OFST_XTP: | 108 | case PIB_OFST_XTP: |
116 | if (length == 1) { | 109 | if (length == 1) { |
117 | result = VLSAPIC_XTP(v); | 110 | result = VLSAPIC_XTP(v); |
118 | /* printk("read xtp %lx\n", result); */ | ||
119 | } else { | 111 | } else { |
120 | /*panic_domain(NULL, | 112 | panic_vm(v, "Undefined read on PIB XTP\n"); |
121 | "Undefined read on PIB XTP\n");*/ | ||
122 | panic_vm(v); | ||
123 | } | 113 | } |
124 | break; | 114 | break; |
125 | default: | 115 | default: |
126 | panic_vm(v); | 116 | panic_vm(v, "Undefined addr access for lsapic!\n"); |
127 | break; | 117 | break; |
128 | } | 118 | } |
129 | return result; | 119 | return result; |
@@ -162,7 +152,7 @@ static void mmio_access(struct kvm_vcpu *vcpu, u64 src_pa, u64 *dest, | |||
162 | /* it's necessary to ensure zero extending */ | 152 | /* it's necessary to ensure zero extending */ |
163 | *dest = p->u.ioreq.data & (~0UL >> (64-(s*8))); | 153 | *dest = p->u.ioreq.data & (~0UL >> (64-(s*8))); |
164 | } else | 154 | } else |
165 | panic_vm(vcpu); | 155 | panic_vm(vcpu, "Unhandled mmio access returned!\n"); |
166 | out: | 156 | out: |
167 | local_irq_restore(psr); | 157 | local_irq_restore(psr); |
168 | return ; | 158 | return ; |
@@ -324,7 +314,9 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma) | |||
324 | return; | 314 | return; |
325 | } else { | 315 | } else { |
326 | inst_type = -1; | 316 | inst_type = -1; |
327 | panic_vm(vcpu); | 317 | panic_vm(vcpu, "Unsupported MMIO access instruction! \ |
318 | Bunld[0]=0x%lx, Bundle[1]=0x%lx\n", | ||
319 | bundle.i64[0], bundle.i64[1]); | ||
328 | } | 320 | } |
329 | 321 | ||
330 | size = 1 << size; | 322 | size = 1 << size; |
@@ -335,7 +327,7 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma) | |||
335 | if (inst_type == SL_INTEGER) | 327 | if (inst_type == SL_INTEGER) |
336 | vcpu_set_gr(vcpu, inst.M1.r1, data, 0); | 328 | vcpu_set_gr(vcpu, inst.M1.r1, data, 0); |
337 | else | 329 | else |
338 | panic_vm(vcpu); | 330 | panic_vm(vcpu, "Unsupported instruction type!\n"); |
339 | 331 | ||
340 | } | 332 | } |
341 | vcpu_increment_iip(vcpu); | 333 | vcpu_increment_iip(vcpu); |