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-rw-r--r--arch/ia64/include/asm/gcc_intrin.h18
-rw-r--r--arch/ia64/include/asm/mca.h38
-rw-r--r--arch/ia64/include/asm/meminit.h18
-rw-r--r--arch/ia64/include/asm/pal.h24
-rw-r--r--arch/ia64/include/asm/processor.h56
-rw-r--r--arch/ia64/include/asm/sal.h8
-rw-r--r--arch/ia64/include/asm/sn/sn_sal.h2
-rw-r--r--arch/ia64/include/asm/types.h13
8 files changed, 90 insertions, 87 deletions
diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h
index c2c5fd8fcac4..21ddee54adae 100644
--- a/arch/ia64/include/asm/gcc_intrin.h
+++ b/arch/ia64/include/asm/gcc_intrin.h
@@ -388,7 +388,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
388 388
389#define ia64_native_thash(addr) \ 389#define ia64_native_thash(addr) \
390({ \ 390({ \
391 __u64 ia64_intri_res; \ 391 unsigned long ia64_intri_res; \
392 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \ 392 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
393 ia64_intri_res; \ 393 ia64_intri_res; \
394}) 394})
@@ -419,7 +419,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
419 419
420#define ia64_tpa(addr) \ 420#define ia64_tpa(addr) \
421({ \ 421({ \
422 __u64 ia64_pa; \ 422 unsigned long ia64_pa; \
423 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \ 423 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
424 ia64_pa; \ 424 ia64_pa; \
425}) 425})
@@ -444,35 +444,35 @@ register unsigned long ia64_r13 asm ("r13") __used;
444 444
445#define ia64_native_get_cpuid(index) \ 445#define ia64_native_get_cpuid(index) \
446({ \ 446({ \
447 __u64 ia64_intri_res; \ 447 unsigned long ia64_intri_res; \
448 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \ 448 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
449 ia64_intri_res; \ 449 ia64_intri_res; \
450}) 450})
451 451
452#define __ia64_get_dbr(index) \ 452#define __ia64_get_dbr(index) \
453({ \ 453({ \
454 __u64 ia64_intri_res; \ 454 unsigned long ia64_intri_res; \
455 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 455 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
456 ia64_intri_res; \ 456 ia64_intri_res; \
457}) 457})
458 458
459#define ia64_get_ibr(index) \ 459#define ia64_get_ibr(index) \
460({ \ 460({ \
461 __u64 ia64_intri_res; \ 461 unsigned long ia64_intri_res; \
462 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 462 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
463 ia64_intri_res; \ 463 ia64_intri_res; \
464}) 464})
465 465
466#define ia64_get_pkr(index) \ 466#define ia64_get_pkr(index) \
467({ \ 467({ \
468 __u64 ia64_intri_res; \ 468 unsigned long ia64_intri_res; \
469 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 469 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
470 ia64_intri_res; \ 470 ia64_intri_res; \
471}) 471})
472 472
473#define ia64_get_pmc(index) \ 473#define ia64_get_pmc(index) \
474({ \ 474({ \
475 __u64 ia64_intri_res; \ 475 unsigned long ia64_intri_res; \
476 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 476 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
477 ia64_intri_res; \ 477 ia64_intri_res; \
478}) 478})
@@ -480,14 +480,14 @@ register unsigned long ia64_r13 asm ("r13") __used;
480 480
481#define ia64_native_get_pmd(index) \ 481#define ia64_native_get_pmd(index) \
482({ \ 482({ \
483 __u64 ia64_intri_res; \ 483 unsigned long ia64_intri_res; \
484 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 484 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
485 ia64_intri_res; \ 485 ia64_intri_res; \
486}) 486})
487 487
488#define ia64_native_get_rr(index) \ 488#define ia64_native_get_rr(index) \
489({ \ 489({ \
490 __u64 ia64_intri_res; \ 490 unsigned long ia64_intri_res; \
491 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \ 491 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
492 ia64_intri_res; \ 492 ia64_intri_res; \
493}) 493})
diff --git a/arch/ia64/include/asm/mca.h b/arch/ia64/include/asm/mca.h
index 18a4321349a3..44a0b53df900 100644
--- a/arch/ia64/include/asm/mca.h
+++ b/arch/ia64/include/asm/mca.h
@@ -72,39 +72,39 @@ typedef struct ia64_mc_info_s {
72struct ia64_sal_os_state { 72struct ia64_sal_os_state {
73 73
74 /* SAL to OS */ 74 /* SAL to OS */
75 u64 os_gp; /* GP of the os registered with the SAL, physical */ 75 unsigned long os_gp; /* GP of the os registered with the SAL, physical */
76 u64 pal_proc; /* PAL_PROC entry point, physical */ 76 unsigned long pal_proc; /* PAL_PROC entry point, physical */
77 u64 sal_proc; /* SAL_PROC entry point, physical */ 77 unsigned long sal_proc; /* SAL_PROC entry point, physical */
78 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */ 78 unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
79 u64 proc_state_param; /* from R18 */ 79 unsigned long proc_state_param; /* from R18 */
80 u64 monarch; /* 1 for a monarch event, 0 for a slave */ 80 unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
81 81
82 /* common */ 82 /* common */
83 u64 sal_ra; /* Return address in SAL, physical */ 83 unsigned long sal_ra; /* Return address in SAL, physical */
84 u64 sal_gp; /* GP of the SAL - physical */ 84 unsigned long sal_gp; /* GP of the SAL - physical */
85 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */ 85 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
86 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK). 86 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
87 * Note: if the MCA/INIT recovery code wants to resume to a new context 87 * Note: if the MCA/INIT recovery code wants to resume to a new context
88 * then it must change these values to reflect the new kernel stack. 88 * then it must change these values to reflect the new kernel stack.
89 */ 89 */
90 u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */ 90 unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
91 u64 prev_IA64_KR_CURRENT_STACK; 91 unsigned long prev_IA64_KR_CURRENT_STACK;
92 struct task_struct *prev_task; /* previous task, NULL if it is not useful */ 92 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
93 /* Some interrupt registers are not saved in minstate, pt_regs or 93 /* Some interrupt registers are not saved in minstate, pt_regs or
94 * switch_stack. Because MCA/INIT can occur when interrupts are 94 * switch_stack. Because MCA/INIT can occur when interrupts are
95 * disabled, we need to save the additional interrupt registers over 95 * disabled, we need to save the additional interrupt registers over
96 * MCA/INIT and resume. 96 * MCA/INIT and resume.
97 */ 97 */
98 u64 isr; 98 unsigned long isr;
99 u64 ifa; 99 unsigned long ifa;
100 u64 itir; 100 unsigned long itir;
101 u64 iipa; 101 unsigned long iipa;
102 u64 iim; 102 unsigned long iim;
103 u64 iha; 103 unsigned long iha;
104 104
105 /* OS to SAL */ 105 /* OS to SAL */
106 u64 os_status; /* OS status to SAL, enum below */ 106 unsigned long os_status; /* OS status to SAL, enum below */
107 u64 context; /* 0 if return to same context 107 unsigned long context; /* 0 if return to same context
108 1 if return to new context */ 108 1 if return to new context */
109}; 109};
110 110
@@ -150,7 +150,7 @@ extern void ia64_slave_init_handler(void);
150extern void ia64_mca_cmc_vector_setup(void); 150extern void ia64_mca_cmc_vector_setup(void);
151extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *)); 151extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
152extern void ia64_unreg_MCA_extension(void); 152extern void ia64_unreg_MCA_extension(void);
153extern u64 ia64_get_rnat(u64 *); 153extern unsigned long ia64_get_rnat(unsigned long *);
154extern void ia64_mca_printk(const char * fmt, ...) 154extern void ia64_mca_printk(const char * fmt, ...)
155 __attribute__ ((format (printf, 1, 2))); 155 __attribute__ ((format (printf, 1, 2)));
156 156
diff --git a/arch/ia64/include/asm/meminit.h b/arch/ia64/include/asm/meminit.h
index c0cea375620a..688a812c017d 100644
--- a/arch/ia64/include/asm/meminit.h
+++ b/arch/ia64/include/asm/meminit.h
@@ -25,8 +25,8 @@
25#define IA64_MAX_RSVD_REGIONS 9 25#define IA64_MAX_RSVD_REGIONS 9
26 26
27struct rsvd_region { 27struct rsvd_region {
28 unsigned long start; /* virtual address of beginning of element */ 28 u64 start; /* virtual address of beginning of element */
29 unsigned long end; /* virtual address of end of element + 1 */ 29 u64 end; /* virtual address of end of element + 1 */
30}; 30};
31 31
32extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1]; 32extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
@@ -35,13 +35,13 @@ extern int num_rsvd_regions;
35extern void find_memory (void); 35extern void find_memory (void);
36extern void reserve_memory (void); 36extern void reserve_memory (void);
37extern void find_initrd (void); 37extern void find_initrd (void);
38extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); 38extern int filter_rsvd_memory (u64 start, u64 end, void *arg);
39extern int filter_memory (unsigned long start, unsigned long end, void *arg); 39extern int filter_memory (u64 start, u64 end, void *arg);
40extern unsigned long efi_memmap_init(unsigned long *s, unsigned long *e); 40extern unsigned long efi_memmap_init(u64 *s, u64 *e);
41extern int find_max_min_low_pfn (unsigned long , unsigned long, void *); 41extern int find_max_min_low_pfn (u64, u64, void *);
42 42
43extern unsigned long vmcore_find_descriptor_size(unsigned long address); 43extern unsigned long vmcore_find_descriptor_size(unsigned long address);
44extern int reserve_elfcorehdr(unsigned long *start, unsigned long *end); 44extern int reserve_elfcorehdr(u64 *start, u64 *end);
45 45
46/* 46/*
47 * For rounding an address to the next IA64_GRANULE_SIZE or order 47 * For rounding an address to the next IA64_GRANULE_SIZE or order
@@ -63,8 +63,8 @@ extern int register_active_ranges(u64 start, u64 len, int nid);
63# define LARGE_GAP 0x40000000 /* Use virtual mem map if hole is > than this */ 63# define LARGE_GAP 0x40000000 /* Use virtual mem map if hole is > than this */
64 extern unsigned long vmalloc_end; 64 extern unsigned long vmalloc_end;
65 extern struct page *vmem_map; 65 extern struct page *vmem_map;
66 extern int find_largest_hole (u64 start, u64 end, void *arg); 66 extern int find_largest_hole(u64 start, u64 end, void *arg);
67 extern int create_mem_map_page_table (u64 start, u64 end, void *arg); 67 extern int create_mem_map_page_table(u64 start, u64 end, void *arg);
68 extern int vmemmap_find_next_valid_pfn(int, int); 68 extern int vmemmap_find_next_valid_pfn(int, int);
69#else 69#else
70static inline int vmemmap_find_next_valid_pfn(int node, int i) 70static inline int vmemmap_find_next_valid_pfn(int node, int i)
diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h
index 67b02901ead4..6a292505b396 100644
--- a/arch/ia64/include/asm/pal.h
+++ b/arch/ia64/include/asm/pal.h
@@ -989,8 +989,8 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
989} 989}
990 990
991/* Return summary information about the hierarchy of caches controlled by the processor */ 991/* Return summary information about the hierarchy of caches controlled by the processor */
992static inline s64 992static inline long ia64_pal_cache_summary(unsigned long *cache_levels,
993ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches) 993 unsigned long *unique_caches)
994{ 994{
995 struct ia64_pal_retval iprv; 995 struct ia64_pal_retval iprv;
996 PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0); 996 PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0);
@@ -1038,8 +1038,8 @@ ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc
1038} 1038}
1039 1039
1040/* Return the number of instruction and data debug register pairs */ 1040/* Return the number of instruction and data debug register pairs */
1041static inline s64 1041static inline long ia64_pal_debug_info(unsigned long *inst_regs,
1042ia64_pal_debug_info (u64 *inst_regs, u64 *data_regs) 1042 unsigned long *data_regs)
1043{ 1043{
1044 struct ia64_pal_retval iprv; 1044 struct ia64_pal_retval iprv;
1045 PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0); 1045 PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0);
@@ -1074,8 +1074,7 @@ ia64_pal_fixed_addr (u64 *global_unique_addr)
1074} 1074}
1075 1075
1076/* Get base frequency of the platform if generated by the processor */ 1076/* Get base frequency of the platform if generated by the processor */
1077static inline s64 1077static inline long ia64_pal_freq_base(unsigned long *platform_base_freq)
1078ia64_pal_freq_base (u64 *platform_base_freq)
1079{ 1078{
1080 struct ia64_pal_retval iprv; 1079 struct ia64_pal_retval iprv;
1081 PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0); 1080 PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0);
@@ -1437,7 +1436,7 @@ ia64_pal_proc_set_features (u64 feature_select)
1437 * possible. 1436 * possible.
1438 */ 1437 */
1439typedef struct ia64_ptce_info_s { 1438typedef struct ia64_ptce_info_s {
1440 u64 base; 1439 unsigned long base;
1441 u32 count[2]; 1440 u32 count[2];
1442 u32 stride[2]; 1441 u32 stride[2];
1443} ia64_ptce_info_t; 1442} ia64_ptce_info_t;
@@ -1478,9 +1477,9 @@ ia64_pal_register_info (u64 info_request, u64 *reg_info_1, u64 *reg_info_2)
1478} 1477}
1479 1478
1480typedef union pal_hints_u { 1479typedef union pal_hints_u {
1481 u64 ph_data; 1480 unsigned long ph_data;
1482 struct { 1481 struct {
1483 u64 si : 1, 1482 unsigned long si : 1,
1484 li : 1, 1483 li : 1,
1485 reserved : 62; 1484 reserved : 62;
1486 } pal_hints_s; 1485 } pal_hints_s;
@@ -1489,8 +1488,8 @@ typedef union pal_hints_u {
1489/* Return information about the register stack and RSE for this processor 1488/* Return information about the register stack and RSE for this processor
1490 * implementation. 1489 * implementation.
1491 */ 1490 */
1492static inline s64 1491static inline long ia64_pal_rse_info(unsigned long *num_phys_stacked,
1493ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) 1492 pal_hints_u_t *hints)
1494{ 1493{
1495 struct ia64_pal_retval iprv; 1494 struct ia64_pal_retval iprv;
1496 PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0); 1495 PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0);
@@ -1608,8 +1607,7 @@ ia64_pal_vm_info (u64 tc_level, u64 tc_type, pal_tc_info_u_t *tc_info, u64 *tc_
1608/* Get page size information about the virtual memory characteristics of the processor 1607/* Get page size information about the virtual memory characteristics of the processor
1609 * implementation. 1608 * implementation.
1610 */ 1609 */
1611static inline s64 1610static inline s64 ia64_pal_vm_page_size(u64 *tr_pages, u64 *vw_pages)
1612ia64_pal_vm_page_size (u64 *tr_pages, u64 *vw_pages)
1613{ 1611{
1614 struct ia64_pal_retval iprv; 1612 struct ia64_pal_retval iprv;
1615 PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0); 1613 PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0);
diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h
index f88fa054d01d..3eaeedf1aef2 100644
--- a/arch/ia64/include/asm/processor.h
+++ b/arch/ia64/include/asm/processor.h
@@ -187,40 +187,40 @@ union ia64_rr {
187 * state comes earlier: 187 * state comes earlier:
188 */ 188 */
189struct cpuinfo_ia64 { 189struct cpuinfo_ia64 {
190 __u32 softirq_pending; 190 unsigned int softirq_pending;
191 __u64 itm_delta; /* # of clock cycles between clock ticks */ 191 unsigned long itm_delta; /* # of clock cycles between clock ticks */
192 __u64 itm_next; /* interval timer mask value to use for next clock tick */ 192 unsigned long itm_next; /* interval timer mask value to use for next clock tick */
193 __u64 nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */ 193 unsigned long nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */
194 __u64 unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */ 194 unsigned long unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */
195 __u64 unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */ 195 unsigned long unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */
196 __u64 itc_freq; /* frequency of ITC counter */ 196 unsigned long itc_freq; /* frequency of ITC counter */
197 __u64 proc_freq; /* frequency of processor */ 197 unsigned long proc_freq; /* frequency of processor */
198 __u64 cyc_per_usec; /* itc_freq/1000000 */ 198 unsigned long cyc_per_usec; /* itc_freq/1000000 */
199 __u64 ptce_base; 199 unsigned long ptce_base;
200 __u32 ptce_count[2]; 200 unsigned int ptce_count[2];
201 __u32 ptce_stride[2]; 201 unsigned int ptce_stride[2];
202 struct task_struct *ksoftirqd; /* kernel softirq daemon for this CPU */ 202 struct task_struct *ksoftirqd; /* kernel softirq daemon for this CPU */
203 203
204#ifdef CONFIG_SMP 204#ifdef CONFIG_SMP
205 __u64 loops_per_jiffy; 205 unsigned long loops_per_jiffy;
206 int cpu; 206 int cpu;
207 __u32 socket_id; /* physical processor socket id */ 207 unsigned int socket_id; /* physical processor socket id */
208 __u16 core_id; /* core id */ 208 unsigned short core_id; /* core id */
209 __u16 thread_id; /* thread id */ 209 unsigned short thread_id; /* thread id */
210 __u16 num_log; /* Total number of logical processors on 210 unsigned short num_log; /* Total number of logical processors on
211 * this socket that were successfully booted */ 211 * this socket that were successfully booted */
212 __u8 cores_per_socket; /* Cores per processor socket */ 212 unsigned char cores_per_socket; /* Cores per processor socket */
213 __u8 threads_per_core; /* Threads per core */ 213 unsigned char threads_per_core; /* Threads per core */
214#endif 214#endif
215 215
216 /* CPUID-derived information: */ 216 /* CPUID-derived information: */
217 __u64 ppn; 217 unsigned long ppn;
218 __u64 features; 218 unsigned long features;
219 __u8 number; 219 unsigned char number;
220 __u8 revision; 220 unsigned char revision;
221 __u8 model; 221 unsigned char model;
222 __u8 family; 222 unsigned char family;
223 __u8 archrev; 223 unsigned char archrev;
224 char vendor[16]; 224 char vendor[16];
225 char *model_name; 225 char *model_name;
226 226
@@ -329,8 +329,8 @@ struct thread_struct {
329#else 329#else
330# define INIT_THREAD_PM 330# define INIT_THREAD_PM
331#endif 331#endif
332 __u64 dbr[IA64_NUM_DBG_REGS]; 332 unsigned long dbr[IA64_NUM_DBG_REGS];
333 __u64 ibr[IA64_NUM_DBG_REGS]; 333 unsigned long ibr[IA64_NUM_DBG_REGS];
334 struct ia64_fpreg fph[96]; /* saved/loaded on demand */ 334 struct ia64_fpreg fph[96]; /* saved/loaded on demand */
335}; 335};
336 336
diff --git a/arch/ia64/include/asm/sal.h b/arch/ia64/include/asm/sal.h
index 966797a97c94..d19ddba4e327 100644
--- a/arch/ia64/include/asm/sal.h
+++ b/arch/ia64/include/asm/sal.h
@@ -106,10 +106,10 @@ struct ia64_sal_retval {
106 * informational value should be printed (e.g., "reboot for 106 * informational value should be printed (e.g., "reboot for
107 * change to take effect"). 107 * change to take effect").
108 */ 108 */
109 s64 status; 109 long status;
110 u64 v0; 110 unsigned long v0;
111 u64 v1; 111 unsigned long v1;
112 u64 v2; 112 unsigned long v2;
113}; 113};
114 114
115typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...); 115typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
diff --git a/arch/ia64/include/asm/sn/sn_sal.h b/arch/ia64/include/asm/sn/sn_sal.h
index e310fc0135dc..1f5ff470a5a1 100644
--- a/arch/ia64/include/asm/sn/sn_sal.h
+++ b/arch/ia64/include/asm/sn/sn_sal.h
@@ -929,7 +929,7 @@ ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
929/* 929/*
930 * Get the associated ioboard type for a given nasid. 930 * Get the associated ioboard type for a given nasid.
931 */ 931 */
932static inline s64 932static inline long
933ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard) 933ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
934{ 934{
935 struct ia64_sal_retval isrv; 935 struct ia64_sal_retval isrv;
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index fbf1ed3b44ce..bcd260e597de 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -2,10 +2,11 @@
2#define _ASM_IA64_TYPES_H 2#define _ASM_IA64_TYPES_H
3 3
4/* 4/*
5 * This file is never included by application software unless explicitly requested (e.g., 5 * This file is never included by application software unless explicitly
6 * via linux/types.h) in which case the application is Linux specific so (user-) name 6 * requested (e.g., via linux/types.h) in which case the application is
7 * space pollution is not a major issue. However, for interoperability, libraries still 7 * Linux specific so (user-) name space pollution is not a major issue.
8 * need to be careful to avoid a name clashes. 8 * However, for interoperability, libraries still need to be careful to
9 * avoid naming clashes.
9 * 10 *
10 * Based on <asm-alpha/types.h>. 11 * Based on <asm-alpha/types.h>.
11 * 12 *
@@ -13,7 +14,11 @@
13 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 14 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
14 */ 15 */
15 16
17#ifdef __KERNEL__
18#include <asm-generic/int-ll64.h>
19#else
16#include <asm-generic/int-l64.h> 20#include <asm-generic/int-l64.h>
21#endif
17 22
18#ifdef __ASSEMBLY__ 23#ifdef __ASSEMBLY__
19# define __IA64_UL(x) (x) 24# define __IA64_UL(x) (x)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 10:34:53 -0500