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-rw-r--r--arch/ia64/include/asm/asmmacro.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/ia64/include/asm/asmmacro.h b/arch/ia64/include/asm/asmmacro.h
index c1642fd64029..3ab6d75aa3db 100644
--- a/arch/ia64/include/asm/asmmacro.h
+++ b/arch/ia64/include/asm/asmmacro.h
@@ -70,12 +70,12 @@ name:
70 * path (ivt.S - TLB miss processing) or in places where it might not be 70 * path (ivt.S - TLB miss processing) or in places where it might not be
71 * safe to use a "tpa" instruction (mca_asm.S - error recovery). 71 * safe to use a "tpa" instruction (mca_asm.S - error recovery).
72 */ 72 */
73 .section ".data.patch.vtop", "a" // declare section & section attributes 73 .section ".data..patch.vtop", "a" // declare section & section attributes
74 .previous 74 .previous
75 75
76#define LOAD_PHYSICAL(pr, reg, obj) \ 76#define LOAD_PHYSICAL(pr, reg, obj) \
77[1:](pr)movl reg = obj; \ 77[1:](pr)movl reg = obj; \
78 .xdata4 ".data.patch.vtop", 1b-. 78 .xdata4 ".data..patch.vtop", 1b-.
79 79
80/* 80/*
81 * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, 81 * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it,
@@ -84,11 +84,11 @@ name:
84#define DO_MCKINLEY_E9_WORKAROUND 84#define DO_MCKINLEY_E9_WORKAROUND
85 85
86#ifdef DO_MCKINLEY_E9_WORKAROUND 86#ifdef DO_MCKINLEY_E9_WORKAROUND
87 .section ".data.patch.mckinley_e9", "a" 87 .section ".data..patch.mckinley_e9", "a"
88 .previous 88 .previous
89/* workaround for Itanium 2 Errata 9: */ 89/* workaround for Itanium 2 Errata 9: */
90# define FSYS_RETURN \ 90# define FSYS_RETURN \
91 .xdata4 ".data.patch.mckinley_e9", 1f-.; \ 91 .xdata4 ".data..patch.mckinley_e9", 1f-.; \
921:{ .mib; \ 921:{ .mib; \
93 nop.m 0; \ 93 nop.m 0; \
94 mov r16=ar.pfs; \ 94 mov r16=ar.pfs; \
@@ -107,11 +107,11 @@ name:
107 * If physical stack register size is different from DEF_NUM_STACK_REG, 107 * If physical stack register size is different from DEF_NUM_STACK_REG,
108 * dynamically patch the kernel for correct size. 108 * dynamically patch the kernel for correct size.
109 */ 109 */
110 .section ".data.patch.phys_stack_reg", "a" 110 .section ".data..patch.phys_stack_reg", "a"
111 .previous 111 .previous
112#define LOAD_PHYS_STACK_REG_SIZE(reg) \ 112#define LOAD_PHYS_STACK_REG_SIZE(reg) \
113[1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ 113[1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \
114 .xdata4 ".data.patch.phys_stack_reg", 1b-. 114 .xdata4 ".data..patch.phys_stack_reg", 1b-.
115 115
116/* 116/*
117 * Up until early 2004, use of .align within a function caused bad unwind info. 117 * Up until early 2004, use of .align within a function caused bad unwind info.