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-rw-r--r--arch/frv/include/asm/bitops.h4
-rw-r--r--arch/frv/include/asm/futex.h5
-rw-r--r--arch/frv/include/asm/highmem.h25
-rw-r--r--arch/frv/include/asm/ioctls.h80
-rw-r--r--arch/frv/include/asm/irqflags.h158
-rw-r--r--arch/frv/include/asm/pci.h2
-rw-r--r--arch/frv/include/asm/pgtable.h9
-rw-r--r--arch/frv/include/asm/processor.h2
-rw-r--r--arch/frv/include/asm/spr-regs.h2
-rw-r--r--arch/frv/include/asm/suspend.h20
-rw-r--r--arch/frv/include/asm/system.h145
-rw-r--r--arch/frv/include/asm/thread_info.h15
-rw-r--r--arch/frv/include/asm/types.h8
-rw-r--r--arch/frv/include/asm/unistd.h3
-rw-r--r--arch/frv/include/asm/virtconvert.h2
15 files changed, 182 insertions, 298 deletions
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h
index 50ae91b29674..a1d00b0c6ed7 100644
--- a/arch/frv/include/asm/bitops.h
+++ b/arch/frv/include/asm/bitops.h
@@ -401,13 +401,11 @@ int __ilog2_u64(u64 n)
401#include <asm-generic/bitops/hweight.h> 401#include <asm-generic/bitops/hweight.h>
402#include <asm-generic/bitops/lock.h> 402#include <asm-generic/bitops/lock.h>
403 403
404#include <asm-generic/bitops/ext2-non-atomic.h> 404#include <asm-generic/bitops/le.h>
405 405
406#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr)) 406#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr))
407#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr)) 407#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr))
408 408
409#include <asm-generic/bitops/minix-le.h>
410
411#endif /* __KERNEL__ */ 409#endif /* __KERNEL__ */
412 410
413#endif /* _ASM_BITOPS_H */ 411#endif /* _ASM_BITOPS_H */
diff --git a/arch/frv/include/asm/futex.h b/arch/frv/include/asm/futex.h
index 08b3d1da3583..4bea27f50a7a 100644
--- a/arch/frv/include/asm/futex.h
+++ b/arch/frv/include/asm/futex.h
@@ -7,10 +7,11 @@
7#include <asm/errno.h> 7#include <asm/errno.h>
8#include <asm/uaccess.h> 8#include <asm/uaccess.h>
9 9
10extern int futex_atomic_op_inuser(int encoded_op, int __user *uaddr); 10extern int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr);
11 11
12static inline int 12static inline int
13futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 13futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
14 u32 oldval, u32 newval)
14{ 15{
15 return -ENOSYS; 16 return -ENOSYS;
16} 17}
diff --git a/arch/frv/include/asm/highmem.h b/arch/frv/include/asm/highmem.h
index cb4c317eaecc..a8d6565d415d 100644
--- a/arch/frv/include/asm/highmem.h
+++ b/arch/frv/include/asm/highmem.h
@@ -112,12 +112,11 @@ extern struct page *kmap_atomic_to_page(void *ptr);
112 (void *) damlr; \ 112 (void *) damlr; \
113}) 113})
114 114
115static inline void *kmap_atomic(struct page *page, enum km_type type) 115static inline void *kmap_atomic_primary(struct page *page, enum km_type type)
116{ 116{
117 unsigned long paddr; 117 unsigned long paddr;
118 118
119 pagefault_disable(); 119 pagefault_disable();
120 debug_kmap_atomic(type);
121 paddr = page_to_phys(page); 120 paddr = page_to_phys(page);
122 121
123 switch (type) { 122 switch (type) {
@@ -125,14 +124,6 @@ static inline void *kmap_atomic(struct page *page, enum km_type type)
125 case 1: return __kmap_atomic_primary(1, paddr, 3); 124 case 1: return __kmap_atomic_primary(1, paddr, 3);
126 case 2: return __kmap_atomic_primary(2, paddr, 4); 125 case 2: return __kmap_atomic_primary(2, paddr, 4);
127 case 3: return __kmap_atomic_primary(3, paddr, 5); 126 case 3: return __kmap_atomic_primary(3, paddr, 5);
128 case 4: return __kmap_atomic_primary(4, paddr, 6);
129 case 5: return __kmap_atomic_primary(5, paddr, 7);
130 case 6: return __kmap_atomic_primary(6, paddr, 8);
131 case 7: return __kmap_atomic_primary(7, paddr, 9);
132 case 8: return __kmap_atomic_primary(8, paddr, 10);
133
134 case 9 ... 9 + NR_TLB_LINES - 1:
135 return __kmap_atomic_secondary(type - 9, paddr);
136 127
137 default: 128 default:
138 BUG(); 129 BUG();
@@ -152,22 +143,13 @@ do { \
152 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \ 143 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \
153} while(0) 144} while(0)
154 145
155static inline void kunmap_atomic_notypecheck(void *kvaddr, enum km_type type) 146static inline void kunmap_atomic_primary(void *kvaddr, enum km_type type)
156{ 147{
157 switch (type) { 148 switch (type) {
158 case 0: __kunmap_atomic_primary(0, 2); break; 149 case 0: __kunmap_atomic_primary(0, 2); break;
159 case 1: __kunmap_atomic_primary(1, 3); break; 150 case 1: __kunmap_atomic_primary(1, 3); break;
160 case 2: __kunmap_atomic_primary(2, 4); break; 151 case 2: __kunmap_atomic_primary(2, 4); break;
161 case 3: __kunmap_atomic_primary(3, 5); break; 152 case 3: __kunmap_atomic_primary(3, 5); break;
162 case 4: __kunmap_atomic_primary(4, 6); break;
163 case 5: __kunmap_atomic_primary(5, 7); break;
164 case 6: __kunmap_atomic_primary(6, 8); break;
165 case 7: __kunmap_atomic_primary(7, 9); break;
166 case 8: __kunmap_atomic_primary(8, 10); break;
167
168 case 9 ... 9 + NR_TLB_LINES - 1:
169 __kunmap_atomic_secondary(type - 9, kvaddr);
170 break;
171 153
172 default: 154 default:
173 BUG(); 155 BUG();
@@ -175,6 +157,9 @@ static inline void kunmap_atomic_notypecheck(void *kvaddr, enum km_type type)
175 pagefault_enable(); 157 pagefault_enable();
176} 158}
177 159
160void *__kmap_atomic(struct page *page);
161void __kunmap_atomic(void *kvaddr);
162
178#endif /* !__ASSEMBLY__ */ 163#endif /* !__ASSEMBLY__ */
179 164
180#endif /* __KERNEL__ */ 165#endif /* __KERNEL__ */
diff --git a/arch/frv/include/asm/ioctls.h b/arch/frv/include/asm/ioctls.h
index a993e3759ccf..2f9fb436ec3c 100644
--- a/arch/frv/include/asm/ioctls.h
+++ b/arch/frv/include/asm/ioctls.h
@@ -1,88 +1,10 @@
1#ifndef __ASM_IOCTLS_H__ 1#ifndef __ASM_IOCTLS_H__
2#define __ASM_IOCTLS_H__ 2#define __ASM_IOCTLS_H__
3 3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ 4#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
57
58#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73#define FIOQSIZE 0x545E 5#define FIOQSIZE 0x545E
74 6
75/* Used for packet mode */ 7#include <asm-generic/ioctls.h>
76#define TIOCPKT_DATA 0
77#define TIOCPKT_FLUSHREAD 1
78#define TIOCPKT_FLUSHWRITE 2
79#define TIOCPKT_STOP 4
80#define TIOCPKT_START 8
81#define TIOCPKT_NOSTOP 16
82#define TIOCPKT_DOSTOP 32
83#define TIOCPKT_IOCTL 64
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86 8
87#endif /* __ASM_IOCTLS_H__ */ 9#endif /* __ASM_IOCTLS_H__ */
88 10
diff --git a/arch/frv/include/asm/irqflags.h b/arch/frv/include/asm/irqflags.h
new file mode 100644
index 000000000000..82f0b5363f42
--- /dev/null
+++ b/arch/frv/include/asm/irqflags.h
@@ -0,0 +1,158 @@
1/* FR-V interrupt handling
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQFLAGS_H
13#define _ASM_IRQFLAGS_H
14
15/*
16 * interrupt flag manipulation
17 * - use virtual interrupt management since touching the PSR is slow
18 * - ICC2.Z: T if interrupts virtually disabled
19 * - ICC2.C: F if interrupts really disabled
20 * - if Z==1 upon interrupt:
21 * - C is set to 0
22 * - interrupts are really disabled
23 * - entry.S returns immediately
24 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
25 * - if taken, the trap:
26 * - sets ICC2.C
27 * - enables interrupts
28 */
29static inline void arch_local_irq_disable(void)
30{
31 /* set Z flag, but don't change the C flag */
32 asm volatile(" andcc gr0,gr0,gr0,icc2 \n"
33 :
34 :
35 : "memory", "icc2"
36 );
37}
38
39static inline void arch_local_irq_enable(void)
40{
41 /* clear Z flag and then test the C flag */
42 asm volatile(" oricc gr0,#1,gr0,icc2 \n"
43 " tihi icc2,gr0,#2 \n"
44 :
45 :
46 : "memory", "icc2"
47 );
48}
49
50static inline unsigned long arch_local_save_flags(void)
51{
52 unsigned long flags;
53
54 asm volatile("movsg ccr,%0"
55 : "=r"(flags)
56 :
57 : "memory");
58
59 /* shift ICC2.Z to bit 0 */
60 flags >>= 26;
61
62 /* make flags 1 if interrupts disabled, 0 otherwise */
63 return flags & 1UL;
64
65}
66
67static inline unsigned long arch_local_irq_save(void)
68{
69 unsigned long flags = arch_local_save_flags();
70 arch_local_irq_disable();
71 return flags;
72}
73
74static inline void arch_local_irq_restore(unsigned long flags)
75{
76 /* load the Z flag by turning 1 if disabled into 0 if disabled
77 * and thus setting the Z flag but not the C flag */
78 asm volatile(" xoricc %0,#1,gr0,icc2 \n"
79 /* then trap if Z=0 and C=0 */
80 " tihi icc2,gr0,#2 \n"
81 :
82 : "r"(flags)
83 : "memory", "icc2"
84 );
85
86}
87
88static inline bool arch_irqs_disabled_flags(unsigned long flags)
89{
90 return flags;
91}
92
93static inline bool arch_irqs_disabled(void)
94{
95 return arch_irqs_disabled_flags(arch_local_save_flags());
96}
97
98/*
99 * real interrupt flag manipulation
100 */
101#define __arch_local_irq_disable() \
102do { \
103 unsigned long psr; \
104 asm volatile(" movsg psr,%0 \n" \
105 " andi %0,%2,%0 \n" \
106 " ori %0,%1,%0 \n" \
107 " movgs %0,psr \n" \
108 : "=r"(psr) \
109 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
110 : "memory"); \
111} while (0)
112
113#define __arch_local_irq_enable() \
114do { \
115 unsigned long psr; \
116 asm volatile(" movsg psr,%0 \n" \
117 " andi %0,%1,%0 \n" \
118 " movgs %0,psr \n" \
119 : "=r"(psr) \
120 : "i" (~PSR_PIL) \
121 : "memory"); \
122} while (0)
123
124#define __arch_local_save_flags(flags) \
125do { \
126 typecheck(unsigned long, flags); \
127 asm("movsg psr,%0" \
128 : "=r"(flags) \
129 : \
130 : "memory"); \
131} while (0)
132
133#define __arch_local_irq_save(flags) \
134do { \
135 unsigned long npsr; \
136 typecheck(unsigned long, flags); \
137 asm volatile(" movsg psr,%0 \n" \
138 " andi %0,%3,%1 \n" \
139 " ori %1,%2,%1 \n" \
140 " movgs %1,psr \n" \
141 : "=r"(flags), "=r"(npsr) \
142 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
143 : "memory"); \
144} while (0)
145
146#define __arch_local_irq_restore(flags) \
147do { \
148 typecheck(unsigned long, flags); \
149 asm volatile(" movgs %0,psr \n" \
150 : \
151 : "r" (flags) \
152 : "memory"); \
153} while (0)
154
155#define __arch_irqs_disabled() \
156 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
157
158#endif /* _ASM_IRQFLAGS_H */
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index 0d5997909850..ef03baf5d89d 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -54,7 +54,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
54#endif 54#endif
55 55
56/* 56/*
57 * These are pretty much arbitary with the CoMEM implementation. 57 * These are pretty much arbitrary with the CoMEM implementation.
58 * We have the whole address space to ourselves. 58 * We have the whole address space to ourselves.
59 */ 59 */
60#define PCIBIOS_MIN_IO 0x100 60#define PCIBIOS_MIN_IO 0x100
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h
index c18b0d32e636..6bc241e4b4f8 100644
--- a/arch/frv/include/asm/pgtable.h
+++ b/arch/frv/include/asm/pgtable.h
@@ -451,17 +451,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
451 451
452#if defined(CONFIG_HIGHPTE) 452#if defined(CONFIG_HIGHPTE)
453#define pte_offset_map(dir, address) \ 453#define pte_offset_map(dir, address) \
454 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address)) 454 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + pte_index(address))
455#define pte_offset_map_nested(dir, address) \ 455#define pte_unmap(pte) kunmap_atomic(pte)
456 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
457#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
458#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
459#else 456#else
460#define pte_offset_map(dir, address) \ 457#define pte_offset_map(dir, address) \
461 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address)) 458 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
462#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
463#define pte_unmap(pte) do { } while (0) 459#define pte_unmap(pte) do { } while (0)
464#define pte_unmap_nested(pte) do { } while (0)
465#endif 460#endif
466 461
467/* 462/*
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h
index 3744f2e47f48..4b789ab182b0 100644
--- a/arch/frv/include/asm/processor.h
+++ b/arch/frv/include/asm/processor.h
@@ -137,7 +137,7 @@ unsigned long get_wchan(struct task_struct *p);
137#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp) 137#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
138 138
139/* Allocation and freeing of basic task resources. */ 139/* Allocation and freeing of basic task resources. */
140extern struct task_struct *alloc_task_struct(void); 140extern struct task_struct *alloc_task_struct_node(int node);
141extern void free_task_struct(struct task_struct *p); 141extern void free_task_struct(struct task_struct *p);
142 142
143#define cpu_relax() barrier() 143#define cpu_relax() barrier()
diff --git a/arch/frv/include/asm/spr-regs.h b/arch/frv/include/asm/spr-regs.h
index 01e6af5e99b8..d3883021f236 100644
--- a/arch/frv/include/asm/spr-regs.h
+++ b/arch/frv/include/asm/spr-regs.h
@@ -274,7 +274,7 @@
274#define MSR0_RD 0xc0000000 /* rounding mode */ 274#define MSR0_RD 0xc0000000 /* rounding mode */
275#define MSR0_RD_NEAREST 0x00000000 /* - nearest */ 275#define MSR0_RD_NEAREST 0x00000000 /* - nearest */
276#define MSR0_RD_ZERO 0x40000000 /* - zero */ 276#define MSR0_RD_ZERO 0x40000000 /* - zero */
277#define MSR0_RD_POS_INF 0x80000000 /* - postive infinity */ 277#define MSR0_RD_POS_INF 0x80000000 /* - positive infinity */
278#define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */ 278#define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */
279 279
280/* 280/*
diff --git a/arch/frv/include/asm/suspend.h b/arch/frv/include/asm/suspend.h
deleted file mode 100644
index 5fa7b5a6ee40..000000000000
--- a/arch/frv/include/asm/suspend.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* suspend.h: suspension stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SUSPEND_H
13#define _ASM_SUSPEND_H
14
15static inline int arch_prepare_suspend(void)
16{
17 return 0;
18}
19
20#endif /* _ASM_SUSPEND_H */
diff --git a/arch/frv/include/asm/system.h b/arch/frv/include/asm/system.h
index efd22d9077ac..6c10fd2c626d 100644
--- a/arch/frv/include/asm/system.h
+++ b/arch/frv/include/asm/system.h
@@ -37,142 +37,6 @@ do { \
37} while(0) 37} while(0)
38 38
39/* 39/*
40 * interrupt flag manipulation
41 * - use virtual interrupt management since touching the PSR is slow
42 * - ICC2.Z: T if interrupts virtually disabled
43 * - ICC2.C: F if interrupts really disabled
44 * - if Z==1 upon interrupt:
45 * - C is set to 0
46 * - interrupts are really disabled
47 * - entry.S returns immediately
48 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
49 * - if taken, the trap:
50 * - sets ICC2.C
51 * - enables interrupts
52 */
53#define local_irq_disable() \
54do { \
55 /* set Z flag, but don't change the C flag */ \
56 asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \
57 : \
58 : \
59 : "memory", "icc2" \
60 ); \
61} while(0)
62
63#define local_irq_enable() \
64do { \
65 /* clear Z flag and then test the C flag */ \
66 asm volatile(" oricc gr0,#1,gr0,icc2 \n" \
67 " tihi icc2,gr0,#2 \n" \
68 : \
69 : \
70 : "memory", "icc2" \
71 ); \
72} while(0)
73
74#define local_save_flags(flags) \
75do { \
76 typecheck(unsigned long, flags); \
77 asm volatile("movsg ccr,%0" \
78 : "=r"(flags) \
79 : \
80 : "memory"); \
81 \
82 /* shift ICC2.Z to bit 0 */ \
83 flags >>= 26; \
84 \
85 /* make flags 1 if interrupts disabled, 0 otherwise */ \
86 flags &= 1UL; \
87} while(0)
88
89#define irqs_disabled() \
90 ({unsigned long flags; local_save_flags(flags); !!flags; })
91
92#define local_irq_save(flags) \
93do { \
94 typecheck(unsigned long, flags); \
95 local_save_flags(flags); \
96 local_irq_disable(); \
97} while(0)
98
99#define local_irq_restore(flags) \
100do { \
101 typecheck(unsigned long, flags); \
102 \
103 /* load the Z flag by turning 1 if disabled into 0 if disabled \
104 * and thus setting the Z flag but not the C flag */ \
105 asm volatile(" xoricc %0,#1,gr0,icc2 \n" \
106 /* then test Z=0 and C=0 */ \
107 " tihi icc2,gr0,#2 \n" \
108 : \
109 : "r"(flags) \
110 : "memory", "icc2" \
111 ); \
112 \
113} while(0)
114
115/*
116 * real interrupt flag manipulation
117 */
118#define __local_irq_disable() \
119do { \
120 unsigned long psr; \
121 asm volatile(" movsg psr,%0 \n" \
122 " andi %0,%2,%0 \n" \
123 " ori %0,%1,%0 \n" \
124 " movgs %0,psr \n" \
125 : "=r"(psr) \
126 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
127 : "memory"); \
128} while(0)
129
130#define __local_irq_enable() \
131do { \
132 unsigned long psr; \
133 asm volatile(" movsg psr,%0 \n" \
134 " andi %0,%1,%0 \n" \
135 " movgs %0,psr \n" \
136 : "=r"(psr) \
137 : "i" (~PSR_PIL) \
138 : "memory"); \
139} while(0)
140
141#define __local_save_flags(flags) \
142do { \
143 typecheck(unsigned long, flags); \
144 asm("movsg psr,%0" \
145 : "=r"(flags) \
146 : \
147 : "memory"); \
148} while(0)
149
150#define __local_irq_save(flags) \
151do { \
152 unsigned long npsr; \
153 typecheck(unsigned long, flags); \
154 asm volatile(" movsg psr,%0 \n" \
155 " andi %0,%3,%1 \n" \
156 " ori %1,%2,%1 \n" \
157 " movgs %1,psr \n" \
158 : "=r"(flags), "=r"(npsr) \
159 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
160 : "memory"); \
161} while(0)
162
163#define __local_irq_restore(flags) \
164do { \
165 typecheck(unsigned long, flags); \
166 asm volatile(" movgs %0,psr \n" \
167 : \
168 : "r" (flags) \
169 : "memory"); \
170} while(0)
171
172#define __irqs_disabled() \
173 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
174
175/*
176 * Force strict CPU ordering. 40 * Force strict CPU ordering.
177 */ 41 */
178#define nop() asm volatile ("nop"::) 42#define nop() asm volatile ("nop"::)
@@ -181,21 +45,12 @@ do { \
181#define wmb() asm volatile ("membar" : : :"memory") 45#define wmb() asm volatile ("membar" : : :"memory")
182#define read_barrier_depends() do { } while (0) 46#define read_barrier_depends() do { } while (0)
183 47
184#ifdef CONFIG_SMP
185#define smp_mb() mb()
186#define smp_rmb() rmb()
187#define smp_wmb() wmb()
188#define smp_read_barrier_depends() read_barrier_depends()
189#define set_mb(var, value) \
190 do { xchg(&var, (value)); } while (0)
191#else
192#define smp_mb() barrier() 48#define smp_mb() barrier()
193#define smp_rmb() barrier() 49#define smp_rmb() barrier()
194#define smp_wmb() barrier() 50#define smp_wmb() barrier()
195#define smp_read_barrier_depends() do {} while(0) 51#define smp_read_barrier_depends() do {} while(0)
196#define set_mb(var, value) \ 52#define set_mb(var, value) \
197 do { var = (value); barrier(); } while (0) 53 do { var = (value); barrier(); } while (0)
198#endif
199 54
200extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2))); 55extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
201extern void free_initmem(void); 56extern void free_initmem(void);
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
index 11f33ead29bf..cefbe73dc119 100644
--- a/arch/frv/include/asm/thread_info.h
+++ b/arch/frv/include/asm/thread_info.h
@@ -21,6 +21,8 @@
21 21
22#define THREAD_SIZE 8192 22#define THREAD_SIZE 8192
23 23
24#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR
25
24/* 26/*
25 * low level task data that entry.S needs immediate access to 27 * low level task data that entry.S needs immediate access to
26 * - this struct should fit entirely inside of one cache line 28 * - this struct should fit entirely inside of one cache line
@@ -84,16 +86,11 @@ register struct thread_info *__current_thread_info asm("gr15");
84 86
85/* thread information allocation */ 87/* thread information allocation */
86#ifdef CONFIG_DEBUG_STACK_USAGE 88#ifdef CONFIG_DEBUG_STACK_USAGE
87#define alloc_thread_info(tsk) \ 89#define alloc_thread_info_node(tsk, node) \
88 ({ \ 90 kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)
89 struct thread_info *ret; \
90 \
91 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
92 \
93 ret; \
94 })
95#else 91#else
96#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) 92#define alloc_thread_info_node(tsk, node) \
93 kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)
97#endif 94#endif
98 95
99#define free_thread_info(info) kfree(info) 96#define free_thread_info(info) kfree(info)
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h
index 613bf1e962f0..aa3e7fdc7f29 100644
--- a/arch/frv/include/asm/types.h
+++ b/arch/frv/include/asm/types.h
@@ -27,14 +27,6 @@ typedef unsigned short umode_t;
27 27
28#define BITS_PER_LONG 32 28#define BITS_PER_LONG 32
29 29
30#ifndef __ASSEMBLY__
31
32/* Dma addresses are 32-bits wide. */
33
34typedef u32 dma_addr_t;
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* __KERNEL__ */ 30#endif /* __KERNEL__ */
39 31
40#endif /* _ASM_TYPES_H */ 32#endif /* _ASM_TYPES_H */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index b28da499e22a..a569dff7cd59 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -343,10 +343,11 @@
343#define __NR_pwritev 334 343#define __NR_pwritev 334
344#define __NR_rt_tgsigqueueinfo 335 344#define __NR_rt_tgsigqueueinfo 335
345#define __NR_perf_event_open 336 345#define __NR_perf_event_open 336
346#define __NR_setns 337
346 347
347#ifdef __KERNEL__ 348#ifdef __KERNEL__
348 349
349#define NR_syscalls 337 350#define NR_syscalls 338
350 351
351#define __ARCH_WANT_IPC_PARSE_VERSION 352#define __ARCH_WANT_IPC_PARSE_VERSION
352/* #define __ARCH_WANT_OLD_READDIR */ 353/* #define __ARCH_WANT_OLD_READDIR */
diff --git a/arch/frv/include/asm/virtconvert.h b/arch/frv/include/asm/virtconvert.h
index 59788fa2a813..b26d70ab9111 100644
--- a/arch/frv/include/asm/virtconvert.h
+++ b/arch/frv/include/asm/virtconvert.h
@@ -1,4 +1,4 @@
1/* virtconvert.h: virtual/physical/page address convertion 1/* virtconvert.h: virtual/physical/page address conversion
2 * 2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. 3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com) 4 * Written by David Howells (dhowells@redhat.com)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 12:20:26 -0500