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-rw-r--r--arch/frv/include/asm/Kbuild5
-rw-r--r--arch/frv/include/asm/atomic.h198
-rw-r--r--arch/frv/include/asm/auxvec.h4
-rw-r--r--arch/frv/include/asm/ax88796.h22
-rw-r--r--arch/frv/include/asm/bitops.h412
-rw-r--r--arch/frv/include/asm/bug.h53
-rw-r--r--arch/frv/include/asm/bugs.h14
-rw-r--r--arch/frv/include/asm/busctl-regs.h41
-rw-r--r--arch/frv/include/asm/byteorder.h6
-rw-r--r--arch/frv/include/asm/cache.h23
-rw-r--r--arch/frv/include/asm/cacheflush.h104
-rw-r--r--arch/frv/include/asm/checksum.h180
-rw-r--r--arch/frv/include/asm/cpu-irqs.h81
-rw-r--r--arch/frv/include/asm/cpumask.h6
-rw-r--r--arch/frv/include/asm/cputime.h6
-rw-r--r--arch/frv/include/asm/current.h30
-rw-r--r--arch/frv/include/asm/delay.h50
-rw-r--r--arch/frv/include/asm/device.h7
-rw-r--r--arch/frv/include/asm/div64.h1
-rw-r--r--arch/frv/include/asm/dm9000.h37
-rw-r--r--arch/frv/include/asm/dma-mapping.h174
-rw-r--r--arch/frv/include/asm/dma.h125
-rw-r--r--arch/frv/include/asm/elf.h142
-rw-r--r--arch/frv/include/asm/emergency-restart.h6
-rw-r--r--arch/frv/include/asm/errno.h7
-rw-r--r--arch/frv/include/asm/fb.h12
-rw-r--r--arch/frv/include/asm/fcntl.h1
-rw-r--r--arch/frv/include/asm/fpu.h11
-rw-r--r--arch/frv/include/asm/ftrace.h1
-rw-r--r--arch/frv/include/asm/futex.h19
-rw-r--r--arch/frv/include/asm/gdb-stub.h140
-rw-r--r--arch/frv/include/asm/gpio-regs.h116
-rw-r--r--arch/frv/include/asm/hardirq.h35
-rw-r--r--arch/frv/include/asm/highmem.h182
-rw-r--r--arch/frv/include/asm/hw_irq.h16
-rw-r--r--arch/frv/include/asm/init.h12
-rw-r--r--arch/frv/include/asm/io.h392
-rw-r--r--arch/frv/include/asm/ioctl.h1
-rw-r--r--arch/frv/include/asm/ioctls.h86
-rw-r--r--arch/frv/include/asm/ipcbuf.h30
-rw-r--r--arch/frv/include/asm/irc-regs.h53
-rw-r--r--arch/frv/include/asm/irq.h30
-rw-r--r--arch/frv/include/asm/irq_regs.h27
-rw-r--r--arch/frv/include/asm/kdebug.h1
-rw-r--r--arch/frv/include/asm/kmap_types.h29
-rw-r--r--arch/frv/include/asm/linkage.h7
-rw-r--r--arch/frv/include/asm/local.h6
-rw-r--r--arch/frv/include/asm/math-emu.h301
-rw-r--r--arch/frv/include/asm/mb-regs.h200
-rw-r--r--arch/frv/include/asm/mb86943a.h42
-rw-r--r--arch/frv/include/asm/mb93091-fpga-irqs.h42
-rw-r--r--arch/frv/include/asm/mb93093-fpga-irqs.h29
-rw-r--r--arch/frv/include/asm/mb93493-irqs.h50
-rw-r--r--arch/frv/include/asm/mb93493-regs.h281
-rw-r--r--arch/frv/include/asm/mc146818rtc.h16
-rw-r--r--arch/frv/include/asm/mem-layout.h86
-rw-r--r--arch/frv/include/asm/mman.h18
-rw-r--r--arch/frv/include/asm/mmu.h41
-rw-r--r--arch/frv/include/asm/mmu_context.h50
-rw-r--r--arch/frv/include/asm/module.h28
-rw-r--r--arch/frv/include/asm/msgbuf.h32
-rw-r--r--arch/frv/include/asm/mutex.h9
-rw-r--r--arch/frv/include/asm/page.h78
-rw-r--r--arch/frv/include/asm/param.h22
-rw-r--r--arch/frv/include/asm/pci.h118
-rw-r--r--arch/frv/include/asm/percpu.h6
-rw-r--r--arch/frv/include/asm/pgalloc.h69
-rw-r--r--arch/frv/include/asm/pgtable.h549
-rw-r--r--arch/frv/include/asm/poll.h12
-rw-r--r--arch/frv/include/asm/posix_types.h62
-rw-r--r--arch/frv/include/asm/processor.h153
-rw-r--r--arch/frv/include/asm/ptrace.h83
-rw-r--r--arch/frv/include/asm/registers.h232
-rw-r--r--arch/frv/include/asm/resource.h7
-rw-r--r--arch/frv/include/asm/scatterlist.h46
-rw-r--r--arch/frv/include/asm/sections.h46
-rw-r--r--arch/frv/include/asm/segment.h45
-rw-r--r--arch/frv/include/asm/sembuf.h26
-rw-r--r--arch/frv/include/asm/serial-regs.h44
-rw-r--r--arch/frv/include/asm/serial.h18
-rw-r--r--arch/frv/include/asm/setup.h31
-rw-r--r--arch/frv/include/asm/shmbuf.h43
-rw-r--r--arch/frv/include/asm/shmparam.h7
-rw-r--r--arch/frv/include/asm/sigcontext.h26
-rw-r--r--arch/frv/include/asm/siginfo.h12
-rw-r--r--arch/frv/include/asm/signal.h161
-rw-r--r--arch/frv/include/asm/smp.h9
-rw-r--r--arch/frv/include/asm/socket.h61
-rw-r--r--arch/frv/include/asm/sockios.h14
-rw-r--r--arch/frv/include/asm/spinlock.h17
-rw-r--r--arch/frv/include/asm/spr-regs.h416
-rw-r--r--arch/frv/include/asm/stat.h100
-rw-r--r--arch/frv/include/asm/statfs.h7
-rw-r--r--arch/frv/include/asm/string.h51
-rw-r--r--arch/frv/include/asm/suspend.h20
-rw-r--r--arch/frv/include/asm/swab.h10
-rw-r--r--arch/frv/include/asm/system.h301
-rw-r--r--arch/frv/include/asm/termbits.h202
-rw-r--r--arch/frv/include/asm/termios.h58
-rw-r--r--arch/frv/include/asm/thread_info.h144
-rw-r--r--arch/frv/include/asm/timer-regs.h106
-rw-r--r--arch/frv/include/asm/timex.h20
-rw-r--r--arch/frv/include/asm/tlb.h27
-rw-r--r--arch/frv/include/asm/tlbflush.h73
-rw-r--r--arch/frv/include/asm/topology.h12
-rw-r--r--arch/frv/include/asm/types.h40
-rw-r--r--arch/frv/include/asm/uaccess.h321
-rw-r--r--arch/frv/include/asm/ucontext.h12
-rw-r--r--arch/frv/include/asm/unaligned.h22
-rw-r--r--arch/frv/include/asm/unistd.h382
-rw-r--r--arch/frv/include/asm/user.h80
-rw-r--r--arch/frv/include/asm/vga.h17
-rw-r--r--arch/frv/include/asm/virtconvert.h41
-rw-r--r--arch/frv/include/asm/xor.h1
114 files changed, 8626 insertions, 0 deletions
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
new file mode 100644
index 000000000000..0f8956def738
--- /dev/null
+++ b/arch/frv/include/asm/Kbuild
@@ -0,0 +1,5 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += registers.h
4
5unifdef-y += termios.h
diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
new file mode 100644
index 000000000000..296c35cfb207
--- /dev/null
+++ b/arch/frv/include/asm/atomic.h
@@ -0,0 +1,198 @@
1/* atomic.h: atomic operation emulation for FR-V
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_ATOMIC_H
15#define _ASM_ATOMIC_H
16
17#include <linux/types.h>
18#include <asm/spr-regs.h>
19#include <asm/system.h>
20
21#ifdef CONFIG_SMP
22#error not SMP safe
23#endif
24
25/*
26 * Atomic operations that C can't guarantee us. Useful for
27 * resource counting etc..
28 *
29 * We do not have SMP systems, so we don't have to deal with that.
30 */
31
32/* Atomic operations are already serializing */
33#define smp_mb__before_atomic_dec() barrier()
34#define smp_mb__after_atomic_dec() barrier()
35#define smp_mb__before_atomic_inc() barrier()
36#define smp_mb__after_atomic_inc() barrier()
37
38#define ATOMIC_INIT(i) { (i) }
39#define atomic_read(v) ((v)->counter)
40#define atomic_set(v, i) (((v)->counter) = (i))
41
42#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
43static inline int atomic_add_return(int i, atomic_t *v)
44{
45 unsigned long val;
46
47 asm("0: \n"
48 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
49 " ckeq icc3,cc7 \n"
50 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
51 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
52 " add%I2 %1,%2,%1 \n"
53 " cst.p %1,%M0 ,cc3,#1 \n"
54 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
55 " beq icc3,#0,0b \n"
56 : "+U"(v->counter), "=&r"(val)
57 : "NPr"(i)
58 : "memory", "cc7", "cc3", "icc3"
59 );
60
61 return val;
62}
63
64static inline int atomic_sub_return(int i, atomic_t *v)
65{
66 unsigned long val;
67
68 asm("0: \n"
69 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
70 " ckeq icc3,cc7 \n"
71 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
72 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
73 " sub%I2 %1,%2,%1 \n"
74 " cst.p %1,%M0 ,cc3,#1 \n"
75 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
76 " beq icc3,#0,0b \n"
77 : "+U"(v->counter), "=&r"(val)
78 : "NPr"(i)
79 : "memory", "cc7", "cc3", "icc3"
80 );
81
82 return val;
83}
84
85#else
86
87extern int atomic_add_return(int i, atomic_t *v);
88extern int atomic_sub_return(int i, atomic_t *v);
89
90#endif
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124/*****************************************************************************/
125/*
126 * exchange value with memory
127 */
128#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
129
130#define xchg(ptr, x) \
131({ \
132 __typeof__(ptr) __xg_ptr = (ptr); \
133 __typeof__(*(ptr)) __xg_orig; \
134 \
135 switch (sizeof(__xg_orig)) { \
136 case 4: \
137 asm volatile( \
138 "swap%I0 %M0,%1" \
139 : "+m"(*__xg_ptr), "=r"(__xg_orig) \
140 : "1"(x) \
141 : "memory" \
142 ); \
143 break; \
144 \
145 default: \
146 __xg_orig = (__typeof__(__xg_orig))0; \
147 asm volatile("break"); \
148 break; \
149 } \
150 \
151 __xg_orig; \
152})
153
154#else
155
156extern uint32_t __xchg_32(uint32_t i, volatile void *v);
157
158#define xchg(ptr, x) \
159({ \
160 __typeof__(ptr) __xg_ptr = (ptr); \
161 __typeof__(*(ptr)) __xg_orig; \
162 \
163 switch (sizeof(__xg_orig)) { \
164 case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
165 default: \
166 __xg_orig = (__typeof__(__xg_orig))0; \
167 asm volatile("break"); \
168 break; \
169 } \
170 __xg_orig; \
171})
172
173#endif
174
175#define tas(ptr) (xchg((ptr), 1))
176
177#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
178#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
179
180static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
181{
182 int c, old;
183 c = atomic_read(v);
184 for (;;) {
185 if (unlikely(c == (u)))
186 break;
187 old = atomic_cmpxchg((v), c, c + (a));
188 if (likely(old == c))
189 break;
190 c = old;
191 }
192 return c != (u);
193}
194
195#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
196
197#include <asm-generic/atomic.h>
198#endif /* _ASM_ATOMIC_H */
diff --git a/arch/frv/include/asm/auxvec.h b/arch/frv/include/asm/auxvec.h
new file mode 100644
index 000000000000..07710778fa10
--- /dev/null
+++ b/arch/frv/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __FRV_AUXVEC_H
2#define __FRV_AUXVEC_H
3
4#endif
diff --git a/arch/frv/include/asm/ax88796.h b/arch/frv/include/asm/ax88796.h
new file mode 100644
index 000000000000..637e980393c5
--- /dev/null
+++ b/arch/frv/include/asm/ax88796.h
@@ -0,0 +1,22 @@
1/* ax88796.h: access points to the driver for the AX88796 NE2000 clone
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_AX88796_H
13#define _ASM_AX88796_H
14
15#include <asm/mb-regs.h>
16
17#define AX88796_IOADDR (__region_CS1 + 0x200)
18#define AX88796_IRQ IRQ_CPU_EXTERNAL7
19#define AX88796_FULL_DUPLEX 0 /* force full duplex */
20#define AX88796_BUS_INFO "CS1#+0x200" /* bus info for ethtool */
21
22#endif /* _ASM_AX88796_H */
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h
new file mode 100644
index 000000000000..287f6f697ce2
--- /dev/null
+++ b/arch/frv/include/asm/bitops.h
@@ -0,0 +1,412 @@
1/* bitops.h: bit operations for the Fujitsu FR-V CPUs
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_BITOPS_H
15#define _ASM_BITOPS_H
16
17#include <linux/compiler.h>
18#include <asm/byteorder.h>
19
20#ifdef __KERNEL__
21
22#ifndef _LINUX_BITOPS_H
23#error only <linux/bitops.h> can be included directly
24#endif
25
26#include <asm-generic/bitops/ffz.h>
27
28/*
29 * clear_bit() doesn't provide any barrier for the compiler.
30 */
31#define smp_mb__before_clear_bit() barrier()
32#define smp_mb__after_clear_bit() barrier()
33
34#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
35static inline
36unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
37{
38 unsigned long old, tmp;
39
40 asm volatile(
41 "0: \n"
42 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
43 " ckeq icc3,cc7 \n"
44 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
45 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
46 " and%I3 %1,%3,%2 \n"
47 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
48 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
49 " beq icc3,#0,0b \n"
50 : "+U"(*v), "=&r"(old), "=r"(tmp)
51 : "NPr"(~mask)
52 : "memory", "cc7", "cc3", "icc3"
53 );
54
55 return old;
56}
57
58static inline
59unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
60{
61 unsigned long old, tmp;
62
63 asm volatile(
64 "0: \n"
65 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
66 " ckeq icc3,cc7 \n"
67 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
68 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
69 " or%I3 %1,%3,%2 \n"
70 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
71 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
72 " beq icc3,#0,0b \n"
73 : "+U"(*v), "=&r"(old), "=r"(tmp)
74 : "NPr"(mask)
75 : "memory", "cc7", "cc3", "icc3"
76 );
77
78 return old;
79}
80
81static inline
82unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
83{
84 unsigned long old, tmp;
85
86 asm volatile(
87 "0: \n"
88 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
89 " ckeq icc3,cc7 \n"
90 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
91 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
92 " xor%I3 %1,%3,%2 \n"
93 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
94 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
95 " beq icc3,#0,0b \n"
96 : "+U"(*v), "=&r"(old), "=r"(tmp)
97 : "NPr"(mask)
98 : "memory", "cc7", "cc3", "icc3"
99 );
100
101 return old;
102}
103
104#else
105
106extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
107extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
108extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
109
110#endif
111
112#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
113#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
114
115static inline int test_and_clear_bit(int nr, volatile void *addr)
116{
117 volatile unsigned long *ptr = addr;
118 unsigned long mask = 1UL << (nr & 31);
119 ptr += nr >> 5;
120 return (atomic_test_and_ANDNOT_mask(mask, ptr) & mask) != 0;
121}
122
123static inline int test_and_set_bit(int nr, volatile void *addr)
124{
125 volatile unsigned long *ptr = addr;
126 unsigned long mask = 1UL << (nr & 31);
127 ptr += nr >> 5;
128 return (atomic_test_and_OR_mask(mask, ptr) & mask) != 0;
129}
130
131static inline int test_and_change_bit(int nr, volatile void *addr)
132{
133 volatile unsigned long *ptr = addr;
134 unsigned long mask = 1UL << (nr & 31);
135 ptr += nr >> 5;
136 return (atomic_test_and_XOR_mask(mask, ptr) & mask) != 0;
137}
138
139static inline void clear_bit(int nr, volatile void *addr)
140{
141 test_and_clear_bit(nr, addr);
142}
143
144static inline void set_bit(int nr, volatile void *addr)
145{
146 test_and_set_bit(nr, addr);
147}
148
149static inline void change_bit(int nr, volatile void * addr)
150{
151 test_and_change_bit(nr, addr);
152}
153
154static inline void __clear_bit(int nr, volatile void * addr)
155{
156 volatile unsigned long *a = addr;
157 int mask;
158
159 a += nr >> 5;
160 mask = 1 << (nr & 31);
161 *a &= ~mask;
162}
163
164static inline void __set_bit(int nr, volatile void * addr)
165{
166 volatile unsigned long *a = addr;
167 int mask;
168
169 a += nr >> 5;
170 mask = 1 << (nr & 31);
171 *a |= mask;
172}
173
174static inline void __change_bit(int nr, volatile void *addr)
175{
176 volatile unsigned long *a = addr;
177 int mask;
178
179 a += nr >> 5;
180 mask = 1 << (nr & 31);
181 *a ^= mask;
182}
183
184static inline int __test_and_clear_bit(int nr, volatile void * addr)
185{
186 volatile unsigned long *a = addr;
187 int mask, retval;
188
189 a += nr >> 5;
190 mask = 1 << (nr & 31);
191 retval = (mask & *a) != 0;
192 *a &= ~mask;
193 return retval;
194}
195
196static inline int __test_and_set_bit(int nr, volatile void * addr)
197{
198 volatile unsigned long *a = addr;
199 int mask, retval;
200
201 a += nr >> 5;
202 mask = 1 << (nr & 31);
203 retval = (mask & *a) != 0;
204 *a |= mask;
205 return retval;
206}
207
208static inline int __test_and_change_bit(int nr, volatile void * addr)
209{
210 volatile unsigned long *a = addr;
211 int mask, retval;
212
213 a += nr >> 5;
214 mask = 1 << (nr & 31);
215 retval = (mask & *a) != 0;
216 *a ^= mask;
217 return retval;
218}
219
220/*
221 * This routine doesn't need to be atomic.
222 */
223static inline int __constant_test_bit(int nr, const volatile void * addr)
224{
225 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
226}
227
228static inline int __test_bit(int nr, const volatile void * addr)
229{
230 int * a = (int *) addr;
231 int mask;
232
233 a += nr >> 5;
234 mask = 1 << (nr & 0x1f);
235 return ((mask & *a) != 0);
236}
237
238#define test_bit(nr,addr) \
239(__builtin_constant_p(nr) ? \
240 __constant_test_bit((nr),(addr)) : \
241 __test_bit((nr),(addr)))
242
243#include <asm-generic/bitops/find.h>
244
245/**
246 * fls - find last bit set
247 * @x: the word to search
248 *
249 * This is defined the same way as ffs:
250 * - return 32..1 to indicate bit 31..0 most significant bit set
251 * - return 0 to indicate no bits set
252 */
253#define fls(x) \
254({ \
255 int bit; \
256 \
257 asm(" subcc %1,gr0,gr0,icc0 \n" \
258 " ckne icc0,cc4 \n" \
259 " cscan.p %1,gr0,%0 ,cc4,#1 \n" \
260 " csub %0,%0,%0 ,cc4,#0 \n" \
261 " csub %2,%0,%0 ,cc4,#1 \n" \
262 : "=&r"(bit) \
263 : "r"(x), "r"(32) \
264 : "icc0", "cc4" \
265 ); \
266 \
267 bit; \
268})
269
270/**
271 * fls64 - find last bit set in a 64-bit value
272 * @n: the value to search
273 *
274 * This is defined the same way as ffs:
275 * - return 64..1 to indicate bit 63..0 most significant bit set
276 * - return 0 to indicate no bits set
277 */
278static inline __attribute__((const))
279int fls64(u64 n)
280{
281 union {
282 u64 ll;
283 struct { u32 h, l; };
284 } _;
285 int bit, x, y;
286
287 _.ll = n;
288
289 asm(" subcc.p %3,gr0,gr0,icc0 \n"
290 " subcc %4,gr0,gr0,icc1 \n"
291 " ckne icc0,cc4 \n"
292 " ckne icc1,cc5 \n"
293 " norcr cc4,cc5,cc6 \n"
294 " csub.p %0,%0,%0 ,cc6,1 \n"
295 " orcr cc5,cc4,cc4 \n"
296 " andcr cc4,cc5,cc4 \n"
297 " cscan.p %3,gr0,%0 ,cc4,0 \n"
298 " setlos #64,%1 \n"
299 " cscan.p %4,gr0,%0 ,cc4,1 \n"
300 " setlos #32,%2 \n"
301 " csub.p %1,%0,%0 ,cc4,0 \n"
302 " csub %2,%0,%0 ,cc4,1 \n"
303 : "=&r"(bit), "=r"(x), "=r"(y)
304 : "0r"(_.h), "r"(_.l)
305 : "icc0", "icc1", "cc4", "cc5", "cc6"
306 );
307 return bit;
308
309}
310
311/**
312 * ffs - find first bit set
313 * @x: the word to search
314 *
315 * - return 32..1 to indicate bit 31..0 most least significant bit set
316 * - return 0 to indicate no bits set
317 */
318static inline __attribute__((const))
319int ffs(int x)
320{
321 /* Note: (x & -x) gives us a mask that is the least significant
322 * (rightmost) 1-bit of the value in x.
323 */
324 return fls(x & -x);
325}
326
327/**
328 * __ffs - find first bit set
329 * @x: the word to search
330 *
331 * - return 31..0 to indicate bit 31..0 most least significant bit set
332 * - if no bits are set in x, the result is undefined
333 */
334static inline __attribute__((const))
335int __ffs(unsigned long x)
336{
337 int bit;
338 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x));
339 return 31 - bit;
340}
341
342/**
343 * __fls - find last (most-significant) set bit in a long word
344 * @word: the word to search
345 *
346 * Undefined if no set bit exists, so code should check against 0 first.
347 */
348static inline unsigned long __fls(unsigned long word)
349{
350 unsigned long bit;
351 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(word));
352 return bit;
353}
354
355/*
356 * special slimline version of fls() for calculating ilog2_u32()
357 * - note: no protection against n == 0
358 */
359#define ARCH_HAS_ILOG2_U32
360static inline __attribute__((const))
361int __ilog2_u32(u32 n)
362{
363 int bit;
364 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(n));
365 return 31 - bit;
366}
367
368/*
369 * special slimline version of fls64() for calculating ilog2_u64()
370 * - note: no protection against n == 0
371 */
372#define ARCH_HAS_ILOG2_U64
373static inline __attribute__((const))
374int __ilog2_u64(u64 n)
375{
376 union {
377 u64 ll;
378 struct { u32 h, l; };
379 } _;
380 int bit, x, y;
381
382 _.ll = n;
383
384 asm(" subcc %3,gr0,gr0,icc0 \n"
385 " ckeq icc0,cc4 \n"
386 " cscan.p %3,gr0,%0 ,cc4,0 \n"
387 " setlos #63,%1 \n"
388 " cscan.p %4,gr0,%0 ,cc4,1 \n"
389 " setlos #31,%2 \n"
390 " csub.p %1,%0,%0 ,cc4,0 \n"
391 " csub %2,%0,%0 ,cc4,1 \n"
392 : "=&r"(bit), "=r"(x), "=r"(y)
393 : "0r"(_.h), "r"(_.l)
394 : "icc0", "cc4"
395 );
396 return bit;
397}
398
399#include <asm-generic/bitops/sched.h>
400#include <asm-generic/bitops/hweight.h>
401#include <asm-generic/bitops/lock.h>
402
403#include <asm-generic/bitops/ext2-non-atomic.h>
404
405#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr))
406#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr))
407
408#include <asm-generic/bitops/minix-le.h>
409
410#endif /* __KERNEL__ */
411
412#endif /* _ASM_BITOPS_H */
diff --git a/arch/frv/include/asm/bug.h b/arch/frv/include/asm/bug.h
new file mode 100644
index 000000000000..6b1b44d71028
--- /dev/null
+++ b/arch/frv/include/asm/bug.h
@@ -0,0 +1,53 @@
1/* bug.h: FRV bug trapping
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#include <linux/linkage.h>
15
16#ifdef CONFIG_BUG
17/*
18 * Tell the user there is some problem.
19 */
20extern asmlinkage void __debug_bug_trap(int signr);
21
22#ifdef CONFIG_NO_KERNEL_MSG
23#define _debug_bug_printk()
24#else
25extern void __debug_bug_printk(const char *file, unsigned line);
26#define _debug_bug_printk() __debug_bug_printk(__FILE__, __LINE__)
27#endif
28
29#define _debug_bug_trap(signr) \
30do { \
31 __debug_bug_trap(signr); \
32 asm volatile("nop"); \
33} while(0)
34
35#define HAVE_ARCH_BUG
36#define BUG() \
37do { \
38 _debug_bug_printk(); \
39 _debug_bug_trap(6 /*SIGABRT*/); \
40} while (0)
41
42#ifdef CONFIG_GDBSTUB
43#define HAVE_ARCH_KGDB_RAISE
44#define kgdb_raise(signr) do { _debug_bug_trap(signr); } while(0)
45
46#define HAVE_ARCH_KGDB_BAD_PAGE
47#define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0)
48#endif
49#endif
50
51#include <asm-generic/bug.h>
52
53#endif
diff --git a/arch/frv/include/asm/bugs.h b/arch/frv/include/asm/bugs.h
new file mode 100644
index 000000000000..f2382be2b46c
--- /dev/null
+++ b/arch/frv/include/asm/bugs.h
@@ -0,0 +1,14 @@
1/* bugs.h: arch bug checking entry
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12static inline void check_bugs(void)
13{
14}
diff --git a/arch/frv/include/asm/busctl-regs.h b/arch/frv/include/asm/busctl-regs.h
new file mode 100644
index 000000000000..bb0ff4816e27
--- /dev/null
+++ b/arch/frv/include/asm/busctl-regs.h
@@ -0,0 +1,41 @@
1/* busctl-regs.h: FR400-series CPU bus controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15/* bus controller registers */
16#define __get_LGCR() ({ *(volatile unsigned long *)(0xfe000010); })
17#define __get_LMAICR() ({ *(volatile unsigned long *)(0xfe000030); })
18#define __get_LEMBR() ({ *(volatile unsigned long *)(0xfe000040); })
19#define __get_LEMAM() ({ *(volatile unsigned long *)(0xfe000048); })
20#define __get_LCR(R) ({ *(volatile unsigned long *)(0xfe000100 + 8*(R)); })
21#define __get_LSBR(R) ({ *(volatile unsigned long *)(0xfe000c00 + 8*(R)); })
22#define __get_LSAM(R) ({ *(volatile unsigned long *)(0xfe000d00 + 8*(R)); })
23
24#define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0)
25#define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0)
26#define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0)
27#define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0)
28#define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0)
29#define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0)
30#define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0)
31
32/* FR401 SDRAM controller registers */
33#define __get_DBR(R) ({ *(volatile unsigned long *)(0xfe000e00 + 8*(R)); })
34#define __get_DAM(R) ({ *(volatile unsigned long *)(0xfe000f00 + 8*(R)); })
35
36/* FR551 SDRAM controller registers */
37#define __get_DARS(R) ({ *(volatile unsigned long *)(0xfeff0100 + 8*(R)); })
38#define __get_DAMK(R) ({ *(volatile unsigned long *)(0xfeff0110 + 8*(R)); })
39
40
41#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/frv/include/asm/byteorder.h b/arch/frv/include/asm/byteorder.h
new file mode 100644
index 000000000000..f29b7593e088
--- /dev/null
+++ b/arch/frv/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/big_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h
new file mode 100644
index 000000000000..2797163b8f4f
--- /dev/null
+++ b/arch/frv/include/asm/cache.h
@@ -0,0 +1,23 @@
1/* cache.h: FRV cache definitions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_CACHE_H
13#define __ASM_CACHE_H
14
15
16/* bytes per L1 cache line */
17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
19
20#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
21#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
22
23#endif
diff --git a/arch/frv/include/asm/cacheflush.h b/arch/frv/include/asm/cacheflush.h
new file mode 100644
index 000000000000..432a69e7f3d4
--- /dev/null
+++ b/arch/frv/include/asm/cacheflush.h
@@ -0,0 +1,104 @@
1/* cacheflush.h: FRV cache flushing routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHEFLUSH_H
13#define _ASM_CACHEFLUSH_H
14
15/* Keep includes the same across arches. */
16#include <linux/mm.h>
17
18/*
19 * virtually-indexed cache management (our cache is physically indexed)
20 */
21#define flush_cache_all() do {} while(0)
22#define flush_cache_mm(mm) do {} while(0)
23#define flush_cache_dup_mm(mm) do {} while(0)
24#define flush_cache_range(mm, start, end) do {} while(0)
25#define flush_cache_page(vma, vmaddr, pfn) do {} while(0)
26#define flush_cache_vmap(start, end) do {} while(0)
27#define flush_cache_vunmap(start, end) do {} while(0)
28#define flush_dcache_mmap_lock(mapping) do {} while(0)
29#define flush_dcache_mmap_unlock(mapping) do {} while(0)
30
31/*
32 * physically-indexed cache management
33 * - see arch/frv/lib/cache.S
34 */
35extern void frv_dcache_writeback(unsigned long start, unsigned long size);
36extern void frv_cache_invalidate(unsigned long start, unsigned long size);
37extern void frv_icache_invalidate(unsigned long start, unsigned long size);
38extern void frv_cache_wback_inv(unsigned long start, unsigned long size);
39
40static inline void __flush_cache_all(void)
41{
42 asm volatile(" dcef @(gr0,gr0),#1 \n"
43 " icei @(gr0,gr0),#1 \n"
44 " membar \n"
45 : : : "memory"
46 );
47}
48
49/* dcache/icache coherency... */
50#ifdef CONFIG_MMU
51extern void flush_dcache_page(struct page *page);
52#else
53static inline void flush_dcache_page(struct page *page)
54{
55 unsigned long addr = page_to_phys(page);
56 frv_dcache_writeback(addr, addr + PAGE_SIZE);
57}
58#endif
59
60static inline void flush_page_to_ram(struct page *page)
61{
62 flush_dcache_page(page);
63}
64
65static inline void flush_icache(void)
66{
67 __flush_cache_all();
68}
69
70static inline void flush_icache_range(unsigned long start, unsigned long end)
71{
72 frv_cache_wback_inv(start, end);
73}
74
75#ifdef CONFIG_MMU
76extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
77 unsigned long start, unsigned long len);
78#else
79static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
80 unsigned long start, unsigned long len)
81{
82 frv_cache_wback_inv(start, start + len);
83}
84#endif
85
86static inline void flush_icache_page(struct vm_area_struct *vma, struct page *page)
87{
88 flush_icache_user_range(vma, page, page_to_phys(page), PAGE_SIZE);
89}
90
91/*
92 * permit ptrace to access another process's address space through the icache
93 * and the dcache
94 */
95#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
96do { \
97 memcpy((dst), (src), (len)); \
98 flush_icache_user_range((vma), (page), (vaddr), (len)); \
99} while(0)
100
101#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
102 memcpy((dst), (src), (len))
103
104#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/frv/include/asm/checksum.h b/arch/frv/include/asm/checksum.h
new file mode 100644
index 000000000000..269da09ff637
--- /dev/null
+++ b/arch/frv/include/asm/checksum.h
@@ -0,0 +1,180 @@
1/* checksum.h: FRV checksumming
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CHECKSUM_H
13#define _ASM_CHECKSUM_H
14
15#include <linux/in6.h>
16
17/*
18 * computes the checksum of a memory block at buff, length len,
19 * and adds in "sum" (32-bit)
20 *
21 * returns a 32-bit number suitable for feeding into itself
22 * or csum_tcpudp_magic
23 *
24 * this function must be called with even lengths, except
25 * for the last fragment, which may be odd
26 *
27 * it's best to have buff aligned on a 32-bit boundary
28 */
29__wsum csum_partial(const void *buff, int len, __wsum sum);
30
31/*
32 * the same as csum_partial, but copies from src while it
33 * checksums
34 *
35 * here even more important to align src and dst on a 32-bit (or even
36 * better 64-bit) boundary
37 */
38__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum);
39
40/*
41 * the same as csum_partial_copy, but copies from user space.
42 *
43 * here even more important to align src and dst on a 32-bit (or even
44 * better 64-bit) boundary
45 */
46extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
47 int len, __wsum sum, int *csum_err);
48
49/*
50 * This is a version of ip_compute_csum() optimized for IP headers,
51 * which always checksum on 4 octet boundaries.
52 *
53 */
54static inline
55__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
56{
57 unsigned int tmp, inc, sum = 0;
58
59 asm(" addcc gr0,gr0,gr0,icc0\n" /* clear icc0.C */
60 " subi %1,#4,%1 \n"
61 "0: \n"
62 " ldu.p @(%1,%3),%4 \n"
63 " subicc %2,#1,%2,icc1 \n"
64 " addxcc.p %4,%0,%0,icc0 \n"
65 " bhi icc1,#2,0b \n"
66
67 /* fold the 33-bit result into 16-bits */
68 " addxcc gr0,%0,%0,icc0 \n"
69 " srli %0,#16,%1 \n"
70 " sethi #0,%0 \n"
71 " add %1,%0,%0 \n"
72 " srli %0,#16,%1 \n"
73 " add %1,%0,%0 \n"
74
75 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp)
76 : "0" (sum), "1" (iph), "2" (ihl), "3" (4),
77 "m"(*(volatile struct { int _[100]; } *)iph)
78 : "icc0", "icc1", "memory"
79 );
80
81 return (__force __sum16)~sum;
82}
83
84/*
85 * Fold a partial checksum
86 */
87static inline __sum16 csum_fold(__wsum sum)
88{
89 unsigned int tmp;
90
91 asm(" srli %0,#16,%1 \n"
92 " sethi #0,%0 \n"
93 " add %1,%0,%0 \n"
94 " srli %0,#16,%1 \n"
95 " add %1,%0,%0 \n"
96 : "=r"(sum), "=&r"(tmp)
97 : "0"(sum)
98 );
99
100 return (__force __sum16)~sum;
101}
102
103/*
104 * computes the checksum of the TCP/UDP pseudo-header
105 * returns a 16-bit checksum, already complemented
106 */
107static inline __wsum
108csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
109 unsigned short proto, __wsum sum)
110{
111 asm(" addcc %1,%0,%0,icc0 \n"
112 " addxcc %2,%0,%0,icc0 \n"
113 " addxcc %3,%0,%0,icc0 \n"
114 " addxcc gr0,%0,%0,icc0 \n"
115 : "=r" (sum)
116 : "r" (daddr), "r" (saddr), "r" (len + proto), "0"(sum)
117 : "icc0"
118 );
119 return sum;
120}
121
122static inline __sum16
123csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
124 unsigned short proto, __wsum sum)
125{
126 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
127}
128
129/*
130 * this routine is used for miscellaneous IP-like checksums, mainly
131 * in icmp.c
132 */
133extern __sum16 ip_compute_csum(const void *buff, int len);
134
135#define _HAVE_ARCH_IPV6_CSUM
136static inline __sum16
137csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
138 __u32 len, unsigned short proto, __wsum sum)
139{
140 unsigned long tmp, tmp2;
141
142 asm(" addcc %2,%0,%0,icc0 \n"
143
144 /* add up the source addr */
145 " ldi @(%3,0),%1 \n"
146 " addxcc %1,%0,%0,icc0 \n"
147 " ldi @(%3,4),%2 \n"
148 " addxcc %2,%0,%0,icc0 \n"
149 " ldi @(%3,8),%1 \n"
150 " addxcc %1,%0,%0,icc0 \n"
151 " ldi @(%3,12),%2 \n"
152 " addxcc %2,%0,%0,icc0 \n"
153
154 /* add up the dest addr */
155 " ldi @(%4,0),%1 \n"
156 " addxcc %1,%0,%0,icc0 \n"
157 " ldi @(%4,4),%2 \n"
158 " addxcc %2,%0,%0,icc0 \n"
159 " ldi @(%4,8),%1 \n"
160 " addxcc %1,%0,%0,icc0 \n"
161 " ldi @(%4,12),%2 \n"
162 " addxcc %2,%0,%0,icc0 \n"
163
164 /* fold the 33-bit result into 16-bits */
165 " addxcc gr0,%0,%0,icc0 \n"
166 " srli %0,#16,%1 \n"
167 " sethi #0,%0 \n"
168 " add %1,%0,%0 \n"
169 " srli %0,#16,%1 \n"
170 " add %1,%0,%0 \n"
171
172 : "=r" (sum), "=&r" (tmp), "=r" (tmp2)
173 : "r" (saddr), "r" (daddr), "0" (sum), "2" (len + proto)
174 : "icc0"
175 );
176
177 return (__force __sum16)~sum;
178}
179
180#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/frv/include/asm/cpu-irqs.h b/arch/frv/include/asm/cpu-irqs.h
new file mode 100644
index 000000000000..478f3498fcfe
--- /dev/null
+++ b/arch/frv/include/asm/cpu-irqs.h
@@ -0,0 +1,81 @@
1/* cpu-irqs.h: on-CPU peripheral irqs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CPU_IRQS_H
13#define _ASM_CPU_IRQS_H
14
15#ifndef __ASSEMBLY__
16
17/* IRQ to level mappings */
18#define IRQ_GDBSTUB_LEVEL 15
19#define IRQ_UART_LEVEL 13
20
21#ifdef CONFIG_GDBSTUB_UART0
22#define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL
23#else
24#define IRQ_UART0_LEVEL IRQ_UART_LEVEL
25#endif
26
27#ifdef CONFIG_GDBSTUB_UART1
28#define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL
29#else
30#define IRQ_UART1_LEVEL IRQ_UART_LEVEL
31#endif
32
33#define IRQ_DMA0_LEVEL 14
34#define IRQ_DMA1_LEVEL 14
35#define IRQ_DMA2_LEVEL 14
36#define IRQ_DMA3_LEVEL 14
37#define IRQ_DMA4_LEVEL 14
38#define IRQ_DMA5_LEVEL 14
39#define IRQ_DMA6_LEVEL 14
40#define IRQ_DMA7_LEVEL 14
41
42#define IRQ_TIMER0_LEVEL 12
43#define IRQ_TIMER1_LEVEL 11
44#define IRQ_TIMER2_LEVEL 10
45
46#define IRQ_XIRQ0_LEVEL 1
47#define IRQ_XIRQ1_LEVEL 2
48#define IRQ_XIRQ2_LEVEL 3
49#define IRQ_XIRQ3_LEVEL 4
50#define IRQ_XIRQ4_LEVEL 5
51#define IRQ_XIRQ5_LEVEL 6
52#define IRQ_XIRQ6_LEVEL 7
53#define IRQ_XIRQ7_LEVEL 8
54
55/* IRQ IDs presented to drivers */
56#define IRQ_CPU__UNUSED IRQ_BASE_CPU
57#define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL)
58#define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL)
59#define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
60#define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
61#define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
62#define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
63#define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
64#define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
65#define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
66#define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
67#define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
68#define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
69#define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
70#define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
71#define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
72#define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
73#define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
74#define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
75#define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
76#define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
77#define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
78
79#endif /* !__ASSEMBLY__ */
80
81#endif /* _ASM_CPU_IRQS_H */
diff --git a/arch/frv/include/asm/cpumask.h b/arch/frv/include/asm/cpumask.h
new file mode 100644
index 000000000000..d999c20c84d2
--- /dev/null
+++ b/arch/frv/include/asm/cpumask.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_CPUMASK_H
2#define _ASM_CPUMASK_H
3
4#include <asm-generic/cpumask.h>
5
6#endif /* _ASM_CPUMASK_H */
diff --git a/arch/frv/include/asm/cputime.h b/arch/frv/include/asm/cputime.h
new file mode 100644
index 000000000000..f6c373ad2b80
--- /dev/null
+++ b/arch/frv/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_CPUTIME_H
2#define _ASM_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* _ASM_CPUTIME_H */
diff --git a/arch/frv/include/asm/current.h b/arch/frv/include/asm/current.h
new file mode 100644
index 000000000000..86b027491b08
--- /dev/null
+++ b/arch/frv/include/asm/current.h
@@ -0,0 +1,30 @@
1/* current.h: FRV current task pointer
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CURRENT_H
13#define _ASM_CURRENT_H
14
15#ifndef __ASSEMBLY__
16
17/*
18 * dedicate GR29 to keeping the current task pointer
19 */
20register struct task_struct *current asm("gr29");
21
22#define get_current() current
23
24#else
25
26#define CURRENT gr29
27
28#endif
29
30#endif /* _ASM_CURRENT_H */
diff --git a/arch/frv/include/asm/delay.h b/arch/frv/include/asm/delay.h
new file mode 100644
index 000000000000..597b4ebf03b4
--- /dev/null
+++ b/arch/frv/include/asm/delay.h
@@ -0,0 +1,50 @@
1/* delay.h: FRV delay code
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DELAY_H
13#define _ASM_DELAY_H
14
15#include <asm/param.h>
16#include <asm/timer-regs.h>
17
18/*
19 * delay loop - runs at __core_clock_speed_HZ / 2 [there are 2 insns in the loop]
20 */
21extern unsigned long __delay_loops_MHz;
22
23static inline void __delay(unsigned long loops)
24{
25 asm volatile("1: subicc %0,#1,%0,icc0 \n"
26 " bnc icc0,#2,1b \n"
27 : "=r" (loops)
28 : "0" (loops)
29 : "icc0"
30 );
31}
32
33/*
34 * Use only for very small delays ( < 1 msec). Should probably use a
35 * lookup table, really, as the multiplications take much too long with
36 * short delays. This is a "reasonable" implementation, though (and the
37 * first constant multiplications gets optimized away if the delay is
38 * a constant)
39 */
40
41extern unsigned long loops_per_jiffy;
42
43static inline void udelay(unsigned long usecs)
44{
45 __delay(usecs * __delay_loops_MHz);
46}
47
48#define ndelay(n) udelay((n) * 5)
49
50#endif /* _ASM_DELAY_H */
diff --git a/arch/frv/include/asm/device.h b/arch/frv/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/frv/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/frv/include/asm/div64.h b/arch/frv/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/frv/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/frv/include/asm/dm9000.h b/arch/frv/include/asm/dm9000.h
new file mode 100644
index 000000000000..f6f48fd9ec6e
--- /dev/null
+++ b/arch/frv/include/asm/dm9000.h
@@ -0,0 +1,37 @@
1/* dm9000.h: Davicom DM9000 adapter configuration
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DM9000_H
13#define _ASM_DM9000_H
14
15#include <asm/mb-regs.h>
16
17#define DM9000_ARCH_IOBASE (__region_CS6 + 0x300)
18#define DM9000_ARCH_IRQ IRQ_CPU_EXTERNAL3 /* XIRQ #3 (shared with FPGA) */
19#undef DM9000_ARCH_IRQ_ACTLOW /* IRQ pin active high */
20#define DM9000_ARCH_BUS_INFO "CS6#+0x300" /* bus info for ethtool */
21
22#undef __is_PCI_IO
23#define __is_PCI_IO(addr) 0 /* not PCI */
24
25#undef inl
26#define inl(addr) \
27({ \
28 unsigned long __ioaddr = (unsigned long) addr; \
29 uint32_t x = readl(__ioaddr); \
30 ((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((x >> 24) & 0xff); \
31})
32
33#undef insl
34#define insl(a,b,l) __insl(a,b,l,0) /* don't byte-swap */
35
36
37#endif /* _ASM_DM9000_H */
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..b2898877c07b
--- /dev/null
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -0,0 +1,174 @@
1#ifndef _ASM_DMA_MAPPING_H
2#define _ASM_DMA_MAPPING_H
3
4#include <linux/device.h>
5#include <asm/cache.h>
6#include <asm/cacheflush.h>
7#include <asm/scatterlist.h>
8#include <asm/io.h>
9
10#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
12
13extern unsigned long __nongprelbss dma_coherent_mem_start;
14extern unsigned long __nongprelbss dma_coherent_mem_end;
15
16void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
17void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
18
19/*
20 * Map a single buffer of the indicated size for DMA in streaming mode.
21 * The 32-bit bus address to use is returned.
22 *
23 * Once the device is given the dma address, the device owns this memory
24 * until either pci_unmap_single or pci_dma_sync_single is performed.
25 */
26extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
27 enum dma_data_direction direction);
28
29/*
30 * Unmap a single streaming mode DMA translation. The dma_addr and size
31 * must match what was provided for in a previous pci_map_single call. All
32 * other usages are undefined.
33 *
34 * After this call, reads by the cpu to the buffer are guarenteed to see
35 * whatever the device wrote there.
36 */
37static inline
38void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
39 enum dma_data_direction direction)
40{
41 BUG_ON(direction == DMA_NONE);
42}
43
44/*
45 * Map a set of buffers described by scatterlist in streaming
46 * mode for DMA. This is the scather-gather version of the
47 * above pci_map_single interface. Here the scatter gather list
48 * elements are each tagged with the appropriate dma address
49 * and length. They are obtained via sg_dma_{address,length}(SG).
50 *
51 * NOTE: An implementation may be able to use a smaller number of
52 * DMA address/length pairs than there are SG table elements.
53 * (for example via virtual mapping capabilities)
54 * The routine returns the number of addr/length pairs actually
55 * used, at most nents.
56 *
57 * Device ownership issues as mentioned above for pci_map_single are
58 * the same here.
59 */
60extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
61 enum dma_data_direction direction);
62
63/*
64 * Unmap a set of streaming mode DMA translations.
65 * Again, cpu read rules concerning calls here are the same as for
66 * pci_unmap_single() above.
67 */
68static inline
69void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
70 enum dma_data_direction direction)
71{
72 BUG_ON(direction == DMA_NONE);
73}
74
75extern
76dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
77 size_t size, enum dma_data_direction direction);
78
79static inline
80void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
81 enum dma_data_direction direction)
82{
83 BUG_ON(direction == DMA_NONE);
84}
85
86
87static inline
88void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
89 enum dma_data_direction direction)
90{
91}
92
93static inline
94void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
95 enum dma_data_direction direction)
96{
97 flush_write_buffers();
98}
99
100static inline
101void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
102 unsigned long offset, size_t size,
103 enum dma_data_direction direction)
104{
105}
106
107static inline
108void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
109 unsigned long offset, size_t size,
110 enum dma_data_direction direction)
111{
112 flush_write_buffers();
113}
114
115static inline
116void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
117 enum dma_data_direction direction)
118{
119}
120
121static inline
122void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
123 enum dma_data_direction direction)
124{
125 flush_write_buffers();
126}
127
128static inline
129int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
130{
131 return 0;
132}
133
134static inline
135int dma_supported(struct device *dev, u64 mask)
136{
137 /*
138 * we fall back to GFP_DMA when the mask isn't all 1s,
139 * so we can't guarantee allocations that must be
140 * within a tighter range than GFP_DMA..
141 */
142 if (mask < 0x00ffffff)
143 return 0;
144
145 return 1;
146}
147
148static inline
149int dma_set_mask(struct device *dev, u64 mask)
150{
151 if (!dev->dma_mask || !dma_supported(dev, mask))
152 return -EIO;
153
154 *dev->dma_mask = mask;
155
156 return 0;
157}
158
159static inline
160int dma_get_cache_alignment(void)
161{
162 return 1 << L1_CACHE_SHIFT;
163}
164
165#define dma_is_consistent(d, h) (1)
166
167static inline
168void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
169 enum dma_data_direction direction)
170{
171 flush_write_buffers();
172}
173
174#endif /* _ASM_DMA_MAPPING_H */
diff --git a/arch/frv/include/asm/dma.h b/arch/frv/include/asm/dma.h
new file mode 100644
index 000000000000..683c47d48a5b
--- /dev/null
+++ b/arch/frv/include/asm/dma.h
@@ -0,0 +1,125 @@
1/* dma.h: FRV DMA controller management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DMA_H
13#define _ASM_DMA_H
14
15//#define DMA_DEBUG 1
16
17#include <linux/interrupt.h>
18
19#undef MAX_DMA_CHANNELS /* don't use kernel/dma.c */
20
21/* under 2.4 this is actually needed by the new bootmem allocator */
22#define MAX_DMA_ADDRESS PAGE_OFFSET
23
24/*
25 * FRV DMA controller management
26 */
27typedef irqreturn_t (*dma_irq_handler_t)(int dmachan, unsigned long cstr, void *data);
28
29extern void frv_dma_init(void);
30
31extern int frv_dma_open(const char *devname,
32 unsigned long dmamask,
33 int dmacap,
34 dma_irq_handler_t handler,
35 unsigned long irq_flags,
36 void *data);
37
38/* channels required */
39#define FRV_DMA_MASK_ANY ULONG_MAX /* any channel */
40
41/* capabilities required */
42#define FRV_DMA_CAP_DREQ 0x01 /* DMA request pin */
43#define FRV_DMA_CAP_DACK 0x02 /* DMA ACK pin */
44#define FRV_DMA_CAP_DONE 0x04 /* DMA done pin */
45
46extern void frv_dma_close(int dma);
47
48extern void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr);
49
50extern void frv_dma_start(int dma,
51 unsigned long sba, unsigned long dba,
52 unsigned long pix, unsigned long six, unsigned long bcl);
53
54extern void frv_dma_restart_circular(int dma, unsigned long six);
55
56extern void frv_dma_stop(int dma);
57
58extern int is_frv_dma_interrupting(int dma);
59
60extern void frv_dma_dump(int dma);
61
62extern void frv_dma_status_clear(int dma);
63
64#define FRV_DMA_NCHANS 8
65#define FRV_DMA_4CHANS 4
66#define FRV_DMA_8CHANS 8
67
68#define DMAC_CCFRx 0x00 /* channel configuration reg */
69#define DMAC_CCFRx_CM_SHIFT 16
70#define DMAC_CCFRx_CM_DA 0x00000000
71#define DMAC_CCFRx_CM_SCA 0x00010000
72#define DMAC_CCFRx_CM_DCA 0x00020000
73#define DMAC_CCFRx_CM_2D 0x00030000
74#define DMAC_CCFRx_ATS_SHIFT 8
75#define DMAC_CCFRx_RS_INTERN 0x00000000
76#define DMAC_CCFRx_RS_EXTERN 0x00000001
77#define DMAC_CCFRx_RS_SHIFT 0
78
79#define DMAC_CSTRx 0x08 /* channel status reg */
80#define DMAC_CSTRx_FS 0x0000003f
81#define DMAC_CSTRx_NE 0x00000100
82#define DMAC_CSTRx_FED 0x00000200
83#define DMAC_CSTRx_WER 0x00000800
84#define DMAC_CSTRx_RER 0x00001000
85#define DMAC_CSTRx_CE 0x00002000
86#define DMAC_CSTRx_INT 0x00800000
87#define DMAC_CSTRx_BUSY 0x80000000
88
89#define DMAC_CCTRx 0x10 /* channel control reg */
90#define DMAC_CCTRx_DSIZ_1 0x00000000
91#define DMAC_CCTRx_DSIZ_2 0x00000001
92#define DMAC_CCTRx_DSIZ_4 0x00000002
93#define DMAC_CCTRx_DSIZ_32 0x00000005
94#define DMAC_CCTRx_DAU_HOLD 0x00000000
95#define DMAC_CCTRx_DAU_INC 0x00000010
96#define DMAC_CCTRx_DAU_DEC 0x00000020
97#define DMAC_CCTRx_SSIZ_1 0x00000000
98#define DMAC_CCTRx_SSIZ_2 0x00000100
99#define DMAC_CCTRx_SSIZ_4 0x00000200
100#define DMAC_CCTRx_SSIZ_32 0x00000500
101#define DMAC_CCTRx_SAU_HOLD 0x00000000
102#define DMAC_CCTRx_SAU_INC 0x00001000
103#define DMAC_CCTRx_SAU_DEC 0x00002000
104#define DMAC_CCTRx_FC 0x08000000
105#define DMAC_CCTRx_ICE 0x10000000
106#define DMAC_CCTRx_IE 0x40000000
107#define DMAC_CCTRx_ACT 0x80000000
108
109#define DMAC_SBAx 0x18 /* source base address reg */
110#define DMAC_DBAx 0x20 /* data base address reg */
111#define DMAC_PIXx 0x28 /* primary index reg */
112#define DMAC_SIXx 0x30 /* secondary index reg */
113#define DMAC_BCLx 0x38 /* byte count limit reg */
114#define DMAC_APRx 0x40 /* alternate pointer reg */
115
116/*
117 * required for PCI + MODULES
118 */
119#ifdef CONFIG_PCI
120extern int isa_dma_bridge_buggy;
121#else
122#define isa_dma_bridge_buggy (0)
123#endif
124
125#endif /* _ASM_DMA_H */
diff --git a/arch/frv/include/asm/elf.h b/arch/frv/include/asm/elf.h
new file mode 100644
index 000000000000..7279ec07d62e
--- /dev/null
+++ b/arch/frv/include/asm/elf.h
@@ -0,0 +1,142 @@
1/* elf.h: FR-V ELF definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68knommu/elf.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_ELF_H
13#define __ASM_ELF_H
14
15#include <asm/ptrace.h>
16#include <asm/user.h>
17
18struct elf32_hdr;
19
20/*
21 * ELF header e_flags defines.
22 */
23#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
24#define EF_FRV_GPR32 0x00000001 /* Only uses GR on 32-register */
25#define EF_FRV_GPR64 0x00000002 /* Only uses GR on 64-register */
26#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
27#define EF_FRV_FPR32 0x00000004 /* Only uses FR on 32-register */
28#define EF_FRV_FPR64 0x00000008 /* Only uses FR on 64-register */
29#define EF_FRV_FPR_NONE 0x0000000C /* Uses software floating-point */
30#define EF_FRV_DWORD_MASK 0x00000030 /* mask for dword support */
31#define EF_FRV_DWORD_YES 0x00000010 /* Assumes stack aligned to 8-byte boundaries. */
32#define EF_FRV_DWORD_NO 0x00000020 /* Assumes stack aligned to 4-byte boundaries. */
33#define EF_FRV_DOUBLE 0x00000040 /* Uses double instructions. */
34#define EF_FRV_MEDIA 0x00000080 /* Uses media instructions. */
35#define EF_FRV_PIC 0x00000100 /* Uses position independent code. */
36#define EF_FRV_NON_PIC_RELOCS 0x00000200 /* Does not use position Independent code. */
37#define EF_FRV_MULADD 0x00000400 /* -mmuladd */
38#define EF_FRV_BIGPIC 0x00000800 /* -fPIC */
39#define EF_FRV_LIBPIC 0x00001000 /* -mlibrary-pic */
40#define EF_FRV_G0 0x00002000 /* -G 0, no small data ptr */
41#define EF_FRV_NOPACK 0x00004000 /* -mnopack */
42#define EF_FRV_FDPIC 0x00008000 /* -mfdpic */
43#define EF_FRV_CPU_MASK 0xff000000 /* specific cpu bits */
44#define EF_FRV_CPU_GENERIC 0x00000000 /* Set CPU type is FR-V */
45#define EF_FRV_CPU_FR500 0x01000000 /* Set CPU type is FR500 */
46#define EF_FRV_CPU_FR300 0x02000000 /* Set CPU type is FR300 */
47#define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */
48#define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */
49#define EF_FRV_CPU_FR400 0x05000000 /* Set CPU type is FR400 */
50#define EF_FRV_CPU_FR550 0x06000000 /* Set CPU type is FR550 */
51#define EF_FRV_CPU_FR405 0x07000000 /* Set CPU type is FR405 */
52#define EF_FRV_CPU_FR450 0x08000000 /* Set CPU type is FR450 */
53
54/*
55 * FR-V ELF relocation types
56 */
57
58
59/*
60 * ELF register definitions..
61 */
62typedef unsigned long elf_greg_t;
63
64#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
65typedef elf_greg_t elf_gregset_t[ELF_NGREG];
66
67typedef struct user_fpmedia_regs elf_fpregset_t;
68
69/*
70 * This is used to ensure we don't load something for the wrong architecture.
71 */
72extern int elf_check_arch(const struct elf32_hdr *hdr);
73
74#define elf_check_fdpic(x) ((x)->e_flags & EF_FRV_FDPIC && !((x)->e_flags & EF_FRV_NON_PIC_RELOCS))
75#define elf_check_const_displacement(x) ((x)->e_flags & EF_FRV_PIC)
76
77/*
78 * These are used to set parameters in the core dumps.
79 */
80#define ELF_CLASS ELFCLASS32
81#define ELF_DATA ELFDATA2MSB
82#define ELF_ARCH EM_FRV
83
84#define ELF_PLAT_INIT(_r) \
85do { \
86 __kernel_frame0_ptr->gr16 = 0; \
87 __kernel_frame0_ptr->gr17 = 0; \
88 __kernel_frame0_ptr->gr18 = 0; \
89 __kernel_frame0_ptr->gr19 = 0; \
90 __kernel_frame0_ptr->gr20 = 0; \
91 __kernel_frame0_ptr->gr21 = 0; \
92 __kernel_frame0_ptr->gr22 = 0; \
93 __kernel_frame0_ptr->gr23 = 0; \
94 __kernel_frame0_ptr->gr24 = 0; \
95 __kernel_frame0_ptr->gr25 = 0; \
96 __kernel_frame0_ptr->gr26 = 0; \
97 __kernel_frame0_ptr->gr27 = 0; \
98 __kernel_frame0_ptr->gr29 = 0; \
99} while(0)
100
101#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map_addr, _interp_map_addr, _dynamic_addr) \
102do { \
103 __kernel_frame0_ptr->gr16 = _exec_map_addr; \
104 __kernel_frame0_ptr->gr17 = _interp_map_addr; \
105 __kernel_frame0_ptr->gr18 = _dynamic_addr; \
106 __kernel_frame0_ptr->gr19 = 0; \
107 __kernel_frame0_ptr->gr20 = 0; \
108 __kernel_frame0_ptr->gr21 = 0; \
109 __kernel_frame0_ptr->gr22 = 0; \
110 __kernel_frame0_ptr->gr23 = 0; \
111 __kernel_frame0_ptr->gr24 = 0; \
112 __kernel_frame0_ptr->gr25 = 0; \
113 __kernel_frame0_ptr->gr26 = 0; \
114 __kernel_frame0_ptr->gr27 = 0; \
115 __kernel_frame0_ptr->gr29 = 0; \
116} while(0)
117
118#define USE_ELF_CORE_DUMP
119#define ELF_FDPIC_CORE_EFLAGS EF_FRV_FDPIC
120#define ELF_EXEC_PAGESIZE 16384
121
122/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
123 use of this is to invoke "./ld.so someprog" to test out a new version of
124 the loader. We need to make sure that it is out of the way of the program
125 that it will "exec", and that there is sufficient room for the brk. */
126
127#define ELF_ET_DYN_BASE 0x08000000UL
128
129/* This yields a mask that user programs can use to figure out what
130 instruction set this cpu supports. */
131
132#define ELF_HWCAP (0)
133
134/* This yields a string that ld.so will use to load implementation
135 specific libraries for optimization. This is more specific in
136 intent than poking at uname or /proc/cpuinfo. */
137
138#define ELF_PLATFORM (NULL)
139
140#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
141
142#endif
diff --git a/arch/frv/include/asm/emergency-restart.h b/arch/frv/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..108d8c48e42e
--- /dev/null
+++ b/arch/frv/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/frv/include/asm/errno.h b/arch/frv/include/asm/errno.h
new file mode 100644
index 000000000000..d010795ceefe
--- /dev/null
+++ b/arch/frv/include/asm/errno.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_ERRNO_H
2#define _ASM_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_ERRNO_H */
7
diff --git a/arch/frv/include/asm/fb.h b/arch/frv/include/asm/fb.h
new file mode 100644
index 000000000000..c7df38030992
--- /dev/null
+++ b/arch/frv/include/asm/fb.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/arch/frv/include/asm/fcntl.h b/arch/frv/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/frv/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/frv/include/asm/fpu.h b/arch/frv/include/asm/fpu.h
new file mode 100644
index 000000000000..d73c60b56641
--- /dev/null
+++ b/arch/frv/include/asm/fpu.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_FPU_H
2#define __ASM_FPU_H
3
4
5/*
6 * MAX floating point unit state size (FSAVE/FRESTORE)
7 */
8
9#define kernel_fpu_end() do { asm volatile("bar":::"memory"); preempt_enable(); } while(0)
10
11#endif /* __ASM_FPU_H */
diff --git a/arch/frv/include/asm/ftrace.h b/arch/frv/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/frv/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/frv/include/asm/futex.h b/arch/frv/include/asm/futex.h
new file mode 100644
index 000000000000..08b3d1da3583
--- /dev/null
+++ b/arch/frv/include/asm/futex.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10extern int futex_atomic_op_inuser(int encoded_op, int __user *uaddr);
11
12static inline int
13futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
14{
15 return -ENOSYS;
16}
17
18#endif
19#endif
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h
new file mode 100644
index 000000000000..24f9738670bd
--- /dev/null
+++ b/arch/frv/include/asm/gdb-stub.h
@@ -0,0 +1,140 @@
1/* gdb-stub.h: FRV GDB stub
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_GDB_STUB_H
13#define __ASM_GDB_STUB_H
14
15#undef GDBSTUB_DEBUG_PROTOCOL
16
17#include <asm/ptrace.h>
18
19/*
20 * important register numbers in GDB protocol
21 * - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7,
22 * - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15,
23 * - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23,
24 * - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31,
25 * - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39,
26 * - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47,
27 * - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55,
28 * - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63,
29 * - FR0, FR1, FR2, FR3, FR4, FR5, FR6, FR7,
30 * - FR8, FR9, FR10, FR11, FR12, FR13, FR14, FR15,
31 * - FR16, FR17, FR18, FR19, FR20, FR21, FR22, FR23,
32 * - FR24, FR25, FR26, FR27, FR28, FR29, FR30, FR31,
33 * - FR32, FR33, FR34, FR35, FR36, FR37, FR38, FR39,
34 * - FR40, FR41, FR42, FR43, FR44, FR45, FR46, FR47,
35 * - FR48, FR49, FR50, FR51, FR52, FR53, FR54, FR55,
36 * - FR56, FR57, FR58, FR59, FR60, FR61, FR62, FR63,
37 * - PC, PSR, CCR, CCCR,
38 * - _X132, _X133, _X134
39 * - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3,
40 * - SCR0, SCR1, SCR2, SCR3,
41 * - LR, LCR,
42 * - IACC0H, IACC0L,
43 * - FSR0,
44 * - ACC0, ACC1, ACC2, ACC3, ACC4, ACC5, ACC6, ACC7,
45 * - ACCG0123, ACCG4567,
46 * - MSR0, MSR1,
47 * - GNER0, GNER1,
48 * - FNER0, FNER1,
49 */
50#define GDB_REG_GR(N) (N)
51#define GDB_REG_FR(N) (64+(N))
52#define GDB_REG_PC 128
53#define GDB_REG_PSR 129
54#define GDB_REG_CCR 130
55#define GDB_REG_CCCR 131
56#define GDB_REG_TBR 135
57#define GDB_REG_BRR 136
58#define GDB_REG_DBAR(N) (137+(N))
59#define GDB_REG_SCR(N) (141+(N))
60#define GDB_REG_LR 145
61#define GDB_REG_LCR 146
62#define GDB_REG_FSR0 149
63#define GDB_REG_ACC(N) (150+(N))
64#define GDB_REG_ACCG(N) (158+(N)/4)
65#define GDB_REG_MSR(N) (160+(N))
66#define GDB_REG_GNER(N) (162+(N))
67#define GDB_REG_FNER(N) (164+(N))
68
69#define GDB_REG_SP GDB_REG_GR(1)
70#define GDB_REG_FP GDB_REG_GR(2)
71
72#ifndef _LANGUAGE_ASSEMBLY
73
74/*
75 * Prototypes
76 */
77extern void show_registers_only(struct pt_regs *regs);
78
79extern void gdbstub_init(void);
80extern void gdbstub(int type);
81extern void gdbstub_exit(int status);
82
83extern void gdbstub_io_init(void);
84extern void gdbstub_set_baud(unsigned baud);
85extern int gdbstub_rx_char(unsigned char *_ch, int nonblock);
86extern void gdbstub_tx_char(unsigned char ch);
87extern void gdbstub_tx_flush(void);
88extern void gdbstub_do_rx(void);
89
90extern asmlinkage void __debug_stub_init_break(void);
91extern asmlinkage void __break_hijack_kernel_event(void);
92extern asmlinkage void __break_hijack_kernel_event_breaks_here(void);
93extern asmlinkage void start_kernel(void);
94
95extern asmlinkage void gdbstub_rx_handler(void);
96extern asmlinkage void gdbstub_rx_irq(void);
97extern asmlinkage void gdbstub_intercept(void);
98
99extern uint32_t __entry_usertrap_table[];
100extern uint32_t __entry_kerneltrap_table[];
101
102extern volatile u8 gdbstub_rx_buffer[PAGE_SIZE];
103extern volatile u32 gdbstub_rx_inp;
104extern volatile u32 gdbstub_rx_outp;
105extern volatile u8 gdbstub_rx_overflow;
106extern u8 gdbstub_rx_unget;
107
108extern void gdbstub_printk(const char *fmt, ...);
109extern void debug_to_serial(const char *p, int n);
110extern void console_set_baud(unsigned baud);
111
112#ifdef GDBSTUB_DEBUG_PROTOCOL
113#define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__)
114#else
115#define gdbstub_proto(FMT,...) ({ 0; })
116#endif
117
118/*
119 * we dedicate GR31 to keeping a pointer to the gdbstub exception frame
120 * - gr31 is destroyed on entry to the gdbstub if !MMU
121 * - gr31 is saved in scr3 on entry to the gdbstub if in !MMU
122 */
123register struct frv_frame0 *__debug_frame0 asm("gr31");
124
125#define __debug_frame (&__debug_frame0->regs)
126#define __debug_user_context (&__debug_frame0->uc)
127#define __debug_regs (&__debug_frame0->debug)
128#define __debug_reg(X) ((unsigned long *) ((unsigned long) &__debug_frame0 + (X)))
129
130struct frv_debug_status {
131 unsigned long bpsr;
132 unsigned long dcr;
133 unsigned long brr;
134 unsigned long nmar;
135};
136
137extern struct frv_debug_status __debug_status;
138
139#endif /* _LANGUAGE_ASSEMBLY */
140#endif /* __ASM_GDB_STUB_H */
diff --git a/arch/frv/include/asm/gpio-regs.h b/arch/frv/include/asm/gpio-regs.h
new file mode 100644
index 000000000000..9edf5d5d4d3f
--- /dev/null
+++ b/arch/frv/include/asm/gpio-regs.h
@@ -0,0 +1,116 @@
1/* gpio-regs.h: on-chip general purpose I/O registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_GPIO_REGS
13#define _ASM_GPIO_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_PDR() ({ __reg(0xfeff0400); })
18#define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)
19
20#define __get_GPDR() ({ __reg(0xfeff0408); })
21#define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)
22
23#define __get_SIR() ({ __reg(0xfeff0410); })
24#define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)
25
26#define __get_SOR() ({ __reg(0xfeff0418); })
27#define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)
28
29#define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0)
30
31#define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0)
32
33#define __get_RSTR() ({ __reg(0xfeff0500); })
34#define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0)
35
36
37
38/* PDR definitions */
39#define PDR_GPIO_DATA(X) (1 << (X))
40
41/* GPDR definitions */
42#define GPDR_INPUT 0
43#define GPDR_OUTPUT 1
44#define GPDR_DREQ0_BIT 0x00001000
45#define GPDR_DREQ1_BIT 0x00008000
46#define GPDR_DREQ2_BIT 0x00040000
47#define GPDR_DREQ3_BIT 0x00080000
48#define GPDR_DREQ4_BIT 0x00004000
49#define GPDR_DREQ5_BIT 0x00020000
50#define GPDR_DREQ6_BIT 0x00100000
51#define GPDR_DREQ7_BIT 0x00200000
52#define GPDR_DACK0_BIT 0x00002000
53#define GPDR_DACK1_BIT 0x00010000
54#define GPDR_DACK2_BIT 0x00100000
55#define GPDR_DACK3_BIT 0x00200000
56#define GPDR_DONE0_BIT 0x00004000
57#define GPDR_DONE1_BIT 0x00020000
58#define GPDR_GPIO_DIR(X,D) ((D) << (X))
59
60/* SIR definitions */
61#define SIR_GPIO_INPUT 0
62#define SIR_DREQ7_INPUT 0x00200000
63#define SIR_DREQ6_INPUT 0x00100000
64#define SIR_DREQ3_INPUT 0x00080000
65#define SIR_DREQ2_INPUT 0x00040000
66#define SIR_DREQ5_INPUT 0x00020000
67#define SIR_DREQ1_INPUT 0x00008000
68#define SIR_DREQ4_INPUT 0x00004000
69#define SIR_DREQ0_INPUT 0x00001000
70#define SIR_RXD1_INPUT 0x00000400
71#define SIR_CTS0_INPUT 0x00000100
72#define SIR_RXD0_INPUT 0x00000040
73#define SIR_GATE1_INPUT 0x00000020
74#define SIR_GATE0_INPUT 0x00000010
75#define SIR_IRQ3_INPUT 0x00000008
76#define SIR_IRQ2_INPUT 0x00000004
77#define SIR_IRQ1_INPUT 0x00000002
78#define SIR_IRQ0_INPUT 0x00000001
79#define SIR_DREQ_BITS (SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \
80 SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \
81 SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \
82 SIR_DREQ6_INPUT | SIR_DREQ7_INPUT)
83
84/* SOR definitions */
85#define SOR_GPIO_OUTPUT 0
86#define SOR_DACK3_OUTPUT 0x00200000
87#define SOR_DACK2_OUTPUT 0x00100000
88#define SOR_DONE1_OUTPUT 0x00020000
89#define SOR_DACK1_OUTPUT 0x00010000
90#define SOR_DONE0_OUTPUT 0x00004000
91#define SOR_DACK0_OUTPUT 0x00002000
92#define SOR_TXD1_OUTPUT 0x00000800
93#define SOR_RTS0_OUTPUT 0x00000200
94#define SOR_TXD0_OUTPUT 0x00000080
95#define SOR_TOUT1_OUTPUT 0x00000020
96#define SOR_TOUT0_OUTPUT 0x00000010
97#define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT)
98#define SOR_DACK_BITS (SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \
99 SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT)
100
101/* PDSR definitions */
102#define PDSR_UNCHANGED 0
103#define PDSR_SET_BIT(X) (1 << (X))
104
105/* PDCR definitions */
106#define PDCR_UNCHANGED 0
107#define PDCR_CLEAR_BIT(X) (1 << (X))
108
109/* RSTR definitions */
110/* Read Only */
111#define RSTR_POWERON 0x00000400
112#define RSTR_SOFTRESET_STATUS 0x00000100
113/* Write Only */
114#define RSTR_SOFTRESET 0x00000001
115
116#endif /* _ASM_GPIO_REGS */
diff --git a/arch/frv/include/asm/hardirq.h b/arch/frv/include/asm/hardirq.h
new file mode 100644
index 000000000000..fc47515822a2
--- /dev/null
+++ b/arch/frv/include/asm/hardirq.h
@@ -0,0 +1,35 @@
1/* hardirq.h: FRV hardware IRQ management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_HARDIRQ_H
13#define __ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17
18typedef struct {
19 unsigned int __softirq_pending;
20 unsigned long idle_timestamp;
21} ____cacheline_aligned irq_cpustat_t;
22
23#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
24
25#ifdef CONFIG_SMP
26#error SMP not available on FR-V
27#endif /* CONFIG_SMP */
28
29extern atomic_t irq_err_count;
30static inline void ack_bad_irq(int irq)
31{
32 atomic_inc(&irq_err_count);
33}
34
35#endif
diff --git a/arch/frv/include/asm/highmem.h b/arch/frv/include/asm/highmem.h
new file mode 100644
index 000000000000..68e4677fb9e7
--- /dev/null
+++ b/arch/frv/include/asm/highmem.h
@@ -0,0 +1,182 @@
1/* highmem.h: virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * See Documentation/frv/mmu-layout.txt for more information.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _ASM_HIGHMEM_H
16#define _ASM_HIGHMEM_H
17
18#ifdef __KERNEL__
19
20#include <linux/init.h>
21#include <linux/highmem.h>
22#include <asm/mem-layout.h>
23#include <asm/spr-regs.h>
24#include <asm/mb-regs.h>
25
26#define NR_TLB_LINES 64 /* number of lines in the TLB */
27
28#ifndef __ASSEMBLY__
29
30#include <linux/interrupt.h>
31#include <asm/kmap_types.h>
32#include <asm/pgtable.h>
33
34#ifdef CONFIG_DEBUG_HIGHMEM
35#define HIGHMEM_DEBUG 1
36#else
37#define HIGHMEM_DEBUG 0
38#endif
39
40/* declarations for highmem.c */
41extern unsigned long highstart_pfn, highend_pfn;
42
43#define kmap_prot PAGE_KERNEL
44#define kmap_pte ______kmap_pte_in_TLB
45extern pte_t *pkmap_page_table;
46
47#define flush_cache_kmaps() do { } while (0)
48
49/*
50 * Right now we initialize only a single pte table. It can be extended
51 * easily, subsequent pte tables have to be allocated in one physical
52 * chunk of RAM.
53 */
54#define LAST_PKMAP PTRS_PER_PTE
55#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
56#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
57#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
58
59extern void *kmap_high(struct page *page);
60extern void kunmap_high(struct page *page);
61
62extern void *kmap(struct page *page);
63extern void kunmap(struct page *page);
64
65extern struct page *kmap_atomic_to_page(void *ptr);
66
67#endif /* !__ASSEMBLY__ */
68
69/*
70 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
71 * gives a more generic (and caching) interface. But kmap_atomic can
72 * be used in IRQ contexts, so in some (very limited) cases we need
73 * it.
74 */
75#define KMAP_ATOMIC_CACHE_DAMR 8
76
77#ifndef __ASSEMBLY__
78
79#define __kmap_atomic_primary(type, paddr, ampr) \
80({ \
81 unsigned long damlr, dampr; \
82 \
83 dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
84 \
85 if (type != __KM_CACHE) \
86 asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory"); \
87 else \
88 asm volatile("movgs %0,iampr"#ampr"\n" \
89 "movgs %0,dampr"#ampr"\n" \
90 :: "r"(dampr) : "memory" \
91 ); \
92 \
93 asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
94 \
95 /*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \
96 \
97 (void *) damlr; \
98})
99
100#define __kmap_atomic_secondary(slot, paddr) \
101({ \
102 unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
103 unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
104 \
105 asm volatile("movgs %0,tplr \n" \
106 "movgs %1,tppr \n" \
107 "tlbpr %0,gr0,#2,#1" \
108 : : "r"(damlr), "r"(dampr) : "memory"); \
109 \
110 /*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \
111 \
112 (void *) damlr; \
113})
114
115static inline void *kmap_atomic(struct page *page, enum km_type type)
116{
117 unsigned long paddr;
118
119 pagefault_disable();
120 debug_kmap_atomic(type);
121 paddr = page_to_phys(page);
122
123 switch (type) {
124 case 0: return __kmap_atomic_primary(0, paddr, 2);
125 case 1: return __kmap_atomic_primary(1, paddr, 3);
126 case 2: return __kmap_atomic_primary(2, paddr, 4);
127 case 3: return __kmap_atomic_primary(3, paddr, 5);
128 case 4: return __kmap_atomic_primary(4, paddr, 6);
129 case 5: return __kmap_atomic_primary(5, paddr, 7);
130 case 6: return __kmap_atomic_primary(6, paddr, 8);
131 case 7: return __kmap_atomic_primary(7, paddr, 9);
132 case 8: return __kmap_atomic_primary(8, paddr, 10);
133
134 case 9 ... 9 + NR_TLB_LINES - 1:
135 return __kmap_atomic_secondary(type - 9, paddr);
136
137 default:
138 BUG();
139 return NULL;
140 }
141}
142
143#define __kunmap_atomic_primary(type, ampr) \
144do { \
145 asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory"); \
146 if (type == __KM_CACHE) \
147 asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory"); \
148} while(0)
149
150#define __kunmap_atomic_secondary(slot, vaddr) \
151do { \
152 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \
153} while(0)
154
155static inline void kunmap_atomic(void *kvaddr, enum km_type type)
156{
157 switch (type) {
158 case 0: __kunmap_atomic_primary(0, 2); break;
159 case 1: __kunmap_atomic_primary(1, 3); break;
160 case 2: __kunmap_atomic_primary(2, 4); break;
161 case 3: __kunmap_atomic_primary(3, 5); break;
162 case 4: __kunmap_atomic_primary(4, 6); break;
163 case 5: __kunmap_atomic_primary(5, 7); break;
164 case 6: __kunmap_atomic_primary(6, 8); break;
165 case 7: __kunmap_atomic_primary(7, 9); break;
166 case 8: __kunmap_atomic_primary(8, 10); break;
167
168 case 9 ... 9 + NR_TLB_LINES - 1:
169 __kunmap_atomic_secondary(type - 9, kvaddr);
170 break;
171
172 default:
173 BUG();
174 }
175 pagefault_enable();
176}
177
178#endif /* !__ASSEMBLY__ */
179
180#endif /* __KERNEL__ */
181
182#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/frv/include/asm/hw_irq.h b/arch/frv/include/asm/hw_irq.h
new file mode 100644
index 000000000000..522ad37923d8
--- /dev/null
+++ b/arch/frv/include/asm/hw_irq.h
@@ -0,0 +1,16 @@
1/* hw_irq.h: FR-V specific h/w IRQ stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_HW_IRQ_H
13#define _ASM_HW_IRQ_H
14
15
16#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/frv/include/asm/init.h b/arch/frv/include/asm/init.h
new file mode 100644
index 000000000000..8b15838de216
--- /dev/null
+++ b/arch/frv/include/asm/init.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_INIT_H
2#define _ASM_INIT_H
3
4#define __init __attribute__ ((__section__ (".text.init")))
5#define __initdata __attribute__ ((__section__ (".data.init")))
6/* For assembly routines */
7#define __INIT .section ".text.init",#alloc,#execinstr
8#define __FINIT .previous
9#define __INITDATA .section ".data.init",#alloc,#write
10
11#endif
12
diff --git a/arch/frv/include/asm/io.h b/arch/frv/include/asm/io.h
new file mode 100644
index 000000000000..ca7475e73b5e
--- /dev/null
+++ b/arch/frv/include/asm/io.h
@@ -0,0 +1,392 @@
1/* io.h: FRV I/O operations
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * This gets interesting when talking to the PCI bus - the CPU is in big endian
12 * mode, the PCI bus is little endian and the hardware in the middle can do
13 * byte swapping
14 */
15#ifndef _ASM_IO_H
16#define _ASM_IO_H
17
18#ifdef __KERNEL__
19
20#include <linux/types.h>
21#include <asm/virtconvert.h>
22#include <asm/string.h>
23#include <asm/mb-regs.h>
24#include <linux/delay.h>
25
26/*
27 * swap functions are sometimes needed to interface little-endian hardware
28 */
29
30static inline unsigned short _swapw(unsigned short v)
31{
32 return ((v << 8) | (v >> 8));
33}
34
35static inline unsigned long _swapl(unsigned long v)
36{
37 return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
38}
39
40//#define __iormb() asm volatile("membar")
41//#define __iowmb() asm volatile("membar")
42
43#define __raw_readb __builtin_read8
44#define __raw_readw __builtin_read16
45#define __raw_readl __builtin_read32
46
47#define __raw_writeb(datum, addr) __builtin_write8(addr, datum)
48#define __raw_writew(datum, addr) __builtin_write16(addr, datum)
49#define __raw_writel(datum, addr) __builtin_write32(addr, datum)
50
51static inline void io_outsb(unsigned int addr, const void *buf, int len)
52{
53 unsigned long __ioaddr = (unsigned long) addr;
54 const uint8_t *bp = buf;
55
56 while (len--)
57 __builtin_write8((volatile void __iomem *) __ioaddr, *bp++);
58}
59
60static inline void io_outsw(unsigned int addr, const void *buf, int len)
61{
62 unsigned long __ioaddr = (unsigned long) addr;
63 const uint16_t *bp = buf;
64
65 while (len--)
66 __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++));
67}
68
69extern void __outsl_ns(unsigned int addr, const void *buf, int len);
70extern void __outsl_sw(unsigned int addr, const void *buf, int len);
71static inline void __outsl(unsigned int addr, const void *buf, int len, int swap)
72{
73 unsigned long __ioaddr = (unsigned long) addr;
74
75 if (!swap)
76 __outsl_ns(__ioaddr, buf, len);
77 else
78 __outsl_sw(__ioaddr, buf, len);
79}
80
81static inline void io_insb(unsigned long addr, void *buf, int len)
82{
83 uint8_t *bp = buf;
84
85 while (len--)
86 *bp++ = __builtin_read8((volatile void __iomem *) addr);
87}
88
89static inline void io_insw(unsigned long addr, void *buf, int len)
90{
91 uint16_t *bp = buf;
92
93 while (len--)
94 *bp++ = __builtin_read16((volatile void __iomem *) addr);
95}
96
97extern void __insl_ns(unsigned long addr, void *buf, int len);
98extern void __insl_sw(unsigned long addr, void *buf, int len);
99static inline void __insl(unsigned long addr, void *buf, int len, int swap)
100{
101 if (!swap)
102 __insl_ns(addr, buf, len);
103 else
104 __insl_sw(addr, buf, len);
105}
106
107#define mmiowb() mb()
108
109/*
110 * make the short names macros so specific devices
111 * can override them as required
112 */
113
114static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
115{
116 memset((void __force *) addr, val, count);
117}
118
119static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
120{
121 memcpy(dst, (void __force *) src, count);
122}
123
124static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
125{
126 memcpy((void __force *) dst, src, count);
127}
128
129static inline uint8_t inb(unsigned long addr)
130{
131 return __builtin_read8((void __iomem *)addr);
132}
133
134static inline uint16_t inw(unsigned long addr)
135{
136 uint16_t ret = __builtin_read16((void __iomem *)addr);
137
138 if (__is_PCI_IO(addr))
139 ret = _swapw(ret);
140
141 return ret;
142}
143
144static inline uint32_t inl(unsigned long addr)
145{
146 uint32_t ret = __builtin_read32((void __iomem *)addr);
147
148 if (__is_PCI_IO(addr))
149 ret = _swapl(ret);
150
151 return ret;
152}
153
154static inline void outb(uint8_t datum, unsigned long addr)
155{
156 __builtin_write8((void __iomem *)addr, datum);
157}
158
159static inline void outw(uint16_t datum, unsigned long addr)
160{
161 if (__is_PCI_IO(addr))
162 datum = _swapw(datum);
163 __builtin_write16((void __iomem *)addr, datum);
164}
165
166static inline void outl(uint32_t datum, unsigned long addr)
167{
168 if (__is_PCI_IO(addr))
169 datum = _swapl(datum);
170 __builtin_write32((void __iomem *)addr, datum);
171}
172
173#define inb_p(addr) inb(addr)
174#define inw_p(addr) inw(addr)
175#define inl_p(addr) inl(addr)
176#define outb_p(x,addr) outb(x,addr)
177#define outw_p(x,addr) outw(x,addr)
178#define outl_p(x,addr) outl(x,addr)
179
180#define outsb(a,b,l) io_outsb(a,b,l)
181#define outsw(a,b,l) io_outsw(a,b,l)
182#define outsl(a,b,l) __outsl(a,b,l,0)
183
184#define insb(a,b,l) io_insb(a,b,l)
185#define insw(a,b,l) io_insw(a,b,l)
186#define insl(a,b,l) __insl(a,b,l,0)
187
188#define IO_SPACE_LIMIT 0xffffffff
189
190static inline uint8_t readb(const volatile void __iomem *addr)
191{
192 return __builtin_read8((__force void volatile __iomem *) addr);
193}
194
195static inline uint16_t readw(const volatile void __iomem *addr)
196{
197 uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr);
198
199 if (__is_PCI_MEM(addr))
200 ret = _swapw(ret);
201 return ret;
202}
203
204static inline uint32_t readl(const volatile void __iomem *addr)
205{
206 uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr);
207
208 if (__is_PCI_MEM(addr))
209 ret = _swapl(ret);
210
211 return ret;
212}
213
214#define readb_relaxed readb
215#define readw_relaxed readw
216#define readl_relaxed readl
217
218static inline void writeb(uint8_t datum, volatile void __iomem *addr)
219{
220 __builtin_write8(addr, datum);
221 if (__is_PCI_MEM(addr))
222 __flush_PCI_writes();
223}
224
225static inline void writew(uint16_t datum, volatile void __iomem *addr)
226{
227 if (__is_PCI_MEM(addr))
228 datum = _swapw(datum);
229
230 __builtin_write16(addr, datum);
231 if (__is_PCI_MEM(addr))
232 __flush_PCI_writes();
233}
234
235static inline void writel(uint32_t datum, volatile void __iomem *addr)
236{
237 if (__is_PCI_MEM(addr))
238 datum = _swapl(datum);
239
240 __builtin_write32(addr, datum);
241 if (__is_PCI_MEM(addr))
242 __flush_PCI_writes();
243}
244
245
246/* Values for nocacheflag and cmode */
247#define IOMAP_FULL_CACHING 0
248#define IOMAP_NOCACHE_SER 1
249#define IOMAP_NOCACHE_NONSER 2
250#define IOMAP_WRITETHROUGH 3
251
252extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
253
254static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
255{
256 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
257}
258
259static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
260{
261 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
262}
263
264static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size)
265{
266 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
267}
268
269static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size)
270{
271 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
272}
273
274#define ioremap_wc ioremap_nocache
275
276extern void iounmap(void volatile __iomem *addr);
277
278static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
279{
280 return (void __iomem *) port;
281}
282
283static inline void ioport_unmap(void __iomem *p)
284{
285}
286
287static inline void flush_write_buffers(void)
288{
289 __asm__ __volatile__ ("membar" : : :"memory");
290}
291
292/*
293 * do appropriate I/O accesses for token type
294 */
295static inline unsigned int ioread8(void __iomem *p)
296{
297 return __builtin_read8(p);
298}
299
300static inline unsigned int ioread16(void __iomem *p)
301{
302 uint16_t ret = __builtin_read16(p);
303 if (__is_PCI_addr(p))
304 ret = _swapw(ret);
305 return ret;
306}
307
308static inline unsigned int ioread32(void __iomem *p)
309{
310 uint32_t ret = __builtin_read32(p);
311 if (__is_PCI_addr(p))
312 ret = _swapl(ret);
313 return ret;
314}
315
316static inline void iowrite8(u8 val, void __iomem *p)
317{
318 __builtin_write8(p, val);
319 if (__is_PCI_MEM(p))
320 __flush_PCI_writes();
321}
322
323static inline void iowrite16(u16 val, void __iomem *p)
324{
325 if (__is_PCI_addr(p))
326 val = _swapw(val);
327 __builtin_write16(p, val);
328 if (__is_PCI_MEM(p))
329 __flush_PCI_writes();
330}
331
332static inline void iowrite32(u32 val, void __iomem *p)
333{
334 if (__is_PCI_addr(p))
335 val = _swapl(val);
336 __builtin_write32(p, val);
337 if (__is_PCI_MEM(p))
338 __flush_PCI_writes();
339}
340
341static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count)
342{
343 io_insb((unsigned long) p, dst, count);
344}
345
346static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count)
347{
348 io_insw((unsigned long) p, dst, count);
349}
350
351static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count)
352{
353 __insl_ns((unsigned long) p, dst, count);
354}
355
356static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count)
357{
358 io_outsb((unsigned long) p, src, count);
359}
360
361static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count)
362{
363 io_outsw((unsigned long) p, src, count);
364}
365
366static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count)
367{
368 __outsl_ns((unsigned long) p, src, count);
369}
370
371/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
372struct pci_dev;
373extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
374static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
375{
376}
377
378
379/*
380 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
381 * access
382 */
383#define xlate_dev_mem_ptr(p) __va(p)
384
385/*
386 * Convert a virtual cached pointer to an uncached pointer
387 */
388#define xlate_dev_kmem_ptr(p) p
389
390#endif /* __KERNEL__ */
391
392#endif /* _ASM_IO_H */
diff --git a/arch/frv/include/asm/ioctl.h b/arch/frv/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/frv/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/frv/include/asm/ioctls.h b/arch/frv/include/asm/ioctls.h
new file mode 100644
index 000000000000..d0c30e31fbda
--- /dev/null
+++ b/arch/frv/include/asm/ioctls.h
@@ -0,0 +1,86 @@
1#ifndef __ASM_IOCTLS_H__
2#define __ASM_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define FIOQSIZE 0x545E
73
74/* Used for packet mode */
75#define TIOCPKT_DATA 0
76#define TIOCPKT_FLUSHREAD 1
77#define TIOCPKT_FLUSHWRITE 2
78#define TIOCPKT_STOP 4
79#define TIOCPKT_START 8
80#define TIOCPKT_NOSTOP 16
81#define TIOCPKT_DOSTOP 32
82
83#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
84
85#endif /* __ASM_IOCTLS_H__ */
86
diff --git a/arch/frv/include/asm/ipcbuf.h b/arch/frv/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..b546f67e455f
--- /dev/null
+++ b/arch/frv/include/asm/ipcbuf.h
@@ -0,0 +1,30 @@
1#ifndef __ASM_IPCBUF_H__
2#define __ASM_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASM_IPCBUF_H__ */
30
diff --git a/arch/frv/include/asm/irc-regs.h b/arch/frv/include/asm/irc-regs.h
new file mode 100644
index 000000000000..afa30aeacc82
--- /dev/null
+++ b/arch/frv/include/asm/irc-regs.h
@@ -0,0 +1,53 @@
1/* irc-regs.h: on-chip interrupt controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRC_REGS
13#define _ASM_IRC_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_TM0() ({ __reg(0xfeff9800); })
18#define __get_TM1() ({ __reg(0xfeff9808); })
19#define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0)
20
21#define __set_TM1x(XI,V) \
22do { \
23 int shift = (XI) * 2 + 16; \
24 unsigned long tm1 = __reg(0xfeff9808); \
25 tm1 &= ~(0x3 << shift); \
26 tm1 |= (V) << shift; \
27 __reg(0xfeff9808) = tm1; \
28 mb(); \
29} while(0)
30
31#define __get_RS(C) ({ (__reg(0xfeff9810) >> ((C)+16)) & 1; })
32
33#define __clr_RC(C) do { __reg(0xfeff9818) = 1 << ((C)+16); mb(); } while(0)
34
35#define __get_MASK(C) ({ (__reg(0xfeff9820) >> ((C)+16)) & 1; })
36#define __set_MASK(C) do { __reg(0xfeff9820) |= 1 << ((C)+16); mb(); } while(0)
37#define __clr_MASK(C) do { __reg(0xfeff9820) &= ~(1 << ((C)+16)); mb(); } while(0)
38
39#define __get_MASK_all() __get_MASK(0)
40#define __set_MASK_all() __set_MASK(0)
41#define __clr_MASK_all() __clr_MASK(0)
42
43#define __get_IRL() ({ (__reg(0xfeff9828) >> 16) & 0xf; })
44#define __clr_IRL() do { __reg(0xfeff9828) = 0x100000; mb(); } while(0)
45
46#define __get_IRR(N) ({ __reg(0xfeff9840 + (N) * 8); })
47#define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0)
48
49#define __get_IITMR(N) ({ __reg(0xfeff9880 + (N) * 8); })
50#define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0)
51
52
53#endif /* _ASM_IRC_REGS */
diff --git a/arch/frv/include/asm/irq.h b/arch/frv/include/asm/irq.h
new file mode 100644
index 000000000000..3a66ebd754bd
--- /dev/null
+++ b/arch/frv/include/asm/irq.h
@@ -0,0 +1,30 @@
1/* irq.h: FRV IRQ definitions
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_H_
13#define _ASM_IRQ_H_
14
15#define NR_IRQS 48
16#define IRQ_BASE_CPU (0 * 16)
17#define IRQ_BASE_FPGA (1 * 16)
18#define IRQ_BASE_MB93493 (2 * 16)
19
20/* probe returns a 32-bit IRQ mask:-/ */
21#define MIN_PROBE_IRQ (NR_IRQS - 32)
22
23#ifndef __ASSEMBLY__
24static inline int irq_canonicalize(int irq)
25{
26 return irq;
27}
28#endif
29
30#endif /* _ASM_IRQ_H_ */
diff --git a/arch/frv/include/asm/irq_regs.h b/arch/frv/include/asm/irq_regs.h
new file mode 100644
index 000000000000..d22e83289ad1
--- /dev/null
+++ b/arch/frv/include/asm/irq_regs.h
@@ -0,0 +1,27 @@
1/* FRV per-CPU frame pointer holder
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_REGS_H
13#define _ASM_IRQ_REGS_H
14
15/*
16 * Per-cpu current frame pointer - the location of the last exception frame on
17 * the stack
18 * - on FRV, GR28 is dedicated to keeping a pointer to the current exception
19 * frame
20 */
21#define ARCH_HAS_OWN_IRQ_REGS
22
23#ifndef __ASSEMBLY__
24#define get_irq_regs() (__frame)
25#endif
26
27#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/frv/include/asm/kdebug.h b/arch/frv/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/frv/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/frv/include/asm/kmap_types.h b/arch/frv/include/asm/kmap_types.h
new file mode 100644
index 000000000000..f8e16b2a5804
--- /dev/null
+++ b/arch/frv/include/asm/kmap_types.h
@@ -0,0 +1,29 @@
1
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 /* arch specific kmaps - change the numbers attached to these at your peril */
7 __KM_CACHE, /* cache flush page attachment point */
8 __KM_PGD, /* current page directory */
9 __KM_ITLB_PTD, /* current instruction TLB miss page table lookup */
10 __KM_DTLB_PTD, /* current data TLB miss page table lookup */
11
12 /* general kmaps */
13 KM_BOUNCE_READ,
14 KM_SKB_SUNRPC_DATA,
15 KM_SKB_DATA_SOFTIRQ,
16 KM_USER0,
17 KM_USER1,
18 KM_BIO_SRC_IRQ,
19 KM_BIO_DST_IRQ,
20 KM_PTE0,
21 KM_PTE1,
22 KM_IRQ0,
23 KM_IRQ1,
24 KM_SOFTIRQ0,
25 KM_SOFTIRQ1,
26 KM_TYPE_NR
27};
28
29#endif
diff --git a/arch/frv/include/asm/linkage.h b/arch/frv/include/asm/linkage.h
new file mode 100644
index 000000000000..636c1bced7d4
--- /dev/null
+++ b/arch/frv/include/asm/linkage.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .align 4
5#define __ALIGN_STR ".align 4"
6
7#endif
diff --git a/arch/frv/include/asm/local.h b/arch/frv/include/asm/local.h
new file mode 100644
index 000000000000..c27bdf04630e
--- /dev/null
+++ b/arch/frv/include/asm/local.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_LOCAL_H
2#define _ASM_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* _ASM_LOCAL_H */
diff --git a/arch/frv/include/asm/math-emu.h b/arch/frv/include/asm/math-emu.h
new file mode 100644
index 000000000000..0c8f731b2180
--- /dev/null
+++ b/arch/frv/include/asm/math-emu.h
@@ -0,0 +1,301 @@
1#ifndef _ASM_MATH_EMU_H
2#define _ASM_MATH_EMU_H
3
4#include <asm/setup.h>
5#include <linux/linkage.h>
6
7/* Status Register bits */
8
9/* accrued exception bits */
10#define FPSR_AEXC_INEX 3
11#define FPSR_AEXC_DZ 4
12#define FPSR_AEXC_UNFL 5
13#define FPSR_AEXC_OVFL 6
14#define FPSR_AEXC_IOP 7
15
16/* exception status bits */
17#define FPSR_EXC_INEX1 8
18#define FPSR_EXC_INEX2 9
19#define FPSR_EXC_DZ 10
20#define FPSR_EXC_UNFL 11
21#define FPSR_EXC_OVFL 12
22#define FPSR_EXC_OPERR 13
23#define FPSR_EXC_SNAN 14
24#define FPSR_EXC_BSUN 15
25
26/* quotient byte, assumes big-endian, of course */
27#define FPSR_QUOTIENT(fpsr) (*((signed char *) &(fpsr) + 1))
28
29/* condition code bits */
30#define FPSR_CC_NAN 24
31#define FPSR_CC_INF 25
32#define FPSR_CC_Z 26
33#define FPSR_CC_NEG 27
34
35
36/* Control register bits */
37
38/* rounding mode */
39#define FPCR_ROUND_RN 0 /* round to nearest/even */
40#define FPCR_ROUND_RZ 1 /* round to zero */
41#define FPCR_ROUND_RM 2 /* minus infinity */
42#define FPCR_ROUND_RP 3 /* plus infinity */
43
44/* rounding precision */
45#define FPCR_PRECISION_X 0 /* long double */
46#define FPCR_PRECISION_S 1 /* double */
47#define FPCR_PRECISION_D 2 /* float */
48
49
50/* Flags to select the debugging output */
51#define PDECODE 0
52#define PEXECUTE 1
53#define PCONV 2
54#define PNORM 3
55#define PREGISTER 4
56#define PINSTR 5
57#define PUNIMPL 6
58#define PMOVEM 7
59
60#define PMDECODE (1<<PDECODE)
61#define PMEXECUTE (1<<PEXECUTE)
62#define PMCONV (1<<PCONV)
63#define PMNORM (1<<PNORM)
64#define PMREGISTER (1<<PREGISTER)
65#define PMINSTR (1<<PINSTR)
66#define PMUNIMPL (1<<PUNIMPL)
67#define PMMOVEM (1<<PMOVEM)
68
69#ifndef __ASSEMBLY__
70
71#include <linux/kernel.h>
72#include <linux/sched.h>
73
74union fp_mant64 {
75 unsigned long long m64;
76 unsigned long m32[2];
77};
78
79union fp_mant128 {
80 unsigned long long m64[2];
81 unsigned long m32[4];
82};
83
84/* internal representation of extended fp numbers */
85struct fp_ext {
86 unsigned char lowmant;
87 unsigned char sign;
88 unsigned short exp;
89 union fp_mant64 mant;
90};
91
92/* C representation of FPU registers */
93/* NOTE: if you change this, you have to change the assembler offsets
94 below and the size in <asm/fpu.h>, too */
95struct fp_data {
96 struct fp_ext fpreg[8];
97 unsigned int fpcr;
98 unsigned int fpsr;
99 unsigned int fpiar;
100 unsigned short prec;
101 unsigned short rnd;
102 struct fp_ext temp[2];
103};
104
105#if FPU_EMU_DEBUG
106extern unsigned int fp_debugprint;
107
108#define dprint(bit, fmt, args...) ({ \
109 if (fp_debugprint & (1 << (bit))) \
110 printk(fmt, ## args); \
111})
112#else
113#define dprint(bit, fmt, args...)
114#endif
115
116#define uprint(str) ({ \
117 static int __count = 3; \
118 \
119 if (__count > 0) { \
120 printk("You just hit an unimplemented " \
121 "fpu instruction (%s)\n", str); \
122 printk("Please report this to ....\n"); \
123 __count--; \
124 } \
125})
126
127#define FPDATA ((struct fp_data *)current->thread.fp)
128
129#else /* __ASSEMBLY__ */
130
131#define FPDATA %a2
132
133/* offsets from the base register to the floating point data in the task struct */
134#define FPD_FPREG (TASK_THREAD+THREAD_FPREG+0)
135#define FPD_FPCR (TASK_THREAD+THREAD_FPREG+96)
136#define FPD_FPSR (TASK_THREAD+THREAD_FPREG+100)
137#define FPD_FPIAR (TASK_THREAD+THREAD_FPREG+104)
138#define FPD_PREC (TASK_THREAD+THREAD_FPREG+108)
139#define FPD_RND (TASK_THREAD+THREAD_FPREG+110)
140#define FPD_TEMPFP1 (TASK_THREAD+THREAD_FPREG+112)
141#define FPD_TEMPFP2 (TASK_THREAD+THREAD_FPREG+124)
142#define FPD_SIZEOF (TASK_THREAD+THREAD_FPREG+136)
143
144/* offsets on the stack to access saved registers,
145 * these are only used during instruction decoding
146 * where we always know how deep we're on the stack.
147 */
148#define FPS_DO (PT_D0)
149#define FPS_D1 (PT_D1)
150#define FPS_D2 (PT_D2)
151#define FPS_A0 (PT_A0)
152#define FPS_A1 (PT_A1)
153#define FPS_A2 (PT_A2)
154#define FPS_SR (PT_SR)
155#define FPS_PC (PT_PC)
156#define FPS_EA (PT_PC+6)
157#define FPS_PC2 (PT_PC+10)
158
159.macro fp_get_fp_reg
160 lea (FPD_FPREG,FPDATA,%d0.w*4),%a0
161 lea (%a0,%d0.w*8),%a0
162.endm
163
164/* Macros used to get/put the current program counter.
165 * 020/030 use a different stack frame then 040/060, for the
166 * 040/060 the return pc points already to the next location,
167 * so this only needs to be modified for jump instructions.
168 */
169.macro fp_get_pc dest
170 move.l (FPS_PC+4,%sp),\dest
171.endm
172
173.macro fp_put_pc src,jump=0
174 move.l \src,(FPS_PC+4,%sp)
175.endm
176
177.macro fp_get_instr_data f,s,dest,label
178 getuser \f,%sp@(FPS_PC+4)@(0),\dest,\label,%sp@(FPS_PC+4)
179 addq.l #\s,%sp@(FPS_PC+4)
180.endm
181
182.macro fp_get_instr_word dest,label,addr
183 fp_get_instr_data w,2,\dest,\label,\addr
184.endm
185
186.macro fp_get_instr_long dest,label,addr
187 fp_get_instr_data l,4,\dest,\label,\addr
188.endm
189
190/* These macros are used to read from/write to user space
191 * on error we jump to the fixup section, load the fault
192 * address into %a0 and jump to the exit.
193 * (derived from <asm/uaccess.h>)
194 */
195.macro getuser size,src,dest,label,addr
196| printf ,"[\size<%08x]",1,\addr
197.Lu1\@: moves\size \src,\dest
198
199 .section .fixup,"ax"
200 .even
201.Lu2\@: move.l \addr,%a0
202 jra \label
203 .previous
204
205 .section __ex_table,"a"
206 .align 4
207 .long .Lu1\@,.Lu2\@
208 .previous
209.endm
210
211.macro putuser size,src,dest,label,addr
212| printf ,"[\size>%08x]",1,\addr
213.Lu1\@: moves\size \src,\dest
214.Lu2\@:
215
216 .section .fixup,"ax"
217 .even
218.Lu3\@: move.l \addr,%a0
219 jra \label
220 .previous
221
222 .section __ex_table,"a"
223 .align 4
224 .long .Lu1\@,.Lu3\@
225 .long .Lu2\@,.Lu3\@
226 .previous
227.endm
228
229
230.macro movestack nr,arg1,arg2,arg3,arg4,arg5
231 .if \nr
232 movestack (\nr-1),\arg2,\arg3,\arg4,\arg5
233 move.l \arg1,-(%sp)
234 .endif
235.endm
236
237.macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
238#ifdef FPU_EMU_DEBUG
239 .data
240.Lpdata\@:
241 .string "\string"
242 .previous
243
244 movem.l %d0/%d1/%a0/%a1,-(%sp)
245 .if \bit+1
246#if 0
247 moveq #\bit,%d0
248 andw #7,%d0
249 btst %d0,fp_debugprint+((31-\bit)/8)
250#else
251 btst #\bit,fp_debugprint+((31-\bit)/8)
252#endif
253 jeq .Lpskip\@
254 .endif
255 movestack \nr,\arg1,\arg2,\arg3,\arg4,\arg5
256 pea .Lpdata\@
257 jsr printk
258 lea ((\nr+1)*4,%sp),%sp
259.Lpskip\@:
260 movem.l (%sp)+,%d0/%d1/%a0/%a1
261#endif
262.endm
263
264.macro printx bit,fp
265#ifdef FPU_EMU_DEBUG
266 movem.l %d0/%a0,-(%sp)
267 lea \fp,%a0
268#if 0
269 moveq #'+',%d0
270 tst.w (%a0)
271 jeq .Lx1\@
272 moveq #'-',%d0
273.Lx1\@: printf \bit," %c",1,%d0
274 move.l (4,%a0),%d0
275 bclr #31,%d0
276 jne .Lx2\@
277 printf \bit,"0."
278 jra .Lx3\@
279.Lx2\@: printf \bit,"1."
280.Lx3\@: printf \bit,"%08x%08x",2,%d0,%a0@(8)
281 move.w (2,%a0),%d0
282 ext.l %d0
283 printf \bit,"E%04x",1,%d0
284#else
285 printf \bit," %08x%08x%08x",3,%a0@,%a0@(4),%a0@(8)
286#endif
287 movem.l (%sp)+,%d0/%a0
288#endif
289.endm
290
291.macro debug instr,args
292#ifdef FPU_EMU_DEBUG
293 \instr \args
294#endif
295.endm
296
297
298#endif /* __ASSEMBLY__ */
299
300#endif /* _ASM_FRV_MATH_EMU_H */
301
diff --git a/arch/frv/include/asm/mb-regs.h b/arch/frv/include/asm/mb-regs.h
new file mode 100644
index 000000000000..219e5f926f18
--- /dev/null
+++ b/arch/frv/include/asm/mb-regs.h
@@ -0,0 +1,200 @@
1/* mb-regs.h: motherboard registers
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB_REGS_H
13#define _ASM_MB_REGS_H
14
15#include <asm/cpu-irqs.h>
16#include <asm/sections.h>
17#include <asm/mem-layout.h>
18
19#ifndef __ASSEMBLY__
20/* gcc builtins, annotated */
21
22unsigned long __builtin_read8(volatile void __iomem *);
23unsigned long __builtin_read16(volatile void __iomem *);
24unsigned long __builtin_read32(volatile void __iomem *);
25void __builtin_write8(volatile void __iomem *, unsigned char);
26void __builtin_write16(volatile void __iomem *, unsigned short);
27void __builtin_write32(volatile void __iomem *, unsigned long);
28#endif
29
30#define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable
31 * protection laid over the top for use in memory-mapped
32 * I/O
33 */
34
35#define __region_CS0 0xff000000 /* Boot ROMs area */
36
37#ifdef CONFIG_MB93091_VDK
38/*
39 * VDK motherboard and CPU card specific stuff
40 */
41
42#include <asm/mb93091-fpga-irqs.h>
43
44#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
45#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
46
47#define __region_CS2 0xe0000000 /* SLBUS/PCI I/O space */
48#define __region_CS2_M 0x0fffffff /* mask */
49#define __region_CS2_C 0x00000000 /* control */
50#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
51#define __region_CS5_M 0x00ffffff
52#define __region_CS5_C 0x00010000
53#define __region_CS7 0xf1000000 /* CB70 CPU-card PCMCIA port I/O space */
54#define __region_CS7_M 0x00ffffff
55#define __region_CS7_C 0x00410701
56#define __region_CS1 0xfc000000 /* SLBUS/PCI bridge control registers */
57#define __region_CS1_M 0x000fffff
58#define __region_CS1_C 0x00000000
59#define __region_CS6 0xfc100000 /* CB70 CPU-card DM9000 LAN I/O space */
60#define __region_CS6_M 0x000fffff
61#define __region_CS6_C 0x00400707
62#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
63#define __region_CS3_M 0x000fffff
64#define __region_CS3_C 0xc8100000
65#define __region_CS4 0xfd000000 /* CB70 CPU-card extra flash space */
66#define __region_CS4_M 0x00ffffff
67#define __region_CS4_C 0x00000f07
68
69#define __region_PCI_IO (__region_CS2 + 0x04000000UL)
70#define __region_PCI_MEM (__region_CS2 + 0x08000000UL)
71#define __flush_PCI_writes() \
72do { \
73 __builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \
74} while(0)
75
76#define __is_PCI_IO(addr) \
77 (((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24) < (0x04000000UL >> 24))
78
79#define __is_PCI_MEM(addr) \
80 ((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL)
81
82#define __is_PCI_addr(addr) \
83 ((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL)
84
85#define __get_CLKSW() ({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
86#define __get_CLKIN() (__get_CLKSW() * 125U * 100000U / 24U)
87
88#ifndef __ASSEMBLY__
89extern int __nongprelbss mb93090_mb00_detected;
90#endif
91
92#define __addr_LEDS() (__region_CS2 + 0x01200004UL)
93#ifdef CONFIG_MB93090_MB00
94#define __set_LEDS(X) \
95do { \
96 if (mb93090_mb00_detected) \
97 __builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \
98} while (0)
99#else
100#define __set_LEDS(X)
101#endif
102
103#define __addr_LCD() (__region_CS2 + 0x01200008UL)
104#define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B))
105#define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X))
106
107#define LCD_D 0x000000ff /* LCD data bus */
108#define LCD_RW 0x00000100 /* LCD R/W signal */
109#define LCD_RS 0x00000200 /* LCD Register Select */
110#define LCD_E 0x00000400 /* LCD Start Enable Signal */
111
112#define LCD_CMD_CLEAR (LCD_E|0x001)
113#define LCD_CMD_HOME (LCD_E|0x002)
114#define LCD_CMD_CURSOR_INC (LCD_E|0x004)
115#define LCD_CMD_SCROLL_INC (LCD_E|0x005)
116#define LCD_CMD_CURSOR_DEC (LCD_E|0x006)
117#define LCD_CMD_SCROLL_DEC (LCD_E|0x007)
118#define LCD_CMD_OFF (LCD_E|0x008)
119#define LCD_CMD_ON(CRSR,BLINK) (LCD_E|0x00c|(CRSR<<1)|BLINK)
120#define LCD_CMD_CURSOR_MOVE_L (LCD_E|0x010)
121#define LCD_CMD_CURSOR_MOVE_R (LCD_E|0x014)
122#define LCD_CMD_DISPLAY_SHIFT_L (LCD_E|0x018)
123#define LCD_CMD_DISPLAY_SHIFT_R (LCD_E|0x01c)
124#define LCD_CMD_FUNCSET(DL,N,F) (LCD_E|0x020|(DL<<4)|(N<<3)|(F<<2))
125#define LCD_CMD_SET_CG_ADDR(X) (LCD_E|0x040|X)
126#define LCD_CMD_SET_DD_ADDR(X) (LCD_E|0x080|X)
127#define LCD_CMD_READ_BUSY (LCD_E|LCD_RW)
128#define LCD_DATA_WRITE(X) (LCD_E|LCD_RS|(X))
129#define LCD_DATA_READ (LCD_E|LCD_RS|LCD_RW)
130
131#else
132/*
133 * PDK unit specific stuff
134 */
135
136#include <asm/mb93093-fpga-irqs.h>
137
138#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
139#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
140
141#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
142#define __region_CS5_M 0x00ffffff /* mask */
143#define __region_CS5_C 0x00010000 /* control */
144#define __region_CS2 0x20000000 /* FPGA registers */
145#define __region_CS2_M 0x000fffff
146#define __region_CS2_C 0x00000000
147#define __region_CS1 0xfc100000 /* LAN registers */
148#define __region_CS1_M 0x000fffff
149#define __region_CS1_C 0x00010404
150#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
151#define __region_CS3_M 0x000fffff
152#define __region_CS3_C 0xc8000000
153#define __region_CS4 0xfd000000 /* extra ROMs area */
154#define __region_CS4_M 0x00ffffff
155#define __region_CS4_C 0x00000f07
156
157#define __region_CS6 0xfe000000 /* not used - hide behind CPU resource I/O regs */
158#define __region_CS6_M 0x000fffff
159#define __region_CS6_C 0x00000f07
160#define __region_CS7 0xfe000000 /* not used - hide behind CPU resource I/O regs */
161#define __region_CS7_M 0x000fffff
162#define __region_CS7_C 0x00000f07
163
164#define __is_PCI_IO(addr) 0 /* no PCI */
165#define __is_PCI_MEM(addr) 0
166#define __is_PCI_addr(addr) 0
167#define __region_PCI_IO 0
168#define __region_PCI_MEM 0
169#define __flush_PCI_writes() do { } while(0)
170
171#define __get_CLKSW() 0UL
172#define __get_CLKIN() 66000000UL
173
174#define __addr_LEDS() (__region_CS2 + 0x00000023UL)
175#define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))
176
177#define __addr_FPGATR() (__region_CS2 + 0x00000030UL)
178#define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
179#define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR())
180
181#define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003
182
183#define __set_FPGATR_AUDIO_CLK(V) \
184 __set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V))
185
186#define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF 0x0
187#define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz 0x1
188#define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz 0x2
189#define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz 0x3
190
191#define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26)
192#define MB93093_FPGA_SWR_PUSHSW4 (1<<29)
193
194#define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL))
195#define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)
196
197
198#endif
199
200#endif /* _ASM_MB_REGS_H */
diff --git a/arch/frv/include/asm/mb86943a.h b/arch/frv/include/asm/mb86943a.h
new file mode 100644
index 000000000000..e87ef924bfb4
--- /dev/null
+++ b/arch/frv/include/asm/mb86943a.h
@@ -0,0 +1,42 @@
1/* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB86943A_H
13#define _ASM_MB86943A_H
14
15#include <asm/mb-regs.h>
16
17#define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
18
19#define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001
20#define MB86943_SL_CTL_AS_HOST 0x00000002
21#define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004
22#define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008
23#define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010
24#define MB86943_SL_CTL_ECS0_ENABLE 0x00000020
25#define MB86943_SL_CTL_ECS1_ENABLE 0x00000040
26#define MB86943_SL_CTL_ECS2_ENABLE 0x00000080
27
28#define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
29#define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
30#define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
31
32#define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
33#define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
34#define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
35#define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
36#define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
37#define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
38
39#define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014)
40#define MB86943_PCIARB_EN 0x00000001
41
42#endif /* _ASM_MB86943A_H */
diff --git a/arch/frv/include/asm/mb93091-fpga-irqs.h b/arch/frv/include/asm/mb93091-fpga-irqs.h
new file mode 100644
index 000000000000..19778c5ba9d6
--- /dev/null
+++ b/arch/frv/include/asm/mb93091-fpga-irqs.h
@@ -0,0 +1,42 @@
1/* mb93091-fpga-irqs.h: MB93091 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93091_FPGA_IRQS_H
13#define _ASM_MB93091_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA__UNUSED = IRQ_BASE_FPGA,
22 IRQ_FPGA_SYSINT_BUS_EXPANSION_1,
23 IRQ_FPGA_SL_BUS_EXPANSION_2,
24 IRQ_FPGA_PCI_INTD,
25 IRQ_FPGA_PCI_INTC,
26 IRQ_FPGA_PCI_INTB,
27 IRQ_FPGA_PCI_INTA,
28 IRQ_FPGA_SL_BUS_EXPANSION_7,
29 IRQ_FPGA_SYSINT_BUS_EXPANSION_8,
30 IRQ_FPGA_SL_BUS_EXPANSION_9,
31 IRQ_FPGA_MB86943_PCI_INTA,
32 IRQ_FPGA_MB86943_SLBUS_SIDE,
33 IRQ_FPGA_RTL8029_INTA,
34 IRQ_FPGA_SYSINT_BUS_EXPANSION_13,
35 IRQ_FPGA_SL_BUS_EXPANSION_14,
36 IRQ_FPGA_NMI,
37};
38
39
40#endif /* !__ASSEMBLY__ */
41
42#endif /* _ASM_MB93091_FPGA_IRQS_H */
diff --git a/arch/frv/include/asm/mb93093-fpga-irqs.h b/arch/frv/include/asm/mb93093-fpga-irqs.h
new file mode 100644
index 000000000000..590266b1a6d3
--- /dev/null
+++ b/arch/frv/include/asm/mb93093-fpga-irqs.h
@@ -0,0 +1,29 @@
1/* mb93093-fpga-irqs.h: MB93093 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93093_FPGA_IRQS_H
13#define _ASM_MB93093_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA_PUSH_BUTTON_SW1_5 = IRQ_BASE_FPGA + 8,
22 IRQ_FPGA_ROCKER_C_SW8 = IRQ_BASE_FPGA + 9,
23 IRQ_FPGA_ROCKER_C_SW9 = IRQ_BASE_FPGA + 10,
24};
25
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* _ASM_MB93093_FPGA_IRQS_H */
diff --git a/arch/frv/include/asm/mb93493-irqs.h b/arch/frv/include/asm/mb93493-irqs.h
new file mode 100644
index 000000000000..82c7aeddd333
--- /dev/null
+++ b/arch/frv/include/asm/mb93493-irqs.h
@@ -0,0 +1,50 @@
1/* mb93493-irqs.h: MB93493 companion chip IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_IRQS_H
13#define _ASM_MB93493_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_MB93493_VDC = IRQ_BASE_MB93493 + 0,
22 IRQ_MB93493_VCC = IRQ_BASE_MB93493 + 1,
23 IRQ_MB93493_AUDIO_OUT = IRQ_BASE_MB93493 + 2,
24 IRQ_MB93493_I2C_0 = IRQ_BASE_MB93493 + 3,
25 IRQ_MB93493_I2C_1 = IRQ_BASE_MB93493 + 4,
26 IRQ_MB93493_USB = IRQ_BASE_MB93493 + 5,
27 IRQ_MB93493_LOCAL_BUS = IRQ_BASE_MB93493 + 7,
28 IRQ_MB93493_PCMCIA = IRQ_BASE_MB93493 + 8,
29 IRQ_MB93493_GPIO = IRQ_BASE_MB93493 + 9,
30 IRQ_MB93493_AUDIO_IN = IRQ_BASE_MB93493 + 10,
31};
32
33/* IRQ multiplexor mappings */
34#define ROUTE_VIA_IRQ0 0 /* route IRQ by way of CPU external IRQ 0 */
35#define ROUTE_VIA_IRQ1 1 /* route IRQ by way of CPU external IRQ 1 */
36
37#define IRQ_MB93493_VDC_ROUTE ROUTE_VIA_IRQ0
38#define IRQ_MB93493_VCC_ROUTE ROUTE_VIA_IRQ1
39#define IRQ_MB93493_AUDIO_OUT_ROUTE ROUTE_VIA_IRQ1
40#define IRQ_MB93493_I2C_0_ROUTE ROUTE_VIA_IRQ1
41#define IRQ_MB93493_I2C_1_ROUTE ROUTE_VIA_IRQ1
42#define IRQ_MB93493_USB_ROUTE ROUTE_VIA_IRQ1
43#define IRQ_MB93493_LOCAL_BUS_ROUTE ROUTE_VIA_IRQ1
44#define IRQ_MB93493_PCMCIA_ROUTE ROUTE_VIA_IRQ1
45#define IRQ_MB93493_GPIO_ROUTE ROUTE_VIA_IRQ1
46#define IRQ_MB93493_AUDIO_IN_ROUTE ROUTE_VIA_IRQ1
47
48#endif /* !__ASSEMBLY__ */
49
50#endif /* _ASM_MB93493_IRQS_H */
diff --git a/arch/frv/include/asm/mb93493-regs.h b/arch/frv/include/asm/mb93493-regs.h
new file mode 100644
index 000000000000..8a1f6aac8cf1
--- /dev/null
+++ b/arch/frv/include/asm/mb93493-regs.h
@@ -0,0 +1,281 @@
1/* mb93493-regs.h: MB93493 companion chip registers
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_REGS_H
13#define _ASM_MB93493_REGS_H
14
15#include <asm/mb-regs.h>
16#include <asm/mb93493-irqs.h>
17
18#define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X)))
19#define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); })
20
21#define __set_MB93493(X,V) \
22do { \
23 *(volatile unsigned long *)(__region_CS3 + (X)) = (V); mb(); \
24} while(0)
25
26#define __get_MB93493_STSR(X) __get_MB93493(0x3c0 + (X) * 4)
27#define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V))
28#define MB93493_STSR_EN
29
30#define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4)
31#define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4)
32#define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V))
33
34#define __get_MB93493_DQSR(X) __get_MB93493(0x3e0 + (X) * 4)
35#define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V))
36
37#define __get_MB93493_LBSER() __get_MB93493(0x3f0)
38#define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V))
39
40#define MB93493_LBSER_VDC 0x00010000
41#define MB93493_LBSER_VCC 0x00020000
42#define MB93493_LBSER_AUDIO 0x00040000
43#define MB93493_LBSER_I2C_0 0x00080000
44#define MB93493_LBSER_I2C_1 0x00100000
45#define MB93493_LBSER_USB 0x00200000
46#define MB93493_LBSER_GPIO 0x00800000
47#define MB93493_LBSER_PCMCIA 0x01000000
48
49#define __get_MB93493_LBSR() __get_MB93493(0x3fc)
50#define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V))
51
52/*
53 * video display controller
54 */
55#define __get_MB93493_VDC(X) __get_MB93493(MB93493_VDC_##X)
56#define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V))
57
58#define MB93493_VDC_RCURSOR 0x140 /* cursor position */
59#define MB93493_VDC_RCT1 0x144 /* cursor colour 1 */
60#define MB93493_VDC_RCT2 0x148 /* cursor colour 2 */
61#define MB93493_VDC_RHDC 0x150 /* horizontal display period */
62#define MB93493_VDC_RH_MARGINS 0x154 /* horizontal margin sizes */
63#define MB93493_VDC_RVDC 0x158 /* vertical display period */
64#define MB93493_VDC_RV_MARGINS 0x15c /* vertical margin sizes */
65#define MB93493_VDC_RC 0x170 /* VDC control */
66#define MB93493_VDC_RCLOCK 0x174 /* clock divider, DMA req delay */
67#define MB93493_VDC_RBLACK 0x178 /* black insert sizes */
68#define MB93493_VDC_RS 0x17c /* VDC status */
69
70#define __addr_MB93493_VDC_BCI(X) ({ (volatile unsigned long *)(__region_CS3 + 0x000 + (X)); })
71#define __addr_MB93493_VDC_TPO(X) (__region_CS3 + 0x1c0 + (X))
72
73#define VDC_TPO_WIDTH 32
74
75#define VDC_RC_DSR 0x00000080 /* VDC master reset */
76
77#define VDC_RS_IT 0x00060000 /* interrupt indicators */
78#define VDC_RS_IT_UNDERFLOW 0x00040000 /* - underflow event */
79#define VDC_RS_IT_VSYNC 0x00020000 /* - VSYNC event */
80#define VDC_RS_DFI 0x00010000 /* current interlace field number */
81#define VDC_RS_DFI_TOP 0x00000000 /* - top field */
82#define VDC_RS_DFI_BOTTOM 0x00010000 /* - bottom field */
83#define VDC_RS_DCSR 0x00000010 /* cursor state */
84#define VDC_RS_DCM 0x00000003 /* display mode */
85#define VDC_RS_DCM_DISABLED 0x00000000 /* - display disabled */
86#define VDC_RS_DCM_STOPPED 0x00000001 /* - VDC stopped */
87#define VDC_RS_DCM_FREERUNNING 0x00000002 /* - VDC free-running */
88#define VDC_RS_DCM_TRANSFERRING 0x00000003 /* - data being transferred to VDC */
89
90/*
91 * video capture controller
92 */
93#define __get_MB93493_VCC(X) __get_MB93493(MB93493_VCC_##X)
94#define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V))
95
96#define MB93493_VCC_RREDUCT 0x104 /* reduction rate */
97#define MB93493_VCC_RHY 0x108 /* horizontal brightness filter coefficients */
98#define MB93493_VCC_RHC 0x10c /* horizontal colour-difference filter coefficients */
99#define MB93493_VCC_RHSIZE 0x110 /* horizontal cycle sizes */
100#define MB93493_VCC_RHBC 0x114 /* horizontal back porch size */
101#define MB93493_VCC_RVCC 0x118 /* vertical capture period */
102#define MB93493_VCC_RVBC 0x11c /* vertical back porch period */
103#define MB93493_VCC_RV 0x120 /* vertical filter coefficients */
104#define MB93493_VCC_RDTS 0x128 /* DMA transfer size */
105#define MB93493_VCC_RDTS_4B 0x01000000 /* 4-byte transfer */
106#define MB93493_VCC_RDTS_32B 0x03000000 /* 32-byte transfer */
107#define MB93493_VCC_RDTS_SHIFT 24
108#define MB93493_VCC_RCC 0x130 /* VCC control */
109#define MB93493_VCC_RIS 0x134 /* VCC interrupt status */
110
111#define __addr_MB93493_VCC_TPI(X) (__region_CS3 + 0x180 + (X))
112
113#define VCC_RHSIZE_RHCC 0x000007ff
114#define VCC_RHSIZE_RHCC_SHIFT 0
115#define VCC_RHSIZE_RHTCC 0x0fff0000
116#define VCC_RHSIZE_RHTCC_SHIFT 16
117
118#define VCC_RVBC_RVBC 0x00003f00
119#define VCC_RVBC_RVBC_SHIFT 8
120
121#define VCC_RREDUCT_RHR 0x07ff0000
122#define VCC_RREDUCT_RHR_SHIFT 16
123#define VCC_RREDUCT_RVR 0x000007ff
124#define VCC_RREDUCT_RVR_SHIFT 0
125
126#define VCC_RCC_CE 0x00000001 /* VCC enable */
127#define VCC_RCC_CS 0x00000002 /* request video capture start */
128#define VCC_RCC_CPF 0x0000000c /* pixel format */
129#define VCC_RCC_CPF_YCBCR_16 0x00000000 /* - YCbCr 4:2:2 16-bit format */
130#define VCC_RCC_CPF_RGB 0x00000004 /* - RGB 4:4:4 format */
131#define VCC_RCC_CPF_YCBCR_24 0x00000008 /* - YCbCr 4:2:2 24-bit format */
132#define VCC_RCC_CPF_BT656 0x0000000c /* - ITU R-BT.656 format */
133#define VCC_RCC_CPF_SHIFT 2
134#define VCC_RCC_CSR 0x00000080 /* request reset */
135#define VCC_RCC_HSIP 0x00000100 /* HSYNC polarity */
136#define VCC_RCC_HSIP_LOACT 0x00000000 /* - low active */
137#define VCC_RCC_HSIP_HIACT 0x00000100 /* - high active */
138#define VCC_RCC_VSIP 0x00000200 /* VSYNC polarity */
139#define VCC_RCC_VSIP_LOACT 0x00000000 /* - low active */
140#define VCC_RCC_VSIP_HIACT 0x00000200 /* - high active */
141#define VCC_RCC_CIE 0x00000800 /* interrupt enable */
142#define VCC_RCC_CFP 0x00001000 /* RGB pixel packing */
143#define VCC_RCC_CFP_4TO3 0x00000000 /* - pack 4 pixels into 3 words */
144#define VCC_RCC_CFP_1TO1 0x00001000 /* - pack 1 pixel into 1 words */
145#define VCC_RCC_CSM 0x00006000 /* interlace specification */
146#define VCC_RCC_CSM_ONEPASS 0x00002000 /* - non-interlaced */
147#define VCC_RCC_CSM_INTERLACE 0x00004000 /* - interlaced */
148#define VCC_RCC_CSM_SHIFT 13
149#define VCC_RCC_ES 0x00008000 /* capture start polarity */
150#define VCC_RCC_ES_NEG 0x00000000 /* - negative edge */
151#define VCC_RCC_ES_POS 0x00008000 /* - positive edge */
152#define VCC_RCC_IFI 0x00080000 /* inferlace field evaluation reverse */
153#define VCC_RCC_FDTS 0x00300000 /* interlace field start */
154#define VCC_RCC_FDTS_3_8 0x00000000 /* - 3/8 of horizontal entire cycle */
155#define VCC_RCC_FDTS_1_4 0x00100000 /* - 1/4 of horizontal entire cycle */
156#define VCC_RCC_FDTS_7_16 0x00200000 /* - 7/16 of horizontal entire cycle */
157#define VCC_RCC_FDTS_SHIFT 20
158#define VCC_RCC_MOV 0x00400000 /* test bit - always set to 1 */
159#define VCC_RCC_STP 0x00800000 /* request video capture stop */
160#define VCC_RCC_TO 0x01000000 /* input during top-field only */
161
162#define VCC_RIS_VSYNC 0x01000000 /* VSYNC interrupt */
163#define VCC_RIS_OV 0x02000000 /* overflow interrupt */
164#define VCC_RIS_BOTTOM 0x08000000 /* interlace bottom field */
165#define VCC_RIS_STARTED 0x10000000 /* capture started */
166
167/*
168 * I2C
169 */
170#define MB93493_I2C_BSR 0x340 /* bus status */
171#define MB93493_I2C_BCR 0x344 /* bus control */
172#define MB93493_I2C_CCR 0x348 /* clock control */
173#define MB93493_I2C_ADR 0x34c /* address */
174#define MB93493_I2C_DTR 0x350 /* data */
175#define MB93493_I2C_BC2R 0x35c /* bus control 2 */
176
177#define __addr_MB93493_I2C(port,X) (__region_CS3 + MB93493_I2C_##X + ((port)*0x20))
178#define __get_MB93493_I2C(port,X) __get_MB93493(MB93493_I2C_##X + ((port)*0x20))
179#define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V))
180
181#define I2C_BSR_BB (1 << 7)
182
183/*
184 * audio controller (I2S) registers
185 */
186#define __get_MB93493_I2S(X) __get_MB93493(MB93493_I2S_##X)
187#define __set_MB93493_I2S(X,V) __set_MB93493(MB93493_I2S_##X, (V))
188
189#define MB93493_I2S_ALDR 0x300 /* L-channel data */
190#define MB93493_I2S_ARDR 0x304 /* R-channel data */
191#define MB93493_I2S_APDR 0x308 /* 16-bit packed data */
192#define MB93493_I2S_AISTR 0x310 /* status */
193#define MB93493_I2S_AICR 0x314 /* control */
194
195#define __addr_MB93493_I2S_ALDR(X) (__region_CS3 + MB93493_I2S_ALDR + (X))
196#define __addr_MB93493_I2S_ARDR(X) (__region_CS3 + MB93493_I2S_ARDR + (X))
197#define __addr_MB93493_I2S_APDR(X) (__region_CS3 + MB93493_I2S_APDR + (X))
198#define __addr_MB93493_I2S_ADR(X) (__region_CS3 + 0x320 + (X))
199
200#define I2S_AISTR_OTST 0x00000003 /* status of output data transfer */
201#define I2S_AISTR_OTR 0x00000010 /* output transfer request pending */
202#define I2S_AISTR_OUR 0x00000020 /* output FIFO underrun detected */
203#define I2S_AISTR_OOR 0x00000040 /* output FIFO overrun detected */
204#define I2S_AISTR_ODS 0x00000100 /* output DMA transfer size */
205#define I2S_AISTR_ODE 0x00000400 /* output DMA transfer request enable */
206#define I2S_AISTR_OTRIE 0x00001000 /* output transfer request interrupt enable */
207#define I2S_AISTR_OURIE 0x00002000 /* output FIFO underrun interrupt enable */
208#define I2S_AISTR_OORIE 0x00004000 /* output FIFO overrun interrupt enable */
209#define I2S_AISTR__OUT_MASK 0x00007570
210#define I2S_AISTR_ITST 0x00030000 /* status of input data transfer */
211#define I2S_AISTR_ITST_SHIFT 16
212#define I2S_AISTR_ITR 0x00100000 /* input transfer request pending */
213#define I2S_AISTR_IUR 0x00200000 /* input FIFO underrun detected */
214#define I2S_AISTR_IOR 0x00400000 /* input FIFO overrun detected */
215#define I2S_AISTR_IDS 0x01000000 /* input DMA transfer size */
216#define I2S_AISTR_IDE 0x04000000 /* input DMA transfer request enable */
217#define I2S_AISTR_ITRIE 0x10000000 /* input transfer request interrupt enable */
218#define I2S_AISTR_IURIE 0x20000000 /* input FIFO underrun interrupt enable */
219#define I2S_AISTR_IORIE 0x40000000 /* input FIFO overrun interrupt enable */
220#define I2S_AISTR__IN_MASK 0x75700000
221
222#define I2S_AICR_MI 0x00000001 /* mono input requested */
223#define I2S_AICR_AMI 0x00000002 /* relation between LRCKI/FS1 and SDI */
224#define I2S_AICR_LRI 0x00000004 /* function of LRCKI pin */
225#define I2S_AICR_SDMI 0x00000070 /* format of input audio data */
226#define I2S_AICR_SDMI_SHIFT 4
227#define I2S_AICR_CLI 0x00000080 /* input FIFO clearing control */
228#define I2S_AICR_IM 0x00000300 /* input state control */
229#define I2S_AICR_IM_SHIFT 8
230#define I2S_AICR__IN_MASK 0x000003f7
231#define I2S_AICR_MO 0x00001000 /* mono output requested */
232#define I2S_AICR_AMO 0x00002000 /* relation between LRCKO/FS0 and SDO */
233#define I2S_AICR_AMO_SHIFT 13
234#define I2S_AICR_LRO 0x00004000 /* function of LRCKO pin */
235#define I2S_AICR_SDMO 0x00070000 /* format of output audio data */
236#define I2S_AICR_SDMO_SHIFT 16
237#define I2S_AICR_CLO 0x00080000 /* output FIFO clearing control */
238#define I2S_AICR_OM 0x00100000 /* output state control */
239#define I2S_AICR__OUT_MASK 0x001f7000
240#define I2S_AICR_DIV 0x03000000 /* frequency division rate */
241#define I2S_AICR_DIV_SHIFT 24
242#define I2S_AICR_FL 0x20000000 /* frame length */
243#define I2S_AICR_FS 0x40000000 /* frame sync method */
244#define I2S_AICR_ME 0x80000000 /* master enable */
245
246/*
247 * PCMCIA
248 */
249#define __addr_MB93493_PCMCIA(X) ((volatile unsigned long *)(__region_CS5 + (X)))
250
251/*
252 * GPIO
253 */
254#define __get_MB93493_GPIO_PDR(X) __get_MB93493(0x380 + (X) * 0xc0)
255#define __set_MB93493_GPIO_PDR(X,V) __set_MB93493(0x380 + (X) * 0xc0, (V))
256
257#define __get_MB93493_GPIO_GPDR(X) __get_MB93493(0x384 + (X) * 0xc0)
258#define __set_MB93493_GPIO_GPDR(X,V) __set_MB93493(0x384 + (X) * 0xc0, (V))
259
260#define __get_MB93493_GPIO_SIR(X) __get_MB93493(0x388 + (X) * 0xc0)
261#define __set_MB93493_GPIO_SIR(X,V) __set_MB93493(0x388 + (X) * 0xc0, (V))
262
263#define __get_MB93493_GPIO_SOR(X) __get_MB93493(0x38c + (X) * 0xc0)
264#define __set_MB93493_GPIO_SOR(X,V) __set_MB93493(0x38c + (X) * 0xc0, (V))
265
266#define __get_MB93493_GPIO_PDSR(X) __get_MB93493(0x390 + (X) * 0xc0)
267#define __set_MB93493_GPIO_PDSR(X,V) __set_MB93493(0x390 + (X) * 0xc0, (V))
268
269#define __get_MB93493_GPIO_PDCR(X) __get_MB93493(0x394 + (X) * 0xc0)
270#define __set_MB93493_GPIO_PDCR(X,V) __set_MB93493(0x394 + (X) * 0xc0, (V))
271
272#define __get_MB93493_GPIO_INTST(X) __get_MB93493(0x398 + (X) * 0xc0)
273#define __set_MB93493_GPIO_INTST(X,V) __set_MB93493(0x398 + (X) * 0xc0, (V))
274
275#define __get_MB93493_GPIO_IEHL(X) __get_MB93493(0x39c + (X) * 0xc0)
276#define __set_MB93493_GPIO_IEHL(X,V) __set_MB93493(0x39c + (X) * 0xc0, (V))
277
278#define __get_MB93493_GPIO_IELH(X) __get_MB93493(0x3a0 + (X) * 0xc0)
279#define __set_MB93493_GPIO_IELH(X,V) __set_MB93493(0x3a0 + (X) * 0xc0, (V))
280
281#endif /* _ASM_MB93493_REGS_H */
diff --git a/arch/frv/include/asm/mc146818rtc.h b/arch/frv/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..90dfb7a633d1
--- /dev/null
+++ b/arch/frv/include/asm/mc146818rtc.h
@@ -0,0 +1,16 @@
1/* mc146818rtc.h: RTC defs
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MC146818RTC_H
13#define _ASM_MC146818RTC_H
14
15
16#endif /* _ASM_MC146818RTC_H */
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h
new file mode 100644
index 000000000000..2947764fc0e0
--- /dev/null
+++ b/arch/frv/include/asm/mem-layout.h
@@ -0,0 +1,86 @@
1/* mem-layout.h: memory layout
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MEM_LAYOUT_H
13#define _ASM_MEM_LAYOUT_H
14
15#ifndef __ASSEMBLY__
16#define __UL(X) ((unsigned long) (X))
17#else
18#define __UL(X) (X)
19#endif
20
21/*
22 * PAGE_SHIFT determines the page size
23 */
24#define PAGE_SHIFT 14
25
26#ifndef __ASSEMBLY__
27#define PAGE_SIZE (1UL << PAGE_SHIFT)
28#else
29#define PAGE_SIZE (1 << PAGE_SHIFT)
30#endif
31
32#define PAGE_MASK (~(PAGE_SIZE-1))
33
34/*
35 * the slab must be aligned such that load- and store-double instructions don't
36 * fault if used
37 */
38#define ARCH_KMALLOC_MINALIGN 8
39#define ARCH_SLAB_MINALIGN 8
40
41/*****************************************************************************/
42/*
43 * virtual memory layout from kernel's point of view
44 */
45#define PAGE_OFFSET ((unsigned long) &__page_offset)
46
47#ifdef CONFIG_MMU
48
49/* see Documentation/frv/mmu-layout.txt */
50#define KERNEL_LOWMEM_START __UL(0xc0000000)
51#define KERNEL_LOWMEM_END __UL(0xd0000000)
52#define VMALLOC_START __UL(0xd0000000)
53#define VMALLOC_END __UL(0xd8000000)
54#define PKMAP_BASE __UL(0xd8000000)
55#define PKMAP_END __UL(0xdc000000)
56#define KMAP_ATOMIC_SECONDARY_FRAME __UL(0xdc000000)
57#define KMAP_ATOMIC_PRIMARY_FRAME __UL(0xdd000000)
58
59#endif
60
61#define KERNEL_IO_START __UL(0xe0000000)
62
63
64/*****************************************************************************/
65/*
66 * memory layout from userspace's point of view
67 */
68#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
69#define STACK_TOP __UL(2 * 1024 * 1024)
70#define STACK_TOP_MAX __UL(0xc0000000)
71
72/* userspace process size */
73#ifdef CONFIG_MMU
74#define TASK_SIZE (PAGE_OFFSET)
75#else
76#define TASK_SIZE __UL(0xFFFFFFFFUL)
77#endif
78
79/* base of area at which unspecified mmaps will start */
80#ifdef CONFIG_BINFMT_ELF_FDPIC
81#define TASK_UNMAPPED_BASE __UL(16 * 1024 * 1024)
82#else
83#define TASK_UNMAPPED_BASE __UL(TASK_SIZE / 3)
84#endif
85
86#endif /* _ASM_MEM_LAYOUT_H */
diff --git a/arch/frv/include/asm/mman.h b/arch/frv/include/asm/mman.h
new file mode 100644
index 000000000000..b4371e928683
--- /dev/null
+++ b/arch/frv/include/asm/mman.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_MMAN_H__
2#define __ASM_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ASM_MMAN_H__ */
18
diff --git a/arch/frv/include/asm/mmu.h b/arch/frv/include/asm/mmu.h
new file mode 100644
index 000000000000..86ca0e86e7d2
--- /dev/null
+++ b/arch/frv/include/asm/mmu.h
@@ -0,0 +1,41 @@
1/* mmu.h: memory management context for FR-V with or without MMU support
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MMU_H
12#define _ASM_MMU_H
13
14typedef struct {
15#ifdef CONFIG_MMU
16 struct list_head id_link; /* link in list of context ID owners */
17 unsigned short id; /* MMU context ID */
18 unsigned short id_busy; /* true if ID is in CXNR */
19 unsigned long itlb_cached_pge; /* [SCR0] PGE cached for insn TLB handler */
20 unsigned long itlb_ptd_mapping; /* [DAMR4] PTD mapping for itlb cached PGE */
21 unsigned long dtlb_cached_pge; /* [SCR1] PGE cached for data TLB handler */
22 unsigned long dtlb_ptd_mapping; /* [DAMR5] PTD mapping for dtlb cached PGE */
23
24#else
25 unsigned long end_brk;
26
27#endif
28
29#ifdef CONFIG_BINFMT_ELF_FDPIC
30 unsigned long exec_fdpic_loadmap;
31 unsigned long interp_fdpic_loadmap;
32#endif
33
34} mm_context_t;
35
36#ifdef CONFIG_MMU
37extern int __nongpreldata cxn_pinned;
38extern int cxn_pin_by_pid(pid_t pid);
39#endif
40
41#endif /* _ASM_MMU_H */
diff --git a/arch/frv/include/asm/mmu_context.h b/arch/frv/include/asm/mmu_context.h
new file mode 100644
index 000000000000..c7daa395156a
--- /dev/null
+++ b/arch/frv/include/asm/mmu_context.h
@@ -0,0 +1,50 @@
1/* mmu_context.h: MMU context management routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MMU_CONTEXT_H
13#define _ASM_MMU_CONTEXT_H
14
15#include <asm/setup.h>
16#include <asm/page.h>
17#include <asm/pgalloc.h>
18#include <asm-generic/mm_hooks.h>
19
20static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
21{
22}
23
24#ifdef CONFIG_MMU
25extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
26extern void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *_pgd);
27extern void destroy_context(struct mm_struct *mm);
28
29#else
30#define init_new_context(tsk, mm) ({ 0; })
31#define change_mm_context(old, ctx, _pml4) do {} while(0)
32#define destroy_context(mm) do {} while(0)
33#endif
34
35#define switch_mm(prev, next, tsk) \
36do { \
37 if (prev != next) \
38 change_mm_context(&prev->context, &next->context, next->pgd); \
39} while(0)
40
41#define activate_mm(prev, next) \
42do { \
43 change_mm_context(&prev->context, &next->context, next->pgd); \
44} while(0)
45
46#define deactivate_mm(tsk, mm) \
47do { \
48} while(0)
49
50#endif
diff --git a/arch/frv/include/asm/module.h b/arch/frv/include/asm/module.h
new file mode 100644
index 000000000000..3d5c6360289a
--- /dev/null
+++ b/arch/frv/include/asm/module.h
@@ -0,0 +1,28 @@
1/* module.h: FRV module stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MODULE_H
12#define _ASM_MODULE_H
13
14struct mod_arch_specific
15{
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
28
diff --git a/arch/frv/include/asm/msgbuf.h b/arch/frv/include/asm/msgbuf.h
new file mode 100644
index 000000000000..97ceb55a06fb
--- /dev/null
+++ b/arch/frv/include/asm/msgbuf.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
32
diff --git a/arch/frv/include/asm/mutex.h b/arch/frv/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/frv/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/frv/include/asm/page.h b/arch/frv/include/asm/page.h
new file mode 100644
index 000000000000..bd9c220094c7
--- /dev/null
+++ b/arch/frv/include/asm/page.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_PAGE_H
2#define _ASM_PAGE_H
3
4#include <asm/virtconvert.h>
5#include <asm/mem-layout.h>
6#include <asm/sections.h>
7#include <asm/setup.h>
8
9#ifndef __ASSEMBLY__
10
11#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
12#define free_user_page(page, addr) free_page(addr)
13
14#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
15#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
16
17#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
18#define copy_user_page(vto, vfrom, vaddr, topg) memcpy((vto), (vfrom), PAGE_SIZE)
19
20/*
21 * These are used to make use of C type-checking..
22 */
23typedef struct { unsigned long pte; } pte_t;
24typedef struct { unsigned long ste[64];} pmd_t;
25typedef struct { pmd_t pue[1]; } pud_t;
26typedef struct { pud_t pge[1]; } pgd_t;
27typedef struct { unsigned long pgprot; } pgprot_t;
28typedef struct page *pgtable_t;
29
30#define pte_val(x) ((x).pte)
31#define pmd_val(x) ((x).ste[0])
32#define pud_val(x) ((x).pue[0])
33#define pgd_val(x) ((x).pge[0])
34#define pgprot_val(x) ((x).pgprot)
35
36#define __pte(x) ((pte_t) { (x) } )
37#define __pmd(x) ((pmd_t) { (x) } )
38#define __pud(x) ((pud_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41#define PTE_MASK PAGE_MASK
42
43#define devmem_is_allowed(pfn) 1
44
45#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
46#define __va(paddr) phys_to_virt((unsigned long) (paddr))
47
48#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
49
50extern unsigned long max_low_pfn;
51extern unsigned long min_low_pfn;
52extern unsigned long max_pfn;
53
54#ifdef CONFIG_MMU
55#define pfn_valid(pfn) ((pfn) < max_mapnr)
56#else
57#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
58#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
59
60#endif
61
62#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
63#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
64
65
66#ifdef CONFIG_MMU
67#define VM_DATA_DEFAULT_FLAGS \
68 (VM_READ | VM_WRITE | \
69 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
70 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
71#endif
72
73#endif /* __ASSEMBLY__ */
74
75#include <asm-generic/memory_model.h>
76#include <asm-generic/page.h>
77
78#endif /* _ASM_PAGE_H */
diff --git a/arch/frv/include/asm/param.h b/arch/frv/include/asm/param.h
new file mode 100644
index 000000000000..6859dd503ed3
--- /dev/null
+++ b/arch/frv/include/asm/param.h
@@ -0,0 +1,22 @@
1#ifndef _ASM_PARAM_H
2#define _ASM_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ /* Internal kernel timer frequency */
6#define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 16384
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_PARAM_H */
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
new file mode 100644
index 000000000000..585d9b49949a
--- /dev/null
+++ b/arch/frv/include/asm/pci.h
@@ -0,0 +1,118 @@
1/* pci.h: FR-V specific PCI declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68k/pci.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef ASM_PCI_H
14#define ASM_PCI_H
15
16#include <linux/mm.h>
17#include <asm/scatterlist.h>
18#include <asm-generic/pci-dma-compat.h>
19#include <asm-generic/pci.h>
20
21struct pci_dev;
22
23#define pcibios_assign_all_busses() 0
24
25extern void pcibios_set_master(struct pci_dev *dev);
26
27extern void pcibios_penalize_isa_irq(int irq);
28
29#ifdef CONFIG_MMU
30extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
31extern void consistent_free(void *vaddr);
32extern void consistent_sync(void *vaddr, size_t size, int direction);
33extern void consistent_sync_page(struct page *page, unsigned long offset,
34 size_t size, int direction);
35#endif
36
37extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
38 dma_addr_t *dma_handle);
39
40extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
41 void *vaddr, dma_addr_t dma_handle);
42
43/* Return the index of the PCI controller for device PDEV. */
44#define pci_controller_num(PDEV) (0)
45
46/* The PCI address space does equal the physical memory
47 * address space. The networking and block device layers use
48 * this boolean for bounce buffer decisions.
49 */
50#define PCI_DMA_BUS_IS_PHYS (1)
51
52/* pci_unmap_{page,single} is a nop so... */
53#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
54#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
55#define pci_unmap_addr(PTR, ADDR_NAME) (0)
56#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
57#define pci_unmap_len(PTR, LEN_NAME) (0)
58#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
59
60#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 *strat = PCI_DMA_BURST_INFINITY;
66 *strategy_parameter = ~0UL;
67}
68#endif
69
70/*
71 * These are pretty much arbitary with the CoMEM implementation.
72 * We have the whole address space to ourselves.
73 */
74#define PCIBIOS_MIN_IO 0x100
75#define PCIBIOS_MIN_MEM 0x00010000
76
77/* Make physical memory consistent for a single
78 * streaming mode DMA translation after a transfer.
79 *
80 * If you perform a pci_map_single() but wish to interrogate the
81 * buffer using the cpu, yet do not wish to teardown the PCI dma
82 * mapping, you must call this function before doing so. At the
83 * next point you give the PCI dma address back to the card, the
84 * device again owns the buffer.
85 */
86static inline void pci_dma_sync_single(struct pci_dev *hwdev,
87 dma_addr_t dma_handle,
88 size_t size, int direction)
89{
90 if (direction == PCI_DMA_NONE)
91 BUG();
92
93 frv_cache_wback_inv((unsigned long)bus_to_virt(dma_handle),
94 (unsigned long)bus_to_virt(dma_handle) + size);
95}
96
97/* Make physical memory consistent for a set of streaming
98 * mode DMA translations after a transfer.
99 *
100 * The same as pci_dma_sync_single but for a scatter-gather list,
101 * same rules and usage.
102 */
103static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
104 struct scatterlist *sg,
105 int nelems, int direction)
106{
107 int i;
108
109 if (direction == PCI_DMA_NONE)
110 BUG();
111
112 for (i = 0; i < nelems; i++)
113 frv_cache_wback_inv(sg_dma_address(&sg[i]),
114 sg_dma_address(&sg[i])+sg_dma_len(&sg[i]));
115}
116
117
118#endif
diff --git a/arch/frv/include/asm/percpu.h b/arch/frv/include/asm/percpu.h
new file mode 100644
index 000000000000..2cad3f874ded
--- /dev/null
+++ b/arch/frv/include/asm/percpu.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_PERCPU_H
2#define __ASM_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_PERCPU_H */
diff --git a/arch/frv/include/asm/pgalloc.h b/arch/frv/include/asm/pgalloc.h
new file mode 100644
index 000000000000..971e6addb009
--- /dev/null
+++ b/arch/frv/include/asm/pgalloc.h
@@ -0,0 +1,69 @@
1/* pgalloc.h: Page allocation routines for FRV
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgalloc.h
13 * include/asm-i386/pgalloc.h
14 */
15#ifndef _ASM_PGALLOC_H
16#define _ASM_PGALLOC_H
17
18#include <asm/setup.h>
19#include <asm/virtconvert.h>
20
21#ifdef CONFIG_MMU
22
23#define pmd_populate_kernel(mm, pmd, pte) __set_pmd(pmd, __pa(pte) | _PAGE_TABLE)
24#define pmd_populate(MM, PMD, PAGE) \
25do { \
26 __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \
27} while(0)
28#define pmd_pgtable(pmd) pmd_page(pmd)
29
30/*
31 * Allocate and free page tables.
32 */
33
34extern pgd_t *pgd_alloc(struct mm_struct *);
35extern void pgd_free(struct mm_struct *mm, pgd_t *);
36
37extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
38
39extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
40
41static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
42{
43 free_page((unsigned long)pte);
44}
45
46static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
47{
48 pgtable_page_dtor(pte);
49 __free_page(pte);
50}
51
52#define __pte_free_tlb(tlb,pte) \
53do { \
54 pgtable_page_dtor(pte); \
55 tlb_remove_page((tlb),(pte)); \
56} while (0)
57
58/*
59 * allocating and freeing a pmd is trivial: the 1-entry pmd is
60 * inside the pgd, so has no extra memory associated with it.
61 * (In the PAE case we free the pmds as part of the pgd.)
62 */
63#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *) 2); })
64#define pmd_free(mm, x) do { } while (0)
65#define __pmd_free_tlb(tlb,x) do { } while (0)
66
67#endif /* CONFIG_MMU */
68
69#endif /* _ASM_PGALLOC_H */
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h
new file mode 100644
index 000000000000..33233011b1c1
--- /dev/null
+++ b/arch/frv/include/asm/pgtable.h
@@ -0,0 +1,549 @@
1/* pgtable.h: FR-V page table mangling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgtable.h
13 * include/asm-i386/pgtable.h
14 */
15
16#ifndef _ASM_PGTABLE_H
17#define _ASM_PGTABLE_H
18
19#include <asm/mem-layout.h>
20#include <asm/setup.h>
21#include <asm/processor.h>
22
23#ifndef __ASSEMBLY__
24#include <linux/threads.h>
25#include <linux/slab.h>
26#include <linux/list.h>
27#include <linux/spinlock.h>
28#include <linux/sched.h>
29struct vm_area_struct;
30#endif
31
32#ifndef __ASSEMBLY__
33#if defined(CONFIG_HIGHPTE)
34typedef unsigned long pte_addr_t;
35#else
36typedef pte_t *pte_addr_t;
37#endif
38#endif
39
40/*****************************************************************************/
41/*
42 * MMU-less operation case first
43 */
44#ifndef CONFIG_MMU
45
46#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
47#define pgd_none(pgd) (0)
48#define pgd_bad(pgd) (0)
49#define pgd_clear(pgdp)
50#define kern_addr_valid(addr) (1)
51#define pmd_offset(a, b) ((void *) 0)
52
53#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
54#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
55#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
56#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
57#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
58
59#define __swp_type(x) (0)
60#define __swp_offset(x) (0)
61#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
62#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
63#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
64
65#ifndef __ASSEMBLY__
66static inline int pte_file(pte_t pte) { return 0; }
67#endif
68
69#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
70
71#define swapper_pg_dir ((pgd_t *) NULL)
72
73#define pgtable_cache_init() do {} while (0)
74
75#include <asm-generic/pgtable.h>
76
77#else /* !CONFIG_MMU */
78/*****************************************************************************/
79/*
80 * then MMU operation
81 */
82
83/*
84 * ZERO_PAGE is a global shared page that is always zero: used
85 * for zero-mapped memory areas etc..
86 */
87#ifndef __ASSEMBLY__
88extern unsigned long empty_zero_page;
89#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
90#endif
91
92/*
93 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
94 * [see Documentation/frv/mmu-layout.txt]
95 *
96 * Page Directory:
97 * - Size: 16KB
98 * - 64 PGEs per PGD
99 * - Each PGE holds 1 PUD and covers 64MB
100 *
101 * Page Upper Directory:
102 * - Size: 256B
103 * - 1 PUE per PUD
104 * - Each PUE holds 1 PMD and covers 64MB
105 *
106 * Page Mid-Level Directory
107 * - Size: 256B
108 * - 1 PME per PMD
109 * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
110 * - All STEs are instantiated at the same time
111 *
112 * Page Table
113 * - Size: 16KB
114 * - 4096 PTEs per PT
115 * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
116 *
117 * Pages
118 * - Size: 4KB
119 *
120 * total PTEs
121 * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
122 * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
123 * = 262144 (or 256 * 1024)
124 */
125#define PGDIR_SHIFT 26
126#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
127#define PGDIR_MASK (~(PGDIR_SIZE - 1))
128#define PTRS_PER_PGD 64
129
130#define PUD_SHIFT 26
131#define PTRS_PER_PUD 1
132#define PUD_SIZE (1UL << PUD_SHIFT)
133#define PUD_MASK (~(PUD_SIZE - 1))
134#define PUE_SIZE 256
135
136#define PMD_SHIFT 26
137#define PMD_SIZE (1UL << PMD_SHIFT)
138#define PMD_MASK (~(PMD_SIZE - 1))
139#define PTRS_PER_PMD 1
140#define PME_SIZE 256
141
142#define __frv_PT_SIZE 256
143
144#define PTRS_PER_PTE 4096
145
146#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
147#define FIRST_USER_ADDRESS 0
148
149#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
150#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
151
152#define TWOLEVEL_PGDIR_SHIFT 26
153#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
154#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
155
156#ifndef __ASSEMBLY__
157
158extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
159
160#define pte_ERROR(e) \
161 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
162#define pmd_ERROR(e) \
163 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
164#define pud_ERROR(e) \
165 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
166#define pgd_ERROR(e) \
167 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
168
169/*
170 * Certain architectures need to do special things when PTEs
171 * within a page table are directly modified. Thus, the following
172 * hook is made available.
173 */
174#define set_pte(pteptr, pteval) \
175do { \
176 *(pteptr) = (pteval); \
177 asm volatile("dcf %M0" :: "U"(*pteptr)); \
178} while(0)
179#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
180
181/*
182 * pgd_offset() returns a (pgd_t *)
183 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
184 */
185#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
186
187/*
188 * a shortcut which implies the use of the kernel's pgd, instead
189 * of a process's
190 */
191#define pgd_offset_k(address) pgd_offset(&init_mm, address)
192
193/*
194 * The "pgd_xxx()" functions here are trivial for a folded two-level
195 * setup: the pud is never bad, and a pud always exists (as it's folded
196 * into the pgd entry)
197 */
198static inline int pgd_none(pgd_t pgd) { return 0; }
199static inline int pgd_bad(pgd_t pgd) { return 0; }
200static inline int pgd_present(pgd_t pgd) { return 1; }
201static inline void pgd_clear(pgd_t *pgd) { }
202
203#define pgd_populate(mm, pgd, pud) do { } while (0)
204/*
205 * (puds are folded into pgds so this doesn't get actually called,
206 * but the define is needed for a generic inline function.)
207 */
208#define set_pgd(pgdptr, pgdval) \
209do { \
210 memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
211 asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
212} while(0)
213
214static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
215{
216 return (pud_t *) pgd;
217}
218
219#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
220#define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd }))
221
222/*
223 * allocating and freeing a pud is trivial: the 1-entry pud is
224 * inside the pgd, so has no extra memory associated with it.
225 */
226#define pud_alloc_one(mm, address) NULL
227#define pud_free(mm, x) do { } while (0)
228#define __pud_free_tlb(tlb, x) do { } while (0)
229
230/*
231 * The "pud_xxx()" functions here are trivial for a folded two-level
232 * setup: the pmd is never bad, and a pmd always exists (as it's folded
233 * into the pud entry)
234 */
235static inline int pud_none(pud_t pud) { return 0; }
236static inline int pud_bad(pud_t pud) { return 0; }
237static inline int pud_present(pud_t pud) { return 1; }
238static inline void pud_clear(pud_t *pud) { }
239
240#define pud_populate(mm, pmd, pte) do { } while (0)
241
242/*
243 * (pmds are folded into puds so this doesn't get actually called,
244 * but the define is needed for a generic inline function.)
245 */
246#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
247
248#define pud_page(pud) (pmd_page((pmd_t){ pud }))
249#define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud }))
250
251/*
252 * (pmds are folded into pgds so this doesn't get actually called,
253 * but the define is needed for a generic inline function.)
254 */
255extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
256
257#define set_pmd(pmdptr, pmdval) \
258do { \
259 __set_pmd((pmdptr), (pmdval).ste[0]); \
260} while(0)
261
262#define __pmd_index(address) 0
263
264static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
265{
266 return (pmd_t *) dir + __pmd_index(address);
267}
268
269#define pte_same(a, b) ((a).pte == (b).pte)
270#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
271#define pte_none(x) (!(x).pte)
272#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
273#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
274#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
275
276#define VMALLOC_VMADDR(x) ((unsigned long) (x))
277
278#endif /* !__ASSEMBLY__ */
279
280/*
281 * control flags in AMPR registers and TLB entries
282 */
283#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
284#define _PAGE_BIT_WP DAMPRx_WP_BIT
285#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
286#define _PAGE_BIT_SUPER xAMPRx_S_BIT
287#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
288#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
289#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
290
291#define _PAGE_PRESENT xAMPRx_V
292#define _PAGE_WP DAMPRx_WP
293#define _PAGE_NOCACHE xAMPRx_C
294#define _PAGE_SUPER xAMPRx_S
295#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
296#define _PAGE_DIRTY xAMPRx_M
297#define _PAGE_NOTGLOBAL xAMPRx_NG
298
299#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
300
301#define _PAGE_FILE 0x002 /* set:pagecache unset:swap */
302#define _PAGE_PROTNONE 0x000 /* If not present */
303
304#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
305
306#define __PGPROT_BASE \
307 (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
308
309#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
310#define PAGE_SHARED __pgprot(__PGPROT_BASE)
311#define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
312#define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
313
314#define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
315#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
316#define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
317
318#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
319
320#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
321#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
322#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
323
324#define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
325
326#ifndef __ASSEMBLY__
327
328/*
329 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
330 * instruction access and for data access. However, we don't have enough reserved bits to say
331 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
332 */
333#define __P000 PAGE_NONE
334#define __P001 PAGE_READONLY
335#define __P010 PAGE_COPY
336#define __P011 PAGE_COPY
337#define __P100 PAGE_READONLY
338#define __P101 PAGE_READONLY
339#define __P110 PAGE_COPY
340#define __P111 PAGE_COPY
341
342#define __S000 PAGE_NONE
343#define __S001 PAGE_READONLY
344#define __S010 PAGE_SHARED
345#define __S011 PAGE_SHARED
346#define __S100 PAGE_READONLY
347#define __S101 PAGE_READONLY
348#define __S110 PAGE_SHARED
349#define __S111 PAGE_SHARED
350
351/*
352 * Define this to warn about kernel memory accesses that are
353 * done without a 'access_ok(VERIFY_WRITE,..)'
354 */
355#undef TEST_ACCESS_OK
356
357#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
358#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
359
360#define pmd_none(x) (!pmd_val(x))
361#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
362#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
363#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
364
365#define pmd_page_vaddr(pmd) \
366 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
367
368#ifndef CONFIG_DISCONTIGMEM
369#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
370#endif
371
372#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
373
374/*
375 * The following only work if pte_present() is true.
376 * Undefined behaviour if not..
377 */
378static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
379static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
380static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
381static inline int pte_special(pte_t pte) { return 0; }
382
383static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
384static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
385static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
386static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
387static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
388static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
389static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
390
391static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
392{
393 int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
394 asm volatile("dcf %M0" :: "U"(*ptep));
395 return i;
396}
397
398static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
399{
400 unsigned long x = xchg(&ptep->pte, 0);
401 asm volatile("dcf %M0" :: "U"(*ptep));
402 return __pte(x);
403}
404
405static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
406{
407 set_bit(_PAGE_BIT_WP, ptep);
408 asm volatile("dcf %M0" :: "U"(*ptep));
409}
410
411/*
412 * Macro to mark a page protection value as "uncacheable"
413 */
414#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))
415
416/*
417 * Conversion functions: convert a page and protection to a page entry,
418 * and a page entry and page directory to the page they refer to.
419 */
420
421#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
422#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
423
424/* This takes a physical page address that is used by the remapping functions */
425#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
426
427static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
428{
429 pte.pte &= _PAGE_CHG_MASK;
430 pte.pte |= pgprot_val(newprot);
431 return pte;
432}
433
434/* to find an entry in a page-table-directory. */
435#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
436#define pgd_index_k(addr) pgd_index(addr)
437
438/* Find an entry in the bottom-level page table.. */
439#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
440
441/*
442 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
443 *
444 * this macro returns the index of the entry in the pte page which would
445 * control the given virtual address
446 */
447#define pte_index(address) \
448 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
449#define pte_offset_kernel(dir, address) \
450 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
451
452#if defined(CONFIG_HIGHPTE)
453#define pte_offset_map(dir, address) \
454 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
455#define pte_offset_map_nested(dir, address) \
456 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
457#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
458#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
459#else
460#define pte_offset_map(dir, address) \
461 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
462#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
463#define pte_unmap(pte) do { } while (0)
464#define pte_unmap_nested(pte) do { } while (0)
465#endif
466
467/*
468 * Handle swap and file entries
469 * - the PTE is encoded in the following format:
470 * bit 0: Must be 0 (!_PAGE_PRESENT)
471 * bit 1: Type: 0 for swap, 1 for file (_PAGE_FILE)
472 * bits 2-7: Swap type
473 * bits 8-31: Swap offset
474 * bits 2-31: File pgoff
475 */
476#define __swp_type(x) (((x).val >> 2) & 0x1f)
477#define __swp_offset(x) ((x).val >> 8)
478#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
479#define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte })
480#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
481
482static inline int pte_file(pte_t pte)
483{
484 return pte.pte & _PAGE_FILE;
485}
486
487#define PTE_FILE_MAX_BITS 29
488
489#define pte_to_pgoff(PTE) ((PTE).pte >> 2)
490#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
491
492/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
493#define PageSkip(page) (0)
494#define kern_addr_valid(addr) (1)
495
496#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
497 remap_pfn_range(vma, vaddr, pfn, size, prot)
498
499#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
500#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
501#define __HAVE_ARCH_PTEP_SET_WRPROTECT
502#define __HAVE_ARCH_PTE_SAME
503#include <asm-generic/pgtable.h>
504
505/*
506 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
507 */
508static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
509{
510 struct mm_struct *mm;
511 unsigned long ampr;
512
513 mm = current->mm;
514 if (mm) {
515 pgd_t *pge = pgd_offset(mm, address);
516 pud_t *pue = pud_offset(pge, address);
517 pmd_t *pme = pmd_offset(pue, address);
518
519 ampr = pme->ste[0] & 0xffffff00;
520 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
521 xAMPRx_V;
522 } else {
523 address = ULONG_MAX;
524 ampr = 0;
525 }
526
527 asm volatile("movgs %0,scr0\n"
528 "movgs %0,scr1\n"
529 "movgs %1,dampr4\n"
530 "movgs %1,dampr5\n"
531 :
532 : "r"(address), "r"(ampr)
533 );
534}
535
536#ifdef CONFIG_PROC_FS
537extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
538#endif
539
540extern void __init pgtable_cache_init(void);
541
542#endif /* !__ASSEMBLY__ */
543#endif /* !CONFIG_MMU */
544
545#ifndef __ASSEMBLY__
546extern void __init paging_init(void);
547#endif /* !__ASSEMBLY__ */
548
549#endif /* _ASM_PGTABLE_H */
diff --git a/arch/frv/include/asm/poll.h b/arch/frv/include/asm/poll.h
new file mode 100644
index 000000000000..0d01479ccc56
--- /dev/null
+++ b/arch/frv/include/asm/poll.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_POLL_H
2#define _ASM_POLL_H
3
4#define POLLWRNORM POLLOUT
5#define POLLWRBAND 256
6
7#include <asm-generic/poll.h>
8
9#undef POLLREMOVE
10
11#endif
12
diff --git a/arch/frv/include/asm/posix_types.h b/arch/frv/include/asm/posix_types.h
new file mode 100644
index 000000000000..a9f1f5be0632
--- /dev/null
+++ b/arch/frv/include/asm/posix_types.h
@@ -0,0 +1,62 @@
1#ifndef _ASM_POSIX_TYPES_H
2#define _ASM_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
49
50#undef __FD_CLR
51#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
52
53#undef __FD_ISSET
54#define __FD_ISSET(d, set) (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d)))
55
56#undef __FD_ZERO
57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
58
59#endif /* defined(__KERNEL__) */
60
61#endif
62
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h
new file mode 100644
index 000000000000..3744f2e47f48
--- /dev/null
+++ b/arch/frv/include/asm/processor.h
@@ -0,0 +1,153 @@
1/* processor.h: FRV processor definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROCESSOR_H
13#define _ASM_PROCESSOR_H
14
15#include <asm/mem-layout.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
21 */
22#define current_text_addr() ({ __label__ _l; _l: &&_l;})
23
24#include <linux/compiler.h>
25#include <linux/linkage.h>
26#include <asm/sections.h>
27#include <asm/segment.h>
28#include <asm/fpu.h>
29#include <asm/registers.h>
30#include <asm/ptrace.h>
31#include <asm/current.h>
32#include <asm/cache.h>
33
34/* Forward declaration, a strange C thing */
35struct task_struct;
36
37/*
38 * CPU type and hardware bug flags. Kept separately for each CPU.
39 */
40struct cpuinfo_frv {
41#ifdef CONFIG_MMU
42 unsigned long *pgd_quick;
43 unsigned long *pte_quick;
44 unsigned long pgtable_cache_sz;
45#endif
46} __cacheline_aligned;
47
48extern struct cpuinfo_frv __nongprelbss boot_cpu_data;
49
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52
53/*
54 * Bus types
55 */
56#define EISA_bus 0
57#define MCA_bus 0
58
59struct thread_struct {
60 struct pt_regs *frame; /* [GR28] exception frame ptr for this thread */
61 struct task_struct *curr; /* [GR29] current pointer for this thread */
62 unsigned long sp; /* [GR1 ] kernel stack pointer */
63 unsigned long fp; /* [GR2 ] kernel frame pointer */
64 unsigned long lr; /* link register */
65 unsigned long pc; /* program counter */
66 unsigned long gr[12]; /* [GR16-GR27] */
67 unsigned long sched_lr; /* LR from schedule() */
68
69 union {
70 struct pt_regs *frame0; /* top (user) stack frame */
71 struct user_context *user; /* userspace context */
72 };
73} __attribute__((aligned(8)));
74
75extern struct pt_regs *__kernel_frame0_ptr;
76extern struct task_struct *__kernel_current_task;
77
78#endif
79
80#ifndef __ASSEMBLY__
81#define INIT_THREAD_FRAME0 \
82 ((struct pt_regs *) \
83 (sizeof(init_stack) + (unsigned long) init_stack - sizeof(struct user_context)))
84
85#define INIT_THREAD { \
86 NULL, \
87 (struct task_struct *) init_stack, \
88 0, 0, 0, 0, \
89 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
90 0, \
91 { INIT_THREAD_FRAME0 }, \
92}
93
94/*
95 * do necessary setup to start up a newly executed thread.
96 * - need to discard the frame stacked by init() invoking the execve syscall
97 */
98#define start_thread(_regs, _pc, _usp) \
99do { \
100 set_fs(USER_DS); /* reads from user space */ \
101 __frame = __kernel_frame0_ptr; \
102 __frame->pc = (_pc); \
103 __frame->psr &= ~PSR_S; \
104 __frame->sp = (_usp); \
105} while(0)
106
107extern void prepare_to_copy(struct task_struct *tsk);
108
109/* Free all resources held by a thread. */
110static inline void release_thread(struct task_struct *dead_task)
111{
112}
113
114extern asmlinkage int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
115extern asmlinkage void save_user_regs(struct user_context *target);
116extern asmlinkage void *restore_user_regs(const struct user_context *target, ...);
117
118#define copy_segments(tsk, mm) do { } while (0)
119#define release_segments(mm) do { } while (0)
120#define forget_segments() do { } while (0)
121
122/*
123 * Free current thread data structures etc..
124 */
125static inline void exit_thread(void)
126{
127}
128
129/*
130 * Return saved PC of a blocked thread.
131 */
132extern unsigned long thread_saved_pc(struct task_struct *tsk);
133
134unsigned long get_wchan(struct task_struct *p);
135
136#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc)
137#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
138
139/* Allocation and freeing of basic task resources. */
140extern struct task_struct *alloc_task_struct(void);
141extern void free_task_struct(struct task_struct *p);
142
143#define cpu_relax() barrier()
144
145/* data cache prefetch */
146#define ARCH_HAS_PREFETCH
147static inline void prefetch(const void *x)
148{
149 asm volatile("dcpl %0,gr0,#0" : : "r"(x));
150}
151
152#endif /* __ASSEMBLY__ */
153#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
new file mode 100644
index 000000000000..cf6934012b64
--- /dev/null
+++ b/arch/frv/include/asm/ptrace.h
@@ -0,0 +1,83 @@
1/* ptrace.h: ptrace() relevant definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#include <asm/registers.h>
15#ifdef __KERNEL__
16#include <asm/irq_regs.h>
17
18#define in_syscall(regs) (((regs)->tbr & TBR_TT) == TBR_TT_TRAP0)
19#endif
20
21
22#define PT_PSR 0
23#define PT_ISR 1
24#define PT_CCR 2
25#define PT_CCCR 3
26#define PT_LR 4
27#define PT_LCR 5
28#define PT_PC 6
29
30#define PT__STATUS 7 /* exception status */
31#define PT_SYSCALLNO 8 /* syscall number or -1 */
32#define PT_ORIG_GR8 9 /* saved GR8 for signal handling */
33#define PT_GNER0 10
34#define PT_GNER1 11
35#define PT_IACC0H 12
36#define PT_IACC0L 13
37
38#define PT_GR(j) ( 14 + (j)) /* GRj for 0<=j<=63 */
39#define PT_FR(j) ( 78 + (j)) /* FRj for 0<=j<=63 */
40#define PT_FNER(j) (142 + (j)) /* FNERj for 0<=j<=1 */
41#define PT_MSR(j) (144 + (j)) /* MSRj for 0<=j<=2 */
42#define PT_ACC(j) (146 + (j)) /* ACCj for 0<=j<=7 */
43#define PT_ACCG(jklm) (154 + (jklm)) /* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */
44#define PT_FSR(j) (156 + (j)) /* FSRj for 0<=j<=0 */
45#define PT__GPEND 78
46#define PT__END 157
47
48#define PT_TBR PT_GR(0)
49#define PT_SP PT_GR(1)
50#define PT_FP PT_GR(2)
51#define PT_PREV_FRAME PT_GR(28) /* previous exception frame pointer (old gr28 value) */
52#define PT_CURR_TASK PT_GR(29) /* current task */
53
54
55/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
56#define PTRACE_GETREGS 12
57#define PTRACE_SETREGS 13
58#define PTRACE_GETFPREGS 14
59#define PTRACE_SETFPREGS 15
60#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
61
62#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
63#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
64
65#ifdef __KERNEL__
66#ifndef __ASSEMBLY__
67
68/*
69 * we dedicate GR28 to keeping a pointer to the current exception frame
70 * - gr28 is destroyed on entry to the kernel from userspace
71 */
72register struct pt_regs *__frame asm("gr28");
73
74#define user_mode(regs) (!((regs)->psr & PSR_S))
75#define instruction_pointer(regs) ((regs)->pc)
76
77extern unsigned long user_stack(const struct pt_regs *);
78extern void show_regs(struct pt_regs *);
79#define profile_pc(regs) ((regs)->pc)
80#endif
81
82#endif /* !__ASSEMBLY__ */
83#endif /* _ASM_PTRACE_H */
diff --git a/arch/frv/include/asm/registers.h b/arch/frv/include/asm/registers.h
new file mode 100644
index 000000000000..9666119fcf6e
--- /dev/null
+++ b/arch/frv/include/asm/registers.h
@@ -0,0 +1,232 @@
1/* registers.h: register frame declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * notes:
14 *
15 * (1) that the members of all these structures are carefully aligned to permit
16 * usage of STD/STDF instructions
17 *
18 * (2) if you change these structures, you must change the code in
19 * arch/frvnommu/kernel/{break.S,entry.S,switch_to.S,gdb-stub.c}
20 *
21 *
22 * the kernel stack space block looks like this:
23 *
24 * +0x2000 +----------------------
25 * | union {
26 * | struct frv_frame0 {
27 * | struct user_context {
28 * | struct user_int_regs
29 * | struct user_fpmedia_regs
30 * | }
31 * | struct frv_debug_regs
32 * | }
33 * | struct pt_regs [user exception]
34 * | }
35 * +---------------------- <-- __kernel_frame0_ptr (maybe GR28)
36 * |
37 * | kernel stack
38 * |
39 * |......................
40 * | struct pt_regs [kernel exception]
41 * |...................... <-- __kernel_frame0_ptr (maybe GR28)
42 * |
43 * | kernel stack
44 * |
45 * |...................... <-- stack pointer (GR1)
46 * |
47 * | unused stack space
48 * |
49 * +----------------------
50 * | struct thread_info
51 * +0x0000 +---------------------- <-- __current_thread_info (GR15);
52 *
53 * note that GR28 points to the current exception frame
54 */
55
56#ifndef _ASM_REGISTERS_H
57#define _ASM_REGISTERS_H
58
59#ifndef __ASSEMBLY__
60#define __OFFSET(X,N) ((X)+(N)*4)
61#define __OFFSETC(X,N) xxxxxxxxxxxxxxxxxxxxxxxx
62#else
63#define __OFFSET(X,N) ((X)+(N)*4)
64#define __OFFSETC(X,N) ((X)+(N))
65#endif
66
67/*****************************************************************************/
68/*
69 * Exception/Interrupt frame
70 * - held on kernel stack
71 * - 8-byte aligned on stack (old SP is saved in frame)
72 * - GR0 is fixed 0, so we don't save it
73 */
74#ifndef __ASSEMBLY__
75
76struct pt_regs {
77 unsigned long psr; /* Processor Status Register */
78 unsigned long isr; /* Integer Status Register */
79 unsigned long ccr; /* Condition Code Register */
80 unsigned long cccr; /* Condition Code for Conditional Insns Register */
81 unsigned long lr; /* Link Register */
82 unsigned long lcr; /* Loop Count Register */
83 unsigned long pc; /* Program Counter Register */
84 unsigned long __status; /* exception status */
85 unsigned long syscallno; /* syscall number or -1 */
86 unsigned long orig_gr8; /* original syscall arg #1 */
87 unsigned long gner0;
88 unsigned long gner1;
89 unsigned long long iacc0;
90 unsigned long tbr; /* GR0 is fixed zero, so we use this for TBR */
91 unsigned long sp; /* GR1: USP/KSP */
92 unsigned long fp; /* GR2: FP */
93 unsigned long gr3;
94 unsigned long gr4;
95 unsigned long gr5;
96 unsigned long gr6;
97 unsigned long gr7; /* syscall number */
98 unsigned long gr8; /* 1st syscall param; syscall return */
99 unsigned long gr9; /* 2nd syscall param */
100 unsigned long gr10; /* 3rd syscall param */
101 unsigned long gr11; /* 4th syscall param */
102 unsigned long gr12; /* 5th syscall param */
103 unsigned long gr13; /* 6th syscall param */
104 unsigned long gr14;
105 unsigned long gr15;
106 unsigned long gr16; /* GP pointer */
107 unsigned long gr17; /* small data */
108 unsigned long gr18; /* PIC/PID */
109 unsigned long gr19;
110 unsigned long gr20;
111 unsigned long gr21;
112 unsigned long gr22;
113 unsigned long gr23;
114 unsigned long gr24;
115 unsigned long gr25;
116 unsigned long gr26;
117 unsigned long gr27;
118 struct pt_regs *next_frame; /* GR28 - next exception frame */
119 unsigned long gr29; /* GR29 - OS reserved */
120 unsigned long gr30; /* GR30 - OS reserved */
121 unsigned long gr31; /* GR31 - OS reserved */
122} __attribute__((aligned(8)));
123
124#endif
125
126#define REG__STATUS_STEP 0x00000001 /* - reenable single stepping on return */
127#define REG__STATUS_STEPPED 0x00000002 /* - single step caused exception */
128#define REG__STATUS_BROKE 0x00000004 /* - BREAK insn caused exception */
129#define REG__STATUS_SYSC_ENTRY 0x40000000 /* - T on syscall entry (ptrace.c only) */
130#define REG__STATUS_SYSC_EXIT 0x80000000 /* - T on syscall exit (ptrace.c only) */
131
132#define REG_GR(R) __OFFSET(REG_GR0, (R))
133
134#define REG_SP REG_GR(1)
135#define REG_FP REG_GR(2)
136#define REG_PREV_FRAME REG_GR(28) /* previous exception frame pointer (old gr28 value) */
137#define REG_CURR_TASK REG_GR(29) /* current task */
138
139/*****************************************************************************/
140/*
141 * debugging registers
142 */
143#ifndef __ASSEMBLY__
144
145struct frv_debug_regs
146{
147 unsigned long dcr;
148 unsigned long ibar[4] __attribute__((aligned(8)));
149 unsigned long dbar[4] __attribute__((aligned(8)));
150 unsigned long dbdr[4][4] __attribute__((aligned(8)));
151 unsigned long dbmr[4][4] __attribute__((aligned(8)));
152} __attribute__((aligned(8)));
153
154#endif
155
156/*****************************************************************************/
157/*
158 * userspace registers
159 */
160#ifndef __ASSEMBLY__
161
162struct user_int_regs
163{
164 /* integer registers
165 * - up to gr[31] mirror pt_regs
166 * - total size must be multiple of 8 bytes
167 */
168 unsigned long psr; /* Processor Status Register */
169 unsigned long isr; /* Integer Status Register */
170 unsigned long ccr; /* Condition Code Register */
171 unsigned long cccr; /* Condition Code for Conditional Insns Register */
172 unsigned long lr; /* Link Register */
173 unsigned long lcr; /* Loop Count Register */
174 unsigned long pc; /* Program Counter Register */
175 unsigned long __status; /* exception status */
176 unsigned long syscallno; /* syscall number or -1 */
177 unsigned long orig_gr8; /* original syscall arg #1 */
178 unsigned long gner[2];
179 unsigned long long iacc[1];
180
181 union {
182 unsigned long tbr;
183 unsigned long gr[64];
184 };
185};
186
187struct user_fpmedia_regs
188{
189 /* FP/Media registers */
190 unsigned long fr[64];
191 unsigned long fner[2];
192 unsigned long msr[2];
193 unsigned long acc[8];
194 unsigned char accg[8];
195 unsigned long fsr[1];
196};
197
198struct user_context
199{
200 struct user_int_regs i;
201 struct user_fpmedia_regs f;
202
203 /* we provide a context extension so that we can save the regs for CPUs that
204 * implement many more of Fujitsu's lavish register spec
205 */
206 void *extension;
207} __attribute__((aligned(8)));
208
209struct frv_frame0 {
210 union {
211 struct pt_regs regs;
212 struct user_context uc;
213 };
214
215 struct frv_debug_regs debug;
216
217} __attribute__((aligned(32)));
218
219#endif
220
221#define __INT_GR(R) __OFFSET(__INT_GR0, (R))
222
223#define __FPMEDIA_FR(R) __OFFSET(__FPMEDIA_FR0, (R))
224#define __FPMEDIA_FNER(R) __OFFSET(__FPMEDIA_FNER0, (R))
225#define __FPMEDIA_MSR(R) __OFFSET(__FPMEDIA_MSR0, (R))
226#define __FPMEDIA_ACC(R) __OFFSET(__FPMEDIA_ACC0, (R))
227#define __FPMEDIA_ACCG(R) __OFFSETC(__FPMEDIA_ACCG0, (R))
228#define __FPMEDIA_FSR(R) __OFFSET(__FPMEDIA_FSR0, (R))
229
230#define __THREAD_GR(R) __OFFSET(__THREAD_GR16, (R) - 16)
231
232#endif /* _ASM_REGISTERS_H */
diff --git a/arch/frv/include/asm/resource.h b/arch/frv/include/asm/resource.h
new file mode 100644
index 000000000000..5fc60548fd02
--- /dev/null
+++ b/arch/frv/include/asm/resource.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_RESOURCE_H
2#define _ASM_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_RESOURCE_H */
7
diff --git a/arch/frv/include/asm/scatterlist.h b/arch/frv/include/asm/scatterlist.h
new file mode 100644
index 000000000000..4bca8a28546c
--- /dev/null
+++ b/arch/frv/include/asm/scatterlist.h
@@ -0,0 +1,46 @@
1#ifndef _ASM_SCATTERLIST_H
2#define _ASM_SCATTERLIST_H
3
4#include <asm/types.h>
5
6/*
7 * Drivers must set either ->address or (preferred) page and ->offset
8 * to indicate where data must be transferred to/from.
9 *
10 * Using page is recommended since it handles highmem data as well as
11 * low mem. ->address is restricted to data which has a virtual mapping, and
12 * it will go away in the future. Updating to page can be automated very
13 * easily -- something like
14 *
15 * sg->address = some_ptr;
16 *
17 * can be rewritten as
18 *
19 * sg_set_buf(sg, some_ptr, length);
20 *
21 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
22 */
23struct scatterlist {
24#ifdef CONFIG_DEBUG_SG
25 unsigned long sg_magic;
26#endif
27 unsigned long page_link;
28 unsigned int offset; /* for highmem, page offset */
29
30 dma_addr_t dma_address;
31 unsigned int length;
32};
33
34/*
35 * These macros should be used after a pci_map_sg call has been done
36 * to get bus addresses of each of the SG entries and their lengths.
37 * You should only work with the number of sg entries pci_map_sg
38 * returns, or alternatively stop on the first sg_dma_len(sg) which
39 * is 0.
40 */
41#define sg_dma_address(sg) ((sg)->dma_address)
42#define sg_dma_len(sg) ((sg)->length)
43
44#define ISA_DMA_THRESHOLD (0xffffffffUL)
45
46#endif /* !_ASM_SCATTERLIST_H */
diff --git a/arch/frv/include/asm/sections.h b/arch/frv/include/asm/sections.h
new file mode 100644
index 000000000000..17d0fb171bba
--- /dev/null
+++ b/arch/frv/include/asm/sections.h
@@ -0,0 +1,46 @@
1/* sections.h: linkage layout variables
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SECTIONS_H
13#define _ASM_SECTIONS_H
14
15#ifndef __ASSEMBLY__
16
17#include <linux/types.h>
18#include <asm-generic/sections.h>
19
20#ifdef __KERNEL__
21
22/*
23 * we don't want to put variables in the GP-REL section if they're not used very much - that would
24 * be waste since GP-REL addressing is limited to GP16+/-2048
25 */
26#define __nongpreldata __attribute__((section(".data")))
27#define __nongprelbss __attribute__((section(".bss")))
28
29/*
30 * linker symbols
31 */
32extern const void __kernel_image_start, __kernel_image_end, __page_offset;
33
34extern unsigned long __nongprelbss memory_start;
35extern unsigned long __nongprelbss memory_end;
36extern unsigned long __nongprelbss rom_length;
37
38/* determine if we're running from ROM */
39static inline int is_in_rom(unsigned long addr)
40{
41 return 0; /* default case: not in ROM */
42}
43
44#endif
45#endif
46#endif /* _ASM_SECTIONS_H */
diff --git a/arch/frv/include/asm/segment.h b/arch/frv/include/asm/segment.h
new file mode 100644
index 000000000000..e3616a6f941d
--- /dev/null
+++ b/arch/frv/include/asm/segment.h
@@ -0,0 +1,45 @@
1/* segment.h: MMU segment settings
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SEGMENT_H
13#define _ASM_SEGMENT_H
14
15
16#ifndef __ASSEMBLY__
17
18typedef struct {
19 unsigned long seg;
20} mm_segment_t;
21
22#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
23
24#define KERNEL_DS MAKE_MM_SEG(0xdfffffffUL)
25
26#ifdef CONFIG_MMU
27#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1)
28#else
29#define USER_DS KERNEL_DS
30#endif
31
32#define get_ds() (KERNEL_DS)
33#define get_fs() (__current_thread_info->addr_limit)
34#define segment_eq(a,b) ((a).seg == (b).seg)
35#define __kernel_ds_p() segment_eq(get_fs(), KERNEL_DS)
36#define get_addr_limit() (get_fs().seg)
37
38#define set_fs(_x) \
39do { \
40 __current_thread_info->addr_limit = (_x); \
41} while(0)
42
43
44#endif /* __ASSEMBLY__ */
45#endif /* _ASM_SEGMENT_H */
diff --git a/arch/frv/include/asm/sembuf.h b/arch/frv/include/asm/sembuf.h
new file mode 100644
index 000000000000..164b12786d6d
--- /dev/null
+++ b/arch/frv/include/asm/sembuf.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
26
diff --git a/arch/frv/include/asm/serial-regs.h b/arch/frv/include/asm/serial-regs.h
new file mode 100644
index 000000000000..e1286bda00eb
--- /dev/null
+++ b/arch/frv/include/asm/serial-regs.h
@@ -0,0 +1,44 @@
1/* serial-regs.h: serial port registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <linux/serial_reg.h>
16#include <asm/irc-regs.h>
17
18#define SERIAL_ICLK 33333333 /* the target serial input clock */
19#define UART0_BASE 0xfeff9c00
20#define UART1_BASE 0xfeff9c40
21
22#define __get_UART0(R) ({ __reg(UART0_BASE + (R) * 8) >> 24; })
23#define __get_UART1(R) ({ __reg(UART1_BASE + (R) * 8) >> 24; })
24#define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0)
25#define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0)
26
27#define __get_UART0_LSR() ({ __get_UART0(UART_LSR); })
28#define __get_UART1_LSR() ({ __get_UART1(UART_LSR); })
29
30#define __set_UART0_IER(V) __set_UART0(UART_IER,(V))
31#define __set_UART1_IER(V) __set_UART1(UART_IER,(V))
32
33/* serial prescaler select register */
34#define __get_UCPSR() ({ *(volatile unsigned long *)(0xfeff9c90); })
35#define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0)
36#define UCPSR_SELECT0 0x07000000
37#define UCPSR_SELECT1 0x38000000
38
39/* serial prescaler base value register */
40#define __get_UCPVR() ({ *(volatile unsigned long *)(0xfeff9c98); mb(); })
41#define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0)
42
43
44#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/frv/include/asm/serial.h b/arch/frv/include/asm/serial.h
new file mode 100644
index 000000000000..dbb825998689
--- /dev/null
+++ b/arch/frv/include/asm/serial.h
@@ -0,0 +1,18 @@
1/*
2 * serial.h
3 *
4 * Copyright (C) 2003 Develer S.r.l. (http://www.develer.com/)
5 * Author: Bernardo Innocenti <bernie@codewiz.org>
6 *
7 * Based on linux/include/asm-i386/serial.h
8 */
9#include <asm/serial-regs.h>
10
11/*
12 * the base baud is derived from the clock speed and so is variable
13 */
14#define BASE_BAUD 0
15
16#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
17
18#define SERIAL_PORT_DFNS
diff --git a/arch/frv/include/asm/setup.h b/arch/frv/include/asm/setup.h
new file mode 100644
index 000000000000..afd787ceede6
--- /dev/null
+++ b/arch/frv/include/asm/setup.h
@@ -0,0 +1,31 @@
1/* setup.h: setup stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SETUP_H
13#define _ASM_SETUP_H
14
15#define COMMAND_LINE_SIZE 512
16
17#ifdef __KERNEL__
18
19#include <linux/init.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_MMU
24extern unsigned long __initdata num_mappedpages;
25#endif
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* __KERNEL__ */
30
31#endif /* _ASM_SETUP_H */
diff --git a/arch/frv/include/asm/shmbuf.h b/arch/frv/include/asm/shmbuf.h
new file mode 100644
index 000000000000..4c6e711a4779
--- /dev/null
+++ b/arch/frv/include/asm/shmbuf.h
@@ -0,0 +1,43 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
43
diff --git a/arch/frv/include/asm/shmparam.h b/arch/frv/include/asm/shmparam.h
new file mode 100644
index 000000000000..ab711009cfaa
--- /dev/null
+++ b/arch/frv/include/asm/shmparam.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
7
diff --git a/arch/frv/include/asm/sigcontext.h b/arch/frv/include/asm/sigcontext.h
new file mode 100644
index 000000000000..3b263f3cc96f
--- /dev/null
+++ b/arch/frv/include/asm/sigcontext.h
@@ -0,0 +1,26 @@
1/* sigcontext.h: FRV signal context
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14#include <asm/registers.h>
15
16/*
17 * Signal context structure - contains all info to do with the state
18 * before the signal handler was invoked. Note: only add new entries
19 * to the end of the structure.
20 */
21struct sigcontext {
22 struct user_context sc_context;
23 unsigned long sc_oldmask; /* old sigmask */
24} __attribute__((aligned(8)));
25
26#endif
diff --git a/arch/frv/include/asm/siginfo.h b/arch/frv/include/asm/siginfo.h
new file mode 100644
index 000000000000..d3fd1ca45653
--- /dev/null
+++ b/arch/frv/include/asm/siginfo.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_SIGINFO_H
2#define _ASM_SIGINFO_H
3
4#include <linux/types.h>
5#include <asm-generic/siginfo.h>
6
7#define FPE_MDAOVF (__SI_FAULT|9) /* media overflow */
8#undef NSIGFPE
9#define NSIGFPE 9
10
11#endif
12
diff --git a/arch/frv/include/asm/signal.h b/arch/frv/include/asm/signal.h
new file mode 100644
index 000000000000..2079197d483d
--- /dev/null
+++ b/arch/frv/include/asm/signal.h
@@ -0,0 +1,161 @@
1#ifndef _ASM_SIGNAL_H
2#define _ASM_SIGNAL_H
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifdef __KERNEL__
10/* Most things should be clean enough to redefine this at will, if care
11 is taken to make libc match. */
12
13#define _NSIG 64
14#define _NSIG_BPW 32
15#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
16
17typedef unsigned long old_sigset_t; /* at least 32 bits */
18
19typedef struct {
20 unsigned long sig[_NSIG_WORDS];
21} sigset_t;
22
23#else
24/* Here we must cater to libcs that poke about in kernel headers. */
25
26#define NSIG 32
27typedef unsigned long sigset_t;
28
29#endif /* __KERNEL__ */
30
31#define SIGHUP 1
32#define SIGINT 2
33#define SIGQUIT 3
34#define SIGILL 4
35#define SIGTRAP 5
36#define SIGABRT 6
37#define SIGIOT 6
38#define SIGBUS 7
39#define SIGFPE 8
40#define SIGKILL 9
41#define SIGUSR1 10
42#define SIGSEGV 11
43#define SIGUSR2 12
44#define SIGPIPE 13
45#define SIGALRM 14
46#define SIGTERM 15
47#define SIGSTKFLT 16
48#define SIGCHLD 17
49#define SIGCONT 18
50#define SIGSTOP 19
51#define SIGTSTP 20
52#define SIGTTIN 21
53#define SIGTTOU 22
54#define SIGURG 23
55#define SIGXCPU 24
56#define SIGXFSZ 25
57#define SIGVTALRM 26
58#define SIGPROF 27
59#define SIGWINCH 28
60#define SIGIO 29
61#define SIGPOLL SIGIO
62/*
63#define SIGLOST 29
64*/
65#define SIGPWR 30
66#define SIGSYS 31
67#define SIGUNUSED 31
68
69/* These should not be considered constants from userland. */
70#define SIGRTMIN 32
71#define SIGRTMAX (_NSIG-1)
72
73/*
74 * SA_FLAGS values:
75 *
76 * SA_ONSTACK indicates that a registered stack_t will be used.
77 * SA_RESTART flag to get restarting signals (which were the default long ago)
78 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
79 * SA_RESETHAND clears the handler when the signal is delivered.
80 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
81 * SA_NODEFER prevents the current signal from being masked in the handler.
82 *
83 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
84 * Unix names RESETHAND and NODEFER respectively.
85 */
86#define SA_NOCLDSTOP 0x00000001
87#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
88#define SA_SIGINFO 0x00000004
89#define SA_ONSTACK 0x08000000
90#define SA_RESTART 0x10000000
91#define SA_NODEFER 0x40000000
92#define SA_RESETHAND 0x80000000
93
94#define SA_NOMASK SA_NODEFER
95#define SA_ONESHOT SA_RESETHAND
96
97#define SA_RESTORER 0x04000000
98
99/*
100 * sigaltstack controls
101 */
102#define SS_ONSTACK 1
103#define SS_DISABLE 2
104
105#define MINSIGSTKSZ 2048
106#define SIGSTKSZ 8192
107
108#include <asm-generic/signal.h>
109
110#ifdef __KERNEL__
111struct old_sigaction {
112 __sighandler_t sa_handler;
113 old_sigset_t sa_mask;
114 unsigned long sa_flags;
115 __sigrestore_t sa_restorer;
116};
117
118struct sigaction {
119 __sighandler_t sa_handler;
120 unsigned long sa_flags;
121 __sigrestore_t sa_restorer;
122 sigset_t sa_mask; /* mask last for extensibility */
123};
124
125struct k_sigaction {
126 struct sigaction sa;
127};
128#else
129/* Here we must cater to libcs that poke about in kernel headers. */
130
131struct sigaction {
132 union {
133 __sighandler_t _sa_handler;
134 void (*_sa_sigaction)(int, struct siginfo *, void *);
135 } _u;
136 sigset_t sa_mask;
137 unsigned long sa_flags;
138 void (*sa_restorer)(void);
139};
140
141#define sa_handler _u._sa_handler
142#define sa_sigaction _u._sa_sigaction
143
144#endif /* __KERNEL__ */
145
146typedef struct sigaltstack {
147 void __user *ss_sp;
148 int ss_flags;
149 size_t ss_size;
150} stack_t;
151
152#define ptrace_signal_deliver(regs, cookie) do { } while (0)
153
154#ifdef __KERNEL__
155
156#include <asm/sigcontext.h>
157#undef __HAVE_ARCH_SIG_BITOPS
158
159#endif /* __KERNEL__ */
160
161#endif /* _ASM_SIGNAL_H */
diff --git a/arch/frv/include/asm/smp.h b/arch/frv/include/asm/smp.h
new file mode 100644
index 000000000000..38349ec8b61b
--- /dev/null
+++ b/arch/frv/include/asm/smp.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#ifdef CONFIG_SMP
6#error SMP not supported
7#endif
8
9#endif
diff --git a/arch/frv/include/asm/socket.h b/arch/frv/include/asm/socket.h
new file mode 100644
index 000000000000..57c3d4054e8b
--- /dev/null
+++ b/arch/frv/include/asm/socket.h
@@ -0,0 +1,61 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
61
diff --git a/arch/frv/include/asm/sockios.h b/arch/frv/include/asm/sockios.h
new file mode 100644
index 000000000000..5dbdd13e6de3
--- /dev/null
+++ b/arch/frv/include/asm/sockios.h
@@ -0,0 +1,14 @@
1#ifndef _ASM_SOCKIOS__
2#define _ASM_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS__ */
14
diff --git a/arch/frv/include/asm/spinlock.h b/arch/frv/include/asm/spinlock.h
new file mode 100644
index 000000000000..fe385f45d1fd
--- /dev/null
+++ b/arch/frv/include/asm/spinlock.h
@@ -0,0 +1,17 @@
1/* spinlock.h: spinlocks for FR-V
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPINLOCK_H
13#define _ASM_SPINLOCK_H
14
15#error no spinlocks for FR-V yet
16
17#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/frv/include/asm/spr-regs.h b/arch/frv/include/asm/spr-regs.h
new file mode 100644
index 000000000000..01e6af5e99b8
--- /dev/null
+++ b/arch/frv/include/asm/spr-regs.h
@@ -0,0 +1,416 @@
1/* spr-regs.h: special-purpose registers on the FRV
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPR_REGS_H
13#define _ASM_SPR_REGS_H
14
15/*
16 * PSR - Processor Status Register
17 */
18#define PSR_ET 0x00000001 /* enable interrupts/exceptions flag */
19#define PSR_PS 0x00000002 /* previous supervisor mode flag */
20#define PSR_S 0x00000004 /* supervisor mode flag */
21#define PSR_PIL 0x00000078 /* processor external interrupt level */
22#define PSR_PIL_0 0x00000000 /* - no interrupt in progress */
23#define PSR_PIL_13 0x00000068 /* - debugging only */
24#define PSR_PIL_14 0x00000070 /* - debugging in progress */
25#define PSR_PIL_15 0x00000078 /* - NMI in progress */
26#define PSR_EM 0x00000080 /* enable media operation */
27#define PSR_EF 0x00000100 /* enable FPU operation */
28#define PSR_BE 0x00001000 /* endianness mode */
29#define PSR_BE_LE 0x00000000 /* - little endian mode */
30#define PSR_BE_BE 0x00001000 /* - big endian mode */
31#define PSR_CM 0x00002000 /* conditional mode */
32#define PSR_NEM 0x00004000 /* non-excepting mode */
33#define PSR_ICE 0x00010000 /* in-circuit emulation mode */
34#define PSR_VERSION_SHIFT 24 /* CPU silicon ID */
35#define PSR_IMPLE_SHIFT 28 /* CPU core ID */
36
37#define PSR_VERSION(psr) (((psr) >> PSR_VERSION_SHIFT) & 0xf)
38#define PSR_IMPLE(psr) (((psr) >> PSR_IMPLE_SHIFT) & 0xf)
39
40#define PSR_IMPLE_FR401 0x2
41#define PSR_VERSION_FR401_MB93401 0x0
42#define PSR_VERSION_FR401_MB93401A 0x1
43#define PSR_VERSION_FR401_MB93403 0x2
44
45#define PSR_IMPLE_FR405 0x4
46#define PSR_VERSION_FR405_MB93405 0x0
47
48#define PSR_IMPLE_FR451 0x5
49#define PSR_VERSION_FR451_MB93451 0x0
50
51#define PSR_IMPLE_FR501 0x1
52#define PSR_VERSION_FR501_MB93501 0x1
53#define PSR_VERSION_FR501_MB93501A 0x2
54
55#define PSR_IMPLE_FR551 0x3
56#define PSR_VERSION_FR551_MB93555 0x1
57
58#define __get_PSR() ({ unsigned long x; asm volatile("movsg psr,%0" : "=r"(x)); x; })
59#define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0)
60
61/*
62 * TBR - Trap Base Register
63 */
64#define TBR_TT 0x00000ff0
65#define TBR_TT_INSTR_MMU_MISS (0x01 << 4)
66#define TBR_TT_INSTR_ACC_ERROR (0x02 << 4)
67#define TBR_TT_INSTR_ACC_EXCEP (0x03 << 4)
68#define TBR_TT_PRIV_INSTR (0x06 << 4)
69#define TBR_TT_ILLEGAL_INSTR (0x07 << 4)
70#define TBR_TT_FP_EXCEPTION (0x0d << 4)
71#define TBR_TT_MP_EXCEPTION (0x0e << 4)
72#define TBR_TT_DATA_ACC_ERROR (0x11 << 4)
73#define TBR_TT_DATA_MMU_MISS (0x12 << 4)
74#define TBR_TT_DATA_ACC_EXCEP (0x13 << 4)
75#define TBR_TT_DATA_STR_ERROR (0x14 << 4)
76#define TBR_TT_DIVISION_EXCEP (0x17 << 4)
77#define TBR_TT_COMMIT_EXCEP (0x19 << 4)
78#define TBR_TT_INSTR_TLB_MISS (0x1a << 4)
79#define TBR_TT_DATA_TLB_MISS (0x1b << 4)
80#define TBR_TT_DATA_DAT_EXCEP (0x1d << 4)
81#define TBR_TT_DECREMENT_TIMER (0x1f << 4)
82#define TBR_TT_COMPOUND_EXCEP (0x20 << 4)
83#define TBR_TT_INTERRUPT_1 (0x21 << 4)
84#define TBR_TT_INTERRUPT_2 (0x22 << 4)
85#define TBR_TT_INTERRUPT_3 (0x23 << 4)
86#define TBR_TT_INTERRUPT_4 (0x24 << 4)
87#define TBR_TT_INTERRUPT_5 (0x25 << 4)
88#define TBR_TT_INTERRUPT_6 (0x26 << 4)
89#define TBR_TT_INTERRUPT_7 (0x27 << 4)
90#define TBR_TT_INTERRUPT_8 (0x28 << 4)
91#define TBR_TT_INTERRUPT_9 (0x29 << 4)
92#define TBR_TT_INTERRUPT_10 (0x2a << 4)
93#define TBR_TT_INTERRUPT_11 (0x2b << 4)
94#define TBR_TT_INTERRUPT_12 (0x2c << 4)
95#define TBR_TT_INTERRUPT_13 (0x2d << 4)
96#define TBR_TT_INTERRUPT_14 (0x2e << 4)
97#define TBR_TT_INTERRUPT_15 (0x2f << 4)
98#define TBR_TT_TRAP0 (0x80 << 4)
99#define TBR_TT_TRAP1 (0x81 << 4)
100#define TBR_TT_TRAP2 (0x82 << 4)
101#define TBR_TT_TRAP3 (0x83 << 4)
102#define TBR_TT_TRAP120 (0xf8 << 4)
103#define TBR_TT_TRAP121 (0xf9 << 4)
104#define TBR_TT_TRAP122 (0xfa << 4)
105#define TBR_TT_TRAP123 (0xfb << 4)
106#define TBR_TT_TRAP124 (0xfc << 4)
107#define TBR_TT_TRAP125 (0xfd << 4)
108#define TBR_TT_TRAP126 (0xfe << 4)
109#define TBR_TT_BREAK (0xff << 4)
110
111#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
112#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
113#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
114#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
115#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
116#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
117#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
118
119#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
120
121/*
122 * HSR0 - Hardware Status Register 0
123 */
124#define HSR0_PDM 0x00000007 /* power down mode */
125#define HSR0_PDM_NORMAL 0x00000000 /* - normal mode */
126#define HSR0_PDM_CORE_SLEEP 0x00000001 /* - CPU core sleep mode */
127#define HSR0_PDM_BUS_SLEEP 0x00000003 /* - bus sleep mode */
128#define HSR0_PDM_PLL_RUN 0x00000005 /* - PLL run */
129#define HSR0_PDM_PLL_STOP 0x00000007 /* - PLL stop */
130#define HSR0_GRLE 0x00000040 /* GR lower register set enable */
131#define HSR0_GRHE 0x00000080 /* GR higher register set enable */
132#define HSR0_FRLE 0x00000100 /* FR lower register set enable */
133#define HSR0_FRHE 0x00000200 /* FR higher register set enable */
134#define HSR0_GRN 0x00000400 /* GR quantity */
135#define HSR0_GRN_64 0x00000000 /* - 64 GR registers */
136#define HSR0_GRN_32 0x00000400 /* - 32 GR registers */
137#define HSR0_FRN 0x00000800 /* FR quantity */
138#define HSR0_FRN_64 0x00000000 /* - 64 FR registers */
139#define HSR0_FRN_32 0x00000800 /* - 32 FR registers */
140#define HSR0_SA 0x00001000 /* start address (RAMBOOT#) */
141#define HSR0_ETMI 0x00008000 /* enable TIMERI (64-bit up timer) */
142#define HSR0_ETMD 0x00004000 /* enable TIMERD (32-bit down timer) */
143#define HSR0_PEDAT 0x00010000 /* previous DAT mode */
144#define HSR0_XEDAT 0x00020000 /* exception DAT mode */
145#define HSR0_EDAT 0x00080000 /* enable DAT mode */
146#define HSR0_RME 0x00400000 /* enable RAM mode */
147#define HSR0_EMEM 0x00800000 /* enable MMU_Miss mask */
148#define HSR0_EXMMU 0x01000000 /* enable extended MMU mode */
149#define HSR0_EDMMU 0x02000000 /* enable data MMU */
150#define HSR0_EIMMU 0x04000000 /* enable instruction MMU */
151#define HSR0_CBM 0x08000000 /* copy back mode */
152#define HSR0_CBM_WRITE_THRU 0x00000000 /* - write through */
153#define HSR0_CBM_COPY_BACK 0x08000000 /* - copy back */
154#define HSR0_NWA 0x10000000 /* no write allocate */
155#define HSR0_DCE 0x40000000 /* data cache enable */
156#define HSR0_ICE 0x80000000 /* instruction cache enable */
157
158#define __get_HSR(R) ({ unsigned long x; asm volatile("movsg hsr"#R",%0" : "=r"(x)); x; })
159#define __set_HSR(R,V) do { asm volatile("movgs %0,hsr"#R : : "r"(V)); } while(0)
160
161/*
162 * CCR - Condition Codes Register
163 */
164#define CCR_FCC0 0x0000000f /* FP/Media condition 0 (fcc0 reg) */
165#define CCR_FCC1 0x000000f0 /* FP/Media condition 1 (fcc1 reg) */
166#define CCR_FCC2 0x00000f00 /* FP/Media condition 2 (fcc2 reg) */
167#define CCR_FCC3 0x0000f000 /* FP/Media condition 3 (fcc3 reg) */
168#define CCR_ICC0 0x000f0000 /* Integer condition 0 (icc0 reg) */
169#define CCR_ICC0_C 0x00010000 /* - Carry flag */
170#define CCR_ICC0_V 0x00020000 /* - Overflow flag */
171#define CCR_ICC0_Z 0x00040000 /* - Zero flag */
172#define CCR_ICC0_N 0x00080000 /* - Negative flag */
173#define CCR_ICC1 0x00f00000 /* Integer condition 1 (icc1 reg) */
174#define CCR_ICC2 0x0f000000 /* Integer condition 2 (icc2 reg) */
175#define CCR_ICC3 0xf0000000 /* Integer condition 3 (icc3 reg) */
176
177/*
178 * CCCR - Condition Codes for Conditional Instructions Register
179 */
180#define CCCR_CC0 0x00000003 /* condition 0 (cc0 reg) */
181#define CCCR_CC0_FALSE 0x00000002 /* - condition is false */
182#define CCCR_CC0_TRUE 0x00000003 /* - condition is true */
183#define CCCR_CC1 0x0000000c /* condition 1 (cc1 reg) */
184#define CCCR_CC2 0x00000030 /* condition 2 (cc2 reg) */
185#define CCCR_CC3 0x000000c0 /* condition 3 (cc3 reg) */
186#define CCCR_CC4 0x00000300 /* condition 4 (cc4 reg) */
187#define CCCR_CC5 0x00000c00 /* condition 5 (cc5 reg) */
188#define CCCR_CC6 0x00003000 /* condition 6 (cc6 reg) */
189#define CCCR_CC7 0x0000c000 /* condition 7 (cc7 reg) */
190
191/*
192 * ISR - Integer Status Register
193 */
194#define ISR_EMAM 0x00000001 /* memory misaligned access handling */
195#define ISR_EMAM_EXCEPTION 0x00000000 /* - generate exception */
196#define ISR_EMAM_FUDGE 0x00000001 /* - mask out invalid address bits */
197#define ISR_AEXC 0x00000004 /* accrued [overflow] exception */
198#define ISR_DTT 0x00000018 /* division type trap */
199#define ISR_DTT_IGNORE 0x00000000 /* - ignore division error */
200#define ISR_DTT_DIVBYZERO 0x00000008 /* - generate exception */
201#define ISR_DTT_OVERFLOW 0x00000010 /* - record overflow */
202#define ISR_EDE 0x00000020 /* enable division exception */
203#define ISR_PLI 0x20000000 /* pre-load instruction information */
204#define ISR_QI 0x80000000 /* quad data implementation information */
205
206/*
207 * EPCR0 - Exception PC Register
208 */
209#define EPCR0_V 0x00000001 /* register content validity indicator */
210#define EPCR0_PC 0xfffffffc /* faulting instruction address */
211
212/*
213 * ESR0/14/15 - Exception Status Register
214 */
215#define ESRx_VALID 0x00000001 /* register content validity indicator */
216#define ESRx_EC 0x0000003e /* exception type */
217#define ESRx_EC_DATA_STORE 0x00000000 /* - data_store_error */
218#define ESRx_EC_INSN_ACCESS 0x00000006 /* - instruction_access_error */
219#define ESRx_EC_PRIV_INSN 0x00000008 /* - privileged_instruction */
220#define ESRx_EC_ILL_INSN 0x0000000a /* - illegal_instruction */
221#define ESRx_EC_MP_EXCEP 0x0000001c /* - mp_exception */
222#define ESRx_EC_DATA_ACCESS 0x00000020 /* - data_access_error */
223#define ESRx_EC_DIVISION 0x00000026 /* - division_exception */
224#define ESRx_EC_ITLB_MISS 0x00000034 /* - instruction_access_TLB_miss */
225#define ESRx_EC_DTLB_MISS 0x00000036 /* - data_access_TLB_miss */
226#define ESRx_EC_DATA_ACCESS_DAT 0x0000003a /* - data_access_DAT_exception */
227
228#define ESR0_IAEC 0x00000100 /* info for instruction-access-exception */
229#define ESR0_IAEC_RESV 0x00000000 /* - reserved */
230#define ESR0_IAEC_PROT_VIOL 0x00000100 /* - protection violation */
231
232#define ESR0_ATXC 0x00f00000 /* address translation exception code */
233#define ESR0_ATXC_MMU_MISS 0x00000000 /* - MMU miss exception and more (?) */
234#define ESR0_ATXC_MULTI_DAT 0x00800000 /* - multiple DAT entry hit */
235#define ESR0_ATXC_MULTI_SAT 0x00900000 /* - multiple SAT entry hit */
236#define ESR0_ATXC_AMRTLB_MISS 0x00a00000 /* - MMU/TLB miss exception */
237#define ESR0_ATXC_PRIV_EXCEP 0x00c00000 /* - privilege protection fault */
238#define ESR0_ATXC_WP_EXCEP 0x00d00000 /* - write protection fault */
239
240#define ESR0_EAV 0x00000800 /* true if EAR0 register valid */
241#define ESR15_EAV 0x00000800 /* true if EAR15 register valid */
242
243/*
244 * ESFR1 - Exception Status Valid Flag Register
245 */
246#define ESFR1_ESR0 0x00000001 /* true if ESR0 is valid */
247#define ESFR1_ESR14 0x00004000 /* true if ESR14 is valid */
248#define ESFR1_ESR15 0x00008000 /* true if ESR15 is valid */
249
250/*
251 * MSR - Media Status Register
252 */
253#define MSR0_AOVF 0x00000001 /* overflow exception accrued */
254#define MSRx_OVF 0x00000002 /* overflow exception detected */
255#define MSRx_SIE 0x0000003c /* last SIMD instruction exception detected */
256#define MSRx_SIE_NONE 0x00000000 /* - none detected */
257#define MSRx_SIE_FRkHI_ACCk 0x00000020 /* - exception at FRkHI or ACCk */
258#define MSRx_SIE_FRkLO_ACCk1 0x00000010 /* - exception at FRkLO or ACCk+1 */
259#define MSRx_SIE_FRk1HI_ACCk2 0x00000008 /* - exception at FRk+1HI or ACCk+2 */
260#define MSRx_SIE_FRk1LO_ACCk3 0x00000004 /* - exception at FRk+1LO or ACCk+3 */
261#define MSR0_MTT 0x00007000 /* type of last media trap detected */
262#define MSR0_MTT_NONE 0x00000000 /* - none detected */
263#define MSR0_MTT_OVERFLOW 0x00001000 /* - overflow detected */
264#define MSR0_HI 0x00c00000 /* hardware implementation */
265#define MSR0_HI_ROUNDING 0x00000000 /* - rounding mode */
266#define MSR0_HI_NONROUNDING 0x00c00000 /* - non-rounding mode */
267#define MSR0_EMCI 0x01000000 /* enable media custom instructions */
268#define MSR0_SRDAV 0x10000000 /* select rounding mode of MAVEH */
269#define MSR0_SRDAV_RDAV 0x00000000 /* - controlled by MSR.RDAV */
270#define MSR0_SRDAV_RD 0x10000000 /* - controlled by MSR.RD */
271#define MSR0_RDAV 0x20000000 /* rounding mode of MAVEH */
272#define MSR0_RDAV_NEAREST_MI 0x00000000 /* - round to nearest minus */
273#define MSR0_RDAV_NEAREST_PL 0x20000000 /* - round to nearest plus */
274#define MSR0_RD 0xc0000000 /* rounding mode */
275#define MSR0_RD_NEAREST 0x00000000 /* - nearest */
276#define MSR0_RD_ZERO 0x40000000 /* - zero */
277#define MSR0_RD_POS_INF 0x80000000 /* - postive infinity */
278#define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */
279
280/*
281 * IAMPR0-7 - Instruction Address Mapping Register
282 * DAMPR0-7 - Data Address Mapping Register
283 */
284#define xAMPRx_V 0x00000001 /* register content validity indicator */
285#define DAMPRx_WP 0x00000002 /* write protect */
286#define DAMPRx_WP_RW 0x00000000 /* - read/write */
287#define DAMPRx_WP_RO 0x00000002 /* - read-only */
288#define xAMPRx_C 0x00000004 /* cached/uncached */
289#define xAMPRx_C_CACHED 0x00000000 /* - cached */
290#define xAMPRx_C_UNCACHED 0x00000004 /* - uncached */
291#define xAMPRx_S 0x00000008 /* supervisor only */
292#define xAMPRx_S_USER 0x00000000 /* - userspace can access */
293#define xAMPRx_S_KERNEL 0x00000008 /* - kernel only */
294#define xAMPRx_SS 0x000000f0 /* segment size */
295#define xAMPRx_SS_16Kb 0x00000000 /* - 16 kilobytes */
296#define xAMPRx_SS_64Kb 0x00000010 /* - 64 kilobytes */
297#define xAMPRx_SS_256Kb 0x00000020 /* - 256 kilobytes */
298#define xAMPRx_SS_1Mb 0x00000030 /* - 1 megabyte */
299#define xAMPRx_SS_2Mb 0x00000040 /* - 2 megabytes */
300#define xAMPRx_SS_4Mb 0x00000050 /* - 4 megabytes */
301#define xAMPRx_SS_8Mb 0x00000060 /* - 8 megabytes */
302#define xAMPRx_SS_16Mb 0x00000070 /* - 16 megabytes */
303#define xAMPRx_SS_32Mb 0x00000080 /* - 32 megabytes */
304#define xAMPRx_SS_64Mb 0x00000090 /* - 64 megabytes */
305#define xAMPRx_SS_128Mb 0x000000a0 /* - 128 megabytes */
306#define xAMPRx_SS_256Mb 0x000000b0 /* - 256 megabytes */
307#define xAMPRx_SS_512Mb 0x000000c0 /* - 512 megabytes */
308#define xAMPRx_RESERVED8 0x00000100 /* reserved bit */
309#define xAMPRx_NG 0x00000200 /* non-global */
310#define xAMPRx_L 0x00000400 /* locked */
311#define xAMPRx_M 0x00000800 /* modified */
312#define xAMPRx_D 0x00001000 /* DAT entry */
313#define xAMPRx_RESERVED13 0x00002000 /* reserved bit */
314#define xAMPRx_PPFN 0xfff00000 /* physical page frame number */
315
316#define xAMPRx_V_BIT 0
317#define DAMPRx_WP_BIT 1
318#define xAMPRx_C_BIT 2
319#define xAMPRx_S_BIT 3
320#define xAMPRx_RESERVED8_BIT 8
321#define xAMPRx_NG_BIT 9
322#define xAMPRx_L_BIT 10
323#define xAMPRx_M_BIT 11
324#define xAMPRx_D_BIT 12
325#define xAMPRx_RESERVED13_BIT 13
326
327#define __get_IAMPR(R) ({ unsigned long x; asm volatile("movsg iampr"#R",%0" : "=r"(x)); x; })
328#define __get_DAMPR(R) ({ unsigned long x; asm volatile("movsg dampr"#R",%0" : "=r"(x)); x; })
329
330#define __get_IAMLR(R) ({ unsigned long x; asm volatile("movsg iamlr"#R",%0" : "=r"(x)); x; })
331#define __get_DAMLR(R) ({ unsigned long x; asm volatile("movsg damlr"#R",%0" : "=r"(x)); x; })
332
333#define __set_IAMPR(R,V) do { asm volatile("movgs %0,iampr"#R : : "r"(V)); } while(0)
334#define __set_DAMPR(R,V) do { asm volatile("movgs %0,dampr"#R : : "r"(V)); } while(0)
335
336#define __set_IAMLR(R,V) do { asm volatile("movgs %0,iamlr"#R : : "r"(V)); } while(0)
337#define __set_DAMLR(R,V) do { asm volatile("movgs %0,damlr"#R : : "r"(V)); } while(0)
338
339#define save_dampr(R, _dampr) \
340do { \
341 asm volatile("movsg dampr"R",%0" : "=r"(_dampr)); \
342} while(0)
343
344#define restore_dampr(R, _dampr) \
345do { \
346 asm volatile("movgs %0,dampr"R :: "r"(_dampr)); \
347} while(0)
348
349/*
350 * AMCR - Address Mapping Control Register
351 */
352#define AMCR_IAMRN 0x000000ff /* quantity of IAMPR registers */
353#define AMCR_DAMRN 0x0000ff00 /* quantity of DAMPR registers */
354
355/*
356 * TTBR - Address Translation Table Base Register
357 */
358#define __get_TTBR() ({ unsigned long x; asm volatile("movsg ttbr,%0" : "=r"(x)); x; })
359
360/*
361 * TPXR - TLB Probe Extend Register
362 */
363#define TPXR_E 0x00000001
364#define TPXR_LMAX_SHIFT 20
365#define TPXR_LMAX_SMASK 0xf
366#define TPXR_WMAX_SHIFT 24
367#define TPXR_WMAX_SMASK 0xf
368#define TPXR_WAY_SHIFT 28
369#define TPXR_WAY_SMASK 0xf
370
371/*
372 * DCR - Debug Control Register
373 */
374#define DCR_IBCE3 0x00000001 /* break on conditional insn pointed to by IBAR3 */
375#define DCR_IBE3 0x00000002 /* break on insn pointed to by IBAR3 */
376#define DCR_IBCE1 0x00000004 /* break on conditional insn pointed to by IBAR2 */
377#define DCR_IBE1 0x00000008 /* break on insn pointed to by IBAR2 */
378#define DCR_IBCE2 0x00000010 /* break on conditional insn pointed to by IBAR1 */
379#define DCR_IBE2 0x00000020 /* break on insn pointed to by IBAR1 */
380#define DCR_IBCE0 0x00000040 /* break on conditional insn pointed to by IBAR0 */
381#define DCR_IBE0 0x00000080 /* break on insn pointed to by IBAR0 */
382
383#define DCR_DDBE1 0x00004000 /* use DBDR1x when checking DBAR1 */
384#define DCR_DWBE1 0x00008000 /* break on store to address in DBAR1/DBMR1x */
385#define DCR_DRBE1 0x00010000 /* break on load from address in DBAR1/DBMR1x */
386#define DCR_DDBE0 0x00020000 /* use DBDR0x when checking DBAR0 */
387#define DCR_DWBE0 0x00040000 /* break on store to address in DBAR0/DBMR0x */
388#define DCR_DRBE0 0x00080000 /* break on load from address in DBAR0/DBMR0x */
389
390#define DCR_EIM 0x0c000000 /* external interrupt disable */
391#define DCR_IBM 0x10000000 /* instruction break disable */
392#define DCR_SE 0x20000000 /* single step enable */
393#define DCR_EBE 0x40000000 /* exception break enable */
394
395/*
396 * BRR - Break Interrupt Request Register
397 */
398#define BRR_ST 0x00000001 /* single-step detected */
399#define BRR_SB 0x00000002 /* break instruction detected */
400#define BRR_BB 0x00000004 /* branch with hint detected */
401#define BRR_CBB 0x00000008 /* branch to LR detected */
402#define BRR_IBx 0x000000f0 /* hardware breakpoint detected */
403#define BRR_DBx 0x00000f00 /* hardware watchpoint detected */
404#define BRR_DBNEx 0x0000f000 /* ? */
405#define BRR_EBTT 0x00ff0000 /* trap type of exception break */
406#define BRR_TB 0x10000000 /* external break request detected */
407#define BRR_CB 0x20000000 /* ICE break command detected */
408#define BRR_EB 0x40000000 /* exception break detected */
409
410/*
411 * BPSR - Break PSR Save Register
412 */
413#define BPSR_BET 0x00000001 /* former PSR.ET */
414#define BPSR_BS 0x00001000 /* former PSR.S */
415
416#endif /* _ASM_SPR_REGS_H */
diff --git a/arch/frv/include/asm/stat.h b/arch/frv/include/asm/stat.h
new file mode 100644
index 000000000000..ce56de9b37ba
--- /dev/null
+++ b/arch/frv/include/asm/stat.h
@@ -0,0 +1,100 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18/* This matches struct stat in uClibc/glibc. */
19struct stat {
20 unsigned char __pad1[6];
21 unsigned short st_dev;
22
23 unsigned long __pad2;
24 unsigned long st_ino;
25
26 unsigned short __pad3;
27 unsigned short st_mode;
28 unsigned short __pad4;
29 unsigned short st_nlink;
30
31 unsigned short __pad5;
32 unsigned short st_uid;
33 unsigned short __pad6;
34 unsigned short st_gid;
35
36 unsigned char __pad7[6];
37 unsigned short st_rdev;
38
39 unsigned long __pad8;
40 unsigned long st_size;
41
42 unsigned long __pad9; /* align 64-bit st_blocks to 2-word */
43 unsigned long st_blksize;
44
45 unsigned long __pad10; /* future possible st_blocks high bits */
46 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
47
48 unsigned long __unused1;
49 unsigned long st_atime;
50
51 unsigned long __unused2;
52 unsigned long st_mtime;
53
54 unsigned long __unused3;
55 unsigned long st_ctime;
56
57 unsigned long long __unused4;
58};
59
60/* This matches struct stat64 in uClibc/glibc. The layout is exactly
61 the same as that of struct stat above, with 64-bit types taking up
62 space that was formerly used by padding. stat syscalls are still
63 different from stat64, though, in that the former tests for
64 overflow. */
65struct stat64 {
66 unsigned char __pad1[6];
67 unsigned short st_dev;
68
69 unsigned long long st_ino;
70
71 unsigned int st_mode;
72 unsigned int st_nlink;
73
74 unsigned long st_uid;
75 unsigned long st_gid;
76
77 unsigned char __pad2[6];
78 unsigned short st_rdev;
79
80 long long st_size;
81
82 unsigned long __pad3; /* align 64-bit st_blocks to 2-word */
83 unsigned long st_blksize;
84
85 unsigned long __pad4; /* future possible st_blocks high bits */
86 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
87
88 unsigned long st_atime_nsec;
89 unsigned long st_atime;
90
91 unsigned int st_mtime_nsec;
92 unsigned long st_mtime;
93
94 unsigned long st_ctime_nsec;
95 unsigned long st_ctime;
96
97 unsigned long long __unused4;
98};
99
100#endif /* _ASM_STAT_H */
diff --git a/arch/frv/include/asm/statfs.h b/arch/frv/include/asm/statfs.h
new file mode 100644
index 000000000000..741f586045ba
--- /dev/null
+++ b/arch/frv/include/asm/statfs.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_STATFS_H
2#define _ASM_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_STATFS_H */
7
diff --git a/arch/frv/include/asm/string.h b/arch/frv/include/asm/string.h
new file mode 100644
index 000000000000..5ed310f64b7e
--- /dev/null
+++ b/arch/frv/include/asm/string.h
@@ -0,0 +1,51 @@
1/* string.h: FRV string handling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_STRING_H_
13#define _ASM_STRING_H_
14
15#ifdef __KERNEL__ /* only set these up for kernel code */
16
17#define __HAVE_ARCH_MEMSET 1
18#define __HAVE_ARCH_MEMCPY 1
19
20extern void *memset(void *, int, __kernel_size_t);
21extern void *memcpy(void *, const void *, __kernel_size_t);
22
23#else /* KERNEL */
24
25/*
26 * let user libraries deal with these,
27 * IMHO the kernel has no place defining these functions for user apps
28 */
29
30#define __HAVE_ARCH_STRCPY 1
31#define __HAVE_ARCH_STRNCPY 1
32#define __HAVE_ARCH_STRCAT 1
33#define __HAVE_ARCH_STRNCAT 1
34#define __HAVE_ARCH_STRCMP 1
35#define __HAVE_ARCH_STRNCMP 1
36#define __HAVE_ARCH_STRNICMP 1
37#define __HAVE_ARCH_STRCHR 1
38#define __HAVE_ARCH_STRRCHR 1
39#define __HAVE_ARCH_STRSTR 1
40#define __HAVE_ARCH_STRLEN 1
41#define __HAVE_ARCH_STRNLEN 1
42#define __HAVE_ARCH_MEMSET 1
43#define __HAVE_ARCH_MEMCPY 1
44#define __HAVE_ARCH_MEMMOVE 1
45#define __HAVE_ARCH_MEMSCAN 1
46#define __HAVE_ARCH_MEMCMP 1
47#define __HAVE_ARCH_MEMCHR 1
48#define __HAVE_ARCH_STRTOK 1
49
50#endif /* KERNEL */
51#endif /* _ASM_STRING_H_ */
diff --git a/arch/frv/include/asm/suspend.h b/arch/frv/include/asm/suspend.h
new file mode 100644
index 000000000000..5fa7b5a6ee40
--- /dev/null
+++ b/arch/frv/include/asm/suspend.h
@@ -0,0 +1,20 @@
1/* suspend.h: suspension stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SUSPEND_H
13#define _ASM_SUSPEND_H
14
15static inline int arch_prepare_suspend(void)
16{
17 return 0;
18}
19
20#endif /* _ASM_SUSPEND_H */
diff --git a/arch/frv/include/asm/swab.h b/arch/frv/include/asm/swab.h
new file mode 100644
index 000000000000..f305834b4799
--- /dev/null
+++ b/arch/frv/include/asm/swab.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_SWAB_H
2#define _ASM_SWAB_H
3
4#include <linux/types.h>
5
6#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_SWAB_H */
diff --git a/arch/frv/include/asm/system.h b/arch/frv/include/asm/system.h
new file mode 100644
index 000000000000..7742ec000cc4
--- /dev/null
+++ b/arch/frv/include/asm/system.h
@@ -0,0 +1,301 @@
1/* system.h: FR-V CPU control definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SYSTEM_H
13#define _ASM_SYSTEM_H
14
15#include <linux/types.h>
16#include <linux/linkage.h>
17#include <linux/kernel.h>
18
19struct thread_struct;
20
21/*
22 * switch_to(prev, next) should switch from task `prev' to `next'
23 * `prev' will never be the same as `next'.
24 * The `mb' is to tell GCC not to cache `current' across this call.
25 */
26extern asmlinkage
27struct task_struct *__switch_to(struct thread_struct *prev_thread,
28 struct thread_struct *next_thread,
29 struct task_struct *prev);
30
31#define switch_to(prev, next, last) \
32do { \
33 (prev)->thread.sched_lr = \
34 (unsigned long) __builtin_return_address(0); \
35 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
36 mb(); \
37} while(0)
38
39/*
40 * interrupt flag manipulation
41 * - use virtual interrupt management since touching the PSR is slow
42 * - ICC2.Z: T if interrupts virtually disabled
43 * - ICC2.C: F if interrupts really disabled
44 * - if Z==1 upon interrupt:
45 * - C is set to 0
46 * - interrupts are really disabled
47 * - entry.S returns immediately
48 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
49 * - if taken, the trap:
50 * - sets ICC2.C
51 * - enables interrupts
52 */
53#define local_irq_disable() \
54do { \
55 /* set Z flag, but don't change the C flag */ \
56 asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \
57 : \
58 : \
59 : "memory", "icc2" \
60 ); \
61} while(0)
62
63#define local_irq_enable() \
64do { \
65 /* clear Z flag and then test the C flag */ \
66 asm volatile(" oricc gr0,#1,gr0,icc2 \n" \
67 " tihi icc2,gr0,#2 \n" \
68 : \
69 : \
70 : "memory", "icc2" \
71 ); \
72} while(0)
73
74#define local_save_flags(flags) \
75do { \
76 typecheck(unsigned long, flags); \
77 asm volatile("movsg ccr,%0" \
78 : "=r"(flags) \
79 : \
80 : "memory"); \
81 \
82 /* shift ICC2.Z to bit 0 */ \
83 flags >>= 26; \
84 \
85 /* make flags 1 if interrupts disabled, 0 otherwise */ \
86 flags &= 1UL; \
87} while(0)
88
89#define irqs_disabled() \
90 ({unsigned long flags; local_save_flags(flags); !!flags; })
91
92#define local_irq_save(flags) \
93do { \
94 typecheck(unsigned long, flags); \
95 local_save_flags(flags); \
96 local_irq_disable(); \
97} while(0)
98
99#define local_irq_restore(flags) \
100do { \
101 typecheck(unsigned long, flags); \
102 \
103 /* load the Z flag by turning 1 if disabled into 0 if disabled \
104 * and thus setting the Z flag but not the C flag */ \
105 asm volatile(" xoricc %0,#1,gr0,icc2 \n" \
106 /* then test Z=0 and C=0 */ \
107 " tihi icc2,gr0,#2 \n" \
108 : \
109 : "r"(flags) \
110 : "memory", "icc2" \
111 ); \
112 \
113} while(0)
114
115/*
116 * real interrupt flag manipulation
117 */
118#define __local_irq_disable() \
119do { \
120 unsigned long psr; \
121 asm volatile(" movsg psr,%0 \n" \
122 " andi %0,%2,%0 \n" \
123 " ori %0,%1,%0 \n" \
124 " movgs %0,psr \n" \
125 : "=r"(psr) \
126 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
127 : "memory"); \
128} while(0)
129
130#define __local_irq_enable() \
131do { \
132 unsigned long psr; \
133 asm volatile(" movsg psr,%0 \n" \
134 " andi %0,%1,%0 \n" \
135 " movgs %0,psr \n" \
136 : "=r"(psr) \
137 : "i" (~PSR_PIL) \
138 : "memory"); \
139} while(0)
140
141#define __local_save_flags(flags) \
142do { \
143 typecheck(unsigned long, flags); \
144 asm("movsg psr,%0" \
145 : "=r"(flags) \
146 : \
147 : "memory"); \
148} while(0)
149
150#define __local_irq_save(flags) \
151do { \
152 unsigned long npsr; \
153 typecheck(unsigned long, flags); \
154 asm volatile(" movsg psr,%0 \n" \
155 " andi %0,%3,%1 \n" \
156 " ori %1,%2,%1 \n" \
157 " movgs %1,psr \n" \
158 : "=r"(flags), "=r"(npsr) \
159 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
160 : "memory"); \
161} while(0)
162
163#define __local_irq_restore(flags) \
164do { \
165 typecheck(unsigned long, flags); \
166 asm volatile(" movgs %0,psr \n" \
167 : \
168 : "r" (flags) \
169 : "memory"); \
170} while(0)
171
172#define __irqs_disabled() \
173 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
174
175/*
176 * Force strict CPU ordering.
177 */
178#define nop() asm volatile ("nop"::)
179#define mb() asm volatile ("membar" : : :"memory")
180#define rmb() asm volatile ("membar" : : :"memory")
181#define wmb() asm volatile ("membar" : : :"memory")
182#define read_barrier_depends() do { } while (0)
183
184#ifdef CONFIG_SMP
185#define smp_mb() mb()
186#define smp_rmb() rmb()
187#define smp_wmb() wmb()
188#define smp_read_barrier_depends() read_barrier_depends()
189#define set_mb(var, value) \
190 do { xchg(&var, (value)); } while (0)
191#else
192#define smp_mb() barrier()
193#define smp_rmb() barrier()
194#define smp_wmb() barrier()
195#define smp_read_barrier_depends() do {} while(0)
196#define set_mb(var, value) \
197 do { var = (value); barrier(); } while (0)
198#endif
199
200extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
201extern void free_initmem(void);
202
203#define arch_align_stack(x) (x)
204
205/*****************************************************************************/
206/*
207 * compare and conditionally exchange value with memory
208 * - if (*ptr == test) then orig = *ptr; *ptr = test;
209 * - if (*ptr != test) then orig = *ptr;
210 */
211#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
212
213#define cmpxchg(ptr, test, new) \
214({ \
215 __typeof__(ptr) __xg_ptr = (ptr); \
216 __typeof__(*(ptr)) __xg_orig, __xg_tmp; \
217 __typeof__(*(ptr)) __xg_test = (test); \
218 __typeof__(*(ptr)) __xg_new = (new); \
219 \
220 switch (sizeof(__xg_orig)) { \
221 case 4: \
222 asm volatile( \
223 "0: \n" \
224 " orcc gr0,gr0,gr0,icc3 \n" \
225 " ckeq icc3,cc7 \n" \
226 " ld.p %M0,%1 \n" \
227 " orcr cc7,cc7,cc3 \n" \
228 " sub%I4cc %1,%4,%2,icc0 \n" \
229 " bne icc0,#0,1f \n" \
230 " cst.p %3,%M0 ,cc3,#1 \n" \
231 " corcc gr29,gr29,gr0 ,cc3,#1 \n" \
232 " beq icc3,#0,0b \n" \
233 "1: \n" \
234 : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
235 : "r"(__xg_new), "NPr"(__xg_test) \
236 : "memory", "cc7", "cc3", "icc3", "icc0" \
237 ); \
238 break; \
239 \
240 default: \
241 __xg_orig = (__typeof__(__xg_orig))0; \
242 asm volatile("break"); \
243 break; \
244 } \
245 \
246 __xg_orig; \
247})
248
249#else
250
251extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
252
253#define cmpxchg(ptr, test, new) \
254({ \
255 __typeof__(ptr) __xg_ptr = (ptr); \
256 __typeof__(*(ptr)) __xg_orig; \
257 __typeof__(*(ptr)) __xg_test = (test); \
258 __typeof__(*(ptr)) __xg_new = (new); \
259 \
260 switch (sizeof(__xg_orig)) { \
261 case 4: __xg_orig = (__force __typeof__(*ptr)) \
262 __cmpxchg_32((__force uint32_t *)__xg_ptr, \
263 (__force uint32_t)__xg_test, \
264 (__force uint32_t)__xg_new); break; \
265 default: \
266 __xg_orig = (__typeof__(__xg_orig))0; \
267 asm volatile("break"); \
268 break; \
269 } \
270 \
271 __xg_orig; \
272})
273
274#endif
275
276#include <asm-generic/cmpxchg-local.h>
277
278static inline unsigned long __cmpxchg_local(volatile void *ptr,
279 unsigned long old,
280 unsigned long new, int size)
281{
282 switch (size) {
283 case 4:
284 return cmpxchg((unsigned long *)ptr, old, new);
285 default:
286 return __cmpxchg_local_generic(ptr, old, new, size);
287 }
288
289 return old;
290}
291
292/*
293 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
294 * them available.
295 */
296#define cmpxchg_local(ptr, o, n) \
297 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
298 (unsigned long)(n), sizeof(*(ptr))))
299#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
300
301#endif /* _ASM_SYSTEM_H */
diff --git a/arch/frv/include/asm/termbits.h b/arch/frv/include/asm/termbits.h
new file mode 100644
index 000000000000..5568492b5086
--- /dev/null
+++ b/arch/frv/include/asm/termbits.h
@@ -0,0 +1,202 @@
1#ifndef _ASM_TERMBITS_H__
2#define _ASM_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* Input baud rate */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184
185/* tcflow() and TCXONC use these */
186#define TCOOFF 0
187#define TCOON 1
188#define TCIOFF 2
189#define TCION 3
190
191/* tcflush() and TCFLSH use these */
192#define TCIFLUSH 0
193#define TCOFLUSH 1
194#define TCIOFLUSH 2
195
196/* tcsetattr uses these */
197#define TCSANOW 0
198#define TCSADRAIN 1
199#define TCSAFLUSH 2
200
201#endif /* _ASM_TERMBITS_H__ */
202
diff --git a/arch/frv/include/asm/termios.h b/arch/frv/include/asm/termios.h
new file mode 100644
index 000000000000..a62fb5872375
--- /dev/null
+++ b/arch/frv/include/asm/termios.h
@@ -0,0 +1,58 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
53
54#ifdef __KERNEL__
55#include <asm-generic/termios.h>
56#endif
57
58#endif /* _ASM_TERMIOS_H */
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
new file mode 100644
index 000000000000..bb53ab753ffb
--- /dev/null
+++ b/arch/frv/include/asm/thread_info.h
@@ -0,0 +1,144 @@
1/* thread_info.h: description
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/thread_info.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef _ASM_THREAD_INFO_H
14#define _ASM_THREAD_INFO_H
15
16#ifdef __KERNEL__
17
18#ifndef __ASSEMBLY__
19#include <asm/processor.h>
20#endif
21
22#define THREAD_SIZE 8192
23
24/*
25 * low level task data that entry.S needs immediate access to
26 * - this struct should fit entirely inside of one cache line
27 * - this struct shares the supervisor stack pages
28 * - if the contents of this structure are changed, the assembly constants must also be changed
29 */
30#ifndef __ASSEMBLY__
31
32struct thread_info {
33 struct task_struct *task; /* main task structure */
34 struct exec_domain *exec_domain; /* execution domain */
35 unsigned long flags; /* low level flags */
36 unsigned long status; /* thread-synchronous flags */
37 __u32 cpu; /* current CPU */
38 int preempt_count; /* 0 => preemptable, <0 => BUG */
39
40 mm_segment_t addr_limit; /* thread address space:
41 * 0-0xBFFFFFFF for user-thead
42 * 0-0xFFFFFFFF for kernel-thread
43 */
44 struct restart_block restart_block;
45
46 __u8 supervisor_stack[0];
47};
48
49#else /* !__ASSEMBLY__ */
50
51#include <asm/asm-offsets.h>
52
53#endif
54
55#define PREEMPT_ACTIVE 0x10000000
56
57/*
58 * macros/functions for gaining access to the thread information structure
59 *
60 * preempt_count needs to be 1 initially, until the scheduler is functional.
61 */
62#ifndef __ASSEMBLY__
63
64#define INIT_THREAD_INFO(tsk) \
65{ \
66 .task = &tsk, \
67 .exec_domain = &default_exec_domain, \
68 .flags = 0, \
69 .cpu = 0, \
70 .preempt_count = 1, \
71 .addr_limit = KERNEL_DS, \
72 .restart_block = { \
73 .fn = do_no_restart_syscall, \
74 }, \
75}
76
77#define init_thread_info (init_thread_union.thread_info)
78#define init_stack (init_thread_union.stack)
79
80/* how to get the thread information struct from C */
81register struct thread_info *__current_thread_info asm("gr15");
82
83#define current_thread_info() ({ __current_thread_info; })
84
85#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
86
87/* thread information allocation */
88#ifdef CONFIG_DEBUG_STACK_USAGE
89#define alloc_thread_info(tsk) \
90 ({ \
91 struct thread_info *ret; \
92 \
93 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
94 \
95 ret; \
96 })
97#else
98#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
99#endif
100
101#define free_thread_info(info) kfree(info)
102
103#endif /* __ASSEMBLY__ */
104
105/*
106 * thread information flags
107 * - these are process state flags that various assembly files may need to access
108 * - pending work-to-be-done flags are in LSW
109 * - other flags in MSW
110 */
111#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
112#define TIF_SIGPENDING 1 /* signal pending */
113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
115#define TIF_IRET 4 /* return with iret */
116#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
117#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
118#define TIF_MEMDIE 17 /* OOM killer killed process */
119#define TIF_FREEZE 18 /* freezing for suspend */
120
121#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
122#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
124#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
125#define _TIF_IRET (1 << TIF_IRET)
126#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
127#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
128#define _TIF_FREEZE (1 << TIF_FREEZE)
129
130#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
131#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
132
133/*
134 * Thread-synchronous status.
135 *
136 * This is different from the flags in that nobody else
137 * ever touches our thread-synchronous status, so we don't
138 * have to worry about atomic accesses.
139 */
140#define TS_USEDFPM 0x0001 /* FPU/Media was used by this task this quantum (SMP) */
141
142#endif /* __KERNEL__ */
143
144#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/frv/include/asm/timer-regs.h b/arch/frv/include/asm/timer-regs.h
new file mode 100644
index 000000000000..6c5a871ce5e9
--- /dev/null
+++ b/arch/frv/include/asm/timer-regs.h
@@ -0,0 +1,106 @@
1/* timer-regs.h: hardware timer register definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/sections.h>
16
17extern unsigned long __nongprelbss __clkin_clock_speed_HZ;
18extern unsigned long __nongprelbss __ext_bus_clock_speed_HZ;
19extern unsigned long __nongprelbss __res_bus_clock_speed_HZ;
20extern unsigned long __nongprelbss __sdram_clock_speed_HZ;
21extern unsigned long __nongprelbss __core_bus_clock_speed_HZ;
22extern unsigned long __nongprelbss __core_clock_speed_HZ;
23extern unsigned long __nongprelbss __dsu_clock_speed_HZ;
24extern unsigned long __nongprelbss __serial_clock_speed_HZ;
25
26#define __get_CLKC() ({ *(volatile unsigned long *)(0xfeff9a00); })
27
28static inline void __set_CLKC(unsigned long v)
29{
30 int tmp;
31
32 asm volatile(" st%I0.p %2,%M0 \n"
33 " setlos %3,%1 \n"
34 " membar \n"
35 "0: \n"
36 " subicc %1,#1,%1,icc0 \n"
37 " bnc icc0,#1,0b \n"
38 : "=m"(*(volatile unsigned long *) 0xfeff9a00), "=r"(tmp)
39 : "r"(v), "i"(256)
40 : "icc0");
41}
42
43#define __get_TCTR() ({ *(volatile unsigned long *)(0xfeff9418); })
44#define __get_TPRV() ({ *(volatile unsigned long *)(0xfeff9420); })
45#define __get_TPRCKSL() ({ *(volatile unsigned long *)(0xfeff9428); })
46#define __get_TCSR(T) ({ *(volatile unsigned long *)(0xfeff9400 + 8 * (T)); })
47#define __get_TxCKSL(T) ({ *(volatile unsigned long *)(0xfeff9430 + 8 * (T)); })
48
49#define __get_TCSR_DATA(T) ({ __get_TCSR(T) >> 24; })
50
51#define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0)
52#define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0)
53#define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0)
54#define __set_TCSR(T,V) \
55do { *(volatile unsigned long *)(0xfeff9400 + 8 * (T)) = (V); mb(); } while(0)
56
57#define __set_TxCKSL(T,V) \
58do { *(volatile unsigned long *)(0xfeff9430 + 8 * (T)) = (V); mb(); } while(0)
59
60#define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24)
61#define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V)))
62
63/* clock control register */
64#define CLKC_CMODE 0x0f000000
65#define CLKC_SLPL 0x000f0000
66#define CLKC_P0 0x00000100
67#define CLKC_CM 0x00000003
68
69#define CLKC_CMODE_s 24
70
71/* timer control register - non-readback mode */
72#define TCTR_MODE_0 0x00000000
73#define TCTR_MODE_2 0x04000000
74#define TCTR_MODE_4 0x08000000
75#define TCTR_MODE_5 0x0a000000
76#define TCTR_RL_LATCH 0x00000000
77#define TCTR_RL_RW_LOW8 0x10000000
78#define TCTR_RL_RW_HIGH8 0x20000000
79#define TCTR_RL_RW_LH8 0x30000000
80#define TCTR_SC_CTR0 0x00000000
81#define TCTR_SC_CTR1 0x40000000
82#define TCTR_SC_CTR2 0x80000000
83
84/* timer control register - readback mode */
85#define TCTR_CNT0 0x02000000
86#define TCTR_CNT1 0x04000000
87#define TCTR_CNT2 0x08000000
88#define TCTR_NSTATUS 0x10000000
89#define TCTR_NCOUNT 0x20000000
90#define TCTR_SC_READBACK 0xc0000000
91
92/* timer control status registers - non-readback mode */
93#define TCSRx_DATA 0xff000000
94
95/* timer control status registers - readback mode */
96#define TCSRx_OUTPUT 0x80000000
97#define TCSRx_NULLCOUNT 0x40000000
98#define TCSRx_RL 0x30000000
99#define TCSRx_MODE 0x07000000
100
101/* timer clock select registers */
102#define TxCKSL_SELECT 0x0f000000
103#define __TxCKSL_SELECT(X) ((X) << 24)
104#define TxCKSL_EIGHT 0xf0000000
105
106#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/frv/include/asm/timex.h b/arch/frv/include/asm/timex.h
new file mode 100644
index 000000000000..a89bddefdacf
--- /dev/null
+++ b/arch/frv/include/asm/timex.h
@@ -0,0 +1,20 @@
1/* timex.h: FR-V architecture timex specifications
2 */
3#ifndef _ASM_TIMEX_H
4#define _ASM_TIMEX_H
5
6#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
7#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
8
9typedef unsigned long cycles_t;
10
11static inline cycles_t get_cycles(void)
12{
13 return 0;
14}
15
16#define vxtime_lock() do {} while (0)
17#define vxtime_unlock() do {} while (0)
18
19#endif
20
diff --git a/arch/frv/include/asm/tlb.h b/arch/frv/include/asm/tlb.h
new file mode 100644
index 000000000000..cd458eb6d75e
--- /dev/null
+++ b/arch/frv/include/asm/tlb.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_TLB_H
2#define _ASM_TLB_H
3
4#include <asm/tlbflush.h>
5
6#ifdef CONFIG_MMU
7extern void check_pgt_cache(void);
8#else
9#define check_pgt_cache() do {} while(0)
10#endif
11
12/*
13 * we don't need any special per-pte or per-vma handling...
14 */
15#define tlb_start_vma(tlb, vma) do { } while (0)
16#define tlb_end_vma(tlb, vma) do { } while (0)
17#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
18
19/*
20 * .. because we flush the whole mm when it fills up
21 */
22#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
23
24#include <asm-generic/tlb.h>
25
26#endif /* _ASM_TLB_H */
27
diff --git a/arch/frv/include/asm/tlbflush.h b/arch/frv/include/asm/tlbflush.h
new file mode 100644
index 000000000000..7ac5eafc5d98
--- /dev/null
+++ b/arch/frv/include/asm/tlbflush.h
@@ -0,0 +1,73 @@
1/* tlbflush.h: TLB flushing functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLBFLUSH_H
13#define _ASM_TLBFLUSH_H
14
15#include <linux/mm.h>
16#include <asm/processor.h>
17
18#ifdef CONFIG_MMU
19
20#ifndef __ASSEMBLY__
21extern void asmlinkage __flush_tlb_all(void);
22extern void asmlinkage __flush_tlb_mm(unsigned long contextid);
23extern void asmlinkage __flush_tlb_page(unsigned long contextid, unsigned long start);
24extern void asmlinkage __flush_tlb_range(unsigned long contextid,
25 unsigned long start, unsigned long end);
26#endif /* !__ASSEMBLY__ */
27
28#define flush_tlb_all() \
29do { \
30 preempt_disable(); \
31 __flush_tlb_all(); \
32 preempt_enable(); \
33} while(0)
34
35#define flush_tlb_mm(mm) \
36do { \
37 preempt_disable(); \
38 __flush_tlb_mm((mm)->context.id); \
39 preempt_enable(); \
40} while(0)
41
42#define flush_tlb_range(vma,start,end) \
43do { \
44 preempt_disable(); \
45 __flush_tlb_range((vma)->vm_mm->context.id, start, end); \
46 preempt_enable(); \
47} while(0)
48
49#define flush_tlb_page(vma,addr) \
50do { \
51 preempt_disable(); \
52 __flush_tlb_page((vma)->vm_mm->context.id, addr); \
53 preempt_enable(); \
54} while(0)
55
56
57#define __flush_tlb_global() flush_tlb_all()
58#define flush_tlb() flush_tlb_all()
59#define flush_tlb_kernel_range(start, end) flush_tlb_all()
60
61#else
62
63#define flush_tlb() BUG()
64#define flush_tlb_all() BUG()
65#define flush_tlb_mm(mm) BUG()
66#define flush_tlb_page(vma,addr) BUG()
67#define flush_tlb_range(mm,start,end) BUG()
68#define flush_tlb_kernel_range(start, end) BUG()
69
70#endif
71
72
73#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/frv/include/asm/topology.h b/arch/frv/include/asm/topology.h
new file mode 100644
index 000000000000..942724352705
--- /dev/null
+++ b/arch/frv/include/asm/topology.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_TOPOLOGY_H
2#define _ASM_TOPOLOGY_H
3
4#ifdef CONFIG_NUMA
5
6#error NUMA not supported yet
7
8#endif /* CONFIG_NUMA */
9
10#include <asm-generic/topology.h>
11
12#endif /* _ASM_TOPOLOGY_H */
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h
new file mode 100644
index 000000000000..613bf1e962f0
--- /dev/null
+++ b/arch/frv/include/asm/types.h
@@ -0,0 +1,40 @@
1/* types.h: FRV types
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TYPES_H
13#define _ASM_TYPES_H
14
15#include <asm-generic/int-ll64.h>
16
17#ifndef __ASSEMBLY__
18
19typedef unsigned short umode_t;
20
21#endif /* __ASSEMBLY__ */
22
23/*
24 * These aren't exported outside the kernel to avoid name space clashes
25 */
26#ifdef __KERNEL__
27
28#define BITS_PER_LONG 32
29
30#ifndef __ASSEMBLY__
31
32/* Dma addresses are 32-bits wide. */
33
34typedef u32 dma_addr_t;
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* __KERNEL__ */
39
40#endif /* _ASM_TYPES_H */
diff --git a/arch/frv/include/asm/uaccess.h b/arch/frv/include/asm/uaccess.h
new file mode 100644
index 000000000000..53650c958f41
--- /dev/null
+++ b/arch/frv/include/asm/uaccess.h
@@ -0,0 +1,321 @@
1/* uaccess.h: userspace accessor functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UACCESS_H
13#define _ASM_UACCESS_H
14
15/*
16 * User space memory access functions
17 */
18#include <linux/sched.h>
19#include <linux/mm.h>
20#include <asm/segment.h>
21#include <asm/sections.h>
22
23#define HAVE_ARCH_UNMAPPED_AREA /* we decide where to put mmaps */
24
25#define __ptr(x) ((unsigned long __force *)(x))
26
27#define VERIFY_READ 0
28#define VERIFY_WRITE 1
29
30#define __addr_ok(addr) ((unsigned long)(addr) < get_addr_limit())
31
32/*
33 * check that a range of addresses falls within the current address limit
34 */
35static inline int ___range_ok(unsigned long addr, unsigned long size)
36{
37#ifdef CONFIG_MMU
38 int flag = -EFAULT, tmp;
39
40 asm volatile (
41 " addcc %3,%2,%1,icc0 \n" /* set C-flag if addr+size>4GB */
42 " subcc.p %1,%4,gr0,icc1 \n" /* jump if addr+size>limit */
43 " bc icc0,#0,0f \n"
44 " bhi icc1,#0,0f \n"
45 " setlos #0,%0 \n" /* mark okay */
46 "0: \n"
47 : "=r"(flag), "=&r"(tmp)
48 : "r"(addr), "r"(size), "r"(get_addr_limit()), "0"(flag)
49 );
50
51 return flag;
52
53#else
54
55 if (addr < memory_start ||
56 addr > memory_end ||
57 size > memory_end - memory_start ||
58 addr + size > memory_end)
59 return -EFAULT;
60
61 return 0;
62#endif
63}
64
65#define __range_ok(addr,size) ___range_ok((unsigned long) (addr), (unsigned long) (size))
66
67#define access_ok(type,addr,size) (__range_ok((void __user *)(addr), (size)) == 0)
68#define __access_ok(addr,size) (__range_ok((addr), (size)) == 0)
69
70/*
71 * The exception table consists of pairs of addresses: the first is the
72 * address of an instruction that is allowed to fault, and the second is
73 * the address at which the program should continue. No registers are
74 * modified, so it is entirely up to the continuation code to figure out
75 * what to do.
76 *
77 * All the routines below use bits of fixup code that are out of line
78 * with the main instruction path. This means when everything is well,
79 * we don't even have to jump over them. Further, they do not intrude
80 * on our cache or tlb entries.
81 */
82struct exception_table_entry
83{
84 unsigned long insn, fixup;
85};
86
87/* Returns 0 if exception not found and fixup otherwise. */
88extern unsigned long search_exception_table(unsigned long);
89
90
91/*
92 * These are the main single-value transfer routines. They automatically
93 * use the right size if we just have the right pointer type.
94 */
95#define __put_user(x, ptr) \
96({ \
97 int __pu_err = 0; \
98 \
99 typeof(*(ptr)) __pu_val = (x); \
100 __chk_user_ptr(ptr); \
101 \
102 switch (sizeof (*(ptr))) { \
103 case 1: \
104 __put_user_asm(__pu_err, __pu_val, ptr, "b", "r"); \
105 break; \
106 case 2: \
107 __put_user_asm(__pu_err, __pu_val, ptr, "h", "r"); \
108 break; \
109 case 4: \
110 __put_user_asm(__pu_err, __pu_val, ptr, "", "r"); \
111 break; \
112 case 8: \
113 __put_user_asm(__pu_err, __pu_val, ptr, "d", "e"); \
114 break; \
115 default: \
116 __pu_err = __put_user_bad(); \
117 break; \
118 } \
119 __pu_err; \
120})
121
122#define put_user(x, ptr) \
123({ \
124 typeof(*(ptr)) __user *_p = (ptr); \
125 int _e; \
126 \
127 _e = __range_ok(_p, sizeof(*_p)); \
128 if (_e == 0) \
129 _e = __put_user((x), _p); \
130 _e; \
131})
132
133extern int __put_user_bad(void);
134
135/*
136 * Tell gcc we read from memory instead of writing: this is because
137 * we do not write to any memory gcc knows about, so there are no
138 * aliasing issues.
139 */
140
141#ifdef CONFIG_MMU
142
143#define __put_user_asm(err,x,ptr,dsize,constraint) \
144do { \
145 asm volatile("1: st"dsize"%I1 %2,%M1 \n" \
146 "2: \n" \
147 ".subsection 2 \n" \
148 "3: setlos %3,%0 \n" \
149 " bra 2b \n" \
150 ".previous \n" \
151 ".section __ex_table,\"a\" \n" \
152 " .balign 8 \n" \
153 " .long 1b,3b \n" \
154 ".previous" \
155 : "=r" (err) \
156 : "m" (*__ptr(ptr)), constraint (x), "i"(-EFAULT), "0"(err) \
157 : "memory"); \
158} while (0)
159
160#else
161
162#define __put_user_asm(err,x,ptr,bwl,con) \
163do { \
164 asm(" st"bwl"%I0 %1,%M0 \n" \
165 " membar \n" \
166 : \
167 : "m" (*__ptr(ptr)), con (x) \
168 : "memory"); \
169} while (0)
170
171#endif
172
173/*****************************************************************************/
174/*
175 *
176 */
177#define __get_user(x, ptr) \
178({ \
179 int __gu_err = 0; \
180 __chk_user_ptr(ptr); \
181 \
182 switch (sizeof(*(ptr))) { \
183 case 1: { \
184 unsigned char __gu_val; \
185 __get_user_asm(__gu_err, __gu_val, ptr, "ub", "=r"); \
186 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
187 break; \
188 } \
189 case 2: { \
190 unsigned short __gu_val; \
191 __get_user_asm(__gu_err, __gu_val, ptr, "uh", "=r"); \
192 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
193 break; \
194 } \
195 case 4: { \
196 unsigned int __gu_val; \
197 __get_user_asm(__gu_err, __gu_val, ptr, "", "=r"); \
198 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
199 break; \
200 } \
201 case 8: { \
202 unsigned long long __gu_val; \
203 __get_user_asm(__gu_err, __gu_val, ptr, "d", "=e"); \
204 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
205 break; \
206 } \
207 default: \
208 __gu_err = __get_user_bad(); \
209 break; \
210 } \
211 __gu_err; \
212})
213
214#define get_user(x, ptr) \
215({ \
216 const typeof(*(ptr)) __user *_p = (ptr);\
217 int _e; \
218 \
219 _e = __range_ok(_p, sizeof(*_p)); \
220 if (likely(_e == 0)) \
221 _e = __get_user((x), _p); \
222 else \
223 (x) = (typeof(x)) 0; \
224 _e; \
225})
226
227extern int __get_user_bad(void);
228
229#ifdef CONFIG_MMU
230
231#define __get_user_asm(err,x,ptr,dtype,constraint) \
232do { \
233 asm("1: ld"dtype"%I2 %M2,%1 \n" \
234 "2: \n" \
235 ".subsection 2 \n" \
236 "3: setlos %3,%0 \n" \
237 " setlos #0,%1 \n" \
238 " bra 2b \n" \
239 ".previous \n" \
240 ".section __ex_table,\"a\" \n" \
241 " .balign 8 \n" \
242 " .long 1b,3b \n" \
243 ".previous" \
244 : "=r" (err), constraint (x) \
245 : "m" (*__ptr(ptr)), "i"(-EFAULT), "0"(err) \
246 ); \
247} while(0)
248
249#else
250
251#define __get_user_asm(err,x,ptr,bwl,con) \
252 asm(" ld"bwl"%I1 %M1,%0 \n" \
253 " membar \n" \
254 : con(x) \
255 : "m" (*__ptr(ptr)))
256
257#endif
258
259/*****************************************************************************/
260/*
261 *
262 */
263#define ____force(x) (__force void *)(void __user *)(x)
264#ifdef CONFIG_MMU
265extern long __memset_user(void *dst, unsigned long count);
266extern long __memcpy_user(void *dst, const void *src, unsigned long count);
267
268#define clear_user(dst,count) __memset_user(____force(dst), (count))
269#define __copy_from_user_inatomic(to, from, n) __memcpy_user((to), ____force(from), (n))
270#define __copy_to_user_inatomic(to, from, n) __memcpy_user(____force(to), (from), (n))
271
272#else
273
274#define clear_user(dst,count) (memset(____force(dst), 0, (count)), 0)
275#define __copy_from_user_inatomic(to, from, n) (memcpy((to), ____force(from), (n)), 0)
276#define __copy_to_user_inatomic(to, from, n) (memcpy(____force(to), (from), (n)), 0)
277
278#endif
279
280#define __clear_user clear_user
281
282static inline unsigned long __must_check
283__copy_to_user(void __user *to, const void *from, unsigned long n)
284{
285 might_sleep();
286 return __copy_to_user_inatomic(to, from, n);
287}
288
289static inline unsigned long
290__copy_from_user(void *to, const void __user *from, unsigned long n)
291{
292 might_sleep();
293 return __copy_from_user_inatomic(to, from, n);
294}
295
296static inline long copy_from_user(void *to, const void __user *from, unsigned long n)
297{
298 unsigned long ret = n;
299
300 if (likely(__access_ok(from, n)))
301 ret = __copy_from_user(to, from, n);
302
303 if (unlikely(ret != 0))
304 memset(to + (n - ret), 0, ret);
305
306 return ret;
307}
308
309static inline long copy_to_user(void __user *to, const void *from, unsigned long n)
310{
311 return likely(__access_ok(to, n)) ? __copy_to_user(to, from, n) : n;
312}
313
314extern long strncpy_from_user(char *dst, const char __user *src, long count);
315extern long strnlen_user(const char __user *src, long count);
316
317#define strlen_user(str) strnlen_user(str, 32767)
318
319extern unsigned long search_exception_table(unsigned long addr);
320
321#endif /* _ASM_UACCESS_H */
diff --git a/arch/frv/include/asm/ucontext.h b/arch/frv/include/asm/ucontext.h
new file mode 100644
index 000000000000..8d8c0c948007
--- /dev/null
+++ b/arch/frv/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_UCONTEXT_H
2#define _ASM_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif
diff --git a/arch/frv/include/asm/unaligned.h b/arch/frv/include/asm/unaligned.h
new file mode 100644
index 000000000000..6c61c05b2e0c
--- /dev/null
+++ b/arch/frv/include/asm/unaligned.h
@@ -0,0 +1,22 @@
1/* unaligned.h: unaligned access handler
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNALIGNED_H
13#define _ASM_UNALIGNED_H
14
15#include <linux/unaligned/le_byteshift.h>
16#include <linux/unaligned/be_struct.h>
17#include <linux/unaligned/generic.h>
18
19#define get_unaligned __get_unaligned_be
20#define put_unaligned __put_unaligned_be
21
22#endif /* _ASM_UNALIGNED_H */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
new file mode 100644
index 000000000000..edcfaf5f0414
--- /dev/null
+++ b/arch/frv/include/asm/unistd.h
@@ -0,0 +1,382 @@
1#ifndef _ASM_UNISTD_H_
2#define _ASM_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67// #define __NR_oldolduname /* 59 */ obsolete
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98// #define __NR_mmap 90 /* obsolete - not implemented */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106// #define __NR_profil /* 98 */ obsolete
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109// #define __NR_ioperm /* 101 */ not supported
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117// #define __NR_olduname /* 109 */ obsolete
118// #define __NR_iopl /* 110 */ not supported
119#define __NR_vhangup 111
120// #define __NR_idle /* 112 */ Obsolete
121// #define __NR_vm86old /* 113 */ not supported
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131// #define __NR_modify_ldt /* 123 */ not supported
132#define __NR_cacheflush 123
133#define __NR_adjtimex 124
134#define __NR_mprotect 125
135#define __NR_sigprocmask 126
136#define __NR_create_module 127
137#define __NR_init_module 128
138#define __NR_delete_module 129
139#define __NR_get_kernel_syms 130
140#define __NR_quotactl 131
141#define __NR_getpgid 132
142#define __NR_fchdir 133
143#define __NR_bdflush 134
144#define __NR_sysfs 135
145#define __NR_personality 136
146#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
147#define __NR_setfsuid 138
148#define __NR_setfsgid 139
149#define __NR__llseek 140
150#define __NR_getdents 141
151#define __NR__newselect 142
152#define __NR_flock 143
153#define __NR_msync 144
154#define __NR_readv 145
155#define __NR_writev 146
156#define __NR_getsid 147
157#define __NR_fdatasync 148
158#define __NR__sysctl 149
159#define __NR_mlock 150
160#define __NR_munlock 151
161#define __NR_mlockall 152
162#define __NR_munlockall 153
163#define __NR_sched_setparam 154
164#define __NR_sched_getparam 155
165#define __NR_sched_setscheduler 156
166#define __NR_sched_getscheduler 157
167#define __NR_sched_yield 158
168#define __NR_sched_get_priority_max 159
169#define __NR_sched_get_priority_min 160
170#define __NR_sched_rr_get_interval 161
171#define __NR_nanosleep 162
172#define __NR_mremap 163
173#define __NR_setresuid 164
174#define __NR_getresuid 165
175// #define __NR_vm86 /* 166 */ not supported
176#define __NR_query_module 167
177#define __NR_poll 168
178#define __NR_nfsservctl 169
179#define __NR_setresgid 170
180#define __NR_getresgid 171
181#define __NR_prctl 172
182#define __NR_rt_sigreturn 173
183#define __NR_rt_sigaction 174
184#define __NR_rt_sigprocmask 175
185#define __NR_rt_sigpending 176
186#define __NR_rt_sigtimedwait 177
187#define __NR_rt_sigqueueinfo 178
188#define __NR_rt_sigsuspend 179
189#define __NR_pread64 180
190#define __NR_pwrite64 181
191#define __NR_chown 182
192#define __NR_getcwd 183
193#define __NR_capget 184
194#define __NR_capset 185
195#define __NR_sigaltstack 186
196#define __NR_sendfile 187
197#define __NR_getpmsg 188 /* some people actually want streams */
198#define __NR_putpmsg 189 /* some people actually want streams */
199#define __NR_vfork 190
200#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
201#define __NR_mmap2 192
202#define __NR_truncate64 193
203#define __NR_ftruncate64 194
204#define __NR_stat64 195
205#define __NR_lstat64 196
206#define __NR_fstat64 197
207#define __NR_lchown32 198
208#define __NR_getuid32 199
209#define __NR_getgid32 200
210#define __NR_geteuid32 201
211#define __NR_getegid32 202
212#define __NR_setreuid32 203
213#define __NR_setregid32 204
214#define __NR_getgroups32 205
215#define __NR_setgroups32 206
216#define __NR_fchown32 207
217#define __NR_setresuid32 208
218#define __NR_getresuid32 209
219#define __NR_setresgid32 210
220#define __NR_getresgid32 211
221#define __NR_chown32 212
222#define __NR_setuid32 213
223#define __NR_setgid32 214
224#define __NR_setfsuid32 215
225#define __NR_setfsgid32 216
226#define __NR_pivot_root 217
227#define __NR_mincore 218
228#define __NR_madvise 219
229
230#define __NR_getdents64 220
231#define __NR_fcntl64 221
232#define __NR_security 223 /* syscall for security modules */
233#define __NR_gettid 224
234#define __NR_readahead 225
235#define __NR_setxattr 226
236#define __NR_lsetxattr 227
237#define __NR_fsetxattr 228
238#define __NR_getxattr 229
239#define __NR_lgetxattr 230
240#define __NR_fgetxattr 231
241#define __NR_listxattr 232
242#define __NR_llistxattr 233
243#define __NR_flistxattr 234
244#define __NR_removexattr 235
245#define __NR_lremovexattr 236
246#define __NR_fremovexattr 237
247#define __NR_tkill 238
248#define __NR_sendfile64 239
249#define __NR_futex 240
250#define __NR_sched_setaffinity 241
251#define __NR_sched_getaffinity 242
252#define __NR_set_thread_area 243
253#define __NR_get_thread_area 244
254#define __NR_io_setup 245
255#define __NR_io_destroy 246
256#define __NR_io_getevents 247
257#define __NR_io_submit 248
258#define __NR_io_cancel 249
259#define __NR_fadvise64 250
260
261#define __NR_exit_group 252
262#define __NR_lookup_dcookie 253
263#define __NR_epoll_create 254
264#define __NR_epoll_ctl 255
265#define __NR_epoll_wait 256
266#define __NR_remap_file_pages 257
267#define __NR_set_tid_address 258
268#define __NR_timer_create 259
269#define __NR_timer_settime (__NR_timer_create+1)
270#define __NR_timer_gettime (__NR_timer_create+2)
271#define __NR_timer_getoverrun (__NR_timer_create+3)
272#define __NR_timer_delete (__NR_timer_create+4)
273#define __NR_clock_settime (__NR_timer_create+5)
274#define __NR_clock_gettime (__NR_timer_create+6)
275#define __NR_clock_getres (__NR_timer_create+7)
276#define __NR_clock_nanosleep (__NR_timer_create+8)
277#define __NR_statfs64 268
278#define __NR_fstatfs64 269
279#define __NR_tgkill 270
280#define __NR_utimes 271
281#define __NR_fadvise64_64 272
282#define __NR_vserver 273
283#define __NR_mbind 274
284#define __NR_get_mempolicy 275
285#define __NR_set_mempolicy 276
286#define __NR_mq_open 277
287#define __NR_mq_unlink (__NR_mq_open+1)
288#define __NR_mq_timedsend (__NR_mq_open+2)
289#define __NR_mq_timedreceive (__NR_mq_open+3)
290#define __NR_mq_notify (__NR_mq_open+4)
291#define __NR_mq_getsetattr (__NR_mq_open+5)
292#define __NR_kexec_load 283
293#define __NR_waitid 284
294/* #define __NR_sys_setaltroot 285 */
295#define __NR_add_key 286
296#define __NR_request_key 287
297#define __NR_keyctl 288
298#define __NR_ioprio_set 289
299#define __NR_ioprio_get 290
300#define __NR_inotify_init 291
301#define __NR_inotify_add_watch 292
302#define __NR_inotify_rm_watch 293
303#define __NR_migrate_pages 294
304#define __NR_openat 295
305#define __NR_mkdirat 296
306#define __NR_mknodat 297
307#define __NR_fchownat 298
308#define __NR_futimesat 299
309#define __NR_fstatat64 300
310#define __NR_unlinkat 301
311#define __NR_renameat 302
312#define __NR_linkat 303
313#define __NR_symlinkat 304
314#define __NR_readlinkat 305
315#define __NR_fchmodat 306
316#define __NR_faccessat 307
317#define __NR_pselect6 308
318#define __NR_ppoll 309
319#define __NR_unshare 310
320#define __NR_set_robust_list 311
321#define __NR_get_robust_list 312
322#define __NR_splice 313
323#define __NR_sync_file_range 314
324#define __NR_tee 315
325#define __NR_vmsplice 316
326#define __NR_move_pages 317
327#define __NR_getcpu 318
328#define __NR_epoll_pwait 319
329#define __NR_utimensat 320
330#define __NR_signalfd 321
331#define __NR_timerfd_create 322
332#define __NR_eventfd 323
333#define __NR_fallocate 324
334#define __NR_timerfd_settime 325
335#define __NR_timerfd_gettime 326
336#define __NR_signalfd4 327
337#define __NR_eventfd2 328
338#define __NR_epoll_create1 329
339#define __NR_dup3 330
340#define __NR_pipe2 331
341#define __NR_inotify_init1 332
342
343#ifdef __KERNEL__
344
345#define NR_syscalls 333
346
347#define __ARCH_WANT_IPC_PARSE_VERSION
348/* #define __ARCH_WANT_OLD_READDIR */
349#define __ARCH_WANT_OLD_STAT
350#define __ARCH_WANT_STAT64
351#define __ARCH_WANT_SYS_ALARM
352/* #define __ARCH_WANT_SYS_GETHOSTNAME */
353#define __ARCH_WANT_SYS_PAUSE
354/* #define __ARCH_WANT_SYS_SGETMASK */
355/* #define __ARCH_WANT_SYS_SIGNAL */
356#define __ARCH_WANT_SYS_TIME
357#define __ARCH_WANT_SYS_UTIME
358#define __ARCH_WANT_SYS_WAITPID
359#define __ARCH_WANT_SYS_SOCKETCALL
360#define __ARCH_WANT_SYS_FADVISE64
361#define __ARCH_WANT_SYS_GETPGRP
362#define __ARCH_WANT_SYS_LLSEEK
363#define __ARCH_WANT_SYS_NICE
364/* #define __ARCH_WANT_SYS_OLD_GETRLIMIT */
365#define __ARCH_WANT_SYS_OLDUMOUNT
366/* #define __ARCH_WANT_SYS_SIGPENDING */
367#define __ARCH_WANT_SYS_SIGPROCMASK
368#define __ARCH_WANT_SYS_RT_SIGACTION
369#define __ARCH_WANT_SYS_RT_SIGSUSPEND
370
371/*
372 * "Conditional" syscalls
373 *
374 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
375 * but it doesn't work on all toolchains, so we just do it by hand
376 */
377#ifndef cond_syscall
378#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
379#endif
380
381#endif /* __KERNEL__ */
382#endif /* _ASM_UNISTD_H_ */
diff --git a/arch/frv/include/asm/user.h b/arch/frv/include/asm/user.h
new file mode 100644
index 000000000000..82fa8fab64ae
--- /dev/null
+++ b/arch/frv/include/asm/user.h
@@ -0,0 +1,80 @@
1/* user.h: FR-V core file format stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <asm/registers.h>
16
17/* Core file format: The core file is written in such a way that gdb
18 * can understand it and provide useful information to the user (under
19 * linux we use the 'trad-core' bfd). There are quite a number of
20 * obstacles to being able to view the contents of the floating point
21 * registers, and until these are solved you will not be able to view
22 * the contents of them. Actually, you can read in the core file and
23 * look at the contents of the user struct to find out what the
24 * floating point registers contain.
25 *
26 * The actual file contents are as follows:
27 * UPAGE:
28 * 1 page consisting of a user struct that tells gdb what is present
29 * in the file. Directly after this is a copy of the task_struct,
30 * which is currently not used by gdb, but it may come in useful at
31 * some point. All of the registers are stored as part of the
32 * upage. The upage should always be only one page.
33 *
34 * DATA:
35 * The data area is stored. We use current->end_text to
36 * current->brk to pick up all of the user variables, plus any
37 * memory that may have been malloced. No attempt is made to
38 * determine if a page is demand-zero or if a page is totally
39 * unused, we just cover the entire range. All of the addresses are
40 * rounded in such a way that an integral number of pages is
41 * written.
42 *
43 * STACK:
44 * We need the stack information in order to get a meaningful
45 * backtrace. We need to write the data from (esp) to
46 * current->start_stack, so we round each of these off in order to
47 * be able to write an integer number of pages. The minimum core
48 * file size is 3 pages, or 12288 bytes.
49 */
50
51/* When the kernel dumps core, it starts by dumping the user struct -
52 * this will be used by gdb to figure out where the data and stack segments
53 * are within the file, and what virtual addresses to use.
54 */
55struct user {
56 /* We start with the registers, to mimic the way that "memory" is returned
57 * from the ptrace(3,...) function. */
58 struct user_context regs;
59
60 /* The rest of this junk is to help gdb figure out what goes where */
61 unsigned long u_tsize; /* Text segment size (pages). */
62 unsigned long u_dsize; /* Data segment size (pages). */
63 unsigned long u_ssize; /* Stack segment size (pages). */
64 unsigned long start_code; /* Starting virtual address of text. */
65 unsigned long start_stack; /* Starting virtual address of stack area.
66 * This is actually the bottom of the stack,
67 * the top of the stack is always found in the
68 * esp register. */
69 long int signal; /* Signal that caused the core dump. */
70
71 unsigned long magic; /* To uniquely identify a core file */
72 char u_comm[32]; /* User command that was responsible */
73};
74
75#define NBPG PAGE_SIZE
76#define UPAGES 1
77#define HOST_TEXT_START_ADDR (u.start_code)
78#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
79
80#endif
diff --git a/arch/frv/include/asm/vga.h b/arch/frv/include/asm/vga.h
new file mode 100644
index 000000000000..a702c800a229
--- /dev/null
+++ b/arch/frv/include/asm/vga.h
@@ -0,0 +1,17 @@
1/* vga.h: VGA register stuff
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/arch/frv/include/asm/virtconvert.h b/arch/frv/include/asm/virtconvert.h
new file mode 100644
index 000000000000..59788fa2a813
--- /dev/null
+++ b/arch/frv/include/asm/virtconvert.h
@@ -0,0 +1,41 @@
1/* virtconvert.h: virtual/physical/page address convertion
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_VIRTCONVERT_H
12#define _ASM_VIRTCONVERT_H
13
14/*
15 * Macros used for converting between virtual and physical mappings.
16 */
17
18#ifdef __KERNEL__
19
20#include <asm/setup.h>
21
22#ifdef CONFIG_MMU
23
24#define phys_to_virt(vaddr) ((void *) ((unsigned long)(vaddr) + PAGE_OFFSET))
25#define virt_to_phys(vaddr) ((unsigned long) (vaddr) - PAGE_OFFSET)
26
27#else
28
29#define phys_to_virt(vaddr) ((void *) (vaddr))
30#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
31
32#endif
33
34#define virt_to_bus virt_to_phys
35#define bus_to_virt phys_to_virt
36
37#define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
38#define page_to_phys(page) virt_to_phys((void *)__page_address(page))
39
40#endif
41#endif
diff --git a/arch/frv/include/asm/xor.h b/arch/frv/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/frv/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>