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-rw-r--r--arch/cris/include/asm/atomic.h2
-rw-r--r--arch/cris/include/asm/barrier.h25
-rw-r--r--arch/cris/include/asm/bitops.h1
-rw-r--r--arch/cris/include/asm/cmpxchg.h53
-rw-r--r--arch/cris/include/asm/exec.h6
-rw-r--r--arch/cris/include/asm/processor.h11
-rw-r--r--arch/cris/include/asm/switch_to.h12
-rw-r--r--arch/cris/include/asm/system.h94
8 files changed, 112 insertions, 92 deletions
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index bbf093814db2..1056a5dfe04f 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -5,7 +5,7 @@
5 5
6#include <linux/compiler.h> 6#include <linux/compiler.h>
7#include <linux/types.h> 7#include <linux/types.h>
8#include <asm/system.h> 8#include <asm/cmpxchg.h>
9#include <arch/atomic.h> 9#include <arch/atomic.h>
10 10
11/* 11/*
diff --git a/arch/cris/include/asm/barrier.h b/arch/cris/include/asm/barrier.h
new file mode 100644
index 000000000000..198ad7fa6b25
--- /dev/null
+++ b/arch/cris/include/asm/barrier.h
@@ -0,0 +1,25 @@
1#ifndef __ASM_CRIS_BARRIER_H
2#define __ASM_CRIS_BARRIER_H
3
4#define nop() __asm__ __volatile__ ("nop");
5
6#define barrier() __asm__ __volatile__("": : :"memory")
7#define mb() barrier()
8#define rmb() mb()
9#define wmb() mb()
10#define read_barrier_depends() do { } while(0)
11#define set_mb(var, value) do { var = value; mb(); } while (0)
12
13#ifdef CONFIG_SMP
14#define smp_mb() mb()
15#define smp_rmb() rmb()
16#define smp_wmb() wmb()
17#define smp_read_barrier_depends() read_barrier_depends()
18#else
19#define smp_mb() barrier()
20#define smp_rmb() barrier()
21#define smp_wmb() barrier()
22#define smp_read_barrier_depends() do { } while(0)
23#endif
24
25#endif /* __ASM_CRIS_BARRIER_H */
diff --git a/arch/cris/include/asm/bitops.h b/arch/cris/include/asm/bitops.h
index a78a2d70cd8b..184066ceb1f6 100644
--- a/arch/cris/include/asm/bitops.h
+++ b/arch/cris/include/asm/bitops.h
@@ -19,7 +19,6 @@
19#endif 19#endif
20 20
21#include <arch/bitops.h> 21#include <arch/bitops.h>
22#include <asm/system.h>
23#include <linux/atomic.h> 22#include <linux/atomic.h>
24#include <linux/compiler.h> 23#include <linux/compiler.h>
25 24
diff --git a/arch/cris/include/asm/cmpxchg.h b/arch/cris/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..b756dac8aa3f
--- /dev/null
+++ b/arch/cris/include/asm/cmpxchg.h
@@ -0,0 +1,53 @@
1#ifndef __ASM_CRIS_CMPXCHG__
2#define __ASM_CRIS_CMPXCHG__
3
4#include <linux/irqflags.h>
5
6static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
7{
8 /* since Etrax doesn't have any atomic xchg instructions, we need to disable
9 irq's (if enabled) and do it with move.d's */
10 unsigned long flags,temp;
11 local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
12 switch (size) {
13 case 1:
14 *((unsigned char *)&temp) = x;
15 x = *(unsigned char *)ptr;
16 *(unsigned char *)ptr = *((unsigned char *)&temp);
17 break;
18 case 2:
19 *((unsigned short *)&temp) = x;
20 x = *(unsigned short *)ptr;
21 *(unsigned short *)ptr = *((unsigned short *)&temp);
22 break;
23 case 4:
24 temp = x;
25 x = *(unsigned long *)ptr;
26 *(unsigned long *)ptr = temp;
27 break;
28 }
29 local_irq_restore(flags); /* restore irq enable bit */
30 return x;
31}
32
33#define xchg(ptr,x) \
34 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
35
36#define tas(ptr) (xchg((ptr),1))
37
38#include <asm-generic/cmpxchg-local.h>
39
40/*
41 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
42 * them available.
43 */
44#define cmpxchg_local(ptr, o, n) \
45 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
46 (unsigned long)(n), sizeof(*(ptr))))
47#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
48
49#ifndef CONFIG_SMP
50#include <asm-generic/cmpxchg.h>
51#endif
52
53#endif /* __ASM_CRIS_CMPXCHG__ */
diff --git a/arch/cris/include/asm/exec.h b/arch/cris/include/asm/exec.h
new file mode 100644
index 000000000000..9665dab7e25b
--- /dev/null
+++ b/arch/cris/include/asm/exec.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_CRIS_EXEC_H
2#define __ASM_CRIS_EXEC_H
3
4#define arch_align_stack(x) (x)
5
6#endif /* __ASM_CRIS_EXEC_H */
diff --git a/arch/cris/include/asm/processor.h b/arch/cris/include/asm/processor.h
index 3f7248f7a1c9..4210d72a6667 100644
--- a/arch/cris/include/asm/processor.h
+++ b/arch/cris/include/asm/processor.h
@@ -10,10 +10,10 @@
10#ifndef __ASM_CRIS_PROCESSOR_H 10#ifndef __ASM_CRIS_PROCESSOR_H
11#define __ASM_CRIS_PROCESSOR_H 11#define __ASM_CRIS_PROCESSOR_H
12 12
13#include <asm/system.h>
14#include <asm/page.h> 13#include <asm/page.h>
15#include <asm/ptrace.h> 14#include <asm/ptrace.h>
16#include <arch/processor.h> 15#include <arch/processor.h>
16#include <arch/system.h>
17 17
18struct task_struct; 18struct task_struct;
19 19
@@ -72,4 +72,13 @@ static inline void release_thread(struct task_struct *dead_task)
72 72
73#define cpu_relax() barrier() 73#define cpu_relax() barrier()
74 74
75/*
76 * disable hlt during certain critical i/o operations
77 */
78#define HAVE_DISABLE_HLT
79void disable_hlt(void);
80void enable_hlt(void);
81
82void default_idle(void);
83
75#endif /* __ASM_CRIS_PROCESSOR_H */ 84#endif /* __ASM_CRIS_PROCESSOR_H */
diff --git a/arch/cris/include/asm/switch_to.h b/arch/cris/include/asm/switch_to.h
new file mode 100644
index 000000000000..d842e1163ba1
--- /dev/null
+++ b/arch/cris/include/asm/switch_to.h
@@ -0,0 +1,12 @@
1#ifndef __ASM_CRIS_SWITCH_TO_H
2#define __ASM_CRIS_SWITCH_TO_H
3
4/* the switch_to macro calls resume, an asm function in entry.S which does the actual
5 * task switching.
6 */
7
8extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
9#define switch_to(prev,next,last) last = resume(prev,next, \
10 (int)&((struct task_struct *)0)->thread)
11
12#endif /* __ASM_CRIS_SWITCH_TO_H */
diff --git a/arch/cris/include/asm/system.h b/arch/cris/include/asm/system.h
index ea10592f7d75..a7f40578587c 100644
--- a/arch/cris/include/asm/system.h
+++ b/arch/cris/include/asm/system.h
@@ -1,89 +1,5 @@
1#ifndef __ASM_CRIS_SYSTEM_H 1/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2#define __ASM_CRIS_SYSTEM_H 2#include <asm/barrier.h>
3 3#include <asm/cmpxchg.h>
4#include <linux/irqflags.h> 4#include <asm/exec.h>
5#include <arch/system.h> 5#include <asm/switch_to.h>
6
7/* the switch_to macro calls resume, an asm function in entry.S which does the actual
8 * task switching.
9 */
10
11extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
12#define switch_to(prev,next,last) last = resume(prev,next, \
13 (int)&((struct task_struct *)0)->thread)
14
15#define barrier() __asm__ __volatile__("": : :"memory")
16#define mb() barrier()
17#define rmb() mb()
18#define wmb() mb()
19#define read_barrier_depends() do { } while(0)
20#define set_mb(var, value) do { var = value; mb(); } while (0)
21
22#ifdef CONFIG_SMP
23#define smp_mb() mb()
24#define smp_rmb() rmb()
25#define smp_wmb() wmb()
26#define smp_read_barrier_depends() read_barrier_depends()
27#else
28#define smp_mb() barrier()
29#define smp_rmb() barrier()
30#define smp_wmb() barrier()
31#define smp_read_barrier_depends() do { } while(0)
32#endif
33
34#define iret()
35
36/*
37 * disable hlt during certain critical i/o operations
38 */
39#define HAVE_DISABLE_HLT
40void disable_hlt(void);
41void enable_hlt(void);
42
43static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
44{
45 /* since Etrax doesn't have any atomic xchg instructions, we need to disable
46 irq's (if enabled) and do it with move.d's */
47 unsigned long flags,temp;
48 local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
49 switch (size) {
50 case 1:
51 *((unsigned char *)&temp) = x;
52 x = *(unsigned char *)ptr;
53 *(unsigned char *)ptr = *((unsigned char *)&temp);
54 break;
55 case 2:
56 *((unsigned short *)&temp) = x;
57 x = *(unsigned short *)ptr;
58 *(unsigned short *)ptr = *((unsigned short *)&temp);
59 break;
60 case 4:
61 temp = x;
62 x = *(unsigned long *)ptr;
63 *(unsigned long *)ptr = temp;
64 break;
65 }
66 local_irq_restore(flags); /* restore irq enable bit */
67 return x;
68}
69
70#include <asm-generic/cmpxchg-local.h>
71
72/*
73 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
74 * them available.
75 */
76#define cmpxchg_local(ptr, o, n) \
77 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
78 (unsigned long)(n), sizeof(*(ptr))))
79#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
80
81#ifndef CONFIG_SMP
82#include <asm-generic/cmpxchg.h>
83#endif
84
85#define arch_align_stack(x) (x)
86
87void default_idle(void);
88
89#endif