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-rw-r--r--arch/cris/arch-v32/mm/tlb.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c
index c2d12e9c40d7..a076ef6e9389 100644
--- a/arch/cris/arch-v32/mm/tlb.c
+++ b/arch/cris/arch-v32/mm/tlb.c
@@ -30,8 +30,8 @@ do { \
30 * The TLB can host up to 256 different mm contexts at the same time. The running 30 * The TLB can host up to 256 different mm contexts at the same time. The running
31 * context is found in the PID register. Each TLB entry contains a page_id that 31 * context is found in the PID register. Each TLB entry contains a page_id that
32 * has to match the PID register to give a hit. page_id_map keeps track of which 32 * has to match the PID register to give a hit. page_id_map keeps track of which
33 * mm's is assigned to which page_id's, making sure it's known when to 33 * mm is assigned to which page_id, making sure it's known when to invalidate TLB
34 * invalidate TLB entries. 34 * entries.
35 * 35 *
36 * The last page_id is never running, it is used as an invalid page_id so that 36 * The last page_id is never running, it is used as an invalid page_id so that
37 * it's possible to make TLB entries that will nerver match. 37 * it's possible to make TLB entries that will nerver match.
@@ -188,7 +188,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
188 spin_unlock(&mmu_context_lock); 188 spin_unlock(&mmu_context_lock);
189 189
190 /* 190 /*
191 * Remember the pgd for the fault handlers. Keep a seperate copy of it 191 * Remember the pgd for the fault handlers. Keep a separate copy of it
192 * because current and active_mm might be invalid at points where 192 * because current and active_mm might be invalid at points where
193 * there's still a need to derefer the pgd. 193 * there's still a need to derefer the pgd.
194 */ 194 */