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-rw-r--r--arch/blackfin/Kconfig2
-rw-r--r--arch/blackfin/include/asm/bfin_spi3.h (renamed from arch/blackfin/include/asm/bfin6xx_spi.h)4
-rw-r--r--arch/blackfin/kernel/kgdb.c1
-rw-r--r--arch/blackfin/mach-bf561/smp.c7
-rw-r--r--arch/blackfin/mach-bf609/boards/ezkit.c19
-rw-r--r--arch/blackfin/mach-common/smp.c18
6 files changed, 24 insertions, 27 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 08c7ac650405..3b6abc54b015 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -283,7 +283,7 @@ config BF_REV_0_0
283 283
284config BF_REV_0_1 284config BF_REV_0_1
285 bool "0.1" 285 bool "0.1"
286 depends on (BF51x || BF52x || (BF54x && !BF54xM)) 286 depends on (BF51x || BF52x || (BF54x && !BF54xM) || BF60x)
287 287
288config BF_REV_0_2 288config BF_REV_0_2
289 bool "0.2" 289 bool "0.2"
diff --git a/arch/blackfin/include/asm/bfin6xx_spi.h b/arch/blackfin/include/asm/bfin_spi3.h
index 89370b653dcd..0957e65a54be 100644
--- a/arch/blackfin/include/asm/bfin6xx_spi.h
+++ b/arch/blackfin/include/asm/bfin_spi3.h
@@ -240,7 +240,7 @@ struct bfin_spi_regs {
240#define MAX_CTRL_CS 8 /* cs in spi controller */ 240#define MAX_CTRL_CS 8 /* cs in spi controller */
241 241
242/* device.platform_data for SSP controller devices */ 242/* device.platform_data for SSP controller devices */
243struct bfin6xx_spi_master { 243struct bfin_spi3_master {
244 u16 num_chipselect; 244 u16 num_chipselect;
245 u16 pin_req[7]; 245 u16 pin_req[7];
246}; 246};
@@ -248,7 +248,7 @@ struct bfin6xx_spi_master {
248/* spi_board_info.controller_data for SPI slave devices, 248/* spi_board_info.controller_data for SPI slave devices,
249 * copied to spi_device.platform_data ... mostly for dma tuning 249 * copied to spi_device.platform_data ... mostly for dma tuning
250 */ 250 */
251struct bfin6xx_spi_chip { 251struct bfin_spi3_chip {
252 u32 control; 252 u32 control;
253 u16 cs_chg_udelay; /* Some devices require 16-bit delays */ 253 u16 cs_chg_udelay; /* Some devices require 16-bit delays */
254 u32 tx_dummy_val; /* tx value for rx only transfer */ 254 u32 tx_dummy_val; /* tx value for rx only transfer */
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index b882ce22c347..fa53faeeb0e9 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -9,6 +9,7 @@
9#include <linux/ptrace.h> /* for linux pt_regs struct */ 9#include <linux/ptrace.h> /* for linux pt_regs struct */
10#include <linux/kgdb.h> 10#include <linux/kgdb.h>
11#include <linux/uaccess.h> 11#include <linux/uaccess.h>
12#include <asm/irq_regs.h>
12 13
13void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) 14void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
14{ 15{
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index ab1c617b9cfc..c77a23bc9de3 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -69,7 +69,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
69 SSYNC(); 69 SSYNC();
70 70
71 /* We are done with local CPU inits, unblock the boot CPU. */ 71 /* We are done with local CPU inits, unblock the boot CPU. */
72 set_cpu_online(cpu, true);
73 spin_lock(&boot_lock); 72 spin_lock(&boot_lock);
74 spin_unlock(&boot_lock); 73 spin_unlock(&boot_lock);
75} 74}
@@ -91,7 +90,9 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
91 SSYNC(); 90 SSYNC();
92 } 91 }
93 92
94 timeout = jiffies + 1 * HZ; 93 timeout = jiffies + HZ;
94 /* release the lock and let coreb run */
95 spin_unlock(&boot_lock);
95 while (time_before(jiffies, timeout)) { 96 while (time_before(jiffies, timeout)) {
96 if (cpu_online(cpu)) 97 if (cpu_online(cpu))
97 break; 98 break;
@@ -100,8 +101,6 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
100 } 101 }
101 102
102 if (cpu_online(cpu)) { 103 if (cpu_online(cpu)) {
103 /* release the lock and let coreb run */
104 spin_unlock(&boot_lock);
105 return 0; 104 return 0;
106 } else 105 } else
107 panic("CPU%u: processor failed to boot\n", cpu); 106 panic("CPU%u: processor failed to boot\n", cpu);
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c
index bba40aed4273..0bc47231540b 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -17,7 +17,7 @@
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/usb/musb.h> 19#include <linux/usb/musb.h>
20#include <asm/bfin6xx_spi.h> 20#include <asm/bfin_spi3.h>
21#include <asm/dma.h> 21#include <asm/dma.h>
22#include <asm/gpio.h> 22#include <asm/gpio.h>
23#include <asm/nand.h> 23#include <asm/nand.h>
@@ -108,7 +108,6 @@ static struct platform_device bfin_rotary_device = {
108static unsigned short pins[] = P_RMII0; 108static unsigned short pins[] = P_RMII0;
109 109
110static struct stmmac_mdio_bus_data phy_private_data = { 110static struct stmmac_mdio_bus_data phy_private_data = {
111 .bus_id = 0,
112 .phy_mask = 1, 111 .phy_mask = 1,
113}; 112};
114 113
@@ -745,13 +744,13 @@ static struct flash_platform_data bfin_spi_flash_data = {
745 .type = "w25q32", 744 .type = "w25q32",
746}; 745};
747 746
748static struct bfin6xx_spi_chip spi_flash_chip_info = { 747static struct bfin_spi3_chip spi_flash_chip_info = {
749 .enable_dma = true, /* use dma transfer with this chip*/ 748 .enable_dma = true, /* use dma transfer with this chip*/
750}; 749};
751#endif 750#endif
752 751
753#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 752#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
754static struct bfin6xx_spi_chip spidev_chip_info = { 753static struct bfin_spi3_chip spidev_chip_info = {
755 .enable_dma = true, 754 .enable_dma = true,
756}; 755};
757#endif 756#endif
@@ -1296,7 +1295,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1296 }, 1295 },
1297#endif 1296#endif
1298}; 1297};
1299#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE) 1298#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1300/* SPI (0) */ 1299/* SPI (0) */
1301static struct resource bfin_spi0_resource[] = { 1300static struct resource bfin_spi0_resource[] = {
1302 { 1301 {
@@ -1337,13 +1336,13 @@ static struct resource bfin_spi1_resource[] = {
1337}; 1336};
1338 1337
1339/* SPI controller data */ 1338/* SPI controller data */
1340static struct bfin6xx_spi_master bf60x_spi_master_info0 = { 1339static struct bfin_spi3_master bf60x_spi_master_info0 = {
1341 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, 1340 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1342 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 1341 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1343}; 1342};
1344 1343
1345static struct platform_device bf60x_spi_master0 = { 1344static struct platform_device bf60x_spi_master0 = {
1346 .name = "bfin-spi", 1345 .name = "bfin-spi3",
1347 .id = 0, /* Bus number */ 1346 .id = 0, /* Bus number */
1348 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 1347 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1349 .resource = bfin_spi0_resource, 1348 .resource = bfin_spi0_resource,
@@ -1352,13 +1351,13 @@ static struct platform_device bf60x_spi_master0 = {
1352 }, 1351 },
1353}; 1352};
1354 1353
1355static struct bfin6xx_spi_master bf60x_spi_master_info1 = { 1354static struct bfin_spi3_master bf60x_spi_master_info1 = {
1356 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, 1355 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1357 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, 1356 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1358}; 1357};
1359 1358
1360static struct platform_device bf60x_spi_master1 = { 1359static struct platform_device bf60x_spi_master1 = {
1361 .name = "bfin-spi", 1360 .name = "bfin-spi3",
1362 .id = 1, /* Bus number */ 1361 .id = 1, /* Bus number */
1363 .num_resources = ARRAY_SIZE(bfin_spi1_resource), 1362 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1364 .resource = bfin_spi1_resource, 1363 .resource = bfin_spi1_resource,
@@ -1534,7 +1533,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
1534 &bfin_sdh_device, 1533 &bfin_sdh_device,
1535#endif 1534#endif
1536 1535
1537#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE) 1536#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1538 &bf60x_spi_master0, 1537 &bf60x_spi_master0,
1539 &bf60x_spi_master1, 1538 &bf60x_spi_master1,
1540#endif 1539#endif
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 1bc2ce6f3c94..961d8392e5e3 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -49,6 +49,7 @@ unsigned long blackfin_iflush_l1_entry[NR_CPUS];
49struct blackfin_initial_pda __cpuinitdata initial_pda_coreb; 49struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
50 50
51enum ipi_message_type { 51enum ipi_message_type {
52 BFIN_IPI_NONE,
52 BFIN_IPI_TIMER, 53 BFIN_IPI_TIMER,
53 BFIN_IPI_RESCHEDULE, 54 BFIN_IPI_RESCHEDULE,
54 BFIN_IPI_CALL_FUNC, 55 BFIN_IPI_CALL_FUNC,
@@ -72,8 +73,8 @@ static DEFINE_SPINLOCK(stop_lock);
72 73
73/* Simple FIFO buffer, overflow leads to panic */ 74/* Simple FIFO buffer, overflow leads to panic */
74struct ipi_data { 75struct ipi_data {
75 unsigned long count; 76 atomic_t count;
76 unsigned long bits; 77 atomic_t bits;
77}; 78};
78 79
79static DEFINE_PER_CPU(struct ipi_data, bfin_ipi); 80static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
@@ -146,7 +147,6 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
146 platform_clear_ipi(cpu, IRQ_SUPPLE_1); 147 platform_clear_ipi(cpu, IRQ_SUPPLE_1);
147 148
148 bfin_ipi_data = &__get_cpu_var(bfin_ipi); 149 bfin_ipi_data = &__get_cpu_var(bfin_ipi);
149 smp_mb();
150 while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) { 150 while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
151 msg = 0; 151 msg = 0;
152 do { 152 do {
@@ -170,9 +170,8 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
170 ipi_cpu_stop(cpu); 170 ipi_cpu_stop(cpu);
171 break; 171 break;
172 } 172 }
173 atomic_dec(&bfin_ipi_data->count);
173 } while (msg < BITS_PER_LONG); 174 } while (msg < BITS_PER_LONG);
174
175 smp_mb();
176 } 175 }
177 return IRQ_HANDLED; 176 return IRQ_HANDLED;
178} 177}
@@ -195,12 +194,10 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
195 unsigned long flags; 194 unsigned long flags;
196 195
197 local_irq_save(flags); 196 local_irq_save(flags);
198 smp_mb();
199 for_each_cpu(cpu, cpumask) { 197 for_each_cpu(cpu, cpumask) {
200 bfin_ipi_data = &per_cpu(bfin_ipi, cpu); 198 bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
201 smp_mb(); 199 atomic_set_mask((1 << msg), &bfin_ipi_data->bits);
202 set_bit(msg, &bfin_ipi_data->bits); 200 atomic_inc(&bfin_ipi_data->count);
203 bfin_ipi_data->count++;
204 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1); 201 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
205 } 202 }
206 203
@@ -319,7 +316,6 @@ void __cpuinit secondary_start_kernel(void)
319 setup_secondary(cpu); 316 setup_secondary(cpu);
320 317
321 platform_secondary_init(cpu); 318 platform_secondary_init(cpu);
322
323 /* setup local core timer */ 319 /* setup local core timer */
324 bfin_local_timer_setup(); 320 bfin_local_timer_setup();
325 321
@@ -335,6 +331,8 @@ void __cpuinit secondary_start_kernel(void)
335 */ 331 */
336 calibrate_delay(); 332 calibrate_delay();
337 333
334 /* We are done with local CPU inits, unblock the boot CPU. */
335 set_cpu_online(cpu, true);
338 cpu_startup_entry(CPUHP_ONLINE); 336 cpu_startup_entry(CPUHP_ONLINE);
339} 337}
340 338