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-rw-r--r--arch/blackfin/mach-common/pm.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index d3d70fd67c16..f48a6aebb49b 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)
82 82
83 bfin_pm_standby_restore(); 83 bfin_pm_standby_restore();
84 84
85#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ 85#ifdef SIC_IWR0
86 defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
87 bfin_write_SIC_IWR0(IWR_DISABLE_ALL); 86 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
88#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) 87# ifdef SIC_IWR1
89 /* BF52x system reset does not properly reset SIC_IWR1 which 88 /* BF52x system reset does not properly reset SIC_IWR1 which
90 * will screw up the bootrom as it relies on MDMA0/1 waking it 89 * will screw up the bootrom as it relies on MDMA0/1 waking it
91 * up from IDLE instructions. See this report for more info: 90 * up from IDLE instructions. See this report for more info:
@@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
95 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); 94 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
96 else 95 else
97 bfin_write_SIC_IWR1(IWR_DISABLE_ALL); 96 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
98#else 97# endif
99 bfin_write_SIC_IWR1(IWR_DISABLE_ALL); 98# ifdef SIC_IWR2
100#endif
101# ifdef CONFIG_BF54x
102 bfin_write_SIC_IWR2(IWR_DISABLE_ALL); 99 bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
103# endif 100# endif
104#else 101#else