diff options
Diffstat (limited to 'arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h')
-rw-r--r-- | arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h | 73 |
1 files changed, 2 insertions, 71 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h index 970d310021e7..f6d924ac0c44 100644 --- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h | |||
@@ -4,36 +4,9 @@ | |||
4 | * Licensed under the GPL-2 or later | 4 | * Licensed under the GPL-2 or later |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #include <linux/serial.h> | ||
8 | #include <asm/dma.h> | 7 | #include <asm/dma.h> |
9 | #include <asm/portmux.h> | 8 | #include <asm/portmux.h> |
10 | 9 | ||
11 | #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) | ||
12 | #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) | ||
13 | #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) | ||
14 | #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) | ||
15 | #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) | ||
16 | #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) | ||
17 | #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) | ||
18 | |||
19 | #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) | ||
20 | #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) | ||
21 | #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) | ||
22 | #define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) | ||
23 | #define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) | ||
24 | #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) | ||
25 | #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) | ||
26 | #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) | ||
27 | |||
28 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | ||
29 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | ||
30 | |||
31 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | ||
32 | #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) | ||
33 | #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) | ||
34 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | ||
35 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | ||
36 | |||
37 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 10 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) |
38 | # define CONFIG_SERIAL_BFIN_CTSRTS | 11 | # define CONFIG_SERIAL_BFIN_CTSRTS |
39 | 12 | ||
@@ -54,50 +27,6 @@ | |||
54 | # endif | 27 | # endif |
55 | #endif | 28 | #endif |
56 | 29 | ||
57 | #define BFIN_UART_TX_FIFO_SIZE 2 | ||
58 | |||
59 | /* | ||
60 | * The pin configuration is different from schematic | ||
61 | */ | ||
62 | struct bfin_serial_port { | ||
63 | struct uart_port port; | ||
64 | unsigned int old_status; | ||
65 | int status_irq; | ||
66 | unsigned int lsr; | ||
67 | #ifdef CONFIG_SERIAL_BFIN_DMA | ||
68 | int tx_done; | ||
69 | int tx_count; | ||
70 | struct circ_buf rx_dma_buf; | ||
71 | struct timer_list rx_dma_timer; | ||
72 | int rx_dma_nrows; | ||
73 | unsigned int tx_dma_channel; | ||
74 | unsigned int rx_dma_channel; | ||
75 | struct work_struct tx_dma_workqueue; | ||
76 | #endif | ||
77 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
78 | struct timer_list cts_timer; | ||
79 | int cts_pin; | ||
80 | int rts_pin; | ||
81 | #endif | ||
82 | }; | ||
83 | |||
84 | /* The hardware clears the LSR bits upon read, so we need to cache | ||
85 | * some of the more fun bits in software so they don't get lost | ||
86 | * when checking the LSR in other code paths (TX). | ||
87 | */ | ||
88 | static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart) | ||
89 | { | ||
90 | unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR); | ||
91 | uart->lsr |= (lsr & (BI|FE|PE|OE)); | ||
92 | return lsr | uart->lsr; | ||
93 | } | ||
94 | |||
95 | static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart) | ||
96 | { | ||
97 | uart->lsr = 0; | ||
98 | bfin_write16(uart->port.membase + OFFSET_LSR, -1); | ||
99 | } | ||
100 | |||
101 | struct bfin_serial_res { | 30 | struct bfin_serial_res { |
102 | unsigned long uart_base_addr; | 31 | unsigned long uart_base_addr; |
103 | int uart_irq; | 32 | int uart_irq; |
@@ -146,3 +75,5 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
146 | }; | 75 | }; |
147 | 76 | ||
148 | #define DRIVER_NAME "bfin-uart" | 77 | #define DRIVER_NAME "bfin-uart" |
78 | |||
79 | #include <asm/bfin_serial.h> | ||