diff options
Diffstat (limited to 'arch/blackfin/mach-bf518/include/mach/anomaly.h')
-rw-r--r-- | arch/blackfin/mach-bf518/include/mach/anomaly.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h index e5b4bef0edae..c847bb101076 100644 --- a/arch/blackfin/mach-bf518/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h | |||
@@ -2,12 +2,12 @@ | |||
2 | * File: include/asm-blackfin/mach-bf518/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf518/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | /* This file shoule be up to date with: | 9 | /* This file shoule be up to date with: |
10 | * - ???? | 10 | * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
@@ -19,6 +19,8 @@ | |||
19 | #define ANOMALY_05000122 (1) | 19 | #define ANOMALY_05000122 (1) |
20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ | 20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
21 | #define ANOMALY_05000245 (1) | 21 | #define ANOMALY_05000245 (1) |
22 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ | ||
23 | #define ANOMALY_05000254 (1) | ||
22 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ | 24 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
23 | #define ANOMALY_05000265 (1) | 25 | #define ANOMALY_05000265 (1) |
24 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 26 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
@@ -53,6 +55,12 @@ | |||
53 | #define ANOMALY_05000443 (1) | 55 | #define ANOMALY_05000443 (1) |
54 | /* Incorrect L1 Instruction Bank B Memory Map Location */ | 56 | /* Incorrect L1 Instruction Bank B Memory Map Location */ |
55 | #define ANOMALY_05000444 (1) | 57 | #define ANOMALY_05000444 (1) |
58 | /* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */ | ||
59 | #define ANOMALY_05000452 (1) | ||
60 | /* PWM_TRIPB Signal Not Available on PG10 */ | ||
61 | #define ANOMALY_05000453 (1) | ||
62 | /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */ | ||
63 | #define ANOMALY_05000455 (1) | ||
56 | 64 | ||
57 | /* Anomalies that don't exist on this proc */ | 65 | /* Anomalies that don't exist on this proc */ |
58 | #define ANOMALY_05000125 (0) | 66 | #define ANOMALY_05000125 (0) |
@@ -65,15 +73,20 @@ | |||
65 | #define ANOMALY_05000263 (0) | 73 | #define ANOMALY_05000263 (0) |
66 | #define ANOMALY_05000266 (0) | 74 | #define ANOMALY_05000266 (0) |
67 | #define ANOMALY_05000273 (0) | 75 | #define ANOMALY_05000273 (0) |
76 | #define ANOMALY_05000278 (0) | ||
68 | #define ANOMALY_05000285 (0) | 77 | #define ANOMALY_05000285 (0) |
78 | #define ANOMALY_05000305 (0) | ||
69 | #define ANOMALY_05000307 (0) | 79 | #define ANOMALY_05000307 (0) |
70 | #define ANOMALY_05000311 (0) | 80 | #define ANOMALY_05000311 (0) |
71 | #define ANOMALY_05000312 (0) | 81 | #define ANOMALY_05000312 (0) |
72 | #define ANOMALY_05000323 (0) | 82 | #define ANOMALY_05000323 (0) |
73 | #define ANOMALY_05000353 (0) | 83 | #define ANOMALY_05000353 (0) |
74 | #define ANOMALY_05000363 (0) | 84 | #define ANOMALY_05000363 (0) |
85 | #define ANOMALY_05000380 (0) | ||
75 | #define ANOMALY_05000386 (0) | 86 | #define ANOMALY_05000386 (0) |
76 | #define ANOMALY_05000412 (0) | 87 | #define ANOMALY_05000412 (0) |
77 | #define ANOMALY_05000432 (0) | 88 | #define ANOMALY_05000432 (0) |
89 | #define ANOMALY_05000447 (0) | ||
90 | #define ANOMALY_05000448 (0) | ||
78 | 91 | ||
79 | #endif | 92 | #endif |