diff options
Diffstat (limited to 'arch/blackfin/kernel/cplb-nompu')
-rw-r--r-- | arch/blackfin/kernel/cplb-nompu/cplbinit.c | 4 | ||||
-rw-r--r-- | arch/blackfin/kernel/cplb-nompu/cplbmgr.c | 12 |
2 files changed, 12 insertions, 4 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 0e28f7595733..d6c067782e63 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c | |||
@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
53 | 53 | ||
54 | i_d = i_i = 0; | 54 | i_d = i_i = 0; |
55 | 55 | ||
56 | #ifdef CONFIG_DEBUG_HUNT_FOR_ZERO | ||
56 | /* Set up the zero page. */ | 57 | /* Set up the zero page. */ |
57 | d_tbl[i_d].addr = 0; | 58 | d_tbl[i_d].addr = 0; |
58 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 59 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
60 | i_tbl[i_i].addr = 0; | ||
61 | i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | ||
62 | #endif | ||
59 | 63 | ||
60 | /* Cover kernel memory with 4M pages. */ | 64 | /* Cover kernel memory with 4M pages. */ |
61 | addr = 0; | 65 | addr = 0; |
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c index 376249ab2694..8cbb47c7b663 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c | |||
@@ -163,12 +163,14 @@ MGR_ATTR static int icplb_miss(int cpu) | |||
163 | nr_icplb_supv_miss[cpu]++; | 163 | nr_icplb_supv_miss[cpu]++; |
164 | 164 | ||
165 | base = 0; | 165 | base = 0; |
166 | for (idx = 0; idx < icplb_nr_bounds; idx++) { | 166 | idx = 0; |
167 | do { | ||
167 | eaddr = icplb_bounds[idx].eaddr; | 168 | eaddr = icplb_bounds[idx].eaddr; |
168 | if (addr < eaddr) | 169 | if (addr < eaddr) |
169 | break; | 170 | break; |
170 | base = eaddr; | 171 | base = eaddr; |
171 | } | 172 | } while (++idx < icplb_nr_bounds); |
173 | |||
172 | if (unlikely(idx == icplb_nr_bounds)) | 174 | if (unlikely(idx == icplb_nr_bounds)) |
173 | return CPLB_NO_ADDR_MATCH; | 175 | return CPLB_NO_ADDR_MATCH; |
174 | 176 | ||
@@ -208,12 +210,14 @@ MGR_ATTR static int dcplb_miss(int cpu) | |||
208 | nr_dcplb_supv_miss[cpu]++; | 210 | nr_dcplb_supv_miss[cpu]++; |
209 | 211 | ||
210 | base = 0; | 212 | base = 0; |
211 | for (idx = 0; idx < dcplb_nr_bounds; idx++) { | 213 | idx = 0; |
214 | do { | ||
212 | eaddr = dcplb_bounds[idx].eaddr; | 215 | eaddr = dcplb_bounds[idx].eaddr; |
213 | if (addr < eaddr) | 216 | if (addr < eaddr) |
214 | break; | 217 | break; |
215 | base = eaddr; | 218 | base = eaddr; |
216 | } | 219 | } while (++idx < dcplb_nr_bounds); |
220 | |||
217 | if (unlikely(idx == dcplb_nr_bounds)) | 221 | if (unlikely(idx == dcplb_nr_bounds)) |
218 | return CPLB_NO_ADDR_MATCH; | 222 | return CPLB_NO_ADDR_MATCH; |
219 | 223 | ||