diff options
Diffstat (limited to 'arch/avr32/kernel/time.c')
-rw-r--r-- | arch/avr32/kernel/time.c | 150 |
1 files changed, 77 insertions, 73 deletions
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c index c10833f2ee0c..7014a3571ec0 100644 --- a/arch/avr32/kernel/time.c +++ b/arch/avr32/kernel/time.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2004-2006 Atmel Corporation | 2 | * Copyright (C) 2004-2007 Atmel Corporation |
3 | * | 3 | * |
4 | * Based on MIPS implementation arch/mips/kernel/time.c | 4 | * Based on MIPS implementation arch/mips/kernel/time.c |
5 | * Copyright 2001 MontaVista Software Inc. | 5 | * Copyright 2001 MontaVista Software Inc. |
@@ -20,18 +20,25 @@ | |||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/profile.h> | 21 | #include <linux/profile.h> |
22 | #include <linux/sysdev.h> | 22 | #include <linux/sysdev.h> |
23 | #include <linux/err.h> | ||
23 | 24 | ||
24 | #include <asm/div64.h> | 25 | #include <asm/div64.h> |
25 | #include <asm/sysreg.h> | 26 | #include <asm/sysreg.h> |
26 | #include <asm/io.h> | 27 | #include <asm/io.h> |
27 | #include <asm/sections.h> | 28 | #include <asm/sections.h> |
28 | 29 | ||
29 | static cycle_t read_cycle_count(void) | 30 | /* how many counter cycles in a jiffy? */ |
31 | static u32 cycles_per_jiffy; | ||
32 | |||
33 | /* the count value for the next timer interrupt */ | ||
34 | static u32 expirelo; | ||
35 | |||
36 | cycle_t __weak read_cycle_count(void) | ||
30 | { | 37 | { |
31 | return (cycle_t)sysreg_read(COUNT); | 38 | return (cycle_t)sysreg_read(COUNT); |
32 | } | 39 | } |
33 | 40 | ||
34 | static struct clocksource clocksource_avr32 = { | 41 | struct clocksource __weak clocksource_avr32 = { |
35 | .name = "avr32", | 42 | .name = "avr32", |
36 | .rating = 350, | 43 | .rating = 350, |
37 | .read = read_cycle_count, | 44 | .read = read_cycle_count, |
@@ -40,12 +47,20 @@ static struct clocksource clocksource_avr32 = { | |||
40 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 47 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
41 | }; | 48 | }; |
42 | 49 | ||
50 | irqreturn_t __weak timer_interrupt(int irq, void *dev_id); | ||
51 | |||
52 | struct irqaction timer_irqaction = { | ||
53 | .handler = timer_interrupt, | ||
54 | .flags = IRQF_DISABLED, | ||
55 | .name = "timer", | ||
56 | }; | ||
57 | |||
43 | /* | 58 | /* |
44 | * By default we provide the null RTC ops | 59 | * By default we provide the null RTC ops |
45 | */ | 60 | */ |
46 | static unsigned long null_rtc_get_time(void) | 61 | static unsigned long null_rtc_get_time(void) |
47 | { | 62 | { |
48 | return mktime(2004, 1, 1, 0, 0, 0); | 63 | return mktime(2007, 1, 1, 0, 0, 0); |
49 | } | 64 | } |
50 | 65 | ||
51 | static int null_rtc_set_time(unsigned long sec) | 66 | static int null_rtc_set_time(unsigned long sec) |
@@ -56,23 +71,14 @@ static int null_rtc_set_time(unsigned long sec) | |||
56 | static unsigned long (*rtc_get_time)(void) = null_rtc_get_time; | 71 | static unsigned long (*rtc_get_time)(void) = null_rtc_get_time; |
57 | static int (*rtc_set_time)(unsigned long) = null_rtc_set_time; | 72 | static int (*rtc_set_time)(unsigned long) = null_rtc_set_time; |
58 | 73 | ||
59 | /* how many counter cycles in a jiffy? */ | ||
60 | static unsigned long cycles_per_jiffy; | ||
61 | |||
62 | /* cycle counter value at the previous timer interrupt */ | ||
63 | static unsigned int timerhi, timerlo; | ||
64 | |||
65 | /* the count value for the next timer interrupt */ | ||
66 | static unsigned int expirelo; | ||
67 | |||
68 | static void avr32_timer_ack(void) | 74 | static void avr32_timer_ack(void) |
69 | { | 75 | { |
70 | unsigned int count; | 76 | u32 count; |
71 | 77 | ||
72 | /* Ack this timer interrupt and set the next one */ | 78 | /* Ack this timer interrupt and set the next one */ |
73 | expirelo += cycles_per_jiffy; | 79 | expirelo += cycles_per_jiffy; |
80 | /* setting COMPARE to 0 stops the COUNT-COMPARE */ | ||
74 | if (expirelo == 0) { | 81 | if (expirelo == 0) { |
75 | printk(KERN_DEBUG "expirelo == 0\n"); | ||
76 | sysreg_write(COMPARE, expirelo + 1); | 82 | sysreg_write(COMPARE, expirelo + 1); |
77 | } else { | 83 | } else { |
78 | sysreg_write(COMPARE, expirelo); | 84 | sysreg_write(COMPARE, expirelo); |
@@ -86,27 +92,56 @@ static void avr32_timer_ack(void) | |||
86 | } | 92 | } |
87 | } | 93 | } |
88 | 94 | ||
89 | static unsigned int avr32_hpt_read(void) | 95 | int __weak avr32_hpt_init(void) |
90 | { | 96 | { |
91 | return sysreg_read(COUNT); | 97 | int ret; |
98 | unsigned long mult, shift, count_hz; | ||
99 | |||
100 | count_hz = clk_get_rate(boot_cpu_data.clk); | ||
101 | shift = clocksource_avr32.shift; | ||
102 | mult = clocksource_hz2mult(count_hz, shift); | ||
103 | clocksource_avr32.mult = mult; | ||
104 | |||
105 | { | ||
106 | u64 tmp; | ||
107 | |||
108 | tmp = TICK_NSEC; | ||
109 | tmp <<= shift; | ||
110 | tmp += mult / 2; | ||
111 | do_div(tmp, mult); | ||
112 | |||
113 | cycles_per_jiffy = tmp; | ||
114 | } | ||
115 | |||
116 | ret = setup_irq(0, &timer_irqaction); | ||
117 | if (ret) { | ||
118 | pr_debug("timer: could not request IRQ 0: %d\n", ret); | ||
119 | return -ENODEV; | ||
120 | } | ||
121 | |||
122 | printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, " | ||
123 | "%lu.%03lu MHz\n", | ||
124 | ((count_hz + 500) / 1000) / 1000, | ||
125 | ((count_hz + 500) / 1000) % 1000); | ||
126 | |||
127 | return 0; | ||
92 | } | 128 | } |
93 | 129 | ||
94 | /* | 130 | /* |
95 | * Taken from MIPS c0_hpt_timer_init(). | 131 | * Taken from MIPS c0_hpt_timer_init(). |
96 | * | 132 | * |
97 | * Why is it so complicated, and what is "count"? My assumption is | 133 | * The reason COUNT is written twice is probably to make sure we don't get any |
98 | * that `count' specifies the "reference cycle", i.e. the cycle since | 134 | * timer interrupts while we are messing with the counter. |
99 | * reset that should mean "zero". The reason COUNT is written twice is | ||
100 | * probably to make sure we don't get any timer interrupts while we | ||
101 | * are messing with the counter. | ||
102 | */ | 135 | */ |
103 | static void avr32_hpt_init(unsigned int count) | 136 | int __weak avr32_hpt_start(void) |
104 | { | 137 | { |
105 | count = sysreg_read(COUNT) - count; | 138 | u32 count = sysreg_read(COUNT); |
106 | expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy; | 139 | expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy; |
107 | sysreg_write(COUNT, expirelo - cycles_per_jiffy); | 140 | sysreg_write(COUNT, expirelo - cycles_per_jiffy); |
108 | sysreg_write(COMPARE, expirelo); | 141 | sysreg_write(COMPARE, expirelo); |
109 | sysreg_write(COUNT, count); | 142 | sysreg_write(COUNT, count); |
143 | |||
144 | return 0; | ||
110 | } | 145 | } |
111 | 146 | ||
112 | /* | 147 | /* |
@@ -115,26 +150,18 @@ static void avr32_hpt_init(unsigned int count) | |||
115 | * | 150 | * |
116 | * In UP mode, it is invoked from the (global) timer_interrupt. | 151 | * In UP mode, it is invoked from the (global) timer_interrupt. |
117 | */ | 152 | */ |
118 | static void local_timer_interrupt(int irq, void *dev_id) | 153 | void local_timer_interrupt(int irq, void *dev_id) |
119 | { | 154 | { |
120 | if (current->pid) | 155 | if (current->pid) |
121 | profile_tick(CPU_PROFILING); | 156 | profile_tick(CPU_PROFILING); |
122 | update_process_times(user_mode(get_irq_regs())); | 157 | update_process_times(user_mode(get_irq_regs())); |
123 | } | 158 | } |
124 | 159 | ||
125 | static irqreturn_t | 160 | irqreturn_t __weak timer_interrupt(int irq, void *dev_id) |
126 | timer_interrupt(int irq, void *dev_id) | ||
127 | { | 161 | { |
128 | unsigned int count; | ||
129 | |||
130 | /* ack timer interrupt and try to set next interrupt */ | 162 | /* ack timer interrupt and try to set next interrupt */ |
131 | count = avr32_hpt_read(); | ||
132 | avr32_timer_ack(); | 163 | avr32_timer_ack(); |
133 | 164 | ||
134 | /* Update timerhi/timerlo for intra-jiffy calibration */ | ||
135 | timerhi += count < timerlo; /* Wrap around */ | ||
136 | timerlo = count; | ||
137 | |||
138 | /* | 165 | /* |
139 | * Call the generic timer interrupt handler | 166 | * Call the generic timer interrupt handler |
140 | */ | 167 | */ |
@@ -153,60 +180,37 @@ timer_interrupt(int irq, void *dev_id) | |||
153 | return IRQ_HANDLED; | 180 | return IRQ_HANDLED; |
154 | } | 181 | } |
155 | 182 | ||
156 | static struct irqaction timer_irqaction = { | ||
157 | .handler = timer_interrupt, | ||
158 | .flags = IRQF_DISABLED, | ||
159 | .name = "timer", | ||
160 | }; | ||
161 | |||
162 | void __init time_init(void) | 183 | void __init time_init(void) |
163 | { | 184 | { |
164 | unsigned long mult, shift, count_hz; | ||
165 | int ret; | 185 | int ret; |
166 | 186 | ||
187 | /* | ||
188 | * Make sure we don't get any COMPARE interrupts before we can | ||
189 | * handle them. | ||
190 | */ | ||
191 | sysreg_write(COMPARE, 0); | ||
192 | |||
167 | xtime.tv_sec = rtc_get_time(); | 193 | xtime.tv_sec = rtc_get_time(); |
168 | xtime.tv_nsec = 0; | 194 | xtime.tv_nsec = 0; |
169 | 195 | ||
170 | set_normalized_timespec(&wall_to_monotonic, | 196 | set_normalized_timespec(&wall_to_monotonic, |
171 | -xtime.tv_sec, -xtime.tv_nsec); | 197 | -xtime.tv_sec, -xtime.tv_nsec); |
172 | 198 | ||
173 | printk("Before time_init: count=%08lx, compare=%08lx\n", | 199 | ret = avr32_hpt_init(); |
174 | (unsigned long)sysreg_read(COUNT), | 200 | if (ret) { |
175 | (unsigned long)sysreg_read(COMPARE)); | 201 | pr_debug("timer: failed setup: %d\n", ret); |
176 | 202 | return; | |
177 | count_hz = clk_get_rate(boot_cpu_data.clk); | ||
178 | shift = clocksource_avr32.shift; | ||
179 | mult = clocksource_hz2mult(count_hz, shift); | ||
180 | clocksource_avr32.mult = mult; | ||
181 | |||
182 | printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift); | ||
183 | |||
184 | { | ||
185 | u64 tmp; | ||
186 | |||
187 | tmp = TICK_NSEC; | ||
188 | tmp <<= shift; | ||
189 | tmp += mult / 2; | ||
190 | do_div(tmp, mult); | ||
191 | |||
192 | cycles_per_jiffy = tmp; | ||
193 | } | 203 | } |
194 | 204 | ||
195 | /* This sets up the high precision timer for the first interrupt. */ | ||
196 | avr32_hpt_init(avr32_hpt_read()); | ||
197 | |||
198 | printk("After time_init: count=%08lx, compare=%08lx\n", | ||
199 | (unsigned long)sysreg_read(COUNT), | ||
200 | (unsigned long)sysreg_read(COMPARE)); | ||
201 | |||
202 | ret = clocksource_register(&clocksource_avr32); | 205 | ret = clocksource_register(&clocksource_avr32); |
203 | if (ret) | 206 | if (ret) |
204 | printk(KERN_ERR | 207 | pr_debug("timer: could not register clocksource: %d\n", ret); |
205 | "timer: could not register clocksource: %d\n", ret); | ||
206 | 208 | ||
207 | ret = setup_irq(0, &timer_irqaction); | 209 | ret = avr32_hpt_start(); |
208 | if (ret) | 210 | if (ret) { |
209 | printk("timer: could not request IRQ 0: %d\n", ret); | 211 | pr_debug("timer: failed starting: %d\n", ret); |
212 | return; | ||
213 | } | ||
210 | } | 214 | } |
211 | 215 | ||
212 | static struct sysdev_class timer_class = { | 216 | static struct sysdev_class timer_class = { |