aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c4
-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h51
-rw-r--r--arch/arm/mach-ep93xx/clock.c67
-rw-r--r--arch/arm/mach-ep93xx/core.c67
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h10
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h3
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c1
-rw-r--r--arch/arm/mach-kirkwood/common.c38
-rw-r--r--arch/arm/mach-kirkwood/common.h2
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h3
-rw-r--r--arch/arm/mach-kirkwood/openrd-setup.c13
-rw-r--r--arch/arm/mach-omap2/mcbsp.c10
-rw-r--r--arch/arm/plat-mxc/include/mach/ssi.h3
-rw-r--r--arch/arm/plat-omap/include/plat/mcbsp.h2
-rw-r--r--arch/arm/plat-omap/mcbsp.c51
-rw-r--r--arch/arm/plat-orion/include/plat/audio.h11
18 files changed, 313 insertions, 27 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 212d97084bd7..bc384d3561da 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -208,7 +208,7 @@ static struct snd_platform_data da830_evm_snd_data = {
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), 208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2, 209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction, 210 .serial_dir = da830_iis_serializer_direction,
211 .eventq_no = EVENTQ_0, 211 .asp_chan_q = EVENTQ_0,
212 .version = MCASP_VERSION_2, 212 .version = MCASP_VERSION_2,
213 .txnumevt = 1, 213 .txnumevt = 1,
214 .rxnumevt = 1, 214 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index b280efb1fa12..e8c819090268 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -343,7 +343,7 @@ static struct snd_platform_data da850_evm_snd_data = {
343 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), 343 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
344 .tdm_slots = 2, 344 .tdm_slots = 2,
345 .serial_dir = da850_iis_serializer_direction, 345 .serial_dir = da850_iis_serializer_direction,
346 .eventq_no = EVENTQ_1, 346 .asp_chan_q = EVENTQ_1,
347 .version = MCASP_VERSION_2, 347 .version = MCASP_VERSION_2,
348 .txnumevt = 1, 348 .txnumevt = 1,
349 .rxnumevt = 1, 349 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6d8889342c9f..87521f2d69c7 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -323,7 +323,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
323 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction), 323 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
324 .tdm_slots = 2, 324 .tdm_slots = 2,
325 .serial_dir = dm646x_iis_serializer_direction, 325 .serial_dir = dm646x_iis_serializer_direction,
326 .eventq_no = EVENTQ_0, 326 .asp_chan_q = EVENTQ_0,
327 }, 327 },
328 { 328 {
329 .tx_dma_offset = 0x400, 329 .tx_dma_offset = 0x400,
@@ -332,7 +332,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
332 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction), 332 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
333 .tdm_slots = 32, 333 .tdm_slots = 32,
334 .serial_dir = dm646x_dit_serializer_direction, 334 .serial_dir = dm646x_dit_serializer_direction,
335 .eventq_no = EVENTQ_0, 335 .asp_chan_q = EVENTQ_0,
336 }, 336 },
337}; 337};
338 338
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index 834725f1e81d..9aa240909a2c 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -52,7 +52,8 @@
52struct snd_platform_data { 52struct snd_platform_data {
53 u32 tx_dma_offset; 53 u32 tx_dma_offset;
54 u32 rx_dma_offset; 54 u32 rx_dma_offset;
55 enum dma_event_q eventq_no; /* event queue number */ 55 enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
56 enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
56 unsigned int codec_fmt; 57 unsigned int codec_fmt;
57 /* 58 /*
58 * Allowing this is more efficient and eliminates left and right swaps 59 * Allowing this is more efficient and eliminates left and right swaps
@@ -63,6 +64,49 @@ struct snd_platform_data {
63 unsigned sram_size_playback; 64 unsigned sram_size_playback;
64 unsigned sram_size_capture; 65 unsigned sram_size_capture;
65 66
67 /*
68 * If McBSP peripheral gets the clock from an external pin,
69 * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
70 * and MCBSP_CLKS.
71 * Depending on different hardware connections it is possible
72 * to use this setting to change the behaviour of McBSP
73 * driver. The dm365_clk_input_pin enum is available for dm365
74 */
75 int clk_input_pin;
76
77 /*
78 * This flag works when both clock and FS are outputs for the cpu
79 * and makes clock more accurate (FS is not symmetrical and the
80 * clock is very fast.
81 * The clock becoming faster is named
82 * i2s continuous serial clock (I2S_SCK) and it is an externally
83 * visible bit clock.
84 *
85 * first line : WordSelect
86 * second line : ContinuousSerialClock
87 * third line: SerialData
88 *
89 * SYMMETRICAL APPROACH:
90 * _______________________ LEFT
91 * _| RIGHT |______________________|
92 * _ _ _ _ _ _ _ _
93 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
94 * _ _ _ _ _ _ _ _
95 * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
96 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
97 *
98 * ACCURATE CLOCK APPROACH:
99 * ______________ LEFT
100 * _| RIGHT |_______________________________|
101 * _ _ _ _ _ _ _ _ _
102 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
103 * _ _ _ _ dummy cycles
104 * _/ \_ ... _/ \_/ \_ ... _/ \__________________
105 * \_/ \_/ \_/ \_/
106 *
107 */
108 bool i2s_accurate_sck;
109
66 /* McASP specific fields */ 110 /* McASP specific fields */
67 int tdm_slots; 111 int tdm_slots;
68 u8 op_mode; 112 u8 op_mode;
@@ -78,6 +122,11 @@ enum {
78 MCASP_VERSION_2, /* DA8xx/OMAPL1x */ 122 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
79}; 123};
80 124
125enum dm365_clk_input_pin {
126 MCBSP_CLKR = 0, /* DM365 */
127 MCBSP_CLKS,
128};
129
81#define INACTIVE_MODE 0 130#define INACTIVE_MODE 0
82#define TX_MODE 1 131#define TX_MODE 1
83#define RX_MODE 2 132#define RX_MODE 2
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 7f3039761d91..8bf3cec98cfa 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -43,7 +43,8 @@ static unsigned long get_uart_rate(struct clk *clk);
43 43
44static int set_keytchclk_rate(struct clk *clk, unsigned long rate); 44static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
45static int set_div_rate(struct clk *clk, unsigned long rate); 45static int set_div_rate(struct clk *clk, unsigned long rate);
46 46static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate);
47static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate);
47 48
48static struct clk clk_xtali = { 49static struct clk clk_xtali = {
49 .rate = EP93XX_EXT_CLK_RATE, 50 .rate = EP93XX_EXT_CLK_RATE,
@@ -112,6 +113,29 @@ static struct clk clk_video = {
112 .set_rate = set_div_rate, 113 .set_rate = set_div_rate,
113}; 114};
114 115
116static struct clk clk_i2s_mclk = {
117 .sw_locked = 1,
118 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
119 .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE,
120 .set_rate = set_div_rate,
121};
122
123static struct clk clk_i2s_sclk = {
124 .sw_locked = 1,
125 .parent = &clk_i2s_mclk,
126 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
127 .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA,
128 .set_rate = set_i2s_sclk_rate,
129};
130
131static struct clk clk_i2s_lrclk = {
132 .sw_locked = 1,
133 .parent = &clk_i2s_sclk,
134 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
135 .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA,
136 .set_rate = set_i2s_lrclk_rate,
137};
138
115/* DMA Clocks */ 139/* DMA Clocks */
116static struct clk clk_m2p0 = { 140static struct clk clk_m2p0 = {
117 .parent = &clk_h, 141 .parent = &clk_h,
@@ -191,6 +215,9 @@ static struct clk_lookup clocks[] = {
191 INIT_CK("ep93xx-keypad", NULL, &clk_keypad), 215 INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
192 INIT_CK("ep93xx-fb", NULL, &clk_video), 216 INIT_CK("ep93xx-fb", NULL, &clk_video),
193 INIT_CK("ep93xx-spi.0", NULL, &clk_spi), 217 INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
218 INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk),
219 INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk),
220 INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk),
194 INIT_CK(NULL, "pwm_clk", &clk_pwm), 221 INIT_CK(NULL, "pwm_clk", &clk_pwm),
195 INIT_CK(NULL, "m2p0", &clk_m2p0), 222 INIT_CK(NULL, "m2p0", &clk_m2p0),
196 INIT_CK(NULL, "m2p1", &clk_m2p1), 223 INIT_CK(NULL, "m2p1", &clk_m2p1),
@@ -401,6 +428,44 @@ static int set_div_rate(struct clk *clk, unsigned long rate)
401 return 0; 428 return 0;
402} 429}
403 430
431static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate)
432{
433 unsigned val = __raw_readl(clk->enable_reg);
434
435 if (rate == clk_i2s_mclk.rate / 2)
436 ep93xx_syscon_swlocked_write(val & ~EP93XX_I2SCLKDIV_SDIV,
437 clk->enable_reg);
438 else if (rate == clk_i2s_mclk.rate / 4)
439 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_SDIV,
440 clk->enable_reg);
441 else
442 return -EINVAL;
443
444 clk_i2s_sclk.rate = rate;
445 return 0;
446}
447
448static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate)
449{
450 unsigned val = __raw_readl(clk->enable_reg) &
451 ~EP93XX_I2SCLKDIV_LRDIV_MASK;
452
453 if (rate == clk_i2s_sclk.rate / 32)
454 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV32,
455 clk->enable_reg);
456 else if (rate == clk_i2s_sclk.rate / 64)
457 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV64,
458 clk->enable_reg);
459 else if (rate == clk_i2s_sclk.rate / 128)
460 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV128,
461 clk->enable_reg);
462 else
463 return -EINVAL;
464
465 clk_i2s_lrclk.rate = rate;
466 return 0;
467}
468
404int clk_set_rate(struct clk *clk, unsigned long rate) 469int clk_set_rate(struct clk *clk, unsigned long rate)
405{ 470{
406 if (clk->set_rate) 471 if (clk->set_rate)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 8e37a045188c..4cb55d3902ff 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -758,6 +758,73 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev)
758} 758}
759EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 759EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
760 760
761/*************************************************************************
762 * EP93xx I2S audio peripheral handling
763 *************************************************************************/
764static struct resource ep93xx_i2s_resource[] = {
765 {
766 .start = EP93XX_I2S_PHYS_BASE,
767 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
768 .flags = IORESOURCE_MEM,
769 },
770};
771
772static struct platform_device ep93xx_i2s_device = {
773 .name = "ep93xx-i2s",
774 .id = -1,
775 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
776 .resource = ep93xx_i2s_resource,
777};
778
779void __init ep93xx_register_i2s(void)
780{
781 platform_device_register(&ep93xx_i2s_device);
782}
783
784#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
785 EP93XX_SYSCON_DEVCFG_I2SONAC97)
786
787#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
788 EP93XX_SYSCON_I2SCLKDIV_SPOL)
789
790int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
791{
792 unsigned val;
793
794 /* Sanity check */
795 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
796 return -EINVAL;
797 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
798 return -EINVAL;
799
800 /* Must have only one of I2SONSSP/I2SONAC97 set */
801 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
802 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
803 return -EINVAL;
804
805 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
806 ep93xx_devcfg_set_bits(i2s_pins);
807
808 /*
809 * This is potentially racy with the clock api for i2s_mclk, sclk and
810 * lrclk. Since the i2s driver is the only user of those clocks we
811 * rely on it to prevent parallel use of this function and the
812 * clock api for the i2s clocks.
813 */
814 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
815 val &= ~EP93XX_I2SCLKDIV_MASK;
816 val |= i2s_config;
817 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
818
819 return 0;
820}
821EXPORT_SYMBOL(ep93xx_i2s_acquire);
822
823void ep93xx_i2s_release(void)
824{
825 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
826}
827EXPORT_SYMBOL(ep93xx_i2s_release);
761 828
762extern void ep93xx_gpio_init(void); 829extern void ep93xx_gpio_init(void);
763 830
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index b1e096f0c2d2..c54b3e56ba63 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -93,6 +93,7 @@
93/* APB peripherals */ 93/* APB peripherals */
94#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) 94#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
95 95
96#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
96#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) 97#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
97 98
98#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) 99#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
@@ -194,6 +195,15 @@
194#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) 195#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
195#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) 196#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
196#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 197#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
198#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
199#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
200#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
201#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
202#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
203#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
204#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
205#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
206#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
197#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) 207#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
198#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) 208#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
199#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) 209#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index a6c09176334c..3330b36d79e6 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -58,6 +58,9 @@ void ep93xx_pwm_release_gpio(struct platform_device *pdev);
58void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data); 58void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
59int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); 59int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
60void ep93xx_keypad_release_gpio(struct platform_device *pdev); 60void ep93xx_keypad_release_gpio(struct platform_device *pdev);
61void ep93xx_register_i2s(void);
62int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config);
63void ep93xx_i2s_release(void);
61 64
62void ep93xx_init_devices(void); 65void ep93xx_init_devices(void);
63extern struct sys_timer ep93xx_timer; 66extern struct sys_timer ep93xx_timer;
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 38deaee40397..a12c89301297 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -157,6 +157,7 @@ static void __init snappercl15_init_machine(void)
157 ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data, 157 ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
158 ARRAY_SIZE(snappercl15_i2c_data)); 158 ARRAY_SIZE(snappercl15_i2c_data));
159 ep93xx_register_fb(&snappercl15_fb_info); 159 ep93xx_register_fb(&snappercl15_fb_info);
160 ep93xx_register_i2s();
160 platform_device_register(&snappercl15_nand_device); 161 platform_device_register(&snappercl15_nand_device);
161} 162}
162 163
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 9dd67c7b4459..1c82d4290dad 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -25,6 +25,7 @@
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <mach/kirkwood.h> 26#include <mach/kirkwood.h>
27#include <mach/bridge-regs.h> 27#include <mach/bridge-regs.h>
28#include <plat/audio.h>
28#include <plat/cache-feroceon-l2.h> 29#include <plat/cache-feroceon-l2.h>
29#include <plat/ehci-orion.h> 30#include <plat/ehci-orion.h>
30#include <plat/mvsdio.h> 31#include <plat/mvsdio.h>
@@ -871,6 +872,42 @@ struct sys_timer kirkwood_timer = {
871 .init = kirkwood_timer_init, 872 .init = kirkwood_timer_init,
872}; 873};
873 874
875/*****************************************************************************
876 * Audio
877 ****************************************************************************/
878static struct resource kirkwood_i2s_resources[] = {
879 [0] = {
880 .start = AUDIO_PHYS_BASE,
881 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
882 .flags = IORESOURCE_MEM,
883 },
884 [1] = {
885 .start = IRQ_KIRKWOOD_I2S,
886 .end = IRQ_KIRKWOOD_I2S,
887 .flags = IORESOURCE_IRQ,
888 },
889};
890
891static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
892 .dram = &kirkwood_mbus_dram_info,
893 .burst = 128,
894};
895
896static struct platform_device kirkwood_i2s_device = {
897 .name = "kirkwood-i2s",
898 .id = -1,
899 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
900 .resource = kirkwood_i2s_resources,
901 .dev = {
902 .platform_data = &kirkwood_i2s_data,
903 },
904};
905
906void __init kirkwood_audio_init(void)
907{
908 kirkwood_clk_ctrl |= CGC_AUDIO;
909 platform_device_register(&kirkwood_i2s_device);
910}
874 911
875/***************************************************************************** 912/*****************************************************************************
876 * General 913 * General
@@ -939,6 +976,7 @@ void __init kirkwood_init(void)
939 kirkwood_spi_plat_data.tclk = kirkwood_tclk; 976 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
940 kirkwood_uart0_data[0].uartclk = kirkwood_tclk; 977 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
941 kirkwood_uart1_data[0].uartclk = kirkwood_tclk; 978 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
979 kirkwood_i2s_data.tclk = kirkwood_tclk;
942 980
943 /* 981 /*
944 * Disable propagation of mbus errors to the CPU local bus, 982 * Disable propagation of mbus errors to the CPU local bus,
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 5b2c1c18d641..95bb0a73adfb 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -17,6 +17,7 @@ struct mv_sata_platform_data;
17struct mvsdio_platform_data; 17struct mvsdio_platform_data;
18struct mtd_partition; 18struct mtd_partition;
19struct mtd_info; 19struct mtd_info;
20struct kirkwood_asoc_platform_data;
20 21
21#define KW_PCIE0 (1 << 0) 22#define KW_PCIE0 (1 << 0)
22#define KW_PCIE1 (1 << 1) 23#define KW_PCIE1 (1 << 1)
@@ -46,6 +47,7 @@ void kirkwood_uart0_init(void);
46void kirkwood_uart1_init(void); 47void kirkwood_uart1_init(void);
47void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); 48void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
48void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); 49void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
50void kirkwood_audio_init(void);
49 51
50extern int kirkwood_tclk; 52extern int kirkwood_tclk;
51extern struct sys_timer kirkwood_timer; 53extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index d141af4c2744..93fc2ec95e76 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -111,6 +111,9 @@
111 111
112#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) 112#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
113 113
114#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0xA0000)
115#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0xA0000)
116
114/* 117/*
115 * Supported devices and revisions. 118 * Supported devices and revisions.
116 */ 119 */
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index fd64cd2b4e0a..fd06be618815 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -15,6 +15,7 @@
15#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
16#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
17#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
18#include <linux/i2c.h>
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <mach/kirkwood.h> 21#include <mach/kirkwood.h>
@@ -60,6 +61,12 @@ static unsigned int openrd_mpp_config[] __initdata = {
60 0 61 0
61}; 62};
62 63
64static struct i2c_board_info i2c_board_info[] __initdata = {
65 {
66 I2C_BOARD_INFO("cs42l51", 0x4a),
67 },
68};
69
63static void __init openrd_init(void) 70static void __init openrd_init(void)
64{ 71{
65 /* 72 /*
@@ -86,6 +93,12 @@ static void __init openrd_init(void)
86 kirkwood_sdio_init(&openrd_mvsdio_data); 93 kirkwood_sdio_init(&openrd_mvsdio_data);
87 94
88 kirkwood_i2c_init(); 95 kirkwood_i2c_init();
96
97 if (machine_is_openrd_client()) {
98 i2c_register_board_info(0, i2c_board_info,
99 ARRAY_SIZE(i2c_board_info));
100 kirkwood_audio_init();
101 }
89} 102}
90 103
91static int __init openrd_pci_init(void) 104static int __init openrd_pci_init(void)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index c29337074ad3..8fb5e5345557 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -133,7 +133,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
133 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 133 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
134 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 134 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
135 .ops = &omap2_mcbsp_ops, 135 .ops = &omap2_mcbsp_ops,
136 .buffer_size = 0x6F, 136 .buffer_size = 0x80, /* The FIFO has 128 locations */
137 }, 137 },
138 { 138 {
139 .phys_base = OMAP34XX_MCBSP2_BASE, 139 .phys_base = OMAP34XX_MCBSP2_BASE,
@@ -143,7 +143,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
143 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 143 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
144 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 144 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
145 .ops = &omap2_mcbsp_ops, 145 .ops = &omap2_mcbsp_ops,
146 .buffer_size = 0x3FF, 146 .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */
147 }, 147 },
148 { 148 {
149 .phys_base = OMAP34XX_MCBSP3_BASE, 149 .phys_base = OMAP34XX_MCBSP3_BASE,
@@ -153,7 +153,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
153 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 153 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
154 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 154 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
155 .ops = &omap2_mcbsp_ops, 155 .ops = &omap2_mcbsp_ops,
156 .buffer_size = 0x6F, 156 .buffer_size = 0x80, /* The FIFO has 128 locations */
157 }, 157 },
158 { 158 {
159 .phys_base = OMAP34XX_MCBSP4_BASE, 159 .phys_base = OMAP34XX_MCBSP4_BASE,
@@ -162,7 +162,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
162 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 162 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
163 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 163 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
164 .ops = &omap2_mcbsp_ops, 164 .ops = &omap2_mcbsp_ops,
165 .buffer_size = 0x6F, 165 .buffer_size = 0x80, /* The FIFO has 128 locations */
166 }, 166 },
167 { 167 {
168 .phys_base = OMAP34XX_MCBSP5_BASE, 168 .phys_base = OMAP34XX_MCBSP5_BASE,
@@ -171,7 +171,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
171 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 171 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
172 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 172 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
173 .ops = &omap2_mcbsp_ops, 173 .ops = &omap2_mcbsp_ops,
174 .buffer_size = 0x6F, 174 .buffer_size = 0x80, /* The FIFO has 128 locations */
175 }, 175 },
176}; 176};
177#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 177#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
diff --git a/arch/arm/plat-mxc/include/mach/ssi.h b/arch/arm/plat-mxc/include/mach/ssi.h
index c34ded523f10..63f3c2804239 100644
--- a/arch/arm/plat-mxc/include/mach/ssi.h
+++ b/arch/arm/plat-mxc/include/mach/ssi.h
@@ -10,6 +10,9 @@ struct imx_ssi_platform_data {
10 unsigned int flags; 10 unsigned int flags;
11#define IMX_SSI_DMA (1 << 0) 11#define IMX_SSI_DMA (1 << 0)
12#define IMX_SSI_USE_AC97 (1 << 1) 12#define IMX_SSI_USE_AC97 (1 << 1)
13#define IMX_SSI_NET (1 << 2)
14#define IMX_SSI_SYN (1 << 3)
15#define IMX_SSI_USE_I2S_SLAVE (1 << 4)
13 void (*ac97_reset) (struct snd_ac97 *ac97); 16 void (*ac97_reset) (struct snd_ac97 *ac97);
14 void (*ac97_warm_reset)(struct snd_ac97 *ac97); 17 void (*ac97_warm_reset)(struct snd_ac97 *ac97);
15}; 18};
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 975744f10a58..b4ff6a11a8f2 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -473,6 +473,7 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
473void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); 473void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
474u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); 474u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
475u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); 475u16 omap_mcbsp_get_max_rx_threshold(unsigned int id);
476u16 omap_mcbsp_get_fifo_size(unsigned int id);
476u16 omap_mcbsp_get_tx_delay(unsigned int id); 477u16 omap_mcbsp_get_tx_delay(unsigned int id);
477u16 omap_mcbsp_get_rx_delay(unsigned int id); 478u16 omap_mcbsp_get_rx_delay(unsigned int id);
478int omap_mcbsp_get_dma_op_mode(unsigned int id); 479int omap_mcbsp_get_dma_op_mode(unsigned int id);
@@ -483,6 +484,7 @@ static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
483{ } 484{ }
484static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; } 485static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; }
485static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; } 486static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; }
487static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
486static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; } 488static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
487static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; } 489static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
488static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; } 490static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 7e669c9744d8..e31496e35b0f 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -481,9 +481,9 @@ int omap_st_is_enabled(unsigned int id)
481EXPORT_SYMBOL(omap_st_is_enabled); 481EXPORT_SYMBOL(omap_st_is_enabled);
482 482
483/* 483/*
484 * omap_mcbsp_set_tx_threshold configures how to deal 484 * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
485 * with transmit threshold. the threshold value and handler can be 485 * The threshold parameter is 1 based, and it is converted (threshold - 1)
486 * configure in here. 486 * for the THRSH2 register.
487 */ 487 */
488void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) 488void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
489{ 489{
@@ -498,14 +498,15 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
498 } 498 }
499 mcbsp = id_to_mcbsp_ptr(id); 499 mcbsp = id_to_mcbsp_ptr(id);
500 500
501 MCBSP_WRITE(mcbsp, THRSH2, threshold); 501 if (threshold && threshold <= mcbsp->max_tx_thres)
502 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
502} 503}
503EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); 504EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
504 505
505/* 506/*
506 * omap_mcbsp_set_rx_threshold configures how to deal 507 * omap_mcbsp_set_rx_threshold configures the receive threshold in words.
507 * with receive threshold. the threshold value and handler can be 508 * The threshold parameter is 1 based, and it is converted (threshold - 1)
508 * configure in here. 509 * for the THRSH1 register.
509 */ 510 */
510void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) 511void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
511{ 512{
@@ -520,7 +521,8 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
520 } 521 }
521 mcbsp = id_to_mcbsp_ptr(id); 522 mcbsp = id_to_mcbsp_ptr(id);
522 523
523 MCBSP_WRITE(mcbsp, THRSH1, threshold); 524 if (threshold && threshold <= mcbsp->max_rx_thres)
525 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
524} 526}
525EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); 527EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
526 528
@@ -560,8 +562,20 @@ u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
560} 562}
561EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); 563EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
562 564
563#define MCBSP2_FIFO_SIZE 0x500 /* 1024 + 256 locations */ 565u16 omap_mcbsp_get_fifo_size(unsigned int id)
564#define MCBSP1345_FIFO_SIZE 0x80 /* 128 locations */ 566{
567 struct omap_mcbsp *mcbsp;
568
569 if (!omap_mcbsp_check_valid_id(id)) {
570 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
571 return -ENODEV;
572 }
573 mcbsp = id_to_mcbsp_ptr(id);
574
575 return mcbsp->pdata->buffer_size;
576}
577EXPORT_SYMBOL(omap_mcbsp_get_fifo_size);
578
565/* 579/*
566 * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO 580 * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
567 */ 581 */
@@ -580,10 +594,7 @@ u16 omap_mcbsp_get_tx_delay(unsigned int id)
580 buffstat = MCBSP_READ(mcbsp, XBUFFSTAT); 594 buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
581 595
582 /* Number of slots are different in McBSP ports */ 596 /* Number of slots are different in McBSP ports */
583 if (mcbsp->id == 2) 597 return mcbsp->pdata->buffer_size - buffstat;
584 return MCBSP2_FIFO_SIZE - buffstat;
585 else
586 return MCBSP1345_FIFO_SIZE - buffstat;
587} 598}
588EXPORT_SYMBOL(omap_mcbsp_get_tx_delay); 599EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);
589 600
@@ -1683,8 +1694,16 @@ static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
1683{ 1694{
1684 mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; 1695 mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
1685 if (cpu_is_omap34xx()) { 1696 if (cpu_is_omap34xx()) {
1686 mcbsp->max_tx_thres = max_thres(mcbsp); 1697 /*
1687 mcbsp->max_rx_thres = max_thres(mcbsp); 1698 * Initially configure the maximum thresholds to a safe value.
1699 * The McBSP FIFO usage with these values should not go under
1700 * 16 locations.
1701 * If the whole FIFO without safety buffer is used, than there
1702 * is a possibility that the DMA will be not able to push the
1703 * new data on time, causing channel shifts in runtime.
1704 */
1705 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
1706 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
1688 /* 1707 /*
1689 * REVISIT: Set dmap_op_mode to THRESHOLD as default 1708 * REVISIT: Set dmap_op_mode to THRESHOLD as default
1690 * for mcbsp2 instances. 1709 * for mcbsp2 instances.
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
new file mode 100644
index 000000000000..9cf1f781329b
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/audio.h
@@ -0,0 +1,11 @@
1#ifndef __PLAT_AUDIO_H
2#define __PLAT_AUDIO_H
3
4#include <linux/mbus.h>
5
6struct kirkwood_asoc_platform_data {
7 u32 tclk;
8 struct mbus_dram_target_info *dram;
9 int burst;
10};
11#endif