diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/plat-omap/sram.c | 25 |
1 files changed, 5 insertions, 20 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index fa5297d643d3..e1493d83a7c8 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -242,20 +242,13 @@ void * omap_sram_push(void * start, unsigned long size) | |||
242 | return (void *)omap_sram_ceil; | 242 | return (void *)omap_sram_ceil; |
243 | } | 243 | } |
244 | 244 | ||
245 | static void omap_sram_error(void) | ||
246 | { | ||
247 | panic("Uninitialized SRAM function\n"); | ||
248 | } | ||
249 | |||
250 | #ifdef CONFIG_ARCH_OMAP1 | 245 | #ifdef CONFIG_ARCH_OMAP1 |
251 | 246 | ||
252 | static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); | 247 | static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); |
253 | 248 | ||
254 | void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) | 249 | void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) |
255 | { | 250 | { |
256 | if (!_omap_sram_reprogram_clock) | 251 | BUG_ON(!_omap_sram_reprogram_clock); |
257 | omap_sram_error(); | ||
258 | |||
259 | _omap_sram_reprogram_clock(dpllctl, ckctl); | 252 | _omap_sram_reprogram_clock(dpllctl, ckctl); |
260 | } | 253 | } |
261 | 254 | ||
@@ -280,9 +273,7 @@ static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | |||
280 | void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | 273 | void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
281 | u32 base_cs, u32 force_unlock) | 274 | u32 base_cs, u32 force_unlock) |
282 | { | 275 | { |
283 | if (!_omap2_sram_ddr_init) | 276 | BUG_ON(!_omap2_sram_ddr_init); |
284 | omap_sram_error(); | ||
285 | |||
286 | _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, | 277 | _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, |
287 | base_cs, force_unlock); | 278 | base_cs, force_unlock); |
288 | } | 279 | } |
@@ -292,9 +283,7 @@ static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, | |||
292 | 283 | ||
293 | void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) | 284 | void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) |
294 | { | 285 | { |
295 | if (!_omap2_sram_reprogram_sdrc) | 286 | BUG_ON(!_omap2_sram_reprogram_sdrc); |
296 | omap_sram_error(); | ||
297 | |||
298 | _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); | 287 | _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); |
299 | } | 288 | } |
300 | 289 | ||
@@ -302,9 +291,7 @@ static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | |||
302 | 291 | ||
303 | u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) | 292 | u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) |
304 | { | 293 | { |
305 | if (!_omap2_set_prcm) | 294 | BUG_ON(!_omap2_set_prcm); |
306 | omap_sram_error(); | ||
307 | |||
308 | return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); | 295 | return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); |
309 | } | 296 | } |
310 | #endif | 297 | #endif |
@@ -360,9 +347,7 @@ static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl, | |||
360 | u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, | 347 | u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, |
361 | u32 sdrc_actim_ctrlb, u32 m2) | 348 | u32 sdrc_actim_ctrlb, u32 m2) |
362 | { | 349 | { |
363 | if (!_omap3_sram_configure_core_dpll) | 350 | BUG_ON(!_omap3_sram_configure_core_dpll); |
364 | omap_sram_error(); | ||
365 | |||
366 | return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, | 351 | return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, |
367 | sdrc_actim_ctrla, | 352 | sdrc_actim_ctrla, |
368 | sdrc_actim_ctrlb, m2); | 353 | sdrc_actim_ctrlb, m2); |