diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-pxa/e740.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-pxa/e750.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-pxa/h5000.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/eseries-gpio.h | 15 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-ssp.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2412/dma.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2440/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/audio.h (renamed from arch/arm/mach-s3c2410/include/mach/audio.h) | 0 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h | 75 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/include/plat/regs-iis.h | 77 |
13 files changed, 201 insertions, 6 deletions
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c index 6d48e00f4f0b..a6fff782e7a8 100644 --- a/arch/arm/mach-pxa/e740.c +++ b/arch/arm/mach-pxa/e740.c | |||
@@ -135,6 +135,11 @@ static unsigned long e740_pin_config[] __initdata = { | |||
135 | /* IrDA */ | 135 | /* IrDA */ |
136 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | 136 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, |
137 | 137 | ||
138 | /* Audio power control */ | ||
139 | GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */ | ||
140 | GPIO40_GPIO, /* Mic amp power */ | ||
141 | GPIO41_GPIO, /* Headphone amp power */ | ||
142 | |||
138 | /* PC Card */ | 143 | /* PC Card */ |
139 | GPIO8_GPIO, /* CD0 */ | 144 | GPIO8_GPIO, /* CD0 */ |
140 | GPIO44_GPIO, /* CD1 */ | 145 | GPIO44_GPIO, /* CD1 */ |
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c index be1ab8edb973..665066fd280e 100644 --- a/arch/arm/mach-pxa/e750.c +++ b/arch/arm/mach-pxa/e750.c | |||
@@ -133,6 +133,11 @@ static unsigned long e750_pin_config[] __initdata = { | |||
133 | /* IrDA */ | 133 | /* IrDA */ |
134 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | 134 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, |
135 | 135 | ||
136 | /* Audio power control */ | ||
137 | GPIO4_GPIO, /* Headphone amp power */ | ||
138 | GPIO7_GPIO, /* Speaker amp power */ | ||
139 | GPIO37_GPIO, /* Headphone detect */ | ||
140 | |||
136 | /* PC Card */ | 141 | /* PC Card */ |
137 | GPIO8_GPIO, /* CD0 */ | 142 | GPIO8_GPIO, /* CD0 */ |
138 | GPIO44_GPIO, /* CD1 */ | 143 | GPIO44_GPIO, /* CD1 */ |
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index da6e4422c0f3..295ec413d804 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c | |||
@@ -153,6 +153,13 @@ static unsigned long h5000_pin_config[] __initdata = { | |||
153 | GPIO23_SSP1_SCLK, | 153 | GPIO23_SSP1_SCLK, |
154 | GPIO25_SSP1_TXD, | 154 | GPIO25_SSP1_TXD, |
155 | GPIO26_SSP1_RXD, | 155 | GPIO26_SSP1_RXD, |
156 | |||
157 | /* I2S */ | ||
158 | GPIO28_I2S_BITCLK_OUT, | ||
159 | GPIO29_I2S_SDATA_IN, | ||
160 | GPIO30_I2S_SDATA_OUT, | ||
161 | GPIO31_I2S_SYNC, | ||
162 | GPIO32_I2S_SYSCLK, | ||
156 | }; | 163 | }; |
157 | 164 | ||
158 | /* | 165 | /* |
diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h index efbd2aa9ecec..f3e5509820d7 100644 --- a/arch/arm/mach-pxa/include/mach/eseries-gpio.h +++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h | |||
@@ -45,6 +45,21 @@ | |||
45 | /* e7xx IrDA power control */ | 45 | /* e7xx IrDA power control */ |
46 | #define GPIO_E7XX_IR_OFF 38 | 46 | #define GPIO_E7XX_IR_OFF 38 |
47 | 47 | ||
48 | /* e740 audio control GPIOs */ | ||
49 | #define GPIO_E740_WM9705_nAVDD2 16 | ||
50 | #define GPIO_E740_MIC_ON 40 | ||
51 | #define GPIO_E740_AMP_ON 41 | ||
52 | |||
53 | /* e750 audio control GPIOs */ | ||
54 | #define GPIO_E750_HP_AMP_OFF 4 | ||
55 | #define GPIO_E750_SPK_AMP_OFF 7 | ||
56 | #define GPIO_E750_HP_DETECT 37 | ||
57 | |||
58 | /* e800 audio control GPIOs */ | ||
59 | #define GPIO_E800_HP_DETECT 81 | ||
60 | #define GPIO_E800_HP_AMP_OFF 82 | ||
61 | #define GPIO_E800_SPK_AMP_ON 83 | ||
62 | |||
48 | /* ASIC related GPIOs */ | 63 | /* ASIC related GPIOs */ |
49 | #define GPIO_ESERIES_TMIO_IRQ 5 | 64 | #define GPIO_ESERIES_TMIO_IRQ 5 |
50 | #define GPIO_ESERIES_TMIO_PCLR 19 | 65 | #define GPIO_ESERIES_TMIO_PCLR 19 |
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h index cf31986f6f05..018f6d65b57b 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ssp.h +++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h | |||
@@ -50,7 +50,7 @@ | |||
50 | #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ | 50 | #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ |
51 | #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ | 51 | #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ |
52 | #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ | 52 | #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ |
53 | #define SSCR0_ADC (1 << 30) /* Audio clock select */ | 53 | #define SSCR0_ACS (1 << 30) /* Audio clock select */ |
54 | #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ | 54 | #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ |
55 | #endif | 55 | #endif |
56 | 56 | ||
@@ -109,6 +109,11 @@ | |||
109 | #define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ | 109 | #define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ |
110 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ | 110 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ |
111 | 111 | ||
112 | #if defined(CONFIG_PXA3xx) | ||
113 | #define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */ | ||
114 | #define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */ | ||
115 | #endif | ||
116 | |||
112 | #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ | 117 | #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ |
113 | #define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ | 118 | #define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ |
114 | #define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ | 119 | #define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 6d447c9ce8ab..0d62d311d41a 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -105,6 +105,12 @@ static unsigned long spitz_pin_config[] __initdata = { | |||
105 | GPIO57_nIOIS16, | 105 | GPIO57_nIOIS16, |
106 | GPIO104_PSKTSEL, | 106 | GPIO104_PSKTSEL, |
107 | 107 | ||
108 | /* I2S */ | ||
109 | GPIO28_I2S_BITCLK_OUT, | ||
110 | GPIO29_I2S_SDATA_IN, | ||
111 | GPIO30_I2S_SDATA_OUT, | ||
112 | GPIO31_I2S_SYNC, | ||
113 | |||
108 | /* MMC */ | 114 | /* MMC */ |
109 | GPIO32_MMC_CLK, | 115 | GPIO32_MMC_CLK, |
110 | GPIO112_MMC_CMD, | 116 | GPIO112_MMC_CMD, |
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 552b4c778fdc..440c014e24b3 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <mach/regs-mem.h> | 28 | #include <mach/regs-mem.h> |
29 | #include <mach/regs-lcd.h> | 29 | #include <mach/regs-lcd.h> |
30 | #include <mach/regs-sdi.h> | 30 | #include <mach/regs-sdi.h> |
31 | #include <asm/plat-s3c24xx/regs-iis.h> | 31 | #include <plat/regs-iis.h> |
32 | #include <plat/regs-spi.h> | 32 | #include <plat/regs-spi.h> |
33 | 33 | ||
34 | static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { | 34 | static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { |
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 919856c9433f..9e3478506c6f 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c | |||
@@ -29,8 +29,8 @@ | |||
29 | #include <mach/regs-mem.h> | 29 | #include <mach/regs-mem.h> |
30 | #include <mach/regs-lcd.h> | 30 | #include <mach/regs-lcd.h> |
31 | #include <mach/regs-sdi.h> | 31 | #include <mach/regs-sdi.h> |
32 | #include <asm/plat-s3c24xx/regs-s3c2412-iis.h> | 32 | #include <plat/regs-s3c2412-iis.h> |
33 | #include <asm/plat-s3c24xx/regs-iis.h> | 33 | #include <plat/regs-iis.h> |
34 | #include <plat/regs-spi.h> | 34 | #include <plat/regs-spi.h> |
35 | 35 | ||
36 | #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } | 36 | #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } |
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index 5b5ee0b8f4e0..69b6cf34df47 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <mach/regs-mem.h> | 28 | #include <mach/regs-mem.h> |
29 | #include <mach/regs-lcd.h> | 29 | #include <mach/regs-lcd.h> |
30 | #include <mach/regs-sdi.h> | 30 | #include <mach/regs-sdi.h> |
31 | #include <asm/plat-s3c24xx/regs-iis.h> | 31 | #include <plat/regs-iis.h> |
32 | #include <plat/regs-spi.h> | 32 | #include <plat/regs-spi.h> |
33 | 33 | ||
34 | static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { | 34 | static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { |
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index 2a58a4d5aa5a..8430e5829186 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <mach/regs-mem.h> | 29 | #include <mach/regs-mem.h> |
30 | #include <mach/regs-lcd.h> | 30 | #include <mach/regs-lcd.h> |
31 | #include <mach/regs-sdi.h> | 31 | #include <mach/regs-sdi.h> |
32 | #include <asm/plat-s3c24xx/regs-iis.h> | 32 | #include <plat/regs-iis.h> |
33 | #include <plat/regs-spi.h> | 33 | #include <plat/regs-spi.h> |
34 | 34 | ||
35 | #define MAP(x) { \ | 35 | #define MAP(x) { \ |
diff --git a/arch/arm/mach-s3c2410/include/mach/audio.h b/arch/arm/plat-s3c/include/plat/audio.h index de0e8da48bc3..de0e8da48bc3 100644 --- a/arch/arm/mach-s3c2410/include/mach/audio.h +++ b/arch/arm/plat-s3c/include/plat/audio.h | |||
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h new file mode 100644 index 000000000000..0fad7571030e --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h | |||
@@ -0,0 +1,75 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h | ||
2 | * | ||
3 | * Copyright 2007 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2412 IIS register definition | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_S3C2412_IIS_H | ||
14 | #define __ASM_ARCH_REGS_S3C2412_IIS_H | ||
15 | |||
16 | #define S3C2412_IISCON (0x00) | ||
17 | #define S3C2412_IISMOD (0x04) | ||
18 | #define S3C2412_IISFIC (0x08) | ||
19 | #define S3C2412_IISPSR (0x0C) | ||
20 | #define S3C2412_IISTXD (0x10) | ||
21 | #define S3C2412_IISRXD (0x14) | ||
22 | |||
23 | #define S3C2412_IISCON_LRINDEX (1 << 11) | ||
24 | #define S3C2412_IISCON_TXFIFO_EMPTY (1 << 10) | ||
25 | #define S3C2412_IISCON_RXFIFO_EMPTY (1 << 9) | ||
26 | #define S3C2412_IISCON_TXFIFO_FULL (1 << 8) | ||
27 | #define S3C2412_IISCON_RXFIFO_FULL (1 << 7) | ||
28 | #define S3C2412_IISCON_TXDMA_PAUSE (1 << 6) | ||
29 | #define S3C2412_IISCON_RXDMA_PAUSE (1 << 5) | ||
30 | #define S3C2412_IISCON_TXCH_PAUSE (1 << 4) | ||
31 | #define S3C2412_IISCON_RXCH_PAUSE (1 << 3) | ||
32 | #define S3C2412_IISCON_TXDMA_ACTIVE (1 << 2) | ||
33 | #define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) | ||
34 | #define S3C2412_IISCON_IIS_ACTIVE (1 << 0) | ||
35 | |||
36 | #define S3C64XX_IISMOD_IMS_PCLK (0 << 10) | ||
37 | #define S3C64XX_IISMOD_IMS_SYSMUX (1 << 10) | ||
38 | |||
39 | #define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10) | ||
40 | #define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10) | ||
41 | #define S3C2412_IISMOD_SLAVE (2 << 10) | ||
42 | #define S3C2412_IISMOD_MASTER_MASK (3 << 10) | ||
43 | #define S3C2412_IISMOD_MODE_TXONLY (0 << 8) | ||
44 | #define S3C2412_IISMOD_MODE_RXONLY (1 << 8) | ||
45 | #define S3C2412_IISMOD_MODE_TXRX (2 << 8) | ||
46 | #define S3C2412_IISMOD_MODE_MASK (3 << 8) | ||
47 | #define S3C2412_IISMOD_LR_LLOW (0 << 7) | ||
48 | #define S3C2412_IISMOD_LR_RLOW (1 << 7) | ||
49 | #define S3C2412_IISMOD_SDF_IIS (0 << 5) | ||
50 | #define S3C2412_IISMOD_SDF_MSB (1 << 5) | ||
51 | #define S3C2412_IISMOD_SDF_LSB (2 << 5) | ||
52 | #define S3C2412_IISMOD_SDF_MASK (3 << 5) | ||
53 | #define S3C2412_IISMOD_RCLK_256FS (0 << 3) | ||
54 | #define S3C2412_IISMOD_RCLK_512FS (1 << 3) | ||
55 | #define S3C2412_IISMOD_RCLK_384FS (2 << 3) | ||
56 | #define S3C2412_IISMOD_RCLK_768FS (3 << 3) | ||
57 | #define S3C2412_IISMOD_RCLK_MASK (3 << 3) | ||
58 | #define S3C2412_IISMOD_BCLK_32FS (0 << 1) | ||
59 | #define S3C2412_IISMOD_BCLK_48FS (1 << 1) | ||
60 | #define S3C2412_IISMOD_BCLK_16FS (2 << 1) | ||
61 | #define S3C2412_IISMOD_BCLK_24FS (3 << 1) | ||
62 | #define S3C2412_IISMOD_BCLK_MASK (3 << 1) | ||
63 | #define S3C2412_IISMOD_8BIT (1 << 0) | ||
64 | |||
65 | #define S3C2412_IISPSR_PSREN (1 << 15) | ||
66 | |||
67 | #define S3C2412_IISFIC_TXFLUSH (1 << 15) | ||
68 | #define S3C2412_IISFIC_RXFLUSH (1 << 7) | ||
69 | #define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) | ||
70 | #define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) | ||
71 | |||
72 | |||
73 | |||
74 | #endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */ | ||
75 | |||
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h new file mode 100644 index 000000000000..a6f1d5df13b4 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h | |||
@@ -0,0 +1,77 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-iis.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 IIS register definition | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IIS_H | ||
14 | #define __ASM_ARCH_REGS_IIS_H | ||
15 | |||
16 | #define S3C2410_IISCON (0x00) | ||
17 | |||
18 | #define S3C2410_IISCON_LRINDEX (1<<8) | ||
19 | #define S3C2410_IISCON_TXFIFORDY (1<<7) | ||
20 | #define S3C2410_IISCON_RXFIFORDY (1<<6) | ||
21 | #define S3C2410_IISCON_TXDMAEN (1<<5) | ||
22 | #define S3C2410_IISCON_RXDMAEN (1<<4) | ||
23 | #define S3C2410_IISCON_TXIDLE (1<<3) | ||
24 | #define S3C2410_IISCON_RXIDLE (1<<2) | ||
25 | #define S3C2410_IISCON_PSCEN (1<<1) | ||
26 | #define S3C2410_IISCON_IISEN (1<<0) | ||
27 | |||
28 | #define S3C2410_IISMOD (0x04) | ||
29 | |||
30 | #define S3C2440_IISMOD_MPLL (1<<9) | ||
31 | #define S3C2410_IISMOD_SLAVE (1<<8) | ||
32 | #define S3C2410_IISMOD_NOXFER (0<<6) | ||
33 | #define S3C2410_IISMOD_RXMODE (1<<6) | ||
34 | #define S3C2410_IISMOD_TXMODE (2<<6) | ||
35 | #define S3C2410_IISMOD_TXRXMODE (3<<6) | ||
36 | #define S3C2410_IISMOD_LR_LLOW (0<<5) | ||
37 | #define S3C2410_IISMOD_LR_RLOW (1<<5) | ||
38 | #define S3C2410_IISMOD_IIS (0<<4) | ||
39 | #define S3C2410_IISMOD_MSB (1<<4) | ||
40 | #define S3C2410_IISMOD_8BIT (0<<3) | ||
41 | #define S3C2410_IISMOD_16BIT (1<<3) | ||
42 | #define S3C2410_IISMOD_BITMASK (1<<3) | ||
43 | #define S3C2410_IISMOD_256FS (0<<2) | ||
44 | #define S3C2410_IISMOD_384FS (1<<2) | ||
45 | #define S3C2410_IISMOD_16FS (0<<0) | ||
46 | #define S3C2410_IISMOD_32FS (1<<0) | ||
47 | #define S3C2410_IISMOD_48FS (2<<0) | ||
48 | #define S3C2410_IISMOD_FS_MASK (3<<0) | ||
49 | |||
50 | #define S3C2410_IISPSR (0x08) | ||
51 | #define S3C2410_IISPSR_INTMASK (31<<5) | ||
52 | #define S3C2410_IISPSR_INTSHIFT (5) | ||
53 | #define S3C2410_IISPSR_EXTMASK (31<<0) | ||
54 | #define S3C2410_IISPSR_EXTSHFIT (0) | ||
55 | |||
56 | #define S3C2410_IISFCON (0x0c) | ||
57 | |||
58 | #define S3C2410_IISFCON_TXDMA (1<<15) | ||
59 | #define S3C2410_IISFCON_RXDMA (1<<14) | ||
60 | #define S3C2410_IISFCON_TXENABLE (1<<13) | ||
61 | #define S3C2410_IISFCON_RXENABLE (1<<12) | ||
62 | #define S3C2410_IISFCON_TXMASK (0x3f << 6) | ||
63 | #define S3C2410_IISFCON_TXSHIFT (6) | ||
64 | #define S3C2410_IISFCON_RXMASK (0x3f) | ||
65 | #define S3C2410_IISFCON_RXSHIFT (0) | ||
66 | |||
67 | #define S3C2400_IISFCON_TXDMA (1<<11) | ||
68 | #define S3C2400_IISFCON_RXDMA (1<<10) | ||
69 | #define S3C2400_IISFCON_TXENABLE (1<<9) | ||
70 | #define S3C2400_IISFCON_RXENABLE (1<<8) | ||
71 | #define S3C2400_IISFCON_TXMASK (0x07 << 4) | ||
72 | #define S3C2400_IISFCON_TXSHIFT (4) | ||
73 | #define S3C2400_IISFCON_RXMASK (0x07) | ||
74 | #define S3C2400_IISFCON_RXSHIFT (0) | ||
75 | |||
76 | #define S3C2410_IISFIFO (0x10) | ||
77 | #endif /* __ASM_ARCH_REGS_IIS_H */ | ||