13 files changed, 201 insertions, 6 deletions

diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 6d48e00f4f0b..a6fff782e7a8 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -135,6 +135,11 @@ static unsigned long e740_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
+        GPIO40_GPIO,  /* Mic amp power */
+        GPIO41_GPIO,  /* Headphone amp power */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index be1ab8edb973..665066fd280e 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -133,6 +133,11 @@ static unsigned long e750_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO4_GPIO,  /* Headphone amp power */
+        GPIO7_GPIO,  /* Speaker amp power */
+        GPIO37_GPIO, /* Headphone detect */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index da6e4422c0f3..295ec413d804 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -153,6 +153,13 @@ static unsigned long h5000_pin_config[] __initdata = {
         GPIO23_SSP1_SCLK,
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO32_I2S_SYSCLK,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
index efbd2aa9ecec..f3e5509820d7 100644
--- a/arch/arm/mach-pxa/include/mach/eseries-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
@@ -45,6 +45,21 @@
 /* e7xx IrDA power control */
 #define GPIO_E7XX_IR_OFF         38
 
+/* e740 audio control GPIOs */
+#define GPIO_E740_WM9705_nAVDD2  16
+#define GPIO_E740_MIC_ON         40
+#define GPIO_E740_AMP_ON         41
+
+/* e750 audio control GPIOs */
+#define GPIO_E750_HP_AMP_OFF      4
+#define GPIO_E750_SPK_AMP_OFF     7
+#define GPIO_E750_HP_DETECT      37
+
+/* e800 audio control GPIOs */
+#define GPIO_E800_HP_DETECT      81
+#define GPIO_E800_HP_AMP_OFF     82
+#define GPIO_E800_SPK_AMP_ON     83
+
 /* ASIC related GPIOs */
 #define GPIO_ESERIES_TMIO_IRQ        5
 #define GPIO_ESERIES_TMIO_PCLR      19
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index cf31986f6f05..018f6d65b57b 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -50,7 +50,7 @@
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
-#define SSCR0_ADC       (1 << 30)       /* Audio clock select */
+#define SSCR0_ACS       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
 
@@ -109,6 +109,11 @@
 #define SSSR_TINT               (1 << 19)       /* Receiver Time-out Interrupt */
 #define SSSR_PINT               (1 << 18)       /* Peripheral Trailing Byte Interrupt */
 
+#if defined(CONFIG_PXA3xx)
+#define SSPSP_EDMYSTOP(x)       ((x) << 28)     /* Extended Dummy Stop */
+#define SSPSP_EDMYSTRT(x)       ((x) << 26)     /* Extended Dummy Start */
+#endif
+
 #define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
 #define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
 #define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 6d447c9ce8ab..0d62d311d41a 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -105,6 +105,12 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO57_nIOIS16,
         GPIO104_PSKTSEL,
 
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+
         /* MMC */
         GPIO32_MMC_CLK,
         GPIO112_MMC_CMD,
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 552b4c778fdc..440c014e24b3 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 919856c9433f..9e3478506c6f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -29,8 +29,8 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-s3c2412-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 5b5ee0b8f4e0..69b6cf34df47 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 2a58a4d5aa5a..8430e5829186 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -29,7 +29,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { \
diff --git a/arch/arm/mach-s3c2410/include/mach/audio.h b/arch/arm/plat-s3c/include/plat/audio.h
index de0e8da48bc3..de0e8da48bc3 100644
--- a/arch/arm/mach-s3c2410/include/mach/audio.h
+++ b/arch/arm/plat-s3c/include/plat/audio.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
new file mode 100644
index 000000000000..0fad7571030e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
@@ -0,0 +1,75 @@
+/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h
+ *
+ * Copyright 2007 Simtec Electronics <linux@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2412 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H
+#define __ASM_ARCH_REGS_S3C2412_IIS_H
+
+#define S3C2412_IISCON                  (0x00)
+#define S3C2412_IISMOD                  (0x04)
+#define S3C2412_IISFIC                  (0x08)
+#define S3C2412_IISPSR                  (0x0C)
+#define S3C2412_IISTXD                  (0x10)
+#define S3C2412_IISRXD                  (0x14)
+
+#define S3C2412_IISCON_LRINDEX          (1 << 11)
+#define S3C2412_IISCON_TXFIFO_EMPTY     (1 << 10)
+#define S3C2412_IISCON_RXFIFO_EMPTY     (1 << 9)
+#define S3C2412_IISCON_TXFIFO_FULL      (1 << 8)
+#define S3C2412_IISCON_RXFIFO_FULL      (1 << 7)
+#define S3C2412_IISCON_TXDMA_PAUSE      (1 << 6)
+#define S3C2412_IISCON_RXDMA_PAUSE      (1 << 5)
+#define S3C2412_IISCON_TXCH_PAUSE       (1 << 4)
+#define S3C2412_IISCON_RXCH_PAUSE       (1 << 3)
+#define S3C2412_IISCON_TXDMA_ACTIVE     (1 << 2)
+#define S3C2412_IISCON_RXDMA_ACTIVE     (1 << 1)
+#define S3C2412_IISCON_IIS_ACTIVE       (1 << 0)
+
+#define S3C64XX_IISMOD_IMS_PCLK         (0 << 10)
+#define S3C64XX_IISMOD_IMS_SYSMUX       (1 << 10)
+
+#define S3C2412_IISMOD_MASTER_INTERNAL  (0 << 10)
+#define S3C2412_IISMOD_MASTER_EXTERNAL  (1 << 10)
+#define S3C2412_IISMOD_SLAVE            (2 << 10)
+#define S3C2412_IISMOD_MASTER_MASK      (3 << 10)
+#define S3C2412_IISMOD_MODE_TXONLY      (0 << 8)
+#define S3C2412_IISMOD_MODE_RXONLY      (1 << 8)
+#define S3C2412_IISMOD_MODE_TXRX        (2 << 8)
+#define S3C2412_IISMOD_MODE_MASK        (3 << 8)
+#define S3C2412_IISMOD_LR_LLOW          (0 << 7)
+#define S3C2412_IISMOD_LR_RLOW          (1 << 7)
+#define S3C2412_IISMOD_SDF_IIS          (0 << 5)
+#define S3C2412_IISMOD_SDF_MSB          (1 << 5)
+#define S3C2412_IISMOD_SDF_LSB          (2 << 5)
+#define S3C2412_IISMOD_SDF_MASK         (3 << 5)
+#define S3C2412_IISMOD_RCLK_256FS       (0 << 3)
+#define S3C2412_IISMOD_RCLK_512FS       (1 << 3)
+#define S3C2412_IISMOD_RCLK_384FS       (2 << 3)
+#define S3C2412_IISMOD_RCLK_768FS       (3 << 3)
+#define S3C2412_IISMOD_RCLK_MASK        (3 << 3)
+#define S3C2412_IISMOD_BCLK_32FS        (0 << 1)
+#define S3C2412_IISMOD_BCLK_48FS        (1 << 1)
+#define S3C2412_IISMOD_BCLK_16FS        (2 << 1)
+#define S3C2412_IISMOD_BCLK_24FS        (3 << 1)
+#define S3C2412_IISMOD_BCLK_MASK        (3 << 1)
+#define S3C2412_IISMOD_8BIT             (1 << 0)
+
+#define S3C2412_IISPSR_PSREN            (1 << 15)
+
+#define S3C2412_IISFIC_TXFLUSH          (1 << 15)
+#define S3C2412_IISFIC_RXFLUSH          (1 << 7)
+#define S3C2412_IISFIC_TXCOUNT(x)       (((x) >>  8) & 0xf)
+#define S3C2412_IISFIC_RXCOUNT(x)       (((x) >>  0) & 0xf)
+
+
+
+#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */
+
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
new file mode 100644
index 000000000000..a6f1d5df13b4
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
@@ -0,0 +1,77 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-iis.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_IIS_H
+#define __ASM_ARCH_REGS_IIS_H
+
+#define S3C2410_IISCON   (0x00)
+
+#define S3C2410_IISCON_LRINDEX    (1<<8)
+#define S3C2410_IISCON_TXFIFORDY  (1<<7)
+#define S3C2410_IISCON_RXFIFORDY  (1<<6)
+#define S3C2410_IISCON_TXDMAEN    (1<<5)
+#define S3C2410_IISCON_RXDMAEN    (1<<4)
+#define S3C2410_IISCON_TXIDLE     (1<<3)
+#define S3C2410_IISCON_RXIDLE     (1<<2)
+#define S3C2410_IISCON_PSCEN      (1<<1)
+#define S3C2410_IISCON_IISEN      (1<<0)
+
+#define S3C2410_IISMOD   (0x04)
+
+#define S3C2440_IISMOD_MPLL       (1<<9)
+#define S3C2410_IISMOD_SLAVE      (1<<8)
+#define S3C2410_IISMOD_NOXFER     (0<<6)
+#define S3C2410_IISMOD_RXMODE     (1<<6)
+#define S3C2410_IISMOD_TXMODE     (2<<6)
+#define S3C2410_IISMOD_TXRXMODE   (3<<6)
+#define S3C2410_IISMOD_LR_LLOW    (0<<5)
+#define S3C2410_IISMOD_LR_RLOW    (1<<5)
+#define S3C2410_IISMOD_IIS        (0<<4)
+#define S3C2410_IISMOD_MSB        (1<<4)
+#define S3C2410_IISMOD_8BIT       (0<<3)
+#define S3C2410_IISMOD_16BIT      (1<<3)
+#define S3C2410_IISMOD_BITMASK    (1<<3)
+#define S3C2410_IISMOD_256FS      (0<<2)
+#define S3C2410_IISMOD_384FS      (1<<2)
+#define S3C2410_IISMOD_16FS       (0<<0)
+#define S3C2410_IISMOD_32FS       (1<<0)
+#define S3C2410_IISMOD_48FS       (2<<0)
+#define S3C2410_IISMOD_FS_MASK    (3<<0)
+
+#define S3C2410_IISPSR          (0x08)
+#define S3C2410_IISPSR_INTMASK  (31<<5)
+#define S3C2410_IISPSR_INTSHIFT (5)
+#define S3C2410_IISPSR_EXTMASK  (31<<0)
+#define S3C2410_IISPSR_EXTSHFIT (0)
+
+#define S3C2410_IISFCON  (0x0c)
+
+#define S3C2410_IISFCON_TXDMA     (1<<15)
+#define S3C2410_IISFCON_RXDMA     (1<<14)
+#define S3C2410_IISFCON_TXENABLE  (1<<13)
+#define S3C2410_IISFCON_RXENABLE  (1<<12)
+#define S3C2410_IISFCON_TXMASK    (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT   (6)
+#define S3C2410_IISFCON_RXMASK    (0x3f)
+#define S3C2410_IISFCON_RXSHIFT   (0)
+
+#define S3C2400_IISFCON_TXDMA     (1<<11)
+#define S3C2400_IISFCON_RXDMA     (1<<10)
+#define S3C2400_IISFCON_TXENABLE  (1<<9)
+#define S3C2400_IISFCON_RXENABLE  (1<<8)
+#define S3C2400_IISFCON_TXMASK    (0x07 << 4)
+#define S3C2400_IISFCON_TXSHIFT   (4)
+#define S3C2400_IISFCON_RXMASK    (0x07)
+#define S3C2400_IISFCON_RXSHIFT   (0)
+
+#define S3C2410_IISFIFO  (0x10)
+#endif /* __ASM_ARCH_REGS_IIS_H */