diff options
Diffstat (limited to 'arch/arm')
26 files changed, 33 insertions, 33 deletions
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 1bec96e85196..60dc077ea7cc 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -236,7 +236,7 @@ static struct resource it8152_mem = { | |||
236 | 236 | ||
237 | /* | 237 | /* |
238 | * The following functions are needed for DMA bouncing. | 238 | * The following functions are needed for DMA bouncing. |
239 | * ITE8152 chip can addrees up to 64MByte, so all the devices | 239 | * ITE8152 chip can address up to 64MByte, so all the devices |
240 | * connected to ITE8152 (PCI and USB) should have limited DMA window | 240 | * connected to ITE8152 (PCI and USB) should have limited DMA window |
241 | */ | 241 | */ |
242 | 242 | ||
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index ba65f6eedca6..cb660bc54d7a 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -70,7 +70,7 @@ static inline struct vic_device *to_vic(struct sys_device *sys) | |||
70 | * vic_init2 - common initialisation code | 70 | * vic_init2 - common initialisation code |
71 | * @base: Base of the VIC. | 71 | * @base: Base of the VIC. |
72 | * | 72 | * |
73 | * Common initialisation code for registeration | 73 | * Common initialisation code for registration |
74 | * and resume. | 74 | * and resume. |
75 | */ | 75 | */ |
76 | static void vic_init2(void __iomem *base) | 76 | static void vic_init2(void __iomem *base) |
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 7b58c948a957..de2fd04e7c8a 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c | |||
@@ -128,17 +128,17 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = { | |||
128 | .platform_data = &my_flash0_platform, | 128 | .platform_data = &my_flash0_platform, |
129 | #endif | 129 | #endif |
130 | }, | 130 | }, |
131 | { /* User accessable spi - cs1 (250KHz) */ | 131 | { /* User accessible spi - cs1 (250KHz) */ |
132 | .modalias = "spi-cs1", | 132 | .modalias = "spi-cs1", |
133 | .chip_select = 1, | 133 | .chip_select = 1, |
134 | .max_speed_hz = 250 * 1000, | 134 | .max_speed_hz = 250 * 1000, |
135 | }, | 135 | }, |
136 | { /* User accessable spi - cs2 (1MHz) */ | 136 | { /* User accessible spi - cs2 (1MHz) */ |
137 | .modalias = "spi-cs2", | 137 | .modalias = "spi-cs2", |
138 | .chip_select = 2, | 138 | .chip_select = 2, |
139 | .max_speed_hz = 1 * 1000 * 1000, | 139 | .max_speed_hz = 1 * 1000 * 1000, |
140 | }, | 140 | }, |
141 | { /* User accessable spi - cs3 (10MHz) */ | 141 | { /* User accessible spi - cs3 (10MHz) */ |
142 | .modalias = "spi-cs3", | 142 | .modalias = "spi-cs3", |
143 | .chip_select = 3, | 143 | .chip_select = 3, |
144 | .max_speed_hz = 10 * 1000 * 1000, | 144 | .max_speed_hz = 10 * 1000 * 1000, |
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw.c index b3a61d860c65..96273ff34956 100644 --- a/arch/arm/mach-bcmring/csp/chipc/chipcHw.c +++ b/arch/arm/mach-bcmring/csp/chipc/chipcHw.c | |||
@@ -757,7 +757,7 @@ static int chipcHw_divide(int num, int denom) | |||
757 | t = t << 1; | 757 | t = t << 1; |
758 | } | 758 | } |
759 | 759 | ||
760 | /* Intialize the result */ | 760 | /* Initialize the result */ |
761 | r = 0; | 761 | r = 0; |
762 | 762 | ||
763 | do { | 763 | do { |
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw.c index 7b9bac2d79a5..6b9be2e98e51 100644 --- a/arch/arm/mach-bcmring/csp/dmac/dmacHw.c +++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw.c | |||
@@ -893,7 +893,7 @@ int dmacHw_setDataDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configuration | |||
893 | */ | 893 | */ |
894 | /****************************************************************************/ | 894 | /****************************************************************************/ |
895 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ | 895 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ |
896 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ | 896 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */ |
897 | ) { | 897 | ) { |
898 | dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle); | 898 | dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle); |
899 | 899 | ||
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c index ff7b436d0935..77f84b40dda9 100644 --- a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c +++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c | |||
@@ -316,7 +316,7 @@ static void DisplayDescRing(void *pDescriptor, /* [ IN ] Descriptor buffer */ | |||
316 | /** | 316 | /** |
317 | * @brief Check if DMA channel is the flow controller | 317 | * @brief Check if DMA channel is the flow controller |
318 | * | 318 | * |
319 | * @return 1 : If DMA is a flow controler | 319 | * @return 1 : If DMA is a flow controller |
320 | * 0 : Peripheral is the flow controller | 320 | * 0 : Peripheral is the flow controller |
321 | * | 321 | * |
322 | * @note | 322 | * @note |
diff --git a/arch/arm/mach-bcmring/csp/tmr/tmrHw.c b/arch/arm/mach-bcmring/csp/tmr/tmrHw.c index 5c1c9a0e5ed2..16225e43f3c3 100644 --- a/arch/arm/mach-bcmring/csp/tmr/tmrHw.c +++ b/arch/arm/mach-bcmring/csp/tmr/tmrHw.c | |||
@@ -558,7 +558,7 @@ static int tmrHw_divide(int num, int denom) | |||
558 | t = t << 1; | 558 | t = t << 1; |
559 | } | 559 | } |
560 | 560 | ||
561 | /* Intialize the result */ | 561 | /* Initialize the result */ |
562 | r = 0; | 562 | r = 0; |
563 | 563 | ||
564 | do { | 564 | do { |
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index 77eb35c89cd0..8d1baf3f4683 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c | |||
@@ -671,7 +671,7 @@ static int ConfigChannel(DMA_Handle_t handle) | |||
671 | 671 | ||
672 | /****************************************************************************/ | 672 | /****************************************************************************/ |
673 | /** | 673 | /** |
674 | * Intializes all of the data structures associated with the DMA. | 674 | * Initializes all of the data structures associated with the DMA. |
675 | * @return | 675 | * @return |
676 | * >= 0 - Initialization was successfull. | 676 | * >= 0 - Initialization was successfull. |
677 | * | 677 | * |
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h index 5d510130a25f..6c8da2b9fc1f 100644 --- a/arch/arm/mach-bcmring/include/csp/dmacHw.h +++ b/arch/arm/mach-bcmring/include/csp/dmacHw.h | |||
@@ -590,7 +590,7 @@ void dmacHw_printDebugInfo(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle | |||
590 | */ | 590 | */ |
591 | /****************************************************************************/ | 591 | /****************************************************************************/ |
592 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ | 592 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ |
593 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ | 593 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */ |
594 | ); | 594 | ); |
595 | 595 | ||
596 | #endif /* _DMACHW_H */ | 596 | #endif /* _DMACHW_H */ |
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h index cbf334d1c761..d67e2f8c22de 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h +++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h | |||
@@ -28,7 +28,7 @@ | |||
28 | 28 | ||
29 | /* Data type for DMA Link List Item */ | 29 | /* Data type for DMA Link List Item */ |
30 | typedef struct { | 30 | typedef struct { |
31 | uint32_t sar; /* Source Adress Register. | 31 | uint32_t sar; /* Source Address Register. |
32 | Address must be aligned to CTLx.SRC_TR_WIDTH. */ | 32 | Address must be aligned to CTLx.SRC_TR_WIDTH. */ |
33 | uint32_t dar; /* Destination Address Register. | 33 | uint32_t dar; /* Destination Address Register. |
34 | Address must be aligned to CTLx.DST_TR_WIDTH. */ | 34 | Address must be aligned to CTLx.DST_TR_WIDTH. */ |
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h index 891cea87e333..f1ecf96f2da5 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h +++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h | |||
@@ -35,7 +35,7 @@ typedef struct { | |||
35 | 35 | ||
36 | /* Data type representing DMA channel registers */ | 36 | /* Data type representing DMA channel registers */ |
37 | typedef struct { | 37 | typedef struct { |
38 | dmacHw_REG64_t ChannelSar; /* Source Adress Register. 64 bits (upper 32 bits are reserved) | 38 | dmacHw_REG64_t ChannelSar; /* Source Address Register. 64 bits (upper 32 bits are reserved) |
39 | Address must be aligned to CTLx.SRC_TR_WIDTH. | 39 | Address must be aligned to CTLx.SRC_TR_WIDTH. |
40 | */ | 40 | */ |
41 | dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved) | 41 | dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved) |
diff --git a/arch/arm/mach-gemini/include/mach/hardware.h b/arch/arm/mach-gemini/include/mach/hardware.h index 213a4fcfeb1c..8c950e1d06be 100644 --- a/arch/arm/mach-gemini/include/mach/hardware.h +++ b/arch/arm/mach-gemini/include/mach/hardware.h | |||
@@ -33,7 +33,7 @@ | |||
33 | #define GEMINI_LPC_HOST_BASE 0x47000000 | 33 | #define GEMINI_LPC_HOST_BASE 0x47000000 |
34 | #define GEMINI_LPC_IO_BASE 0x47800000 | 34 | #define GEMINI_LPC_IO_BASE 0x47800000 |
35 | #define GEMINI_INTERRUPT_BASE 0x48000000 | 35 | #define GEMINI_INTERRUPT_BASE 0x48000000 |
36 | /* TODO: Different interrupt controlers when SMP | 36 | /* TODO: Different interrupt controllers when SMP |
37 | * #define GEMINI_INTERRUPT0_BASE 0x48000000 | 37 | * #define GEMINI_INTERRUPT0_BASE 0x48000000 |
38 | * #define GEMINI_INTERRUPT1_BASE 0x49000000 | 38 | * #define GEMINI_INTERRUPT1_BASE 0x49000000 |
39 | */ | 39 | */ |
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index d36b61074146..7f8d15d56834 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c | |||
@@ -153,7 +153,7 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) | |||
153 | { | 153 | { |
154 | if (mtype == MT_DEVICE) { | 154 | if (mtype == MT_DEVICE) { |
155 | /* The peripherals in the 88000000 - D0000000 range | 155 | /* The peripherals in the 88000000 - D0000000 range |
156 | * are only accessable by type MT_DEVICE_NONSHARED. | 156 | * are only accessible by type MT_DEVICE_NONSHARED. |
157 | * Adjust mtype as necessary to make this "just work." | 157 | * Adjust mtype as necessary to make this "just work." |
158 | */ | 158 | */ |
159 | if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) | 159 | if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) |
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 0d50b45d041c..1e6fe6d11aee 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -252,7 +252,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, | |||
252 | * FIXME: we currently manage device-specific idle states | 252 | * FIXME: we currently manage device-specific idle states |
253 | * for PER and CORE in combination with CPU-specific | 253 | * for PER and CORE in combination with CPU-specific |
254 | * idle states. This is wrong, and device-specific | 254 | * idle states. This is wrong, and device-specific |
255 | * idle managment needs to be separated out into | 255 | * idle management needs to be separated out into |
256 | * its own code. | 256 | * its own code. |
257 | */ | 257 | */ |
258 | 258 | ||
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index becf0e38ef7e..db79ac68ed97 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -843,7 +843,7 @@ void __init omap_serial_init_port(int port) | |||
843 | } | 843 | } |
844 | 844 | ||
845 | /** | 845 | /** |
846 | * omap_serial_init() - intialize all supported serial ports | 846 | * omap_serial_init() - initialize all supported serial ports |
847 | * | 847 | * |
848 | * Initializes all available UARTs as serial ports. Platforms | 848 | * Initializes all available UARTs as serial ports. Platforms |
849 | * can call this function when they want to have default behaviour | 849 | * can call this function when they want to have default behaviour |
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c index 462167ac05f9..cdf7f41e2bb3 100644 --- a/arch/arm/mach-pxa/mxm8x10.c +++ b/arch/arm/mach-pxa/mxm8x10.c | |||
@@ -337,7 +337,7 @@ void __init mxm_8x10_mmc_init(void) | |||
337 | } | 337 | } |
338 | #endif | 338 | #endif |
339 | 339 | ||
340 | /* USB Open Host Controler Interface */ | 340 | /* USB Open Host Controller Interface */ |
341 | static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { | 341 | static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { |
342 | .port_mode = PMM_NPS_MODE, | 342 | .port_mode = PMM_NPS_MODE, |
343 | .flags = ENABLE_PORT_ALL | 343 | .flags = ENABLE_PORT_ALL |
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index e7d03ab41d80..372ea6855454 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c | |||
@@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void) | |||
740 | /* Set all DMA configuration to be DMA, not SDMA */ | 740 | /* Set all DMA configuration to be DMA, not SDMA */ |
741 | writel(0xffffff, S3C_SYSREG(0x110)); | 741 | writel(0xffffff, S3C_SYSREG(0x110)); |
742 | 742 | ||
743 | /* Register standard DMA controlers */ | 743 | /* Register standard DMA controllers */ |
744 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); | 744 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); |
745 | s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); | 745 | s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); |
746 | 746 | ||
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index 3560f8c1e723..5aa2d54ebfaa 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -371,7 +371,7 @@ struct pmx_driver pmx_driver = { | |||
371 | }; | 371 | }; |
372 | 372 | ||
373 | /* Add spear300 specific devices here */ | 373 | /* Add spear300 specific devices here */ |
374 | /* arm gpio1 device registeration */ | 374 | /* arm gpio1 device registration */ |
375 | static struct pl061_platform_data gpio1_plat_data = { | 375 | static struct pl061_platform_data gpio1_plat_data = { |
376 | .gpio_base = 8, | 376 | .gpio_base = 8, |
377 | .irq_base = SPEAR_GPIO1_INT_BASE, | 377 | .irq_base = SPEAR_GPIO1_INT_BASE, |
@@ -451,7 +451,7 @@ void __init spear300_init(void) | |||
451 | /* call spear3xx family common init function */ | 451 | /* call spear3xx family common init function */ |
452 | spear3xx_init(); | 452 | spear3xx_init(); |
453 | 453 | ||
454 | /* shared irq registeration */ | 454 | /* shared irq registration */ |
455 | shirq_ras1.regs.base = | 455 | shirq_ras1.regs.base = |
456 | ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); | 456 | ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); |
457 | if (shirq_ras1.regs.base) { | 457 | if (shirq_ras1.regs.base) { |
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 96a1ab824bac..53b41b52d7ee 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c | |||
@@ -266,7 +266,7 @@ void __init spear310_init(void) | |||
266 | /* call spear3xx family common init function */ | 266 | /* call spear3xx family common init function */ |
267 | spear3xx_init(); | 267 | spear3xx_init(); |
268 | 268 | ||
269 | /* shared irq registeration */ | 269 | /* shared irq registration */ |
270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); | 270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); |
271 | if (base) { | 271 | if (base) { |
272 | /* shirq 1 */ | 272 | /* shirq 1 */ |
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 6a1219549369..88b465284c36 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -519,7 +519,7 @@ void __init spear320_init(void) | |||
519 | /* call spear3xx family common init function */ | 519 | /* call spear3xx family common init function */ |
520 | spear3xx_init(); | 520 | spear3xx_init(); |
521 | 521 | ||
522 | /* shared irq registeration */ | 522 | /* shared irq registration */ |
523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); | 523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); |
524 | if (base) { | 524 | if (base) { |
525 | /* shirq 1 */ | 525 | /* shirq 1 */ |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index e87313aeae20..52f553c8c46d 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <mach/spear.h> | 22 | #include <mach/spear.h> |
23 | 23 | ||
24 | /* Add spear3xx machines common devices here */ | 24 | /* Add spear3xx machines common devices here */ |
25 | /* gpio device registeration */ | 25 | /* gpio device registration */ |
26 | static struct pl061_platform_data gpio_plat_data = { | 26 | static struct pl061_platform_data gpio_plat_data = { |
27 | .gpio_base = 0, | 27 | .gpio_base = 0, |
28 | .irq_base = SPEAR_GPIO_INT_BASE, | 28 | .irq_base = SPEAR_GPIO_INT_BASE, |
@@ -41,7 +41,7 @@ struct amba_device gpio_device = { | |||
41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | /* uart device registeration */ | 44 | /* uart device registration */ |
45 | struct amba_device uart_device = { | 45 | struct amba_device uart_device = { |
46 | .dev = { | 46 | .dev = { |
47 | .init_name = "uart", | 47 | .init_name = "uart", |
@@ -543,6 +543,6 @@ void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size) | |||
543 | 543 | ||
544 | pmx_fail: | 544 | pmx_fail: |
545 | if (ret) | 545 | if (ret) |
546 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | 546 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", |
547 | ret); | 547 | ret); |
548 | } | 548 | } |
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index baf6bcc3169c..f2fe14e8471d 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <mach/spear.h> | 23 | #include <mach/spear.h> |
24 | 24 | ||
25 | /* Add spear6xx machines common devices here */ | 25 | /* Add spear6xx machines common devices here */ |
26 | /* uart device registeration */ | 26 | /* uart device registration */ |
27 | struct amba_device uart_device[] = { | 27 | struct amba_device uart_device[] = { |
28 | { | 28 | { |
29 | .dev = { | 29 | .dev = { |
@@ -50,7 +50,7 @@ struct amba_device uart_device[] = { | |||
50 | } | 50 | } |
51 | }; | 51 | }; |
52 | 52 | ||
53 | /* gpio device registeration */ | 53 | /* gpio device registration */ |
54 | static struct pl061_platform_data gpio_plat_data[] = { | 54 | static struct pl061_platform_data gpio_plat_data[] = { |
55 | { | 55 | { |
56 | .gpio_base = 0, | 56 | .gpio_base = 0, |
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig index 801b21e7f677..32a7b0f7e9f7 100644 --- a/arch/arm/mach-u300/Kconfig +++ b/arch/arm/mach-u300/Kconfig | |||
@@ -64,7 +64,7 @@ config MACH_U300_DUAL_RAM | |||
64 | bool "Dual RAM" | 64 | bool "Dual RAM" |
65 | help | 65 | help |
66 | Select this if you want support for Dual RAM phones. | 66 | Select this if you want support for Dual RAM phones. |
67 | This is two RAM memorys on different EMIFs. | 67 | This is two RAM memories on different EMIFs. |
68 | endchoice | 68 | endchoice |
69 | 69 | ||
70 | config U300_DEBUG | 70 | config U300_DEBUG |
diff --git a/arch/arm/mach-u300/include/mach/coh901318.h b/arch/arm/mach-u300/include/mach/coh901318.h index 193da2df732c..6193aaa47794 100644 --- a/arch/arm/mach-u300/include/mach/coh901318.h +++ b/arch/arm/mach-u300/include/mach/coh901318.h | |||
@@ -24,7 +24,7 @@ | |||
24 | * @src_addr: transfer source address | 24 | * @src_addr: transfer source address |
25 | * @dst_addr: transfer destination address | 25 | * @dst_addr: transfer destination address |
26 | * @link_addr: physical address to next lli | 26 | * @link_addr: physical address to next lli |
27 | * @virt_link_addr: virtual addres of next lli (only used by pool_free) | 27 | * @virt_link_addr: virtual address of next lli (only used by pool_free) |
28 | * @phy_this: physical address of current lli (only used by pool_free) | 28 | * @phy_this: physical address of current lli (only used by pool_free) |
29 | */ | 29 | */ |
30 | struct coh901318_lli { | 30 | struct coh901318_lli { |
@@ -90,7 +90,7 @@ struct powersave { | |||
90 | * struct coh901318_platform - platform arch structure | 90 | * struct coh901318_platform - platform arch structure |
91 | * @chans_slave: specifying dma slave channels | 91 | * @chans_slave: specifying dma slave channels |
92 | * @chans_memcpy: specifying dma memcpy channels | 92 | * @chans_memcpy: specifying dma memcpy channels |
93 | * @access_memory_state: requesting DMA memeory access (on / off) | 93 | * @access_memory_state: requesting DMA memory access (on / off) |
94 | * @chan_conf: dma channel configurations | 94 | * @chan_conf: dma channel configurations |
95 | * @max_channels: max number of dma chanenls | 95 | * @max_channels: max number of dma chanenls |
96 | */ | 96 | */ |
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 86781f7b0c0c..664c453babbe 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
@@ -66,7 +66,7 @@ extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); | |||
66 | 66 | ||
67 | /* all normal IRQs can be FIQs */ | 67 | /* all normal IRQs can be FIQs */ |
68 | #define FIQ_START 0 | 68 | #define FIQ_START 0 |
69 | /* switch betwean IRQ and FIQ */ | 69 | /* switch between IRQ and FIQ */ |
70 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); | 70 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); |
71 | 71 | ||
72 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ | 72 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 7eaa8edf3b14..79ac24ceb54d 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -339,7 +339,7 @@ struct omap_hwmod_omap2_prcm { | |||
339 | /** | 339 | /** |
340 | * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data | 340 | * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data |
341 | * @clkctrl_reg: PRCM address of the clock control register | 341 | * @clkctrl_reg: PRCM address of the clock control register |
342 | * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM | 342 | * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM |
343 | * @submodule_wkdep_bit: bit shift of the WKDEP range | 343 | * @submodule_wkdep_bit: bit shift of the WKDEP range |
344 | */ | 344 | */ |
345 | struct omap_hwmod_omap4_prcm { | 345 | struct omap_hwmod_omap4_prcm { |