aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-davinci/dm365.c1
-rw-r--r--arch/arm/mach-davinci/dma.c7
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h1
3 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f02bce8eeba4..aa3b0bbdda73 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -741,6 +741,7 @@ static struct edma_soc_info dm365_edma_info[] = {
741 .n_cc = 1, 741 .n_cc = 1,
742 .queue_tc_mapping = dm365_queue_tc_mapping, 742 .queue_tc_mapping = dm365_queue_tc_mapping,
743 .queue_priority_mapping = dm365_queue_priority_mapping, 743 .queue_priority_mapping = dm365_queue_priority_mapping,
744 .default_queue = EVENTQ_2,
744 }, 745 },
745}; 746};
746 747
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 5908f7717b29..e6d7e6aca336 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -225,6 +225,7 @@ struct edma {
225 unsigned num_slots; 225 unsigned num_slots;
226 unsigned num_tc; 226 unsigned num_tc;
227 unsigned num_cc; 227 unsigned num_cc;
228 enum dma_event_q default_queue;
228 229
229 /* list of channels with no even trigger; terminated by "-1" */ 230 /* list of channels with no even trigger; terminated by "-1" */
230 const s8 *noevent; 231 const s8 *noevent;
@@ -267,7 +268,7 @@ static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
267 268
268 /* default to low priority queue */ 269 /* default to low priority queue */
269 if (queue_no == EVENTQ_DEFAULT) 270 if (queue_no == EVENTQ_DEFAULT)
270 queue_no = EVENTQ_1; 271 queue_no = edma_info[ctlr]->default_queue;
271 272
272 queue_no &= 7; 273 queue_no &= 7;
273 edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3), 274 edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3),
@@ -1249,6 +1250,10 @@ static int __init edma_probe(struct platform_device *pdev)
1249 edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc, 1250 edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc,
1250 EDMA_MAX_CC); 1251 EDMA_MAX_CC);
1251 1252
1253 edma_info[j]->default_queue = info[j].default_queue;
1254 if (!edma_info[j]->default_queue)
1255 edma_info[j]->default_queue = EVENTQ_1;
1256
1252 dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", 1257 dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
1253 edmacc_regs_base[j]); 1258 edmacc_regs_base[j]);
1254 1259
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 5d4896226460..3c7dc2db70e4 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -271,6 +271,7 @@ struct edma_soc_info {
271 unsigned n_slot; 271 unsigned n_slot;
272 unsigned n_tc; 272 unsigned n_tc;
273 unsigned n_cc; 273 unsigned n_cc;
274 enum dma_event_q default_queue;
274 275
275 /* list of channels with no even trigger; terminated by "-1" */ 276 /* list of channels with no even trigger; terminated by "-1" */
276 const s8 *noevent; 277 const s8 *noevent;