diff options
Diffstat (limited to 'arch/arm')
35 files changed, 207 insertions, 100 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5021db2217ed..9722f8bb506c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -16,8 +16,7 @@ config ARM | |||
16 | select HAVE_ARCH_KGDB | 16 | select HAVE_ARCH_KGDB |
17 | select HAVE_KPROBES if (!XIP_KERNEL) | 17 | select HAVE_KPROBES if (!XIP_KERNEL) |
18 | select HAVE_KRETPROBES if (HAVE_KPROBES) | 18 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
19 | select HAVE_FTRACE if (!XIP_KERNEL) | 19 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
20 | select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE) | ||
21 | select HAVE_GENERIC_DMA_COHERENT | 20 | select HAVE_GENERIC_DMA_COHERENT |
22 | help | 21 | help |
23 | The ARM series is a line of low-power-consumption RISC chip designs | 22 | The ARM series is a line of low-power-consumption RISC chip designs |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 7a03f2007882..c47f2a3f8f8f 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -70,7 +70,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ | |||
70 | targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ | 70 | targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ |
71 | head.o misc.o $(OBJS) | 71 | head.o misc.o $(OBJS) |
72 | 72 | ||
73 | ifeq ($(CONFIG_FTRACE),y) | 73 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
74 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 74 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
75 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) | 75 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
76 | endif | 76 | endif |
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index db8309161408..780bbf7cb26f 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c | |||
@@ -54,11 +54,13 @@ | |||
54 | /* | 54 | /* |
55 | * Prototypes | 55 | * Prototypes |
56 | */ | 56 | */ |
57 | #ifdef CONFIG_PM | ||
57 | static int sharpsl_off_charge_battery(void); | 58 | static int sharpsl_off_charge_battery(void); |
58 | static int sharpsl_check_battery_temp(void); | ||
59 | static int sharpsl_check_battery_voltage(void); | 59 | static int sharpsl_check_battery_voltage(void); |
60 | static int sharpsl_ac_check(void); | ||
61 | static int sharpsl_fatal_check(void); | 60 | static int sharpsl_fatal_check(void); |
61 | #endif | ||
62 | static int sharpsl_check_battery_temp(void); | ||
63 | static int sharpsl_ac_check(void); | ||
62 | static int sharpsl_average_value(int ad); | 64 | static int sharpsl_average_value(int ad); |
63 | static void sharpsl_average_clear(void); | 65 | static void sharpsl_average_clear(void); |
64 | static void sharpsl_charge_toggle(struct work_struct *private_); | 66 | static void sharpsl_charge_toggle(struct work_struct *private_); |
@@ -424,6 +426,7 @@ static int sharpsl_check_battery_temp(void) | |||
424 | return 0; | 426 | return 0; |
425 | } | 427 | } |
426 | 428 | ||
429 | #ifdef CONFIG_PM | ||
427 | static int sharpsl_check_battery_voltage(void) | 430 | static int sharpsl_check_battery_voltage(void) |
428 | { | 431 | { |
429 | int val, i, buff[5]; | 432 | int val, i, buff[5]; |
@@ -455,6 +458,7 @@ static int sharpsl_check_battery_voltage(void) | |||
455 | 458 | ||
456 | return 0; | 459 | return 0; |
457 | } | 460 | } |
461 | #endif | ||
458 | 462 | ||
459 | static int sharpsl_ac_check(void) | 463 | static int sharpsl_ac_check(void) |
460 | { | 464 | { |
@@ -586,8 +590,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state) | |||
586 | 590 | ||
587 | return 0; | 591 | return 0; |
588 | } | 592 | } |
589 | #endif | ||
590 | |||
591 | 593 | ||
592 | /* | 594 | /* |
593 | * Check for fatal battery errors | 595 | * Check for fatal battery errors |
@@ -738,7 +740,10 @@ static int sharpsl_off_charge_battery(void) | |||
738 | } | 740 | } |
739 | } | 741 | } |
740 | } | 742 | } |
741 | 743 | #else | |
744 | #define sharpsl_pm_suspend NULL | ||
745 | #define sharpsl_pm_resume NULL | ||
746 | #endif | ||
742 | 747 | ||
743 | static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) | 748 | static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) |
744 | { | 749 | { |
@@ -768,10 +773,12 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info) | |||
768 | info->battery_life = sharpsl_pm.battstat.mainbat_percent; | 773 | info->battery_life = sharpsl_pm.battstat.mainbat_percent; |
769 | } | 774 | } |
770 | 775 | ||
776 | #ifdef CONFIG_PM | ||
771 | static struct platform_suspend_ops sharpsl_pm_ops = { | 777 | static struct platform_suspend_ops sharpsl_pm_ops = { |
772 | .enter = corgi_pxa_pm_enter, | 778 | .enter = corgi_pxa_pm_enter, |
773 | .valid = suspend_valid_only_mem, | 779 | .valid = suspend_valid_only_mem, |
774 | }; | 780 | }; |
781 | #endif | ||
775 | 782 | ||
776 | static int __init sharpsl_pm_probe(struct platform_device *pdev) | 783 | static int __init sharpsl_pm_probe(struct platform_device *pdev) |
777 | { | 784 | { |
@@ -802,7 +809,9 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev) | |||
802 | 809 | ||
803 | apm_get_power_status = sharpsl_apm_get_power_status; | 810 | apm_get_power_status = sharpsl_apm_get_power_status; |
804 | 811 | ||
812 | #ifdef CONFIG_PM | ||
805 | suspend_set_ops(&sharpsl_pm_ops); | 813 | suspend_set_ops(&sharpsl_pm_ops); |
814 | #endif | ||
806 | 815 | ||
807 | mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250)); | 816 | mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250)); |
808 | 817 | ||
diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h index 584ef9a8e5a5..39c8bc1a006a 100644 --- a/arch/arm/include/asm/ftrace.h +++ b/arch/arm/include/asm/ftrace.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef _ASM_ARM_FTRACE | 1 | #ifndef _ASM_ARM_FTRACE |
2 | #define _ASM_ARM_FTRACE | 2 | #define _ASM_ARM_FTRACE |
3 | 3 | ||
4 | #ifdef CONFIG_FTRACE | 4 | #ifdef CONFIG_FUNCTION_TRACER |
5 | #define MCOUNT_ADDR ((long)(mcount)) | 5 | #define MCOUNT_ADDR ((long)(mcount)) |
6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ |
7 | 7 | ||
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 809ff9ab853a..77764301844b 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -44,10 +44,10 @@ | |||
44 | * The module space lives between the addresses given by TASK_SIZE | 44 | * The module space lives between the addresses given by TASK_SIZE |
45 | * and PAGE_OFFSET - it must be within 32MB of the kernel text. | 45 | * and PAGE_OFFSET - it must be within 32MB of the kernel text. |
46 | */ | 46 | */ |
47 | #define MODULE_END (PAGE_OFFSET) | 47 | #define MODULES_END (PAGE_OFFSET) |
48 | #define MODULE_START (MODULE_END - 16*1048576) | 48 | #define MODULES_VADDR (MODULES_END - 16*1048576) |
49 | 49 | ||
50 | #if TASK_SIZE > MODULE_START | 50 | #if TASK_SIZE > MODULES_VADDR |
51 | #error Top of user space clashes with start of module space | 51 | #error Top of user space clashes with start of module space |
52 | #endif | 52 | #endif |
53 | 53 | ||
@@ -56,7 +56,7 @@ | |||
56 | * Since we use sections to map it, this macro replaces the physical address | 56 | * Since we use sections to map it, this macro replaces the physical address |
57 | * with its virtual address while keeping offset from the base section. | 57 | * with its virtual address while keeping offset from the base section. |
58 | */ | 58 | */ |
59 | #define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) | 59 | #define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff)) |
60 | 60 | ||
61 | /* | 61 | /* |
62 | * Allow 16MB-aligned ioremap pages | 62 | * Allow 16MB-aligned ioremap pages |
@@ -94,8 +94,8 @@ | |||
94 | /* | 94 | /* |
95 | * The module can be at any place in ram in nommu mode. | 95 | * The module can be at any place in ram in nommu mode. |
96 | */ | 96 | */ |
97 | #define MODULE_END (END_MEM) | 97 | #define MODULES_END (END_MEM) |
98 | #define MODULE_START (PHYS_OFFSET) | 98 | #define MODULES_VADDR (PHYS_OFFSET) |
99 | 99 | ||
100 | #endif /* !CONFIG_MMU */ | 100 | #endif /* !CONFIG_MMU */ |
101 | 101 | ||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7aad78420f18..568020b34e3e 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -42,6 +42,10 @@ | |||
42 | #define CR_U (1 << 22) /* Unaligned access operation */ | 42 | #define CR_U (1 << 22) /* Unaligned access operation */ |
43 | #define CR_XP (1 << 23) /* Extended page tables */ | 43 | #define CR_XP (1 << 23) /* Extended page tables */ |
44 | #define CR_VE (1 << 24) /* Vectored interrupts */ | 44 | #define CR_VE (1 << 24) /* Vectored interrupts */ |
45 | #define CR_EE (1 << 25) /* Exception (Big) Endian */ | ||
46 | #define CR_TRE (1 << 28) /* TEX remap enable */ | ||
47 | #define CR_AFE (1 << 29) /* Access flag enable */ | ||
48 | #define CR_TE (1 << 30) /* Thumb exception enable */ | ||
45 | 49 | ||
46 | /* | 50 | /* |
47 | * This is used to ensure the compiler did actually allocate the register we | 51 | * This is used to ensure the compiler did actually allocate the register we |
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 2357b1cf1cf9..c74f766ffc12 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -183,6 +183,6 @@ EXPORT_SYMBOL(_find_next_bit_be); | |||
183 | 183 | ||
184 | EXPORT_SYMBOL(copy_page); | 184 | EXPORT_SYMBOL(copy_page); |
185 | 185 | ||
186 | #ifdef CONFIG_FTRACE | 186 | #ifdef CONFIG_FUNCTION_TRACER |
187 | EXPORT_SYMBOL(mcount); | 187 | EXPORT_SYMBOL(mcount); |
188 | #endif | 188 | #endif |
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index 513f332f040d..84849098c8e8 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c | |||
@@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x) | |||
21 | 21 | ||
22 | eflags = x->e_flags; | 22 | eflags = x->e_flags; |
23 | if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { | 23 | if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { |
24 | unsigned int flt_fmt; | ||
25 | |||
24 | /* APCS26 is only allowed if the CPU supports it */ | 26 | /* APCS26 is only allowed if the CPU supports it */ |
25 | if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) | 27 | if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) |
26 | return 0; | 28 | return 0; |
27 | 29 | ||
30 | flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT); | ||
31 | |||
28 | /* VFP requires the supporting code */ | 32 | /* VFP requires the supporting code */ |
29 | if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP)) | 33 | if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP)) |
30 | return 0; | 34 | return 0; |
31 | } | 35 | } |
32 | return 1; | 36 | return 1; |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 3aa14dcc5bab..06269ea375c5 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -101,7 +101,7 @@ ENDPROC(ret_from_fork) | |||
101 | #undef CALL | 101 | #undef CALL |
102 | #define CALL(x) .long x | 102 | #define CALL(x) .long x |
103 | 103 | ||
104 | #ifdef CONFIG_FTRACE | 104 | #ifdef CONFIG_FUNCTION_TRACER |
105 | #ifdef CONFIG_DYNAMIC_FTRACE | 105 | #ifdef CONFIG_DYNAMIC_FTRACE |
106 | ENTRY(mcount) | 106 | ENTRY(mcount) |
107 | stmdb sp!, {r0-r3, lr} | 107 | stmdb sp!, {r0-r3, lr} |
@@ -149,7 +149,7 @@ trace: | |||
149 | ftrace_stub: | 149 | ftrace_stub: |
150 | mov pc, lr | 150 | mov pc, lr |
151 | 151 | ||
152 | #endif /* CONFIG_FTRACE */ | 152 | #endif /* CONFIG_FUNCTION_TRACER */ |
153 | 153 | ||
154 | /*============================================================================= | 154 | /*============================================================================= |
155 | * SWI handler | 155 | * SWI handler |
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c index 76d50e6091bc..6c90479e8974 100644 --- a/arch/arm/kernel/ftrace.c +++ b/arch/arm/kernel/ftrace.c | |||
@@ -95,19 +95,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func) | |||
95 | return ret; | 95 | return ret; |
96 | } | 96 | } |
97 | 97 | ||
98 | int ftrace_mcount_set(unsigned long *data) | ||
99 | { | ||
100 | unsigned long pc, old; | ||
101 | unsigned long *addr = data; | ||
102 | unsigned char *new; | ||
103 | |||
104 | pc = (unsigned long)&mcount_call; | ||
105 | memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE); | ||
106 | new = ftrace_call_replace(pc, *addr); | ||
107 | *addr = ftrace_modify_code(pc, (unsigned char *)&old, new); | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | /* run from kstop_machine */ | 98 | /* run from kstop_machine */ |
112 | int __init ftrace_dyn_arch_init(void *data) | 99 | int __init ftrace_dyn_arch_init(void *data) |
113 | { | 100 | { |
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 9203ba7d58ee..b8d965dcd6fd 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c | |||
@@ -26,12 +26,12 @@ | |||
26 | /* | 26 | /* |
27 | * The XIP kernel text is mapped in the module area for modules and | 27 | * The XIP kernel text is mapped in the module area for modules and |
28 | * some other stuff to work without any indirect relocations. | 28 | * some other stuff to work without any indirect relocations. |
29 | * MODULE_START is redefined here and not in asm/memory.h to avoid | 29 | * MODULES_VADDR is redefined here and not in asm/memory.h to avoid |
30 | * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. | 30 | * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. |
31 | */ | 31 | */ |
32 | extern void _etext; | 32 | extern void _etext; |
33 | #undef MODULE_START | 33 | #undef MODULES_VADDR |
34 | #define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) | 34 | #define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) |
35 | #endif | 35 | #endif |
36 | 36 | ||
37 | #ifdef CONFIG_MMU | 37 | #ifdef CONFIG_MMU |
@@ -43,7 +43,7 @@ void *module_alloc(unsigned long size) | |||
43 | if (!size) | 43 | if (!size) |
44 | return NULL; | 44 | return NULL; |
45 | 45 | ||
46 | area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END); | 46 | area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END); |
47 | if (!area) | 47 | if (!area) |
48 | return NULL; | 48 | return NULL; |
49 | 49 | ||
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 9c040c78889a..e263fda3e2d1 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -165,6 +165,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = { | |||
165 | static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { | 165 | static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { |
166 | { | 166 | { |
167 | I2C_BOARD_INFO("fm3130", 0x68), | 167 | I2C_BOARD_INFO("fm3130", 0x68), |
168 | }, { | ||
168 | I2C_BOARD_INFO("24c64", 0x50), | 169 | I2C_BOARD_INFO("24c64", 0x50), |
169 | }, | 170 | }, |
170 | }; | 171 | }; |
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 76d76e2fa69e..bffa6741a751 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #ifndef __ASM_ARCH_AT91RM9200_GPIO_H | 13 | #ifndef __ASM_ARCH_AT91RM9200_GPIO_H |
14 | #define __ASM_ARCH_AT91RM9200_GPIO_H | 14 | #define __ASM_ARCH_AT91RM9200_GPIO_H |
15 | 15 | ||
16 | #include <linux/kernel.h> | ||
16 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
17 | 18 | ||
18 | #define PIN_BASE NR_AIC_IRQS | 19 | #define PIN_BASE NR_AIC_IRQS |
@@ -220,6 +221,7 @@ static inline int gpio_request(unsigned gpio, const char *label) | |||
220 | 221 | ||
221 | static inline void gpio_free(unsigned gpio) | 222 | static inline void gpio_free(unsigned gpio) |
222 | { | 223 | { |
224 | might_sleep(); | ||
223 | } | 225 | } |
224 | 226 | ||
225 | extern int gpio_direction_input(unsigned gpio); | 227 | extern int gpio_direction_input(unsigned gpio); |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index de53f0be71b9..48345fb34613 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/serial_core.h> | 26 | #include <linux/serial_core.h> |
27 | #include <linux/device.h> | 27 | #include <linux/device.h> |
28 | #include <linux/mm.h> | 28 | #include <linux/mm.h> |
29 | #include <linux/dma-mapping.h> | ||
29 | #include <linux/time.h> | 30 | #include <linux/time.h> |
30 | #include <linux/timex.h> | 31 | #include <linux/timex.h> |
31 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
@@ -449,12 +450,13 @@ static struct resource ep93xx_ohci_resources[] = { | |||
449 | }, | 450 | }, |
450 | }; | 451 | }; |
451 | 452 | ||
453 | |||
452 | static struct platform_device ep93xx_ohci_device = { | 454 | static struct platform_device ep93xx_ohci_device = { |
453 | .name = "ep93xx-ohci", | 455 | .name = "ep93xx-ohci", |
454 | .id = -1, | 456 | .id = -1, |
455 | .dev = { | 457 | .dev = { |
456 | .dma_mask = (void *)0xffffffff, | 458 | .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask, |
457 | .coherent_dma_mask = 0xffffffff, | 459 | .coherent_dma_mask = DMA_BIT_MASK(32), |
458 | }, | 460 | }, |
459 | .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), | 461 | .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), |
460 | .resource = ep93xx_ohci_resources, | 462 | .resource = ep93xx_ohci_resources, |
diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h index 6e3d795f2264..502d5aa2c093 100644 --- a/arch/arm/mach-imx/include/mach/gpio.h +++ b/arch/arm/mach-imx/include/mach/gpio.h | |||
@@ -1,5 +1,6 @@ | |||
1 | #ifndef _IMX_GPIO_H | 1 | #ifndef _IMX_GPIO_H |
2 | 2 | ||
3 | #include <linux/kernel.h> | ||
3 | #include <mach/imx-regs.h> | 4 | #include <mach/imx-regs.h> |
4 | 5 | ||
5 | #define IMX_GPIO_ALLOC_MODE_NORMAL 0 | 6 | #define IMX_GPIO_ALLOC_MODE_NORMAL 0 |
@@ -63,6 +64,8 @@ static inline int gpio_request(unsigned gpio, const char *label) | |||
63 | 64 | ||
64 | static inline void gpio_free(unsigned gpio) | 65 | static inline void gpio_free(unsigned gpio) |
65 | { | 66 | { |
67 | might_sleep(); | ||
68 | |||
66 | imx_gpio_free(gpio); | 69 | imx_gpio_free(gpio); |
67 | } | 70 | } |
68 | 71 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h index 9fbde177920f..cd5aec26c072 100644 --- a/arch/arm/mach-ixp4xx/include/mach/gpio.h +++ b/arch/arm/mach-ixp4xx/include/mach/gpio.h | |||
@@ -25,6 +25,7 @@ | |||
25 | #ifndef __ASM_ARCH_IXP4XX_GPIO_H | 25 | #ifndef __ASM_ARCH_IXP4XX_GPIO_H |
26 | #define __ASM_ARCH_IXP4XX_GPIO_H | 26 | #define __ASM_ARCH_IXP4XX_GPIO_H |
27 | 27 | ||
28 | #include <linux/kernel.h> | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | 30 | ||
30 | static inline int gpio_request(unsigned gpio, const char *label) | 31 | static inline int gpio_request(unsigned gpio, const char *label) |
@@ -34,6 +35,8 @@ static inline int gpio_request(unsigned gpio, const char *label) | |||
34 | 35 | ||
35 | static inline void gpio_free(unsigned gpio) | 36 | static inline void gpio_free(unsigned gpio) |
36 | { | 37 | { |
38 | might_sleep(); | ||
39 | |||
37 | return; | 40 | return; |
38 | } | 41 | } |
39 | 42 | ||
diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h index 73c84168761c..d4af5c335f16 100644 --- a/arch/arm/mach-ks8695/include/mach/gpio.h +++ b/arch/arm/mach-ks8695/include/mach/gpio.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef __ASM_ARCH_GPIO_H_ | 11 | #ifndef __ASM_ARCH_GPIO_H_ |
12 | #define __ASM_ARCH_GPIO_H_ | 12 | #define __ASM_ARCH_GPIO_H_ |
13 | 13 | ||
14 | #include <linux/kernel.h> | ||
15 | |||
14 | #define KS8695_GPIO_0 0 | 16 | #define KS8695_GPIO_0 0 |
15 | #define KS8695_GPIO_1 1 | 17 | #define KS8695_GPIO_1 1 |
16 | #define KS8695_GPIO_2 2 | 18 | #define KS8695_GPIO_2 2 |
@@ -74,6 +76,7 @@ static inline int gpio_request(unsigned int pin, const char *label) | |||
74 | 76 | ||
75 | static inline void gpio_free(unsigned int pin) | 77 | static inline void gpio_free(unsigned int pin) |
76 | { | 78 | { |
79 | might_sleep(); | ||
77 | } | 80 | } |
78 | 81 | ||
79 | #endif | 82 | #endif |
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 1be4a390c63f..f902a7c37c31 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -35,6 +35,8 @@ | |||
35 | #include <mach/imx-uart.h> | 35 | #include <mach/imx-uart.h> |
36 | #include <mach/iomux-mx3.h> | 36 | #include <mach/iomux-mx3.h> |
37 | 37 | ||
38 | #include "devices.h" | ||
39 | |||
38 | /*! | 40 | /*! |
39 | * @file mx31ads.c | 41 | * @file mx31ads.c |
40 | * | 42 | * |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 11fda95c86a5..843f68c8ead1 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
@@ -91,12 +91,12 @@ static struct map_desc pcm037_io_desc[] __initdata = { | |||
91 | .virtual = AIPS1_BASE_ADDR_VIRT, | 91 | .virtual = AIPS1_BASE_ADDR_VIRT, |
92 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | 92 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), |
93 | .length = AIPS1_SIZE, | 93 | .length = AIPS1_SIZE, |
94 | .type = MT_DEVICE | 94 | .type = MT_DEVICE_NONSHARED |
95 | }, { | 95 | }, { |
96 | .virtual = AIPS2_BASE_ADDR_VIRT, | 96 | .virtual = AIPS2_BASE_ADDR_VIRT, |
97 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | 97 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), |
98 | .length = AIPS2_SIZE, | 98 | .length = AIPS2_SIZE, |
99 | .type = MT_DEVICE | 99 | .type = MT_DEVICE_NONSHARED |
100 | }, | 100 | }, |
101 | }; | 101 | }; |
102 | 102 | ||
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c index 5241e6a286cc..5503ca09c4ae 100644 --- a/arch/arm/mach-ns9xxx/gpio.c +++ b/arch/arm/mach-ns9xxx/gpio.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * under the terms of the GNU General Public License version 2 as published by | 8 | * under the terms of the GNU General Public License version 2 as published by |
9 | * the Free Software Foundation. | 9 | * the Free Software Foundation. |
10 | */ | 10 | */ |
11 | #include <linux/kernel.h> | ||
11 | #include <linux/compiler.h> | 12 | #include <linux/compiler.h> |
12 | #include <linux/init.h> | 13 | #include <linux/init.h> |
13 | #include <linux/spinlock.h> | 14 | #include <linux/spinlock.h> |
@@ -63,6 +64,7 @@ EXPORT_SYMBOL(gpio_request); | |||
63 | 64 | ||
64 | void gpio_free(unsigned gpio) | 65 | void gpio_free(unsigned gpio) |
65 | { | 66 | { |
67 | might_sleep(); | ||
66 | clear_bit(gpio, gpiores); | 68 | clear_bit(gpio, gpiores); |
67 | return; | 69 | return; |
68 | } | 70 | } |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 763bdbeaf681..2249049c1d5a 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -429,18 +429,16 @@ void __init gpmc_init(void) | |||
429 | gpmc_l3_clk = clk_get(NULL, ck); | 429 | gpmc_l3_clk = clk_get(NULL, ck); |
430 | if (IS_ERR(gpmc_l3_clk)) { | 430 | if (IS_ERR(gpmc_l3_clk)) { |
431 | printk(KERN_ERR "Could not get GPMC clock %s\n", ck); | 431 | printk(KERN_ERR "Could not get GPMC clock %s\n", ck); |
432 | return -ENODEV; | 432 | BUG(); |
433 | } | 433 | } |
434 | 434 | ||
435 | gpmc_base = ioremap(l, SZ_4K); | 435 | gpmc_base = ioremap(l, SZ_4K); |
436 | if (!gpmc_base) { | 436 | if (!gpmc_base) { |
437 | clk_put(gpmc_l3_clk); | 437 | clk_put(gpmc_l3_clk); |
438 | printk(KERN_ERR "Could not get GPMC register memory\n"); | 438 | printk(KERN_ERR "Could not get GPMC register memory\n"); |
439 | return -ENOMEM; | 439 | BUG(); |
440 | } | 440 | } |
441 | 441 | ||
442 | BUG_ON(IS_ERR(gpmc_l3_clk)); | ||
443 | |||
444 | l = gpmc_read_reg(GPMC_REVISION); | 442 | l = gpmc_read_reg(GPMC_REVISION); |
445 | printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); | 443 | printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); |
446 | /* Set smart idle mode and automatic L3 clock gating */ | 444 | /* Set smart idle mode and automatic L3 clock gating */ |
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c index fc419868e39f..f99d08811e5a 100644 --- a/arch/arm/mach-orion5x/gpio.c +++ b/arch/arm/mach-orion5x/gpio.c | |||
@@ -165,6 +165,8 @@ EXPORT_SYMBOL(gpio_request); | |||
165 | 165 | ||
166 | void gpio_free(unsigned pin) | 166 | void gpio_free(unsigned pin) |
167 | { | 167 | { |
168 | might_sleep(); | ||
169 | |||
168 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | 170 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { |
169 | pr_debug("%s: invalid GPIO %d\n", __func__, pin); | 171 | pr_debug("%s: invalid GPIO %d\n", __func__, pin); |
170 | return; | 172 | return; |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index eb7d6c94aa42..e35259032813 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
@@ -204,7 +204,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { | |||
204 | .read_devdata = corgipm_read_devdata, | 204 | .read_devdata = corgipm_read_devdata, |
205 | .charger_wakeup = corgi_charger_wakeup, | 205 | .charger_wakeup = corgi_charger_wakeup, |
206 | .should_wakeup = corgi_should_wakeup, | 206 | .should_wakeup = corgi_should_wakeup, |
207 | #ifdef CONFIG_BACKLIGHT_CORGI | 207 | #if defined(CONFIG_LCD_CORGI) |
208 | .backlight_limit = corgi_lcd_limit_intensity, | ||
209 | #elif defined(CONFIG_BACKLIGHT_CORGI) | ||
208 | .backlight_limit = corgibl_limit_intensity, | 210 | .backlight_limit = corgibl_limit_intensity, |
209 | #endif | 211 | #endif |
210 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 212 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h index 3b1d4a72d4d1..8242e14a44fa 100644 --- a/arch/arm/mach-pxa/include/mach/sharpsl.h +++ b/arch/arm/mach-pxa/include/mach/sharpsl.h | |||
@@ -26,6 +26,7 @@ struct corgits_machinfo { | |||
26 | * SharpSL Backlight | 26 | * SharpSL Backlight |
27 | */ | 27 | */ |
28 | extern void corgibl_limit_intensity(int limit); | 28 | extern void corgibl_limit_intensity(int limit); |
29 | extern void corgi_lcd_limit_intensity(int limit); | ||
29 | 30 | ||
30 | 31 | ||
31 | /* | 32 | /* |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 524f656dc56d..f0a5bbae0b45 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -385,6 +385,16 @@ static void __init spitz_init_spi(void) | |||
385 | if (err) | 385 | if (err) |
386 | goto err_free_2; | 386 | goto err_free_2; |
387 | 387 | ||
388 | err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1); | ||
389 | if (err) | ||
390 | goto err_free_3; | ||
391 | err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1); | ||
392 | if (err) | ||
393 | goto err_free_3; | ||
394 | err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1); | ||
395 | if (err) | ||
396 | goto err_free_3; | ||
397 | |||
388 | if (machine_is_akita()) { | 398 | if (machine_is_akita()) { |
389 | spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; | 399 | spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; |
390 | spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; | 400 | spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; |
@@ -394,6 +404,8 @@ static void __init spitz_init_spi(void) | |||
394 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); | 404 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); |
395 | return; | 405 | return; |
396 | 406 | ||
407 | err_free_3: | ||
408 | gpio_free(SPITZ_GPIO_MAX1111_CS); | ||
397 | err_free_2: | 409 | err_free_2: |
398 | gpio_free(SPITZ_GPIO_LCDCON_CS); | 410 | gpio_free(SPITZ_GPIO_LCDCON_CS); |
399 | err_free_1: | 411 | err_free_1: |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 53018db106ac..072e77cfe5a3 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -198,7 +198,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
198 | .read_devdata = spitzpm_read_devdata, | 198 | .read_devdata = spitzpm_read_devdata, |
199 | .charger_wakeup = spitz_charger_wakeup, | 199 | .charger_wakeup = spitz_charger_wakeup, |
200 | .should_wakeup = spitz_should_wakeup, | 200 | .should_wakeup = spitz_should_wakeup, |
201 | #ifdef CONFIG_BACKLIGHT_CORGI | 201 | #if defined(CONFIG_LCD_CORGI) |
202 | .backlight_limit = corgi_lcd_limit_intensity, | ||
203 | #elif defined(CONFIG_BACKLIGHT_CORGI) | ||
202 | .backlight_limit = corgibl_limit_intensity, | 204 | .backlight_limit = corgibl_limit_intensity, |
203 | #endif | 205 | #endif |
204 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 206 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 10b1bae1a258..464de893a988 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c | |||
@@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
98 | /* | 98 | /* |
99 | * Clean and invalidate partial last cache line. | 99 | * Clean and invalidate partial last cache line. |
100 | */ | 100 | */ |
101 | if (end & (CACHE_LINE_SIZE - 1)) { | 101 | if (start < end && (end & (CACHE_LINE_SIZE - 1))) { |
102 | xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); | 102 | xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); |
103 | xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); | 103 | xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); |
104 | end &= ~(CACHE_LINE_SIZE - 1); | 104 | end &= ~(CACHE_LINE_SIZE - 1); |
@@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
107 | /* | 107 | /* |
108 | * Invalidate all full cache lines between 'start' and 'end'. | 108 | * Invalidate all full cache lines between 'start' and 'end'. |
109 | */ | 109 | */ |
110 | while (start != end) { | 110 | while (start < end) { |
111 | xsc3_l2_inv_pa(start); | 111 | xsc3_l2_inv_pa(start); |
112 | start += CACHE_LINE_SIZE; | 112 | start += CACHE_LINE_SIZE; |
113 | } | 113 | } |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 8ba754064559..e63db11f16a8 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set) | |||
180 | #endif | 180 | #endif |
181 | 181 | ||
182 | #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE | 182 | #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE |
183 | #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE | 183 | #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE |
184 | 184 | ||
185 | static struct mem_type mem_types[] = { | 185 | static struct mem_type mem_types[] = { |
186 | [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ | 186 | [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ |
187 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | | 187 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | |
188 | L_PTE_SHARED, | 188 | L_PTE_SHARED, |
189 | .prot_l1 = PMD_TYPE_TABLE, | 189 | .prot_l1 = PMD_TYPE_TABLE, |
190 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, | 190 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S, |
191 | .domain = DOMAIN_IO, | 191 | .domain = DOMAIN_IO, |
192 | }, | 192 | }, |
193 | [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ | 193 | [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ |
194 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, | 194 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, |
195 | .prot_l1 = PMD_TYPE_TABLE, | 195 | .prot_l1 = PMD_TYPE_TABLE, |
196 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), | 196 | .prot_sect = PROT_SECT_DEVICE, |
197 | .domain = DOMAIN_IO, | 197 | .domain = DOMAIN_IO, |
198 | }, | 198 | }, |
199 | [MT_DEVICE_CACHED] = { /* ioremap_cached */ | 199 | [MT_DEVICE_CACHED] = { /* ioremap_cached */ |
@@ -205,7 +205,7 @@ static struct mem_type mem_types[] = { | |||
205 | [MT_DEVICE_WC] = { /* ioremap_wc */ | 205 | [MT_DEVICE_WC] = { /* ioremap_wc */ |
206 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, | 206 | .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, |
207 | .prot_l1 = PMD_TYPE_TABLE, | 207 | .prot_l1 = PMD_TYPE_TABLE, |
208 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE, | 208 | .prot_sect = PROT_SECT_DEVICE, |
209 | .domain = DOMAIN_IO, | 209 | .domain = DOMAIN_IO, |
210 | }, | 210 | }, |
211 | [MT_CACHECLEAN] = { | 211 | [MT_CACHECLEAN] = { |
@@ -273,22 +273,23 @@ static void __init build_mem_type_table(void) | |||
273 | #endif | 273 | #endif |
274 | 274 | ||
275 | /* | 275 | /* |
276 | * On non-Xscale3 ARMv5-and-older systems, use CB=01 | 276 | * Strip out features not present on earlier architectures. |
277 | * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3 | 277 | * Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those |
278 | * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable | 278 | * without extended page tables don't have the 'Shared' bit. |
279 | * in xsc3 parlance, Uncached Normal in ARMv6 parlance). | ||
280 | */ | 279 | */ |
281 | if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { | 280 | if (cpu_arch < CPU_ARCH_ARMv5) |
282 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); | 281 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) |
283 | mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE; | 282 | mem_types[i].prot_sect &= ~PMD_SECT_TEX(7); |
284 | } | 283 | if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3()) |
284 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) | ||
285 | mem_types[i].prot_sect &= ~PMD_SECT_S; | ||
285 | 286 | ||
286 | /* | 287 | /* |
287 | * ARMv5 and lower, bit 4 must be set for page tables. | 288 | * ARMv5 and lower, bit 4 must be set for page tables (was: cache |
288 | * (was: cache "update-able on write" bit on ARM610) | 289 | * "update-able on write" bit on ARM610). However, Xscale and |
289 | * However, Xscale cores require this bit to be cleared. | 290 | * Xscale3 require this bit to be cleared. |
290 | */ | 291 | */ |
291 | if (cpu_is_xscale()) { | 292 | if (cpu_is_xscale() || cpu_is_xsc3()) { |
292 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { | 293 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { |
293 | mem_types[i].prot_sect &= ~PMD_BIT4; | 294 | mem_types[i].prot_sect &= ~PMD_BIT4; |
294 | mem_types[i].prot_l1 &= ~PMD_BIT4; | 295 | mem_types[i].prot_l1 &= ~PMD_BIT4; |
@@ -302,6 +303,64 @@ static void __init build_mem_type_table(void) | |||
302 | } | 303 | } |
303 | } | 304 | } |
304 | 305 | ||
306 | /* | ||
307 | * Mark the device areas according to the CPU/architecture. | ||
308 | */ | ||
309 | if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) { | ||
310 | if (!cpu_is_xsc3()) { | ||
311 | /* | ||
312 | * Mark device regions on ARMv6+ as execute-never | ||
313 | * to prevent speculative instruction fetches. | ||
314 | */ | ||
315 | mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN; | ||
316 | mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN; | ||
317 | mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN; | ||
318 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN; | ||
319 | } | ||
320 | if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) { | ||
321 | /* | ||
322 | * For ARMv7 with TEX remapping, | ||
323 | * - shared device is SXCB=1100 | ||
324 | * - nonshared device is SXCB=0100 | ||
325 | * - write combine device mem is SXCB=0001 | ||
326 | * (Uncached Normal memory) | ||
327 | */ | ||
328 | mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1); | ||
329 | mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1); | ||
330 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; | ||
331 | } else if (cpu_is_xsc3()) { | ||
332 | /* | ||
333 | * For Xscale3, | ||
334 | * - shared device is TEXCB=00101 | ||
335 | * - nonshared device is TEXCB=01000 | ||
336 | * - write combine device mem is TEXCB=00100 | ||
337 | * (Inner/Outer Uncacheable in xsc3 parlance) | ||
338 | */ | ||
339 | mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED; | ||
340 | mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2); | ||
341 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); | ||
342 | } else { | ||
343 | /* | ||
344 | * For ARMv6 and ARMv7 without TEX remapping, | ||
345 | * - shared device is TEXCB=00001 | ||
346 | * - nonshared device is TEXCB=01000 | ||
347 | * - write combine device mem is TEXCB=00100 | ||
348 | * (Uncached Normal in ARMv6 parlance). | ||
349 | */ | ||
350 | mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; | ||
351 | mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2); | ||
352 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); | ||
353 | } | ||
354 | } else { | ||
355 | /* | ||
356 | * On others, write combining is "Uncached/Buffered" | ||
357 | */ | ||
358 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; | ||
359 | } | ||
360 | |||
361 | /* | ||
362 | * Now deal with the memory-type mappings | ||
363 | */ | ||
305 | cp = &cache_policies[cachepolicy]; | 364 | cp = &cache_policies[cachepolicy]; |
306 | vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; | 365 | vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; |
307 | 366 | ||
@@ -317,12 +376,8 @@ static void __init build_mem_type_table(void) | |||
317 | * Enable CPU-specific coherency if supported. | 376 | * Enable CPU-specific coherency if supported. |
318 | * (Only available on XSC3 at the moment.) | 377 | * (Only available on XSC3 at the moment.) |
319 | */ | 378 | */ |
320 | if (arch_is_coherent()) { | 379 | if (arch_is_coherent() && cpu_is_xsc3()) |
321 | if (cpu_is_xsc3()) { | 380 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; |
322 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; | ||
323 | mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED; | ||
324 | } | ||
325 | } | ||
326 | 381 | ||
327 | /* | 382 | /* |
328 | * ARMv6 and above have extended page tables. | 383 | * ARMv6 and above have extended page tables. |
@@ -336,11 +391,6 @@ static void __init build_mem_type_table(void) | |||
336 | mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; | 391 | mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; |
337 | mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; | 392 | mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; |
338 | 393 | ||
339 | /* | ||
340 | * Mark the device area as "shared device" | ||
341 | */ | ||
342 | mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; | ||
343 | |||
344 | #ifdef CONFIG_SMP | 394 | #ifdef CONFIG_SMP |
345 | /* | 395 | /* |
346 | * Mark memory with the "shared" attribute for SMP systems | 396 | * Mark memory with the "shared" attribute for SMP systems |
@@ -360,9 +410,6 @@ static void __init build_mem_type_table(void) | |||
360 | mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; | 410 | mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; |
361 | mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; | 411 | mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; |
362 | 412 | ||
363 | if (cpu_arch < CPU_ARCH_ARMv5) | ||
364 | mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1); | ||
365 | |||
366 | pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); | 413 | pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); |
367 | pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | | 414 | pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | |
368 | L_PTE_DIRTY | L_PTE_WRITE | | 415 | L_PTE_DIRTY | L_PTE_WRITE | |
@@ -654,7 +701,7 @@ static inline void prepare_page_table(struct meminfo *mi) | |||
654 | /* | 701 | /* |
655 | * Clear out all the mappings below the kernel image. | 702 | * Clear out all the mappings below the kernel image. |
656 | */ | 703 | */ |
657 | for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE) | 704 | for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) |
658 | pmd_clear(pmd_off_k(addr)); | 705 | pmd_clear(pmd_off_k(addr)); |
659 | 706 | ||
660 | #ifdef CONFIG_XIP_KERNEL | 707 | #ifdef CONFIG_XIP_KERNEL |
@@ -766,7 +813,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) | |||
766 | */ | 813 | */ |
767 | #ifdef CONFIG_XIP_KERNEL | 814 | #ifdef CONFIG_XIP_KERNEL |
768 | map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); | 815 | map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); |
769 | map.virtual = MODULE_START; | 816 | map.virtual = MODULES_VADDR; |
770 | map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; | 817 | map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; |
771 | map.type = MT_ROM; | 818 | map.type = MT_ROM; |
772 | create_mapping(&map); | 819 | create_mapping(&map); |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 07f82db70945..4d3c0a73e7fb 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -115,7 +115,7 @@ ENTRY(cpu_v7_set_pte_ext) | |||
115 | orr r3, r3, r2 | 115 | orr r3, r3, r2 |
116 | orr r3, r3, #PTE_EXT_AP0 | 2 | 116 | orr r3, r3, #PTE_EXT_AP0 | 2 |
117 | 117 | ||
118 | tst r2, #1 << 4 | 118 | tst r1, #1 << 4 |
119 | orrne r3, r3, #PTE_EXT_TEX(1) | 119 | orrne r3, r3, #PTE_EXT_TEX(1) |
120 | 120 | ||
121 | tst r1, #L_PTE_WRITE | 121 | tst r1, #L_PTE_WRITE |
@@ -192,11 +192,11 @@ __v7_setup: | |||
192 | mov pc, lr @ return to head.S:__ret | 192 | mov pc, lr @ return to head.S:__ret |
193 | ENDPROC(__v7_setup) | 193 | ENDPROC(__v7_setup) |
194 | 194 | ||
195 | /* | 195 | /* AT |
196 | * V X F I D LR | 196 | * TFR EV X F I D LR |
197 | * .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM | 197 | * .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM |
198 | * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced | 198 | * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced |
199 | * 0 110 0011 1.00 .111 1101 < we want | 199 | * 1 0 110 0011 1.00 .111 1101 < we want |
200 | */ | 200 | */ |
201 | .type v7_crval, #object | 201 | .type v7_crval, #object |
202 | v7_crval: | 202 | v7_crval: |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 04dc8b65401b..8f6cf56c11c0 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -349,7 +349,7 @@ ENTRY(cpu_xsc3_switch_mm) | |||
349 | cpu_xsc3_mt_table: | 349 | cpu_xsc3_mt_table: |
350 | .long 0x00 @ L_PTE_MT_UNCACHED | 350 | .long 0x00 @ L_PTE_MT_UNCACHED |
351 | .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE | 351 | .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE |
352 | .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH | 352 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH |
353 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK | 353 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK |
354 | .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED | 354 | .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED |
355 | .long 0x00 @ unused | 355 | .long 0x00 @ unused |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 733e0acac916..de5c4747453f 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
@@ -188,7 +188,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
188 | struct mxc_gpio_port *port = | 188 | struct mxc_gpio_port *port = |
189 | container_of(chip, struct mxc_gpio_port, chip); | 189 | container_of(chip, struct mxc_gpio_port, chip); |
190 | 190 | ||
191 | return (__raw_readl(port->base + GPIO_DR) >> offset) & 1; | 191 | return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; |
192 | } | 192 | } |
193 | 193 | ||
194 | static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 194 | static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h index 65b6810124c1..5d4cb1196441 100644 --- a/arch/arm/plat-mxc/include/mach/io.h +++ b/arch/arm/plat-mxc/include/mach/io.h | |||
@@ -14,6 +14,26 @@ | |||
14 | /* Allow IO space to be anywhere in the memory */ | 14 | /* Allow IO space to be anywhere in the memory */ |
15 | #define IO_SPACE_LIMIT 0xffffffff | 15 | #define IO_SPACE_LIMIT 0xffffffff |
16 | 16 | ||
17 | #ifdef CONFIG_ARCH_MX3 | ||
18 | #define __arch_ioremap __mx3_ioremap | ||
19 | #define __arch_iounmap __iounmap | ||
20 | |||
21 | static inline void __iomem * | ||
22 | __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) | ||
23 | { | ||
24 | if (mtype == MT_DEVICE) { | ||
25 | /* Access all peripherals below 0x80000000 as nonshared device | ||
26 | * but leave l2cc alone. | ||
27 | */ | ||
28 | if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) || | ||
29 | (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE))) | ||
30 | mtype = MT_DEVICE_NONSHARED; | ||
31 | } | ||
32 | |||
33 | return __arm_ioremap(phys_addr, size, mtype); | ||
34 | } | ||
35 | #endif | ||
36 | |||
17 | /* io address mapping macro */ | 37 | /* io address mapping macro */ |
18 | #define __io(a) ((void __iomem *)(a)) | 38 | #define __io(a) ((void __iomem *)(a)) |
19 | 39 | ||
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index bf6a10c5fc4f..be6aab9c6834 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c) | |||
428 | if (c->id != 0) | 428 | if (c->id != 0) |
429 | sprintf(p, ":%d", c->id); | 429 | sprintf(p, ":%d", c->id); |
430 | d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); | 430 | d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); |
431 | if (IS_ERR(d)) | 431 | if (!d) |
432 | return PTR_ERR(d); | 432 | return -ENOMEM; |
433 | c->dent = d; | 433 | c->dent = d; |
434 | 434 | ||
435 | d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); | 435 | d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); |
436 | if (IS_ERR(d)) { | 436 | if (!d) { |
437 | err = PTR_ERR(d); | 437 | err = -ENOMEM; |
438 | goto err_out; | 438 | goto err_out; |
439 | } | 439 | } |
440 | d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); | 440 | d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); |
441 | if (IS_ERR(d)) { | 441 | if (!d) { |
442 | err = PTR_ERR(d); | 442 | err = -ENOMEM; |
443 | goto err_out; | 443 | goto err_out; |
444 | } | 444 | } |
445 | d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); | 445 | d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); |
446 | if (IS_ERR(d)) { | 446 | if (!d) { |
447 | err = PTR_ERR(d); | 447 | err = -ENOMEM; |
448 | goto err_out; | 448 | goto err_out; |
449 | } | 449 | } |
450 | return 0; | 450 | return 0; |
@@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void) | |||
483 | int err; | 483 | int err; |
484 | 484 | ||
485 | d = debugfs_create_dir("clock", NULL); | 485 | d = debugfs_create_dir("clock", NULL); |
486 | if (IS_ERR(d)) | 486 | if (!d) |
487 | return PTR_ERR(d); | 487 | return -ENOMEM; |
488 | clk_debugfs_root = d; | 488 | clk_debugfs_root = d; |
489 | 489 | ||
490 | list_for_each_entry(c, &clocks, node) { | 490 | list_for_each_entry(c, &clocks, node) { |
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 030118ee204a..2276f89671d8 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S | |||
@@ -65,7 +65,8 @@ | |||
65 | #include <mach/omap34xx.h> | 65 | #include <mach/omap34xx.h> |
66 | #endif | 66 | #endif |
67 | 67 | ||
68 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ | 68 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ |
69 | #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ | ||
69 | 70 | ||
70 | .macro disable_fiq | 71 | .macro disable_fiq |
71 | .endm | 72 | .endm |
@@ -88,6 +89,7 @@ | |||
88 | cmp \irqnr, #0x0 | 89 | cmp \irqnr, #0x0 |
89 | 2222: | 90 | 2222: |
90 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] | 91 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] |
92 | and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ | ||
91 | 93 | ||
92 | .endm | 94 | .endm |
93 | 95 | ||
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index a2929ac8c687..bed5274c910a 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h | |||
@@ -372,7 +372,7 @@ | |||
372 | 372 | ||
373 | /* External TWL4030 gpio interrupts are optional */ | 373 | /* External TWL4030 gpio interrupts are optional */ |
374 | #define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END | 374 | #define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END |
375 | #ifdef CONFIG_TWL4030_GPIO | 375 | #ifdef CONFIG_GPIO_TWL4030 |
376 | #define TWL4030_GPIO_NR_IRQS 18 | 376 | #define TWL4030_GPIO_NR_IRQS 18 |
377 | #else | 377 | #else |
378 | #define TWL4030_GPIO_NR_IRQS 0 | 378 | #define TWL4030_GPIO_NR_IRQS 0 |