diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx28-m28evk.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx28-sps1.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/mach-mxs/mach-mxs.c | 24 |
5 files changed, 14 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts index 6ce3d17c3a29..fd36e1cca104 100644 --- a/arch/arm/boot/dts/imx28-m28evk.dts +++ b/arch/arm/boot/dts/imx28-m28evk.dts | |||
@@ -152,7 +152,6 @@ | |||
152 | i2c0: i2c@80058000 { | 152 | i2c0: i2c@80058000 { |
153 | pinctrl-names = "default"; | 153 | pinctrl-names = "default"; |
154 | pinctrl-0 = <&i2c0_pins_a>; | 154 | pinctrl-0 = <&i2c0_pins_a>; |
155 | clock-frequency = <400000>; | ||
156 | status = "okay"; | 155 | status = "okay"; |
157 | 156 | ||
158 | sgtl5000: codec@0a { | 157 | sgtl5000: codec@0a { |
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts index e6cde8aa7fff..6c6a5442800a 100644 --- a/arch/arm/boot/dts/imx28-sps1.dts +++ b/arch/arm/boot/dts/imx28-sps1.dts | |||
@@ -70,7 +70,6 @@ | |||
70 | i2c0: i2c@80058000 { | 70 | i2c0: i2c@80058000 { |
71 | pinctrl-names = "default"; | 71 | pinctrl-names = "default"; |
72 | pinctrl-0 = <&i2c0_pins_a>; | 72 | pinctrl-0 = <&i2c0_pins_a>; |
73 | clock-frequency = <400000>; | ||
74 | status = "okay"; | 73 | status = "okay"; |
75 | 74 | ||
76 | rtc: rtc@51 { | 75 | rtc: rtc@51 { |
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 48d00a099ce3..3d3f64d2111a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -385,7 +385,7 @@ | |||
385 | 385 | ||
386 | spi@7000d800 { | 386 | spi@7000d800 { |
387 | compatible = "nvidia,tegra20-slink"; | 387 | compatible = "nvidia,tegra20-slink"; |
388 | reg = <0x7000d480 0x200>; | 388 | reg = <0x7000d800 0x200>; |
389 | interrupts = <0 83 0x04>; | 389 | interrupts = <0 83 0x04>; |
390 | nvidia,dma-request-selector = <&apbdma 17>; | 390 | nvidia,dma-request-selector = <&apbdma 17>; |
391 | #address-cells = <1>; | 391 | #address-cells = <1>; |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 9d87a3ffe998..dbf46c272562 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -372,7 +372,7 @@ | |||
372 | 372 | ||
373 | spi@7000d800 { | 373 | spi@7000d800 { |
374 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | 374 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; |
375 | reg = <0x7000d480 0x200>; | 375 | reg = <0x7000d800 0x200>; |
376 | interrupts = <0 83 0x04>; | 376 | interrupts = <0 83 0x04>; |
377 | nvidia,dma-request-selector = <&apbdma 17>; | 377 | nvidia,dma-request-selector = <&apbdma 17>; |
378 | #address-cells = <1>; | 378 | #address-cells = <1>; |
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 3218f1f2c0e0..e7b781d3788f 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c | |||
@@ -41,8 +41,6 @@ static struct fb_videomode mx23evk_video_modes[] = { | |||
41 | .lower_margin = 4, | 41 | .lower_margin = 4, |
42 | .hsync_len = 1, | 42 | .hsync_len = 1, |
43 | .vsync_len = 1, | 43 | .vsync_len = 1, |
44 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
45 | FB_SYNC_DOTCLK_FAILING_ACT, | ||
46 | }, | 44 | }, |
47 | }; | 45 | }; |
48 | 46 | ||
@@ -59,8 +57,6 @@ static struct fb_videomode mx28evk_video_modes[] = { | |||
59 | .lower_margin = 10, | 57 | .lower_margin = 10, |
60 | .hsync_len = 10, | 58 | .hsync_len = 10, |
61 | .vsync_len = 10, | 59 | .vsync_len = 10, |
62 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
63 | FB_SYNC_DOTCLK_FAILING_ACT, | ||
64 | }, | 60 | }, |
65 | }; | 61 | }; |
66 | 62 | ||
@@ -77,7 +73,6 @@ static struct fb_videomode m28evk_video_modes[] = { | |||
77 | .lower_margin = 45, | 73 | .lower_margin = 45, |
78 | .hsync_len = 1, | 74 | .hsync_len = 1, |
79 | .vsync_len = 1, | 75 | .vsync_len = 1, |
80 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT, | ||
81 | }, | 76 | }, |
82 | }; | 77 | }; |
83 | 78 | ||
@@ -94,9 +89,7 @@ static struct fb_videomode apx4devkit_video_modes[] = { | |||
94 | .lower_margin = 13, | 89 | .lower_margin = 13, |
95 | .hsync_len = 48, | 90 | .hsync_len = 48, |
96 | .vsync_len = 3, | 91 | .vsync_len = 3, |
97 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | | 92 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
98 | FB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
99 | FB_SYNC_DOTCLK_FAILING_ACT, | ||
100 | }, | 93 | }, |
101 | }; | 94 | }; |
102 | 95 | ||
@@ -113,9 +106,7 @@ static struct fb_videomode apf28dev_video_modes[] = { | |||
113 | .lower_margin = 0x15, | 106 | .lower_margin = 0x15, |
114 | .hsync_len = 64, | 107 | .hsync_len = 64, |
115 | .vsync_len = 4, | 108 | .vsync_len = 4, |
116 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | | 109 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
117 | FB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
118 | FB_SYNC_DOTCLK_FAILING_ACT, | ||
119 | }, | 110 | }, |
120 | }; | 111 | }; |
121 | 112 | ||
@@ -132,7 +123,6 @@ static struct fb_videomode cfa10049_video_modes[] = { | |||
132 | .lower_margin = 2, | 123 | .lower_margin = 2, |
133 | .hsync_len = 15, | 124 | .hsync_len = 15, |
134 | .vsync_len = 15, | 125 | .vsync_len = 15, |
135 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | ||
136 | }, | 126 | }, |
137 | }; | 127 | }; |
138 | 128 | ||
@@ -259,6 +249,8 @@ static void __init imx23_evk_init(void) | |||
259 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); | 249 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); |
260 | mxsfb_pdata.default_bpp = 32; | 250 | mxsfb_pdata.default_bpp = 32; |
261 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | 251 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
252 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
253 | MXSFB_SYNC_DOTCLK_FAILING_ACT; | ||
262 | } | 254 | } |
263 | 255 | ||
264 | static inline void enable_clk_enet_out(void) | 256 | static inline void enable_clk_enet_out(void) |
@@ -278,6 +270,8 @@ static void __init imx28_evk_init(void) | |||
278 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); | 270 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); |
279 | mxsfb_pdata.default_bpp = 32; | 271 | mxsfb_pdata.default_bpp = 32; |
280 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | 272 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
273 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
274 | MXSFB_SYNC_DOTCLK_FAILING_ACT; | ||
281 | 275 | ||
282 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); | 276 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); |
283 | } | 277 | } |
@@ -297,6 +291,7 @@ static void __init m28evk_init(void) | |||
297 | mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); | 291 | mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); |
298 | mxsfb_pdata.default_bpp = 16; | 292 | mxsfb_pdata.default_bpp = 16; |
299 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; | 293 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; |
294 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT; | ||
300 | } | 295 | } |
301 | 296 | ||
302 | static void __init sc_sps1_init(void) | 297 | static void __init sc_sps1_init(void) |
@@ -322,6 +317,8 @@ static void __init apx4devkit_init(void) | |||
322 | mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); | 317 | mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); |
323 | mxsfb_pdata.default_bpp = 32; | 318 | mxsfb_pdata.default_bpp = 32; |
324 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | 319 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
320 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
321 | MXSFB_SYNC_DOTCLK_FAILING_ACT; | ||
325 | } | 322 | } |
326 | 323 | ||
327 | #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) | 324 | #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) |
@@ -407,6 +404,7 @@ static void __init cfa10049_init(void) | |||
407 | mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes); | 404 | mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes); |
408 | mxsfb_pdata.default_bpp = 32; | 405 | mxsfb_pdata.default_bpp = 32; |
409 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; | 406 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; |
407 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT; | ||
410 | } | 408 | } |
411 | 409 | ||
412 | static void __init cfa10037_init(void) | 410 | static void __init cfa10037_init(void) |
@@ -423,6 +421,8 @@ static void __init apf28_init(void) | |||
423 | mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes); | 421 | mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes); |
424 | mxsfb_pdata.default_bpp = 16; | 422 | mxsfb_pdata.default_bpp = 16; |
425 | mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT; | 423 | mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT; |
424 | mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
425 | MXSFB_SYNC_DOTCLK_FAILING_ACT; | ||
426 | } | 426 | } |
427 | 427 | ||
428 | static void __init mxs_machine_init(void) | 428 | static void __init mxs_machine_init(void) |