diff options
Diffstat (limited to 'arch/arm')
359 files changed, 2128 insertions, 6582 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dfb0312f4e73..87693e631129 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA | |||
186 | config FIQ | 186 | config FIQ |
187 | bool | 187 | bool |
188 | 188 | ||
189 | config NEED_RET_TO_USER | ||
190 | bool | ||
191 | |||
189 | config ARCH_MTD_XIP | 192 | config ARCH_MTD_XIP |
190 | bool | 193 | bool |
191 | 194 | ||
@@ -479,6 +482,7 @@ config ARCH_IOP13XX | |||
479 | select ARCH_SUPPORTS_MSI | 482 | select ARCH_SUPPORTS_MSI |
480 | select VMSPLIT_1G | 483 | select VMSPLIT_1G |
481 | select NEED_MACH_MEMORY_H | 484 | select NEED_MACH_MEMORY_H |
485 | select NEED_RET_TO_USER | ||
482 | help | 486 | help |
483 | Support for Intel's IOP13XX (XScale) family of processors. | 487 | Support for Intel's IOP13XX (XScale) family of processors. |
484 | 488 | ||
@@ -486,6 +490,7 @@ config ARCH_IOP32X | |||
486 | bool "IOP32x-based" | 490 | bool "IOP32x-based" |
487 | depends on MMU | 491 | depends on MMU |
488 | select CPU_XSCALE | 492 | select CPU_XSCALE |
493 | select NEED_RET_TO_USER | ||
489 | select PLAT_IOP | 494 | select PLAT_IOP |
490 | select PCI | 495 | select PCI |
491 | select ARCH_REQUIRE_GPIOLIB | 496 | select ARCH_REQUIRE_GPIOLIB |
@@ -497,6 +502,7 @@ config ARCH_IOP33X | |||
497 | bool "IOP33x-based" | 502 | bool "IOP33x-based" |
498 | depends on MMU | 503 | depends on MMU |
499 | select CPU_XSCALE | 504 | select CPU_XSCALE |
505 | select NEED_RET_TO_USER | ||
500 | select PLAT_IOP | 506 | select PLAT_IOP |
501 | select PCI | 507 | select PCI |
502 | select ARCH_REQUIRE_GPIOLIB | 508 | select ARCH_REQUIRE_GPIOLIB |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index e0d236d7ff73..03646c4c13d1 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -81,25 +81,6 @@ choice | |||
81 | prompt "Kernel low-level debugging port" | 81 | prompt "Kernel low-level debugging port" |
82 | depends on DEBUG_LL | 82 | depends on DEBUG_LL |
83 | 83 | ||
84 | config DEBUG_LL_UART_NONE | ||
85 | bool "No low-level debugging UART" | ||
86 | help | ||
87 | Say Y here if your platform doesn't provide a UART option | ||
88 | below. This relies on your platform choosing the right UART | ||
89 | definition internally in order for low-level debugging to | ||
90 | work. | ||
91 | |||
92 | config DEBUG_ICEDCC | ||
93 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" | ||
94 | help | ||
95 | Say Y here if you want the debug print routines to direct | ||
96 | their output to the EmbeddedICE macrocell's DCC channel using | ||
97 | co-processor 14. This is known to work on the ARM9 style ICE | ||
98 | channel and on the XScale with the PEEDI. | ||
99 | |||
100 | Note that the system will appear to hang during boot if there | ||
101 | is nothing connected to read from the DCC. | ||
102 | |||
103 | config AT91_DEBUG_LL_DBGU0 | 84 | config AT91_DEBUG_LL_DBGU0 |
104 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | 85 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" |
105 | depends on HAVE_AT91_DBGU0 | 86 | depends on HAVE_AT91_DBGU0 |
@@ -108,20 +89,6 @@ choice | |||
108 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" | 89 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" |
109 | depends on HAVE_AT91_DBGU1 | 90 | depends on HAVE_AT91_DBGU1 |
110 | 91 | ||
111 | config DEBUG_FOOTBRIDGE_COM1 | ||
112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
113 | depends on FOOTBRIDGE | ||
114 | help | ||
115 | Say Y here if you want the debug print routines to direct | ||
116 | their output to the 8250 at PCI COM1. | ||
117 | |||
118 | config DEBUG_DC21285_PORT | ||
119 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
120 | depends on FOOTBRIDGE | ||
121 | help | ||
122 | Say Y here if you want the debug print routines to direct | ||
123 | their output to the serial port in the DC21285 (Footbridge). | ||
124 | |||
125 | config DEBUG_CLPS711X_UART1 | 92 | config DEBUG_CLPS711X_UART1 |
126 | bool "Kernel low-level debugging messages via UART1" | 93 | bool "Kernel low-level debugging messages via UART1" |
127 | depends on ARCH_CLPS711X | 94 | depends on ARCH_CLPS711X |
@@ -136,6 +103,20 @@ choice | |||
136 | Say Y here if you want the debug print routines to direct | 103 | Say Y here if you want the debug print routines to direct |
137 | their output to the second serial port on these devices. | 104 | their output to the second serial port on these devices. |
138 | 105 | ||
106 | config DEBUG_DC21285_PORT | ||
107 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
108 | depends on FOOTBRIDGE | ||
109 | help | ||
110 | Say Y here if you want the debug print routines to direct | ||
111 | their output to the serial port in the DC21285 (Footbridge). | ||
112 | |||
113 | config DEBUG_FOOTBRIDGE_COM1 | ||
114 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
115 | depends on FOOTBRIDGE | ||
116 | help | ||
117 | Say Y here if you want the debug print routines to direct | ||
118 | their output to the 8250 at PCI COM1. | ||
119 | |||
139 | config DEBUG_HIGHBANK_UART | 120 | config DEBUG_HIGHBANK_UART |
140 | bool "Kernel low-level debugging messages via Highbank UART" | 121 | bool "Kernel low-level debugging messages via Highbank UART" |
141 | depends on ARCH_HIGHBANK | 122 | depends on ARCH_HIGHBANK |
@@ -206,38 +187,42 @@ choice | |||
206 | Say Y here if you want kernel low-level debugging support | 187 | Say Y here if you want kernel low-level debugging support |
207 | on i.MX6Q. | 188 | on i.MX6Q. |
208 | 189 | ||
209 | config DEBUG_S3C_UART0 | 190 | config DEBUG_MSM_UART1 |
210 | depends on PLAT_SAMSUNG | 191 | bool "Kernel low-level debugging messages via MSM UART1" |
211 | bool "Use S3C UART 0 for low-level debug" | 192 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
212 | help | 193 | help |
213 | Say Y here if you want the debug print routines to direct | 194 | Say Y here if you want the debug print routines to direct |
214 | their output to UART 0. The port must have been initialised | 195 | their output to the first serial port on MSM devices. |
215 | by the boot-loader before use. | ||
216 | |||
217 | The uncompressor code port configuration is now handled | ||
218 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | ||
219 | 196 | ||
220 | config DEBUG_S3C_UART1 | 197 | config DEBUG_MSM_UART2 |
221 | depends on PLAT_SAMSUNG | 198 | bool "Kernel low-level debugging messages via MSM UART2" |
222 | bool "Use S3C UART 1 for low-level debug" | 199 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
223 | help | 200 | help |
224 | Say Y here if you want the debug print routines to direct | 201 | Say Y here if you want the debug print routines to direct |
225 | their output to UART 1. The port must have been initialised | 202 | their output to the second serial port on MSM devices. |
226 | by the boot-loader before use. | ||
227 | 203 | ||
228 | The uncompressor code port configuration is now handled | 204 | config DEBUG_MSM_UART3 |
229 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 205 | bool "Kernel low-level debugging messages via MSM UART3" |
206 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
207 | help | ||
208 | Say Y here if you want the debug print routines to direct | ||
209 | their output to the third serial port on MSM devices. | ||
230 | 210 | ||
231 | config DEBUG_S3C_UART2 | 211 | config DEBUG_MSM8660_UART |
232 | depends on PLAT_SAMSUNG | 212 | bool "Kernel low-level debugging messages via MSM 8660 UART" |
233 | bool "Use S3C UART 2 for low-level debug" | 213 | depends on ARCH_MSM8X60 |
214 | select MSM_HAS_DEBUG_UART_HS | ||
234 | help | 215 | help |
235 | Say Y here if you want the debug print routines to direct | 216 | Say Y here if you want the debug print routines to direct |
236 | their output to UART 2. The port must have been initialised | 217 | their output to the serial port on MSM 8660 devices. |
237 | by the boot-loader before use. | ||
238 | 218 | ||
239 | The uncompressor code port configuration is now handled | 219 | config DEBUG_MSM8960_UART |
240 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 220 | bool "Kernel low-level debugging messages via MSM 8960 UART" |
221 | depends on ARCH_MSM8960 | ||
222 | select MSM_HAS_DEBUG_UART_HS | ||
223 | help | ||
224 | Say Y here if you want the debug print routines to direct | ||
225 | their output to the serial port on MSM 8960 devices. | ||
241 | 226 | ||
242 | config DEBUG_REALVIEW_STD_PORT | 227 | config DEBUG_REALVIEW_STD_PORT |
243 | bool "RealView Default UART" | 228 | bool "RealView Default UART" |
@@ -255,42 +240,57 @@ choice | |||
255 | their output to the standard serial port on the RealView | 240 | their output to the standard serial port on the RealView |
256 | PB1176 platform. | 241 | PB1176 platform. |
257 | 242 | ||
258 | config DEBUG_MSM_UART1 | 243 | config DEBUG_S3C_UART0 |
259 | bool "Kernel low-level debugging messages via MSM UART1" | 244 | depends on PLAT_SAMSUNG |
260 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 245 | bool "Use S3C UART 0 for low-level debug" |
261 | help | 246 | help |
262 | Say Y here if you want the debug print routines to direct | 247 | Say Y here if you want the debug print routines to direct |
263 | their output to the first serial port on MSM devices. | 248 | their output to UART 0. The port must have been initialised |
249 | by the boot-loader before use. | ||
264 | 250 | ||
265 | config DEBUG_MSM_UART2 | 251 | The uncompressor code port configuration is now handled |
266 | bool "Kernel low-level debugging messages via MSM UART2" | 252 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
267 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 253 | |
254 | config DEBUG_S3C_UART1 | ||
255 | depends on PLAT_SAMSUNG | ||
256 | bool "Use S3C UART 1 for low-level debug" | ||
268 | help | 257 | help |
269 | Say Y here if you want the debug print routines to direct | 258 | Say Y here if you want the debug print routines to direct |
270 | their output to the second serial port on MSM devices. | 259 | their output to UART 1. The port must have been initialised |
260 | by the boot-loader before use. | ||
271 | 261 | ||
272 | config DEBUG_MSM_UART3 | 262 | The uncompressor code port configuration is now handled |
273 | bool "Kernel low-level debugging messages via MSM UART3" | 263 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
274 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 264 | |
265 | config DEBUG_S3C_UART2 | ||
266 | depends on PLAT_SAMSUNG | ||
267 | bool "Use S3C UART 2 for low-level debug" | ||
275 | help | 268 | help |
276 | Say Y here if you want the debug print routines to direct | 269 | Say Y here if you want the debug print routines to direct |
277 | their output to the third serial port on MSM devices. | 270 | their output to UART 2. The port must have been initialised |
271 | by the boot-loader before use. | ||
278 | 272 | ||
279 | config DEBUG_MSM8660_UART | 273 | The uncompressor code port configuration is now handled |
280 | bool "Kernel low-level debugging messages via MSM 8660 UART" | 274 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
281 | depends on ARCH_MSM8X60 | 275 | |
282 | select MSM_HAS_DEBUG_UART_HS | 276 | config DEBUG_LL_UART_NONE |
277 | bool "No low-level debugging UART" | ||
283 | help | 278 | help |
284 | Say Y here if you want the debug print routines to direct | 279 | Say Y here if your platform doesn't provide a UART option |
285 | their output to the serial port on MSM 8660 devices. | 280 | below. This relies on your platform choosing the right UART |
281 | definition internally in order for low-level debugging to | ||
282 | work. | ||
286 | 283 | ||
287 | config DEBUG_MSM8960_UART | 284 | config DEBUG_ICEDCC |
288 | bool "Kernel low-level debugging messages via MSM 8960 UART" | 285 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" |
289 | depends on ARCH_MSM8960 | ||
290 | select MSM_HAS_DEBUG_UART_HS | ||
291 | help | 286 | help |
292 | Say Y here if you want the debug print routines to direct | 287 | Say Y here if you want the debug print routines to direct |
293 | their output to the serial port on MSM 8960 devices. | 288 | their output to the EmbeddedICE macrocell's DCC channel using |
289 | co-processor 14. This is known to work on the ARM9 style ICE | ||
290 | channel and on the XScale with the PEEDI. | ||
291 | |||
292 | Note that the system will appear to hang during boot if there | ||
293 | is nothing connected to read from the DCC. | ||
294 | 294 | ||
295 | endchoice | 295 | endchoice |
296 | 296 | ||
diff --git a/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/arch/arm/boot/dts/testcases/tests-phandle.dtsi index ec0c4e6212c9..0007d3cd7dc2 100644 --- a/arch/arm/boot/dts/testcases/tests-phandle.dtsi +++ b/arch/arm/boot/dts/testcases/tests-phandle.dtsi | |||
@@ -31,6 +31,8 @@ | |||
31 | phandle-list-bad-phandle = <12345678 0 0>; | 31 | phandle-list-bad-phandle = <12345678 0 0>; |
32 | phandle-list-bad-args = <&provider2 1 0>, | 32 | phandle-list-bad-args = <&provider2 1 0>, |
33 | <&provider3 0>; | 33 | <&provider3 0>; |
34 | empty-property; | ||
35 | unterminated-string = [40 41 42 43]; | ||
34 | }; | 36 | }; |
35 | }; | 37 | }; |
36 | }; | 38 | }; |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index c47d6199b784..f0783be17352 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -51,7 +51,6 @@ union gic_base { | |||
51 | }; | 51 | }; |
52 | 52 | ||
53 | struct gic_chip_data { | 53 | struct gic_chip_data { |
54 | unsigned int irq_offset; | ||
55 | union gic_base dist_base; | 54 | union gic_base dist_base; |
56 | union gic_base cpu_base; | 55 | union gic_base cpu_base; |
57 | #ifdef CONFIG_CPU_PM | 56 | #ifdef CONFIG_CPU_PM |
@@ -61,9 +60,7 @@ struct gic_chip_data { | |||
61 | u32 __percpu *saved_ppi_enable; | 60 | u32 __percpu *saved_ppi_enable; |
62 | u32 __percpu *saved_ppi_conf; | 61 | u32 __percpu *saved_ppi_conf; |
63 | #endif | 62 | #endif |
64 | #ifdef CONFIG_IRQ_DOMAIN | 63 | struct irq_domain *domain; |
65 | struct irq_domain domain; | ||
66 | #endif | ||
67 | unsigned int gic_irqs; | 64 | unsigned int gic_irqs; |
68 | #ifdef CONFIG_GIC_NON_BANKED | 65 | #ifdef CONFIG_GIC_NON_BANKED |
69 | void __iomem *(*get_base)(union gic_base *); | 66 | void __iomem *(*get_base)(union gic_base *); |
@@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) | |||
282 | irqnr = irqstat & ~0x1c00; | 279 | irqnr = irqstat & ~0x1c00; |
283 | 280 | ||
284 | if (likely(irqnr > 15 && irqnr < 1021)) { | 281 | if (likely(irqnr > 15 && irqnr < 1021)) { |
285 | irqnr = irq_domain_to_irq(&gic->domain, irqnr); | 282 | irqnr = irq_find_mapping(gic->domain, irqnr); |
286 | handle_IRQ(irqnr, regs); | 283 | handle_IRQ(irqnr, regs); |
287 | continue; | 284 | continue; |
288 | } | 285 | } |
@@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | |||
314 | if (gic_irq == 1023) | 311 | if (gic_irq == 1023) |
315 | goto out; | 312 | goto out; |
316 | 313 | ||
317 | cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); | 314 | cascade_irq = irq_find_mapping(chip_data->domain, gic_irq); |
318 | if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) | 315 | if (unlikely(gic_irq < 32 || gic_irq > 1020)) |
319 | do_bad_IRQ(cascade_irq, desc); | 316 | do_bad_IRQ(cascade_irq, desc); |
320 | else | 317 | else |
321 | generic_handle_irq(cascade_irq); | 318 | generic_handle_irq(cascade_irq); |
@@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) | |||
348 | 345 | ||
349 | static void __init gic_dist_init(struct gic_chip_data *gic) | 346 | static void __init gic_dist_init(struct gic_chip_data *gic) |
350 | { | 347 | { |
351 | unsigned int i, irq; | 348 | unsigned int i; |
352 | u32 cpumask; | 349 | u32 cpumask; |
353 | unsigned int gic_irqs = gic->gic_irqs; | 350 | unsigned int gic_irqs = gic->gic_irqs; |
354 | struct irq_domain *domain = &gic->domain; | ||
355 | void __iomem *base = gic_data_dist_base(gic); | 351 | void __iomem *base = gic_data_dist_base(gic); |
356 | u32 cpu = cpu_logical_map(smp_processor_id()); | 352 | u32 cpu = cpu_logical_map(smp_processor_id()); |
357 | 353 | ||
@@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic) | |||
386 | for (i = 32; i < gic_irqs; i += 32) | 382 | for (i = 32; i < gic_irqs; i += 32) |
387 | writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); | 383 | writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); |
388 | 384 | ||
389 | /* | ||
390 | * Setup the Linux IRQ subsystem. | ||
391 | */ | ||
392 | irq_domain_for_each_irq(domain, i, irq) { | ||
393 | if (i < 32) { | ||
394 | irq_set_percpu_devid(irq); | ||
395 | irq_set_chip_and_handler(irq, &gic_chip, | ||
396 | handle_percpu_devid_irq); | ||
397 | set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); | ||
398 | } else { | ||
399 | irq_set_chip_and_handler(irq, &gic_chip, | ||
400 | handle_fasteoi_irq); | ||
401 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
402 | } | ||
403 | irq_set_chip_data(irq, gic); | ||
404 | } | ||
405 | |||
406 | writel_relaxed(1, base + GIC_DIST_CTRL); | 385 | writel_relaxed(1, base + GIC_DIST_CTRL); |
407 | } | 386 | } |
408 | 387 | ||
@@ -618,11 +597,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic) | |||
618 | } | 597 | } |
619 | #endif | 598 | #endif |
620 | 599 | ||
621 | #ifdef CONFIG_OF | 600 | static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, |
622 | static int gic_irq_domain_dt_translate(struct irq_domain *d, | 601 | irq_hw_number_t hw) |
623 | struct device_node *controller, | 602 | { |
624 | const u32 *intspec, unsigned int intsize, | 603 | if (hw < 32) { |
625 | unsigned long *out_hwirq, unsigned int *out_type) | 604 | irq_set_percpu_devid(irq); |
605 | irq_set_chip_and_handler(irq, &gic_chip, | ||
606 | handle_percpu_devid_irq); | ||
607 | set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); | ||
608 | } else { | ||
609 | irq_set_chip_and_handler(irq, &gic_chip, | ||
610 | handle_fasteoi_irq); | ||
611 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
612 | } | ||
613 | irq_set_chip_data(irq, d->host_data); | ||
614 | return 0; | ||
615 | } | ||
616 | |||
617 | static int gic_irq_domain_xlate(struct irq_domain *d, | ||
618 | struct device_node *controller, | ||
619 | const u32 *intspec, unsigned int intsize, | ||
620 | unsigned long *out_hwirq, unsigned int *out_type) | ||
626 | { | 621 | { |
627 | if (d->of_node != controller) | 622 | if (d->of_node != controller) |
628 | return -EINVAL; | 623 | return -EINVAL; |
@@ -639,26 +634,23 @@ static int gic_irq_domain_dt_translate(struct irq_domain *d, | |||
639 | *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; | 634 | *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; |
640 | return 0; | 635 | return 0; |
641 | } | 636 | } |
642 | #endif | ||
643 | 637 | ||
644 | const struct irq_domain_ops gic_irq_domain_ops = { | 638 | const struct irq_domain_ops gic_irq_domain_ops = { |
645 | #ifdef CONFIG_OF | 639 | .map = gic_irq_domain_map, |
646 | .dt_translate = gic_irq_domain_dt_translate, | 640 | .xlate = gic_irq_domain_xlate, |
647 | #endif | ||
648 | }; | 641 | }; |
649 | 642 | ||
650 | void __init gic_init_bases(unsigned int gic_nr, int irq_start, | 643 | void __init gic_init_bases(unsigned int gic_nr, int irq_start, |
651 | void __iomem *dist_base, void __iomem *cpu_base, | 644 | void __iomem *dist_base, void __iomem *cpu_base, |
652 | u32 percpu_offset) | 645 | u32 percpu_offset, struct device_node *node) |
653 | { | 646 | { |
647 | irq_hw_number_t hwirq_base; | ||
654 | struct gic_chip_data *gic; | 648 | struct gic_chip_data *gic; |
655 | struct irq_domain *domain; | 649 | int gic_irqs, irq_base; |
656 | int gic_irqs; | ||
657 | 650 | ||
658 | BUG_ON(gic_nr >= MAX_GIC_NR); | 651 | BUG_ON(gic_nr >= MAX_GIC_NR); |
659 | 652 | ||
660 | gic = &gic_data[gic_nr]; | 653 | gic = &gic_data[gic_nr]; |
661 | domain = &gic->domain; | ||
662 | #ifdef CONFIG_GIC_NON_BANKED | 654 | #ifdef CONFIG_GIC_NON_BANKED |
663 | if (percpu_offset) { /* Frankein-GIC without banked registers... */ | 655 | if (percpu_offset) { /* Frankein-GIC without banked registers... */ |
664 | unsigned int cpu; | 656 | unsigned int cpu; |
@@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, | |||
694 | * For primary GICs, skip over SGIs. | 686 | * For primary GICs, skip over SGIs. |
695 | * For secondary GICs, skip over PPIs, too. | 687 | * For secondary GICs, skip over PPIs, too. |
696 | */ | 688 | */ |
697 | domain->hwirq_base = 32; | 689 | hwirq_base = 32; |
698 | if (gic_nr == 0) { | 690 | if (gic_nr == 0) { |
699 | if ((irq_start & 31) > 0) { | 691 | if ((irq_start & 31) > 0) { |
700 | domain->hwirq_base = 16; | 692 | hwirq_base = 16; |
701 | if (irq_start != -1) | 693 | if (irq_start != -1) |
702 | irq_start = (irq_start & ~31) + 16; | 694 | irq_start = (irq_start & ~31) + 16; |
703 | } | 695 | } |
@@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, | |||
713 | gic_irqs = 1020; | 705 | gic_irqs = 1020; |
714 | gic->gic_irqs = gic_irqs; | 706 | gic->gic_irqs = gic_irqs; |
715 | 707 | ||
716 | domain->nr_irq = gic_irqs - domain->hwirq_base; | 708 | gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ |
717 | domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, | 709 | irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id()); |
718 | numa_node_id()); | 710 | if (IS_ERR_VALUE(irq_base)) { |
719 | if (IS_ERR_VALUE(domain->irq_base)) { | ||
720 | WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", | 711 | WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", |
721 | irq_start); | 712 | irq_start); |
722 | domain->irq_base = irq_start; | 713 | irq_base = irq_start; |
723 | } | 714 | } |
724 | domain->priv = gic; | 715 | gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base, |
725 | domain->ops = &gic_irq_domain_ops; | 716 | hwirq_base, &gic_irq_domain_ops, gic); |
726 | irq_domain_add(domain); | 717 | if (WARN_ON(!gic->domain)) |
718 | return; | ||
727 | 719 | ||
728 | gic_chip.flags |= gic_arch_extn.flags; | 720 | gic_chip.flags |= gic_arch_extn.flags; |
729 | gic_dist_init(gic); | 721 | gic_dist_init(gic); |
@@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) | |||
768 | void __iomem *dist_base; | 760 | void __iomem *dist_base; |
769 | u32 percpu_offset; | 761 | u32 percpu_offset; |
770 | int irq; | 762 | int irq; |
771 | struct irq_domain *domain = &gic_data[gic_cnt].domain; | ||
772 | 763 | ||
773 | if (WARN_ON(!node)) | 764 | if (WARN_ON(!node)) |
774 | return -ENODEV; | 765 | return -ENODEV; |
@@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) | |||
782 | if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) | 773 | if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) |
783 | percpu_offset = 0; | 774 | percpu_offset = 0; |
784 | 775 | ||
785 | domain->of_node = of_node_get(node); | 776 | gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node); |
786 | |||
787 | gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset); | ||
788 | 777 | ||
789 | if (parent) { | 778 | if (parent) { |
790 | irq = irq_of_parse_and_map(node, 0); | 779 | irq = irq_of_parse_and_map(node, 0); |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index fb1f1cfce60c..dcb13494ca0d 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) | |||
299 | goto err1; | 299 | goto err1; |
300 | } | 300 | } |
301 | 301 | ||
302 | pci_add_resource(&sys->resources, &it8152_io); | 302 | pci_add_resource_offset(&sys->resources, &it8152_io, sys->io_offset); |
303 | pci_add_resource(&sys->resources, &it8152_mem); | 303 | pci_add_resource_offset(&sys->resources, &it8152_mem, sys->mem_offset); |
304 | 304 | ||
305 | if (platform_notify || platform_notify_remove) { | 305 | if (platform_notify || platform_notify_remove) { |
306 | printk(KERN_ERR "PCI: Can't use platform_notify\n"); | 306 | printk(KERN_ERR "PCI: Can't use platform_notify\n"); |
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index dcb004a804c7..7a66311f3066 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -56,7 +56,7 @@ struct vic_device { | |||
56 | u32 int_enable; | 56 | u32 int_enable; |
57 | u32 soft_int; | 57 | u32 soft_int; |
58 | u32 protect; | 58 | u32 protect; |
59 | struct irq_domain domain; | 59 | struct irq_domain *domain; |
60 | }; | 60 | }; |
61 | 61 | ||
62 | /* we cannot allocate memory when VICs are initially registered */ | 62 | /* we cannot allocate memory when VICs are initially registered */ |
@@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
192 | v->resume_sources = resume_sources; | 192 | v->resume_sources = resume_sources; |
193 | v->irq = irq; | 193 | v->irq = irq; |
194 | vic_id++; | 194 | vic_id++; |
195 | 195 | v->domain = irq_domain_add_legacy(node, 32, irq, 0, | |
196 | v->domain.irq_base = irq; | 196 | &irq_domain_simple_ops, v); |
197 | v->domain.nr_irq = 32; | ||
198 | #ifdef CONFIG_OF_IRQ | ||
199 | v->domain.of_node = of_node_get(node); | ||
200 | #endif /* CONFIG_OF */ | ||
201 | v->domain.ops = &irq_domain_simple_ops; | ||
202 | irq_domain_add(&v->domain); | ||
203 | } | 197 | } |
204 | 198 | ||
205 | static void vic_ack_irq(struct irq_data *d) | 199 | static void vic_ack_irq(struct irq_data *d) |
@@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, | |||
348 | vic_register(base, irq_start, 0, node); | 342 | vic_register(base, irq_start, 0, node); |
349 | } | 343 | } |
350 | 344 | ||
351 | static void __init __vic_init(void __iomem *base, unsigned int irq_start, | 345 | void __init __vic_init(void __iomem *base, unsigned int irq_start, |
352 | u32 vic_sources, u32 resume_sources, | 346 | u32 vic_sources, u32 resume_sources, |
353 | struct device_node *node) | 347 | struct device_node *node) |
354 | { | 348 | { |
@@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) | |||
444 | stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); | 438 | stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); |
445 | while (stat) { | 439 | while (stat) { |
446 | irq = ffs(stat) - 1; | 440 | irq = ffs(stat) - 1; |
447 | handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs); | 441 | handle_IRQ(irq_find_mapping(vic->domain, irq), regs); |
448 | stat &= ~(1 << irq); | 442 | stat &= ~(1 << irq); |
449 | handled = 1; | 443 | handled = 1; |
450 | } | 444 | } |
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S index e0af4983723f..8c215acd9b57 100644 --- a/arch/arm/include/asm/hardware/entry-macro-iomd.S +++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S | |||
@@ -11,14 +11,6 @@ | |||
11 | /* IOC / IOMD based hardware */ | 11 | /* IOC / IOMD based hardware */ |
12 | #include <asm/hardware/iomd.h> | 12 | #include <asm/hardware/iomd.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | mov r12, #ioc_base_high | ||
16 | .if ioc_base_low | ||
17 | orr r12, r12, #ioc_base_low | ||
18 | .endif | ||
19 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first | 15 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first |
24 | ldr \tmp, =irq_prio_h | 16 | ldr \tmp, =irq_prio_h |
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 4bdfe0018696..4b1ce6cd477f 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h | |||
@@ -39,7 +39,7 @@ struct device_node; | |||
39 | extern struct irq_chip gic_arch_extn; | 39 | extern struct irq_chip gic_arch_extn; |
40 | 40 | ||
41 | void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, | 41 | void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, |
42 | u32 offset); | 42 | u32 offset, struct device_node *); |
43 | int gic_of_init(struct device_node *node, struct device_node *parent); | 43 | int gic_of_init(struct device_node *node, struct device_node *parent); |
44 | void gic_secondary_init(unsigned int); | 44 | void gic_secondary_init(unsigned int); |
45 | void gic_handle_irq(struct pt_regs *regs); | 45 | void gic_handle_irq(struct pt_regs *regs); |
@@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); | |||
49 | static inline void gic_init(unsigned int nr, int start, | 49 | static inline void gic_init(unsigned int nr, int start, |
50 | void __iomem *dist , void __iomem *cpu) | 50 | void __iomem *dist , void __iomem *cpu) |
51 | { | 51 | { |
52 | gic_init_bases(nr, start, dist, cpu, 0); | 52 | gic_init_bases(nr, start, dist, cpu, 0, NULL); |
53 | } | 53 | } |
54 | 54 | ||
55 | #endif | 55 | #endif |
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h index f42ebd619590..e14af1a1a320 100644 --- a/arch/arm/include/asm/hardware/vic.h +++ b/arch/arm/include/asm/hardware/vic.h | |||
@@ -47,6 +47,8 @@ | |||
47 | struct device_node; | 47 | struct device_node; |
48 | struct pt_regs; | 48 | struct pt_regs; |
49 | 49 | ||
50 | void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, | ||
51 | u32 resume_sources, struct device_node *node); | ||
50 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); | 52 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); |
51 | int vic_of_init(struct device_node *node, struct device_node *parent); | 53 | int vic_of_init(struct device_node *node, struct device_node *parent); |
52 | void vic_handle_irq(struct pt_regs *regs); | 54 | void vic_handle_irq(struct pt_regs *regs); |
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h index a4edd19dd3d6..8c5e828f484d 100644 --- a/arch/arm/include/asm/highmem.h +++ b/arch/arm/include/asm/highmem.h | |||
@@ -57,7 +57,7 @@ static inline void *kmap_high_get(struct page *page) | |||
57 | #ifdef CONFIG_HIGHMEM | 57 | #ifdef CONFIG_HIGHMEM |
58 | extern void *kmap(struct page *page); | 58 | extern void *kmap(struct page *page); |
59 | extern void kunmap(struct page *page); | 59 | extern void kunmap(struct page *page); |
60 | extern void *__kmap_atomic(struct page *page); | 60 | extern void *kmap_atomic(struct page *page); |
61 | extern void __kunmap_atomic(void *kvaddr); | 61 | extern void __kunmap_atomic(void *kvaddr); |
62 | extern void *kmap_atomic_pfn(unsigned long pfn); | 62 | extern void *kmap_atomic_pfn(unsigned long pfn); |
63 | extern struct page *kmap_atomic_to_page(const void *ptr); | 63 | extern struct page *kmap_atomic_to_page(const void *ptr); |
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h index da337ba57ffd..a98a2e112fae 100644 --- a/arch/arm/include/asm/pci.h +++ b/arch/arm/include/asm/pci.h | |||
@@ -57,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |||
57 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | 57 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
58 | enum pci_mmap_state mmap_state, int write_combine); | 58 | enum pci_mmap_state mmap_state, int write_combine); |
59 | 59 | ||
60 | extern void | ||
61 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | ||
62 | struct resource *res); | ||
63 | |||
64 | extern void | ||
65 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | ||
66 | struct pci_bus_region *region); | ||
67 | |||
68 | /* | 60 | /* |
69 | * Dummy implementation; always return 0. | 61 | * Dummy implementation; always return 0. |
70 | */ | 62 | */ |
diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h index ffc0e85775b4..7ec60d6075bf 100644 --- a/arch/arm/include/asm/pgtable-nommu.h +++ b/arch/arm/include/asm/pgtable-nommu.h | |||
@@ -79,7 +79,6 @@ extern unsigned int kobjsize(const void *objp); | |||
79 | * No page table caches to initialise. | 79 | * No page table caches to initialise. |
80 | */ | 80 | */ |
81 | #define pgtable_cache_init() do { } while (0) | 81 | #define pgtable_cache_init() do { } while (0) |
82 | #define io_remap_page_range remap_page_range | ||
83 | #define io_remap_pfn_range remap_pfn_range | 82 | #define io_remap_pfn_range remap_pfn_range |
84 | 83 | ||
85 | 84 | ||
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h index dec6f9afb3cf..6433cadb6ed4 100644 --- a/arch/arm/include/asm/socket.h +++ b/arch/arm/include/asm/socket.h | |||
@@ -64,5 +64,9 @@ | |||
64 | 64 | ||
65 | #define SO_WIFI_STATUS 41 | 65 | #define SO_WIFI_STATUS 41 |
66 | #define SCM_WIFI_STATUS SO_WIFI_STATUS | 66 | #define SCM_WIFI_STATUS SO_WIFI_STATUS |
67 | #define SO_PEEK_OFF 42 | ||
68 | |||
69 | /* Instruct lower device to use last 4-bytes of skb data as FCS */ | ||
70 | #define SO_NOFCS 43 | ||
67 | 71 | ||
68 | #endif /* _ASM_SOCKET_H */ | 72 | #endif /* _ASM_SOCKET_H */ |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index e4c96cc6ec0c..424aa458c487 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -110,6 +110,7 @@ extern void cpu_init(void); | |||
110 | 110 | ||
111 | void soft_restart(unsigned long); | 111 | void soft_restart(unsigned long); |
112 | extern void (*arm_pm_restart)(char str, const char *cmd); | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
113 | extern void (*arm_pm_idle)(void); | ||
113 | 114 | ||
114 | #define UDBG_UNDEFINED (1 << 0) | 115 | #define UDBG_UNDEFINED (1 << 0) |
115 | #define UDBG_SYSCALL (1 << 1) | 116 | #define UDBG_SYSCALL (1 << 1) |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index f58ba3589908..632df9a66f8c 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <asm/mach/pci.h> | 16 | #include <asm/mach/pci.h> |
17 | 17 | ||
18 | static int debug_pci; | 18 | static int debug_pci; |
19 | static int use_firmware; | ||
20 | 19 | ||
21 | /* | 20 | /* |
22 | * We can't use pci_find_device() here since we are | 21 | * We can't use pci_find_device() here since we are |
@@ -295,28 +294,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev) | |||
295 | } | 294 | } |
296 | 295 | ||
297 | /* | 296 | /* |
298 | * Adjust the device resources from bus-centric to Linux-centric. | ||
299 | */ | ||
300 | static void __devinit | ||
301 | pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) | ||
302 | { | ||
303 | resource_size_t offset; | ||
304 | int i; | ||
305 | |||
306 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | ||
307 | if (dev->resource[i].start == 0) | ||
308 | continue; | ||
309 | if (dev->resource[i].flags & IORESOURCE_MEM) | ||
310 | offset = root->mem_offset; | ||
311 | else | ||
312 | offset = root->io_offset; | ||
313 | |||
314 | dev->resource[i].start += offset; | ||
315 | dev->resource[i].end += offset; | ||
316 | } | ||
317 | } | ||
318 | |||
319 | /* | ||
320 | * pcibios_fixup_bus - Called after each bus is probed, | 297 | * pcibios_fixup_bus - Called after each bus is probed, |
321 | * but before its children are examined. | 298 | * but before its children are examined. |
322 | */ | 299 | */ |
@@ -333,8 +310,6 @@ void pcibios_fixup_bus(struct pci_bus *bus) | |||
333 | list_for_each_entry(dev, &bus->devices, bus_list) { | 310 | list_for_each_entry(dev, &bus->devices, bus_list) { |
334 | u16 status; | 311 | u16 status; |
335 | 312 | ||
336 | pdev_fixup_device_resources(root, dev); | ||
337 | |||
338 | pci_read_config_word(dev, PCI_STATUS, &status); | 313 | pci_read_config_word(dev, PCI_STATUS, &status); |
339 | 314 | ||
340 | /* | 315 | /* |
@@ -400,43 +375,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus); | |||
400 | #endif | 375 | #endif |
401 | 376 | ||
402 | /* | 377 | /* |
403 | * Convert from Linux-centric to bus-centric addresses for bridge devices. | ||
404 | */ | ||
405 | void | ||
406 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | ||
407 | struct resource *res) | ||
408 | { | ||
409 | struct pci_sys_data *root = dev->sysdata; | ||
410 | unsigned long offset = 0; | ||
411 | |||
412 | if (res->flags & IORESOURCE_IO) | ||
413 | offset = root->io_offset; | ||
414 | if (res->flags & IORESOURCE_MEM) | ||
415 | offset = root->mem_offset; | ||
416 | |||
417 | region->start = res->start - offset; | ||
418 | region->end = res->end - offset; | ||
419 | } | ||
420 | EXPORT_SYMBOL(pcibios_resource_to_bus); | ||
421 | |||
422 | void __devinit | ||
423 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | ||
424 | struct pci_bus_region *region) | ||
425 | { | ||
426 | struct pci_sys_data *root = dev->sysdata; | ||
427 | unsigned long offset = 0; | ||
428 | |||
429 | if (res->flags & IORESOURCE_IO) | ||
430 | offset = root->io_offset; | ||
431 | if (res->flags & IORESOURCE_MEM) | ||
432 | offset = root->mem_offset; | ||
433 | |||
434 | res->start = region->start + offset; | ||
435 | res->end = region->end + offset; | ||
436 | } | ||
437 | EXPORT_SYMBOL(pcibios_bus_to_resource); | ||
438 | |||
439 | /* | ||
440 | * Swizzle the device pin each time we cross a bridge. | 378 | * Swizzle the device pin each time we cross a bridge. |
441 | * This might update pin and returns the slot number. | 379 | * This might update pin and returns the slot number. |
442 | */ | 380 | */ |
@@ -497,10 +435,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw) | |||
497 | 435 | ||
498 | if (ret > 0) { | 436 | if (ret > 0) { |
499 | if (list_empty(&sys->resources)) { | 437 | if (list_empty(&sys->resources)) { |
500 | pci_add_resource(&sys->resources, | 438 | pci_add_resource_offset(&sys->resources, |
501 | &ioport_resource); | 439 | &ioport_resource, sys->io_offset); |
502 | pci_add_resource(&sys->resources, | 440 | pci_add_resource_offset(&sys->resources, |
503 | &iomem_resource); | 441 | &iomem_resource, sys->mem_offset); |
504 | } | 442 | } |
505 | 443 | ||
506 | sys->bus = hw->scan(nr, sys); | 444 | sys->bus = hw->scan(nr, sys); |
@@ -525,6 +463,7 @@ void __init pci_common_init(struct hw_pci *hw) | |||
525 | 463 | ||
526 | INIT_LIST_HEAD(&hw->buses); | 464 | INIT_LIST_HEAD(&hw->buses); |
527 | 465 | ||
466 | pci_add_flags(PCI_REASSIGN_ALL_RSRC); | ||
528 | if (hw->preinit) | 467 | if (hw->preinit) |
529 | hw->preinit(); | 468 | hw->preinit(); |
530 | pcibios_init_hw(hw); | 469 | pcibios_init_hw(hw); |
@@ -536,7 +475,7 @@ void __init pci_common_init(struct hw_pci *hw) | |||
536 | list_for_each_entry(sys, &hw->buses, node) { | 475 | list_for_each_entry(sys, &hw->buses, node) { |
537 | struct pci_bus *bus = sys->bus; | 476 | struct pci_bus *bus = sys->bus; |
538 | 477 | ||
539 | if (!use_firmware) { | 478 | if (!pci_has_flag(PCI_PROBE_ONLY)) { |
540 | /* | 479 | /* |
541 | * Size the bridge windows. | 480 | * Size the bridge windows. |
542 | */ | 481 | */ |
@@ -573,7 +512,7 @@ char * __init pcibios_setup(char *str) | |||
573 | debug_pci = 1; | 512 | debug_pci = 1; |
574 | return NULL; | 513 | return NULL; |
575 | } else if (!strcmp(str, "firmware")) { | 514 | } else if (!strcmp(str, "firmware")) { |
576 | use_firmware = 1; | 515 | pci_add_flags(PCI_PROBE_ONLY); |
577 | return NULL; | 516 | return NULL; |
578 | } | 517 | } |
579 | return str; | 518 | return str; |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index be16a48007b4..22f0ed324f37 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -19,7 +19,9 @@ | |||
19 | #include <asm/glue-df.h> | 19 | #include <asm/glue-df.h> |
20 | #include <asm/glue-pf.h> | 20 | #include <asm/glue-pf.h> |
21 | #include <asm/vfpmacros.h> | 21 | #include <asm/vfpmacros.h> |
22 | #ifndef CONFIG_MULTI_IRQ_HANDLER | ||
22 | #include <mach/entry-macro.S> | 23 | #include <mach/entry-macro.S> |
24 | #endif | ||
23 | #include <asm/thread_notify.h> | 25 | #include <asm/thread_notify.h> |
24 | #include <asm/unwind.h> | 26 | #include <asm/unwind.h> |
25 | #include <asm/unistd.h> | 27 | #include <asm/unistd.h> |
@@ -1101,7 +1103,6 @@ __stubs_start: | |||
1101 | * get out of that mode without clobbering one register. | 1103 | * get out of that mode without clobbering one register. |
1102 | */ | 1104 | */ |
1103 | vector_fiq: | 1105 | vector_fiq: |
1104 | disable_fiq | ||
1105 | subs pc, lr, #4 | 1106 | subs pc, lr, #4 |
1106 | 1107 | ||
1107 | /*============================================================================= | 1108 | /*============================================================================= |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 9fd0ba90c1d2..54ee265dd819 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -10,9 +10,15 @@ | |||
10 | 10 | ||
11 | #include <asm/unistd.h> | 11 | #include <asm/unistd.h> |
12 | #include <asm/ftrace.h> | 12 | #include <asm/ftrace.h> |
13 | #include <mach/entry-macro.S> | ||
14 | #include <asm/unwind.h> | 13 | #include <asm/unwind.h> |
15 | 14 | ||
15 | #ifdef CONFIG_NEED_RET_TO_USER | ||
16 | #include <mach/entry-macro.S> | ||
17 | #else | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | #endif | ||
21 | |||
16 | #include "entry-header.S" | 22 | #include "entry-header.S" |
17 | 23 | ||
18 | 24 | ||
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index c2ae3cd331fe..d3eca4524533 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void); | |||
61 | 61 | ||
62 | static volatile int hlt_counter; | 62 | static volatile int hlt_counter; |
63 | 63 | ||
64 | #include <mach/system.h> | ||
65 | |||
66 | void disable_hlt(void) | 64 | void disable_hlt(void) |
67 | { | 65 | { |
68 | hlt_counter++; | 66 | hlt_counter++; |
@@ -181,13 +179,17 @@ void cpu_idle_wait(void) | |||
181 | EXPORT_SYMBOL_GPL(cpu_idle_wait); | 179 | EXPORT_SYMBOL_GPL(cpu_idle_wait); |
182 | 180 | ||
183 | /* | 181 | /* |
184 | * This is our default idle handler. We need to disable | 182 | * This is our default idle handler. |
185 | * interrupts here to ensure we don't miss a wakeup call. | ||
186 | */ | 183 | */ |
184 | |||
185 | void (*arm_pm_idle)(void); | ||
186 | |||
187 | static void default_idle(void) | 187 | static void default_idle(void) |
188 | { | 188 | { |
189 | if (!need_resched()) | 189 | if (arm_pm_idle) |
190 | arch_idle(); | 190 | arm_pm_idle(); |
191 | else | ||
192 | cpu_do_idle(); | ||
191 | local_irq_enable(); | 193 | local_irq_enable(); |
192 | } | 194 | } |
193 | 195 | ||
@@ -215,6 +217,10 @@ void cpu_idle(void) | |||
215 | cpu_die(); | 217 | cpu_die(); |
216 | #endif | 218 | #endif |
217 | 219 | ||
220 | /* | ||
221 | * We need to disable interrupts here | ||
222 | * to ensure we don't miss a wakeup call. | ||
223 | */ | ||
218 | local_irq_disable(); | 224 | local_irq_disable(); |
219 | #ifdef CONFIG_PL310_ERRATA_769419 | 225 | #ifdef CONFIG_PL310_ERRATA_769419 |
220 | wmb(); | 226 | wmb(); |
@@ -222,19 +228,18 @@ void cpu_idle(void) | |||
222 | if (hlt_counter) { | 228 | if (hlt_counter) { |
223 | local_irq_enable(); | 229 | local_irq_enable(); |
224 | cpu_relax(); | 230 | cpu_relax(); |
225 | } else { | 231 | } else if (!need_resched()) { |
226 | stop_critical_timings(); | 232 | stop_critical_timings(); |
227 | if (cpuidle_idle_call()) | 233 | if (cpuidle_idle_call()) |
228 | pm_idle(); | 234 | pm_idle(); |
229 | start_critical_timings(); | 235 | start_critical_timings(); |
230 | /* | 236 | /* |
231 | * This will eventually be removed - pm_idle | 237 | * pm_idle functions must always |
232 | * functions should always return with IRQs | 238 | * return with IRQs enabled. |
233 | * enabled. | ||
234 | */ | 239 | */ |
235 | WARN_ON(irqs_disabled()); | 240 | WARN_ON(irqs_disabled()); |
241 | } else | ||
236 | local_irq_enable(); | 242 | local_irq_enable(); |
237 | } | ||
238 | } | 243 | } |
239 | leds_event(led_idle_end); | 244 | leds_event(led_idle_end); |
240 | rcu_idle_exit(); | 245 | rcu_idle_exit(); |
@@ -533,8 +538,7 @@ int vectors_user_mapping(void) | |||
533 | struct mm_struct *mm = current->mm; | 538 | struct mm_struct *mm = current->mm; |
534 | return install_special_mapping(mm, 0xffff0000, PAGE_SIZE, | 539 | return install_special_mapping(mm, 0xffff0000, PAGE_SIZE, |
535 | VM_READ | VM_EXEC | | 540 | VM_READ | VM_EXEC | |
536 | VM_MAYREAD | VM_MAYEXEC | | 541 | VM_MAYREAD | VM_MAYEXEC | VM_RESERVED, |
537 | VM_ALWAYSDUMP | VM_RESERVED, | ||
538 | NULL); | 542 | NULL); |
539 | } | 543 | } |
540 | 544 | ||
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index a42edc25a87e..8967d75c2ea3 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | 16 | ||
17 | #include <asm/proc-fns.h> | ||
17 | #include <asm/irq.h> | 18 | #include <asm/irq.h> |
18 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
19 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = { | |||
313 | } | 314 | } |
314 | }; | 315 | }; |
315 | 316 | ||
317 | static void at91cap9_idle(void) | ||
318 | { | ||
319 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
320 | cpu_do_idle(); | ||
321 | } | ||
322 | |||
316 | /* -------------------------------------------------------------------- | 323 | /* -------------------------------------------------------------------- |
317 | * AT91CAP9 processor initialization | 324 | * AT91CAP9 processor initialization |
318 | * -------------------------------------------------------------------- */ | 325 | * -------------------------------------------------------------------- */ |
@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void) | |||
332 | 339 | ||
333 | static void __init at91cap9_initialize(void) | 340 | static void __init at91cap9_initialize(void) |
334 | { | 341 | { |
342 | arm_pm_idle = at91cap9_idle; | ||
335 | arm_pm_restart = at91sam9g45_restart; | 343 | arm_pm_restart = at91sam9g45_restart; |
336 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 344 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
337 | 345 | ||
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 99c3174e24a2..dd6e2de13420 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { | |||
289 | } | 289 | } |
290 | }; | 290 | }; |
291 | 291 | ||
292 | static void at91rm9200_idle(void) | ||
293 | { | ||
294 | /* | ||
295 | * Disable the processor clock. The processor will be automatically | ||
296 | * re-enabled by an interrupt or by a reset. | ||
297 | */ | ||
298 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
299 | } | ||
300 | |||
292 | static void at91rm9200_restart(char mode, const char *cmd) | 301 | static void at91rm9200_restart(char mode, const char *cmd) |
293 | { | 302 | { |
294 | /* | 303 | /* |
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void) | |||
314 | 323 | ||
315 | static void __init at91rm9200_initialize(void) | 324 | static void __init at91rm9200_initialize(void) |
316 | { | 325 | { |
326 | arm_pm_idle = at91rm9200_idle; | ||
317 | arm_pm_restart = at91rm9200_restart; | 327 | arm_pm_restart = at91rm9200_restart; |
318 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | 328 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
319 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | 329 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d4036ba43612..9ac8c6fe3363 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void) | |||
328 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | 329 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); |
329 | } | 330 | } |
330 | 331 | ||
332 | static void at91sam9260_idle(void) | ||
333 | { | ||
334 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
335 | cpu_do_idle(); | ||
336 | } | ||
337 | |||
331 | static void __init at91sam9260_initialize(void) | 338 | static void __init at91sam9260_initialize(void) |
332 | { | 339 | { |
340 | arm_pm_idle = at91sam9260_idle; | ||
333 | arm_pm_restart = at91sam9_alt_restart; | 341 | arm_pm_restart = at91sam9_alt_restart; |
334 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 342 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
335 | | (1 << AT91SAM9260_ID_IRQ2); | 343 | | (1 << AT91SAM9260_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 023c2ff138df..ab76868f01f5 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void) | |||
286 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | 287 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); |
287 | } | 288 | } |
288 | 289 | ||
290 | static void at91sam9261_idle(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
293 | cpu_do_idle(); | ||
294 | } | ||
295 | |||
289 | static void __init at91sam9261_initialize(void) | 296 | static void __init at91sam9261_initialize(void) |
290 | { | 297 | { |
298 | arm_pm_idle = at91sam9261_idle; | ||
291 | arm_pm_restart = at91sam9_alt_restart; | 299 | arm_pm_restart = at91sam9_alt_restart; |
292 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 300 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
293 | | (1 << AT91SAM9261_ID_IRQ2); | 301 | | (1 << AT91SAM9261_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 75e876c258af..247ab633abcc 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void) | |||
307 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | 308 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); |
308 | } | 309 | } |
309 | 310 | ||
311 | static void at91sam9263_idle(void) | ||
312 | { | ||
313 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
314 | cpu_do_idle(); | ||
315 | } | ||
316 | |||
310 | static void __init at91sam9263_initialize(void) | 317 | static void __init at91sam9263_initialize(void) |
311 | { | 318 | { |
319 | arm_pm_idle = at91sam9263_idle; | ||
312 | arm_pm_restart = at91sam9_alt_restart; | 320 | arm_pm_restart = at91sam9_alt_restart; |
313 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 321 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
314 | 322 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 1cb6a96b1c1e..5b12192e52ec 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { | |||
317 | } | 317 | } |
318 | }; | 318 | }; |
319 | 319 | ||
320 | static void at91sam9g45_idle(void) | ||
321 | { | ||
322 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
323 | cpu_do_idle(); | ||
324 | } | ||
325 | |||
320 | /* -------------------------------------------------------------------- | 326 | /* -------------------------------------------------------------------- |
321 | * AT91SAM9G45 processor initialization | 327 | * AT91SAM9G45 processor initialization |
322 | * -------------------------------------------------------------------- */ | 328 | * -------------------------------------------------------------------- */ |
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void) | |||
337 | 343 | ||
338 | static void __init at91sam9g45_initialize(void) | 344 | static void __init at91sam9g45_initialize(void) |
339 | { | 345 | { |
346 | arm_pm_idle = at91sam9g45_idle; | ||
340 | arm_pm_restart = at91sam9g45_restart; | 347 | arm_pm_restart = at91sam9g45_restart; |
341 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 348 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
342 | 349 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index d2c91a841cb8..fd60e226a987 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | 13 | ||
14 | #include <asm/proc-fns.h> | ||
14 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
15 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
16 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void) | |||
291 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | 292 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); |
292 | } | 293 | } |
293 | 294 | ||
295 | static void at91sam9rl_idle(void) | ||
296 | { | ||
297 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
298 | cpu_do_idle(); | ||
299 | } | ||
300 | |||
294 | static void __init at91sam9rl_initialize(void) | 301 | static void __init at91sam9rl_initialize(void) |
295 | { | 302 | { |
303 | arm_pm_idle = at91sam9rl_idle; | ||
296 | arm_pm_restart = at91sam9_alt_restart; | 304 | arm_pm_restart = at91sam9_alt_restart; |
297 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 305 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
298 | 306 | ||
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 56ba3bd035ae..0154b7f44ff1 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <asm/proc-fns.h> | ||
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <mach/at91x40.h> | 18 | #include <mach/at91x40.h> |
18 | #include <mach/at91_st.h> | 19 | #include <mach/at91_st.h> |
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk) | |||
37 | return AT91X40_MASTER_CLOCK; | 38 | return AT91X40_MASTER_CLOCK; |
38 | } | 39 | } |
39 | 40 | ||
41 | static void at91x40_idle(void) | ||
42 | { | ||
43 | /* | ||
44 | * Disable the processor clock. The processor will be automatically | ||
45 | * re-enabled by an interrupt or by a reset. | ||
46 | */ | ||
47 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
48 | cpu_do_idle(); | ||
49 | } | ||
50 | |||
40 | void __init at91x40_initialize(unsigned long main_clock) | 51 | void __init at91x40_initialize(unsigned long main_clock) |
41 | { | 52 | { |
53 | arm_pm_idle = at91x40_idle; | ||
42 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | 54 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) |
43 | | (1 << AT91X40_ID_IRQ2); | 55 | | (1 << AT91X40_ID_IRQ2); |
44 | } | 56 | } |
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 423eea0ed74c..903bf205a333 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S | |||
@@ -13,17 +13,11 @@ | |||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/at91_aic.h> | 14 | #include <mach/at91_aic.h> |
15 | 15 | ||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 16 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral | 17 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral |
21 | ldr \base, [\base] | 18 | ldr \base, [\base] |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 22 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
29 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number | 23 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number |
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h deleted file mode 100644 index cbd64f3bcecd..000000000000 --- a/arch/arm/mach-at91/include/mach/system.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/at91_st.h> | ||
26 | #include <mach/at91_dbgu.h> | ||
27 | #include <mach/at91_pmc.h> | ||
28 | |||
29 | static inline void arch_idle(void) | ||
30 | { | ||
31 | /* | ||
32 | * Disable the processor clock. The processor will be automatically | ||
33 | * re-enabled by an interrupt or by a reset. | ||
34 | */ | ||
35 | #ifdef AT91_PS | ||
36 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
37 | #else | ||
38 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
39 | #endif | ||
40 | #ifndef CONFIG_CPU_ARM920T | ||
41 | /* | ||
42 | * Set the processor (CP15) into 'Wait for Interrupt' mode. | ||
43 | * Post-RM9200 processors need this in conjunction with the above | ||
44 | * to save power when idle. | ||
45 | */ | ||
46 | cpu_do_idle(); | ||
47 | #endif | ||
48 | } | ||
49 | |||
50 | #endif | ||
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 6b67b7e8426c..22e4e0a28ad1 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
@@ -52,27 +52,8 @@ | |||
52 | #include <mach/csp/chipcHw_inline.h> | 52 | #include <mach/csp/chipcHw_inline.h> |
53 | #include <mach/csp/tmrHw_reg.h> | 53 | #include <mach/csp/tmrHw_reg.h> |
54 | 54 | ||
55 | #define AMBA_DEVICE(name, initname, base, plat, size) \ | 55 | static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); |
56 | static struct amba_device name##_device = { \ | 56 | static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); |
57 | .dev = { \ | ||
58 | .coherent_dma_mask = ~0, \ | ||
59 | .init_name = initname, \ | ||
60 | .platform_data = plat \ | ||
61 | }, \ | ||
62 | .res = { \ | ||
63 | .start = MM_ADDR_IO_##base, \ | ||
64 | .end = MM_ADDR_IO_##base + (size) - 1, \ | ||
65 | .flags = IORESOURCE_MEM \ | ||
66 | }, \ | ||
67 | .dma_mask = ~0, \ | ||
68 | .irq = { \ | ||
69 | IRQ_##base \ | ||
70 | } \ | ||
71 | } | ||
72 | |||
73 | |||
74 | AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); | ||
75 | AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); | ||
76 | 57 | ||
77 | static struct clk pll1_clk = { | 58 | static struct clk pll1_clk = { |
78 | .name = "PLL1", | 59 | .name = "PLL1", |
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index 1024396797e1..e5fd241fccdc 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | #include <linux/pfn.h> | 36 | #include <linux/pfn.h> |
37 | #include <linux/atomic.h> | 37 | #include <linux/atomic.h> |
38 | #include <linux/sched.h> | ||
39 | #include <mach/dma.h> | 38 | #include <mach/dma.h> |
40 | 39 | ||
41 | /* ---- Public Variables ------------------------------------------------- */ | 40 | /* ---- Public Variables ------------------------------------------------- */ |
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S index 94c950d783ba..2f316f0e6e69 100644 --- a/arch/arm/mach-bcmring/include/mach/entry-macro.S +++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S | |||
@@ -21,9 +21,6 @@ | |||
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <mach/csp/mm_io.h> | 22 | #include <mach/csp/mm_io.h> |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \base, =(MM_IO_BASE_INTC0) | 25 | ldr \base, =(MM_IO_BASE_INTC0) |
29 | ldr \irqstat, [\base, #0] @ get status | 26 | ldr \irqstat, [\base, #0] @ get status |
@@ -77,6 +74,3 @@ | |||
77 | 74 | ||
78 | .macro get_irqnr_preamble, base, tmp | 75 | .macro get_irqnr_preamble, base, tmp |
79 | .endm | 76 | .endm |
80 | |||
81 | .macro arch_ret_to_user, tmp1, tmp2 | ||
82 | .endm | ||
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h deleted file mode 100644 index cb78250db649..000000000000 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (C) 1999 ARM Limited | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | cpu_do_idle(); | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index ab1711b9b4d6..8736c1acc166 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd) | |||
225 | { | 225 | { |
226 | soft_restart(0); | 226 | soft_restart(0); |
227 | } | 227 | } |
228 | |||
229 | static void clps711x_idle(void) | ||
230 | { | ||
231 | clps_writel(1, HALT); | ||
232 | __asm__ __volatile__( | ||
233 | "mov r0, r0\n\ | ||
234 | mov r0, r0"); | ||
235 | } | ||
236 | |||
237 | static int __init clps711x_idle_init(void) | ||
238 | { | ||
239 | arm_pm_idle = clps711x_idle; | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | arch_initcall(clps711x_idle_init); | ||
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S index 90fa2f70489f..125af59d7a29 100644 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S | |||
@@ -10,15 +10,9 @@ | |||
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <asm/hardware/clps7111.h> | 11 | #include <asm/hardware/clps7111.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) | 16 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) |
23 | #error INTSR stride != INTMR stride | 17 | #error INTSR stride != INTMR stride |
24 | #endif | 18 | #endif |
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h deleted file mode 100644 index 23d6ef8c84da..000000000000 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-clps711x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | #include <linux/io.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <asm/hardware/clps7111.h> | ||
26 | |||
27 | static inline void arch_idle(void) | ||
28 | { | ||
29 | clps_writel(1, HALT); | ||
30 | __asm__ __volatile__( | ||
31 | "mov r0, r0\n\ | ||
32 | mov r0, r0"); | ||
33 | } | ||
34 | |||
35 | #endif | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S deleted file mode 100644 index 01c57df5f716..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Cavium Networks platforms | ||
3 | * | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h deleted file mode 100644 index 9e56b7dc133a..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2000 Deep Blue Solutions Ltd | ||
3 | * Copyright 2003 ARM Limited | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_SYSTEM_H | ||
12 | #define __MACH_SYSTEM_H | ||
13 | |||
14 | #include <asm/proc-fns.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | /* | ||
19 | * This should do all the clock switching | ||
20 | * and wait for interrupt tricks | ||
21 | */ | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index e159d69967c9..79d001f831e0 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c | |||
@@ -155,8 +155,8 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys) | |||
155 | BUG_ON(request_resource(&iomem_resource, res_io) || | 155 | BUG_ON(request_resource(&iomem_resource, res_io) || |
156 | request_resource(&iomem_resource, res_mem)); | 156 | request_resource(&iomem_resource, res_mem)); |
157 | 157 | ||
158 | pci_add_resource(&sys->resources, res_io); | 158 | pci_add_resource_offset(&sys->resources, res_io, sys->io_offset); |
159 | pci_add_resource(&sys->resources, res_mem); | 159 | pci_add_resource_offset(&sys->resources, res_mem, sys->mem_offset); |
160 | 160 | ||
161 | return 1; | 161 | return 1; |
162 | } | 162 | } |
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S index e14c0dc0e12c..c1661d2feca9 100644 --- a/arch/arm/mach-davinci/include/mach/entry-macro.S +++ b/arch/arm/mach-davinci/include/mach/entry-macro.S | |||
@@ -11,17 +11,11 @@ | |||
11 | #include <mach/io.h> | 11 | #include <mach/io.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | ldr \base, =davinci_intc_base | 15 | ldr \base, =davinci_intc_base |
19 | ldr \base, [\base] | 16 | ldr \base, [\base] |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
26 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) | 20 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) |
27 | ldr \tmp, =davinci_intc_type | 21 | ldr \tmp, =davinci_intc_type |
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h deleted file mode 100644 index fcb7a015aba5..000000000000 --- a/arch/arm/mach-davinci/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * DaVinci system defines | ||
3 | * | ||
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | #include <mach/common.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | cpu_do_idle(); | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S index e84c78c2a8b7..72d622baaad3 100644 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ b/arch/arm/mach-dove/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h deleted file mode 100644 index 3027954f6162..000000000000 --- a/arch/arm/mach-dove/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-dove/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index 52e96d397ba8..48a032005ea3 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c | |||
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) | |||
69 | pp->res[0].flags = IORESOURCE_IO; | 69 | pp->res[0].flags = IORESOURCE_IO; |
70 | if (request_resource(&ioport_resource, &pp->res[0])) | 70 | if (request_resource(&ioport_resource, &pp->res[0])) |
71 | panic("Request PCIe IO resource failed\n"); | 71 | panic("Request PCIe IO resource failed\n"); |
72 | pci_add_resource(&sys->resources, &pp->res[0]); | 72 | pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset); |
73 | 73 | ||
74 | /* | 74 | /* |
75 | * IORESOURCE_MEM | 75 | * IORESOURCE_MEM |
@@ -88,7 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) | |||
88 | pp->res[1].flags = IORESOURCE_MEM; | 88 | pp->res[1].flags = IORESOURCE_MEM; |
89 | if (request_resource(&iomem_resource, &pp->res[1])) | 89 | if (request_resource(&iomem_resource, &pp->res[1])) |
90 | panic("Request PCIe Memory resource failed\n"); | 90 | panic("Request PCIe Memory resource failed\n"); |
91 | pci_add_resource(&sys->resources, &pp->res[1]); | 91 | pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); |
92 | 92 | ||
93 | return 1; | 93 | return 1; |
94 | } | 94 | } |
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 294aad07f7a0..804c9122b7b3 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = { | |||
271 | &am79c961_device, | 271 | &am79c961_device, |
272 | }; | 272 | }; |
273 | 273 | ||
274 | /* | ||
275 | * EBSA110 idling methodology: | ||
276 | * | ||
277 | * We can not execute the "wait for interrupt" instruction since that | ||
278 | * will stop our MCLK signal (which provides the clock for the glue | ||
279 | * logic, and therefore the timer interrupt). | ||
280 | * | ||
281 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
282 | * of any interrupt with core clock down to the memory clock. | ||
283 | */ | ||
284 | static void ebsa110_idle(void) | ||
285 | { | ||
286 | const char *irq_stat = (char *)0xff000000; | ||
287 | |||
288 | /* disable clock switching */ | ||
289 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
290 | |||
291 | /* wait for an interrupt to occur */ | ||
292 | while (!*irq_stat); | ||
293 | |||
294 | /* enable clock switching */ | ||
295 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
296 | } | ||
297 | |||
274 | static int __init ebsa110_init(void) | 298 | static int __init ebsa110_init(void) |
275 | { | 299 | { |
300 | arm_pm_idle = ebsa110_idle; | ||
276 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); | 301 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); |
277 | } | 302 | } |
278 | 303 | ||
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S index cc3e5992f6b3..14b110de78a9 100644 --- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S | |||
@@ -12,16 +12,10 @@ | |||
12 | 12 | ||
13 | #define IRQ_STAT 0xff000000 /* read */ | 13 | #define IRQ_STAT 0xff000000 /* read */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | mov \base, #IRQ_STAT | 16 | mov \base, #IRQ_STAT |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, stat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, stat, base, tmp |
26 | ldrb \stat, [\base] @ get interrupts | 20 | ldrb \stat, [\base] @ get interrupts |
27 | mov \irqnr, #0 | 21 | mov \irqnr, #0 |
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h deleted file mode 100644 index 2e4af65edb6f..000000000000 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ebsa110/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_SYSTEM_H | ||
11 | #define __ASM_ARCH_SYSTEM_H | ||
12 | |||
13 | /* | ||
14 | * EBSA110 idling methodology: | ||
15 | * | ||
16 | * We can not execute the "wait for interrupt" instruction since that | ||
17 | * will stop our MCLK signal (which provides the clock for the glue | ||
18 | * logic, and therefore the timer interrupt). | ||
19 | * | ||
20 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
21 | * of any interrupt with core clock down to the memory clock. | ||
22 | */ | ||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | const char *irq_stat = (char *)0xff000000; | ||
26 | |||
27 | /* disable clock switching */ | ||
28 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
29 | |||
30 | /* wait for an interrupt to occur */ | ||
31 | while (!*irq_stat); | ||
32 | |||
33 | /* enable clock switching */ | ||
34 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
35 | } | ||
36 | |||
37 | #endif | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 24203f9a6796..41f0d680c5e1 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = { | |||
279 | .set_mctrl = ep93xx_uart_set_mctrl, | 279 | .set_mctrl = ep93xx_uart_set_mctrl, |
280 | }; | 280 | }; |
281 | 281 | ||
282 | static struct amba_device uart1_device = { | 282 | static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, |
283 | .dev = { | 283 | { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); |
284 | .init_name = "apb:uart1", | ||
285 | .platform_data = &ep93xx_uart_data, | ||
286 | }, | ||
287 | .res = { | ||
288 | .start = EP93XX_UART1_PHYS_BASE, | ||
289 | .end = EP93XX_UART1_PHYS_BASE + 0x0fff, | ||
290 | .flags = IORESOURCE_MEM, | ||
291 | }, | ||
292 | .irq = { IRQ_EP93XX_UART1, NO_IRQ }, | ||
293 | .periphid = 0x00041010, | ||
294 | }; | ||
295 | 284 | ||
296 | static struct amba_device uart2_device = { | 285 | static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, |
297 | .dev = { | 286 | { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); |
298 | .init_name = "apb:uart2", | ||
299 | .platform_data = &ep93xx_uart_data, | ||
300 | }, | ||
301 | .res = { | ||
302 | .start = EP93XX_UART2_PHYS_BASE, | ||
303 | .end = EP93XX_UART2_PHYS_BASE + 0x0fff, | ||
304 | .flags = IORESOURCE_MEM, | ||
305 | }, | ||
306 | .irq = { IRQ_EP93XX_UART2, NO_IRQ }, | ||
307 | .periphid = 0x00041010, | ||
308 | }; | ||
309 | |||
310 | static struct amba_device uart3_device = { | ||
311 | .dev = { | ||
312 | .init_name = "apb:uart3", | ||
313 | .platform_data = &ep93xx_uart_data, | ||
314 | }, | ||
315 | .res = { | ||
316 | .start = EP93XX_UART3_PHYS_BASE, | ||
317 | .end = EP93XX_UART3_PHYS_BASE + 0x0fff, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }, | ||
320 | .irq = { IRQ_EP93XX_UART3, NO_IRQ }, | ||
321 | .periphid = 0x00041010, | ||
322 | }; | ||
323 | 287 | ||
288 | static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, | ||
289 | { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); | ||
324 | 290 | ||
325 | static struct resource ep93xx_rtc_resource[] = { | 291 | static struct resource ep93xx_rtc_resource[] = { |
326 | { | 292 | { |
@@ -817,23 +783,12 @@ void __init ep93xx_register_i2s(void) | |||
817 | #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ | 783 | #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ |
818 | EP93XX_SYSCON_I2SCLKDIV_SPOL) | 784 | EP93XX_SYSCON_I2SCLKDIV_SPOL) |
819 | 785 | ||
820 | int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config) | 786 | int ep93xx_i2s_acquire(void) |
821 | { | 787 | { |
822 | unsigned val; | 788 | unsigned val; |
823 | 789 | ||
824 | /* Sanity check */ | 790 | ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97, |
825 | if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK) | 791 | EP93XX_SYSCON_DEVCFG_I2S_MASK); |
826 | return -EINVAL; | ||
827 | if (i2s_config & ~EP93XX_I2SCLKDIV_MASK) | ||
828 | return -EINVAL; | ||
829 | |||
830 | /* Must have only one of I2SONSSP/I2SONAC97 set */ | ||
831 | if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) == | ||
832 | (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97)) | ||
833 | return -EINVAL; | ||
834 | |||
835 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); | ||
836 | ep93xx_devcfg_set_bits(i2s_pins); | ||
837 | 792 | ||
838 | /* | 793 | /* |
839 | * This is potentially racy with the clock api for i2s_mclk, sclk and | 794 | * This is potentially racy with the clock api for i2s_mclk, sclk and |
@@ -843,7 +798,7 @@ int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config) | |||
843 | */ | 798 | */ |
844 | val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); | 799 | val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); |
845 | val &= ~EP93XX_I2SCLKDIV_MASK; | 800 | val &= ~EP93XX_I2SCLKDIV_MASK; |
846 | val |= i2s_config; | 801 | val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL; |
847 | ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); | 802 | ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); |
848 | 803 | ||
849 | return 0; | 804 | return 0; |
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S deleted file mode 100644 index 9be6edcf9045..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/entry-macro.S | ||
3 | * IRQ demultiplexing for EP93xx | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index d4c934931f9d..ad63d4be693f 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h | |||
@@ -59,7 +59,7 @@ void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data); | |||
59 | int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); | 59 | int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); |
60 | void ep93xx_keypad_release_gpio(struct platform_device *pdev); | 60 | void ep93xx_keypad_release_gpio(struct platform_device *pdev); |
61 | void ep93xx_register_i2s(void); | 61 | void ep93xx_register_i2s(void); |
62 | int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config); | 62 | int ep93xx_i2s_acquire(void); |
63 | void ep93xx_i2s_release(void); | 63 | void ep93xx_i2s_release(void); |
64 | void ep93xx_register_ac97(void); | 64 | void ep93xx_register_ac97(void); |
65 | 65 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h deleted file mode 100644 index b5bec7cb9b52..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/system.h | ||
3 | */ | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5d602f68a0e8..dfad6538b273 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -34,6 +34,7 @@ config CPU_EXYNOS4210 | |||
34 | select ARM_CPU_SUSPEND if PM | 34 | select ARM_CPU_SUSPEND if PM |
35 | select S5P_PM if PM | 35 | select S5P_PM if PM |
36 | select S5P_SLEEP if PM | 36 | select S5P_SLEEP if PM |
37 | select PM_GENERIC_DOMAINS | ||
37 | help | 38 | help |
38 | Enable EXYNOS4210 CPU support | 39 | Enable EXYNOS4210 CPU support |
39 | 40 | ||
@@ -74,11 +75,6 @@ config EXYNOS4_SETUP_FIMD0 | |||
74 | help | 75 | help |
75 | Common setup code for FIMD0. | 76 | Common setup code for FIMD0. |
76 | 77 | ||
77 | config EXYNOS4_DEV_PD | ||
78 | bool | ||
79 | help | ||
80 | Compile in platform device definitions for Power Domain | ||
81 | |||
82 | config EXYNOS4_DEV_SYSMMU | 78 | config EXYNOS4_DEV_SYSMMU |
83 | bool | 79 | bool |
84 | help | 80 | help |
@@ -195,7 +191,6 @@ config MACH_SMDKV310 | |||
195 | select EXYNOS4_DEV_AHCI | 191 | select EXYNOS4_DEV_AHCI |
196 | select SAMSUNG_DEV_KEYPAD | 192 | select SAMSUNG_DEV_KEYPAD |
197 | select EXYNOS4_DEV_DMA | 193 | select EXYNOS4_DEV_DMA |
198 | select EXYNOS4_DEV_PD | ||
199 | select SAMSUNG_DEV_PWM | 194 | select SAMSUNG_DEV_PWM |
200 | select EXYNOS4_DEV_USB_OHCI | 195 | select EXYNOS4_DEV_USB_OHCI |
201 | select EXYNOS4_DEV_SYSMMU | 196 | select EXYNOS4_DEV_SYSMMU |
@@ -243,7 +238,6 @@ config MACH_UNIVERSAL_C210 | |||
243 | select S5P_DEV_ONENAND | 238 | select S5P_DEV_ONENAND |
244 | select S5P_DEV_TV | 239 | select S5P_DEV_TV |
245 | select EXYNOS4_DEV_DMA | 240 | select EXYNOS4_DEV_DMA |
246 | select EXYNOS4_DEV_PD | ||
247 | select EXYNOS4_SETUP_FIMD0 | 241 | select EXYNOS4_SETUP_FIMD0 |
248 | select EXYNOS4_SETUP_I2C1 | 242 | select EXYNOS4_SETUP_I2C1 |
249 | select EXYNOS4_SETUP_I2C3 | 243 | select EXYNOS4_SETUP_I2C3 |
@@ -277,7 +271,6 @@ config MACH_NURI | |||
277 | select S5P_DEV_USB_EHCI | 271 | select S5P_DEV_USB_EHCI |
278 | select S5P_SETUP_MIPIPHY | 272 | select S5P_SETUP_MIPIPHY |
279 | select EXYNOS4_DEV_DMA | 273 | select EXYNOS4_DEV_DMA |
280 | select EXYNOS4_DEV_PD | ||
281 | select EXYNOS4_SETUP_FIMC | 274 | select EXYNOS4_SETUP_FIMC |
282 | select EXYNOS4_SETUP_FIMD0 | 275 | select EXYNOS4_SETUP_FIMD0 |
283 | select EXYNOS4_SETUP_I2C1 | 276 | select EXYNOS4_SETUP_I2C1 |
@@ -310,7 +303,6 @@ config MACH_ORIGEN | |||
310 | select SAMSUNG_DEV_BACKLIGHT | 303 | select SAMSUNG_DEV_BACKLIGHT |
311 | select SAMSUNG_DEV_PWM | 304 | select SAMSUNG_DEV_PWM |
312 | select EXYNOS4_DEV_DMA | 305 | select EXYNOS4_DEV_DMA |
313 | select EXYNOS4_DEV_PD | ||
314 | select EXYNOS4_DEV_USB_OHCI | 306 | select EXYNOS4_DEV_USB_OHCI |
315 | select EXYNOS4_SETUP_FIMD0 | 307 | select EXYNOS4_SETUP_FIMD0 |
316 | select EXYNOS4_SETUP_SDHCI | 308 | select EXYNOS4_SETUP_SDHCI |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 5fc202cdfdb6..d9191f9a7af8 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -17,6 +17,7 @@ obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o | |||
17 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o | 17 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o |
18 | 18 | ||
19 | obj-$(CONFIG_PM) += pm.o | 19 | obj-$(CONFIG_PM) += pm.o |
20 | obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o | ||
20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 21 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
21 | 22 | ||
22 | obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o | 23 | obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o |
@@ -45,7 +46,6 @@ obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o | |||
45 | 46 | ||
46 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o | 47 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o |
47 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | 48 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o |
48 | obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o | ||
49 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o | 49 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o |
50 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 50 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
51 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o | 51 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o |
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index c59e18871006..93fa2d532e4a 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = { | |||
201 | }, | 201 | }, |
202 | }; | 202 | }; |
203 | 203 | ||
204 | static void exynos_idle(void) | ||
205 | { | ||
206 | if (!need_resched()) | ||
207 | cpu_do_idle(); | ||
208 | |||
209 | local_irq_enable(); | ||
210 | } | ||
211 | |||
212 | void exynos4_restart(char mode, const char *cmd) | 204 | void exynos4_restart(char mode, const char *cmd) |
213 | { | 205 | { |
214 | __raw_writel(0x1, S5P_SWRESET); | 206 | __raw_writel(0x1, S5P_SWRESET); |
@@ -402,7 +394,7 @@ void __init exynos4_init_irq(void) | |||
402 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; | 394 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; |
403 | 395 | ||
404 | if (!of_have_populated_dt()) | 396 | if (!of_have_populated_dt()) |
405 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); | 397 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); |
406 | #ifdef CONFIG_OF | 398 | #ifdef CONFIG_OF |
407 | else | 399 | else |
408 | of_irq_init(exynos4_dt_irq_match); | 400 | of_irq_init(exynos4_dt_irq_match); |
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init); | |||
467 | int __init exynos_init(void) | 459 | int __init exynos_init(void) |
468 | { | 460 | { |
469 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | 461 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
470 | |||
471 | /* set idle function */ | ||
472 | pm_idle = exynos_idle; | ||
473 | |||
474 | return device_register(&exynos4_dev); | 462 | return device_register(&exynos4_dev); |
475 | } | 463 | } |
476 | 464 | ||
diff --git a/arch/arm/mach-exynos/dev-pd.c b/arch/arm/mach-exynos/dev-pd.c deleted file mode 100644 index 3273f25d6a75..000000000000 --- a/arch/arm/mach-exynos/dev-pd.c +++ /dev/null | |||
@@ -1,139 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/dev-pd.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - Power Domain support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/delay.h> | ||
17 | |||
18 | #include <mach/regs-pmu.h> | ||
19 | |||
20 | #include <plat/pd.h> | ||
21 | |||
22 | static int exynos4_pd_enable(struct device *dev) | ||
23 | { | ||
24 | struct samsung_pd_info *pdata = dev->platform_data; | ||
25 | u32 timeout; | ||
26 | |||
27 | __raw_writel(S5P_INT_LOCAL_PWR_EN, pdata->base); | ||
28 | |||
29 | /* Wait max 1ms */ | ||
30 | timeout = 10; | ||
31 | while ((__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) | ||
32 | != S5P_INT_LOCAL_PWR_EN) { | ||
33 | if (timeout == 0) { | ||
34 | printk(KERN_ERR "Power domain %s enable failed.\n", | ||
35 | dev_name(dev)); | ||
36 | return -ETIMEDOUT; | ||
37 | } | ||
38 | timeout--; | ||
39 | udelay(100); | ||
40 | } | ||
41 | |||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | static int exynos4_pd_disable(struct device *dev) | ||
46 | { | ||
47 | struct samsung_pd_info *pdata = dev->platform_data; | ||
48 | u32 timeout; | ||
49 | |||
50 | __raw_writel(0, pdata->base); | ||
51 | |||
52 | /* Wait max 1ms */ | ||
53 | timeout = 10; | ||
54 | while (__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) { | ||
55 | if (timeout == 0) { | ||
56 | printk(KERN_ERR "Power domain %s disable failed.\n", | ||
57 | dev_name(dev)); | ||
58 | return -ETIMEDOUT; | ||
59 | } | ||
60 | timeout--; | ||
61 | udelay(100); | ||
62 | } | ||
63 | |||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | struct platform_device exynos4_device_pd[] = { | ||
68 | { | ||
69 | .name = "samsung-pd", | ||
70 | .id = 0, | ||
71 | .dev = { | ||
72 | .platform_data = &(struct samsung_pd_info) { | ||
73 | .enable = exynos4_pd_enable, | ||
74 | .disable = exynos4_pd_disable, | ||
75 | .base = S5P_PMU_MFC_CONF, | ||
76 | }, | ||
77 | }, | ||
78 | }, { | ||
79 | .name = "samsung-pd", | ||
80 | .id = 1, | ||
81 | .dev = { | ||
82 | .platform_data = &(struct samsung_pd_info) { | ||
83 | .enable = exynos4_pd_enable, | ||
84 | .disable = exynos4_pd_disable, | ||
85 | .base = S5P_PMU_G3D_CONF, | ||
86 | }, | ||
87 | }, | ||
88 | }, { | ||
89 | .name = "samsung-pd", | ||
90 | .id = 2, | ||
91 | .dev = { | ||
92 | .platform_data = &(struct samsung_pd_info) { | ||
93 | .enable = exynos4_pd_enable, | ||
94 | .disable = exynos4_pd_disable, | ||
95 | .base = S5P_PMU_LCD0_CONF, | ||
96 | }, | ||
97 | }, | ||
98 | }, { | ||
99 | .name = "samsung-pd", | ||
100 | .id = 3, | ||
101 | .dev = { | ||
102 | .platform_data = &(struct samsung_pd_info) { | ||
103 | .enable = exynos4_pd_enable, | ||
104 | .disable = exynos4_pd_disable, | ||
105 | .base = S5P_PMU_LCD1_CONF, | ||
106 | }, | ||
107 | }, | ||
108 | }, { | ||
109 | .name = "samsung-pd", | ||
110 | .id = 4, | ||
111 | .dev = { | ||
112 | .platform_data = &(struct samsung_pd_info) { | ||
113 | .enable = exynos4_pd_enable, | ||
114 | .disable = exynos4_pd_disable, | ||
115 | .base = S5P_PMU_TV_CONF, | ||
116 | }, | ||
117 | }, | ||
118 | }, { | ||
119 | .name = "samsung-pd", | ||
120 | .id = 5, | ||
121 | .dev = { | ||
122 | .platform_data = &(struct samsung_pd_info) { | ||
123 | .enable = exynos4_pd_enable, | ||
124 | .disable = exynos4_pd_disable, | ||
125 | .base = S5P_PMU_CAM_CONF, | ||
126 | }, | ||
127 | }, | ||
128 | }, { | ||
129 | .name = "samsung-pd", | ||
130 | .id = 6, | ||
131 | .dev = { | ||
132 | .platform_data = &(struct samsung_pd_info) { | ||
133 | .enable = exynos4_pd_enable, | ||
134 | .disable = exynos4_pd_disable, | ||
135 | .base = S5P_PMU_GPS_CONF, | ||
136 | }, | ||
137 | }, | ||
138 | }, | ||
139 | }; | ||
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index b10fcd270f07..91370def4a70 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { | |||
74 | .peri_id = pdma0_peri, | 74 | .peri_id = pdma0_peri, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | struct amba_device exynos4_device_pdma0 = { | 77 | AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, |
78 | .dev = { | 78 | {IRQ_PDMA0}, &exynos4_pdma0_pdata); |
79 | .init_name = "dma-pl330.0", | ||
80 | .dma_mask = &dma_dmamask, | ||
81 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
82 | .platform_data = &exynos4_pdma0_pdata, | ||
83 | }, | ||
84 | .res = { | ||
85 | .start = EXYNOS4_PA_PDMA0, | ||
86 | .end = EXYNOS4_PA_PDMA0 + SZ_4K, | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }, | ||
89 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
90 | .periphid = 0x00041330, | ||
91 | }; | ||
92 | 79 | ||
93 | u8 pdma1_peri[] = { | 80 | u8 pdma1_peri[] = { |
94 | DMACH_PCM0_RX, | 81 | DMACH_PCM0_RX, |
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { | |||
123 | .peri_id = pdma1_peri, | 110 | .peri_id = pdma1_peri, |
124 | }; | 111 | }; |
125 | 112 | ||
126 | struct amba_device exynos4_device_pdma1 = { | 113 | AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, |
127 | .dev = { | 114 | {IRQ_PDMA1}, &exynos4_pdma1_pdata); |
128 | .init_name = "dma-pl330.1", | ||
129 | .dma_mask = &dma_dmamask, | ||
130 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
131 | .platform_data = &exynos4_pdma1_pdata, | ||
132 | }, | ||
133 | .res = { | ||
134 | .start = EXYNOS4_PA_PDMA1, | ||
135 | .end = EXYNOS4_PA_PDMA1 + SZ_4K, | ||
136 | .flags = IORESOURCE_MEM, | ||
137 | }, | ||
138 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
139 | .periphid = 0x00041330, | ||
140 | }; | ||
141 | 115 | ||
142 | static int __init exynos4_dma_init(void) | 116 | static int __init exynos4_dma_init(void) |
143 | { | 117 | { |
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void) | |||
146 | 120 | ||
147 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); |
148 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); |
149 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); | 123 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); |
150 | 124 | ||
151 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); | 125 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); |
152 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); |
153 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); | 127 | amba_device_register(&exynos4_pdma1_device, &iomem_resource); |
154 | 128 | ||
155 | return 0; | 129 | return 0; |
156 | } | 130 | } |
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h index 3df27f2d5034..7517c3f417af 100644 --- a/arch/arm/mach-exynos/include/mach/cpufreq.h +++ b/arch/arm/mach-exynos/include/mach/cpufreq.h | |||
@@ -32,3 +32,5 @@ struct exynos_dvfs_info { | |||
32 | }; | 32 | }; |
33 | 33 | ||
34 | extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *); | 34 | extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *); |
35 | extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *); | ||
36 | extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *); | ||
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S deleted file mode 100644 index 3ba4f547534b..000000000000 --- a/arch/arm/mach-exynos/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* arch/arm/mach-exynos4/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S | ||
4 | * | ||
5 | * Low-level IRQ helper macros for EXYNOS4 platforms | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h deleted file mode 100644 index 0063a6de3dc8..000000000000 --- a/arch/arm/mach-exynos/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 435261f83f46..aa37179d776c 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -1263,9 +1263,6 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1263 | &s5p_device_mfc, | 1263 | &s5p_device_mfc, |
1264 | &s5p_device_mfc_l, | 1264 | &s5p_device_mfc_l, |
1265 | &s5p_device_mfc_r, | 1265 | &s5p_device_mfc_r, |
1266 | &exynos4_device_pd[PD_MFC], | ||
1267 | &exynos4_device_pd[PD_LCD0], | ||
1268 | &exynos4_device_pd[PD_CAM], | ||
1269 | &s5p_device_fimc_md, | 1266 | &s5p_device_fimc_md, |
1270 | 1267 | ||
1271 | /* NURI Devices */ | 1268 | /* NURI Devices */ |
@@ -1315,14 +1312,6 @@ static void __init nuri_machine_init(void) | |||
1315 | 1312 | ||
1316 | /* Last */ | 1313 | /* Last */ |
1317 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); | 1314 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); |
1318 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
1319 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
1320 | |||
1321 | s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1322 | s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1323 | s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1324 | s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1325 | s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1326 | } | 1315 | } |
1327 | 1316 | ||
1328 | MACHINE_START(NURI, "NURI") | 1317 | MACHINE_START(NURI, "NURI") |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 0679b8ad2d1e..fa5c4a59b0aa 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -621,13 +621,6 @@ static struct platform_device *origen_devices[] __initdata = { | |||
621 | &s5p_device_mfc_r, | 621 | &s5p_device_mfc_r, |
622 | &s5p_device_mixer, | 622 | &s5p_device_mixer, |
623 | &exynos4_device_ohci, | 623 | &exynos4_device_ohci, |
624 | &exynos4_device_pd[PD_LCD0], | ||
625 | &exynos4_device_pd[PD_TV], | ||
626 | &exynos4_device_pd[PD_G3D], | ||
627 | &exynos4_device_pd[PD_LCD1], | ||
628 | &exynos4_device_pd[PD_CAM], | ||
629 | &exynos4_device_pd[PD_GPS], | ||
630 | &exynos4_device_pd[PD_MFC], | ||
631 | &origen_device_gpiokeys, | 624 | &origen_device_gpiokeys, |
632 | &origen_lcd_hv070wsa, | 625 | &origen_lcd_hv070wsa, |
633 | }; | 626 | }; |
@@ -695,13 +688,6 @@ static void __init origen_machine_init(void) | |||
695 | 688 | ||
696 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); | 689 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); |
697 | 690 | ||
698 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
699 | |||
700 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
701 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
702 | |||
703 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
704 | |||
705 | samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); | 691 | samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); |
706 | } | 692 | } |
707 | 693 | ||
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index b2c5557f50e4..5258b8563676 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -277,13 +277,6 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
277 | &s5p_device_mfc, | 277 | &s5p_device_mfc, |
278 | &s5p_device_mfc_l, | 278 | &s5p_device_mfc_l, |
279 | &s5p_device_mfc_r, | 279 | &s5p_device_mfc_r, |
280 | &exynos4_device_pd[PD_MFC], | ||
281 | &exynos4_device_pd[PD_G3D], | ||
282 | &exynos4_device_pd[PD_LCD0], | ||
283 | &exynos4_device_pd[PD_LCD1], | ||
284 | &exynos4_device_pd[PD_CAM], | ||
285 | &exynos4_device_pd[PD_TV], | ||
286 | &exynos4_device_pd[PD_GPS], | ||
287 | &exynos4_device_spdif, | 280 | &exynos4_device_spdif, |
288 | &exynos4_device_sysmmu, | 281 | &exynos4_device_sysmmu, |
289 | &samsung_asoc_dma, | 282 | &samsung_asoc_dma, |
@@ -336,10 +329,6 @@ static void s5p_tv_setup(void) | |||
336 | WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug")); | 329 | WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug")); |
337 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | 330 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); |
338 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | 331 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); |
339 | |||
340 | /* setup dependencies between TV devices */ | ||
341 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
342 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
343 | } | 332 | } |
344 | 333 | ||
345 | static void __init smdkv310_map_io(void) | 334 | static void __init smdkv310_map_io(void) |
@@ -379,7 +368,6 @@ static void __init smdkv310_machine_init(void) | |||
379 | clk_xusbxti.rate = 24000000; | 368 | clk_xusbxti.rate = 24000000; |
380 | 369 | ||
381 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); | 370 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); |
382 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
383 | } | 371 | } |
384 | 372 | ||
385 | MACHINE_START(SMDKV310, "SMDKV310") | 373 | MACHINE_START(SMDKV310, "SMDKV310") |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 38939956c34f..b2d495b31094 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -971,7 +971,6 @@ static struct platform_device *universal_devices[] __initdata = { | |||
971 | &s3c_device_i2c5, | 971 | &s3c_device_i2c5, |
972 | &s5p_device_i2c_hdmiphy, | 972 | &s5p_device_i2c_hdmiphy, |
973 | &hdmi_fixed_voltage, | 973 | &hdmi_fixed_voltage, |
974 | &exynos4_device_pd[PD_TV], | ||
975 | &s5p_device_hdmi, | 974 | &s5p_device_hdmi, |
976 | &s5p_device_sdo, | 975 | &s5p_device_sdo, |
977 | &s5p_device_mixer, | 976 | &s5p_device_mixer, |
@@ -984,9 +983,6 @@ static struct platform_device *universal_devices[] __initdata = { | |||
984 | &s5p_device_mfc, | 983 | &s5p_device_mfc, |
985 | &s5p_device_mfc_l, | 984 | &s5p_device_mfc_l, |
986 | &s5p_device_mfc_r, | 985 | &s5p_device_mfc_r, |
987 | &exynos4_device_pd[PD_MFC], | ||
988 | &exynos4_device_pd[PD_LCD0], | ||
989 | &exynos4_device_pd[PD_CAM], | ||
990 | &cam_i_core_fixed_reg_dev, | 986 | &cam_i_core_fixed_reg_dev, |
991 | &cam_s_if_fixed_reg_dev, | 987 | &cam_s_if_fixed_reg_dev, |
992 | &s5p_device_fimc_md, | 988 | &s5p_device_fimc_md, |
@@ -1005,10 +1001,6 @@ void s5p_tv_setup(void) | |||
1005 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); | 1001 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); |
1006 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | 1002 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); |
1007 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | 1003 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); |
1008 | |||
1009 | /* setup dependencies between TV devices */ | ||
1010 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1011 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1012 | } | 1004 | } |
1013 | 1005 | ||
1014 | static void __init universal_reserve(void) | 1006 | static void __init universal_reserve(void) |
@@ -1042,15 +1034,6 @@ static void __init universal_machine_init(void) | |||
1042 | 1034 | ||
1043 | /* Last */ | 1035 | /* Last */ |
1044 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); | 1036 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); |
1045 | |||
1046 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
1047 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
1048 | |||
1049 | s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1050 | s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1051 | s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1052 | s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1053 | s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1054 | } | 1037 | } |
1055 | 1038 | ||
1056 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | 1039 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") |
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c new file mode 100644 index 000000000000..0b04af2b13cc --- /dev/null +++ b/arch/arm/mach-exynos/pm_domains.c | |||
@@ -0,0 +1,195 @@ | |||
1 | /* | ||
2 | * Exynos Generic power domain support. | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Implementation of Exynos specific power domain control which is used in | ||
8 | * conjunction with runtime-pm. Support for both device-tree and non-device-tree | ||
9 | * based power domain support is included. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/io.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/slab.h> | ||
19 | #include <linux/pm_domain.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/of_address.h> | ||
22 | |||
23 | #include <mach/regs-pmu.h> | ||
24 | #include <plat/devs.h> | ||
25 | |||
26 | /* | ||
27 | * Exynos specific wrapper around the generic power domain | ||
28 | */ | ||
29 | struct exynos_pm_domain { | ||
30 | void __iomem *base; | ||
31 | char const *name; | ||
32 | bool is_off; | ||
33 | struct generic_pm_domain pd; | ||
34 | }; | ||
35 | |||
36 | static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) | ||
37 | { | ||
38 | struct exynos_pm_domain *pd; | ||
39 | void __iomem *base; | ||
40 | u32 timeout, pwr; | ||
41 | char *op; | ||
42 | |||
43 | pd = container_of(domain, struct exynos_pm_domain, pd); | ||
44 | base = pd->base; | ||
45 | |||
46 | pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0; | ||
47 | __raw_writel(pwr, base); | ||
48 | |||
49 | /* Wait max 1ms */ | ||
50 | timeout = 10; | ||
51 | |||
52 | while ((__raw_readl(base + 0x4) & S5P_INT_LOCAL_PWR_EN) != pwr) { | ||
53 | if (!timeout) { | ||
54 | op = (power_on) ? "enable" : "disable"; | ||
55 | pr_err("Power domain %s %s failed\n", domain->name, op); | ||
56 | return -ETIMEDOUT; | ||
57 | } | ||
58 | timeout--; | ||
59 | cpu_relax(); | ||
60 | usleep_range(80, 100); | ||
61 | } | ||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static int exynos_pd_power_on(struct generic_pm_domain *domain) | ||
66 | { | ||
67 | return exynos_pd_power(domain, true); | ||
68 | } | ||
69 | |||
70 | static int exynos_pd_power_off(struct generic_pm_domain *domain) | ||
71 | { | ||
72 | return exynos_pd_power(domain, false); | ||
73 | } | ||
74 | |||
75 | #define EXYNOS_GPD(PD, BASE, NAME) \ | ||
76 | static struct exynos_pm_domain PD = { \ | ||
77 | .base = (void __iomem *)BASE, \ | ||
78 | .name = NAME, \ | ||
79 | .pd = { \ | ||
80 | .power_off = exynos_pd_power_off, \ | ||
81 | .power_on = exynos_pd_power_on, \ | ||
82 | }, \ | ||
83 | } | ||
84 | |||
85 | #ifdef CONFIG_OF | ||
86 | static __init int exynos_pm_dt_parse_domains(void) | ||
87 | { | ||
88 | struct device_node *np; | ||
89 | |||
90 | for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { | ||
91 | struct exynos_pm_domain *pd; | ||
92 | |||
93 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); | ||
94 | if (!pd) { | ||
95 | pr_err("%s: failed to allocate memory for domain\n", | ||
96 | __func__); | ||
97 | return -ENOMEM; | ||
98 | } | ||
99 | |||
100 | if (of_get_property(np, "samsung,exynos4210-pd-off", NULL)) | ||
101 | pd->is_off = true; | ||
102 | pd->name = np->name; | ||
103 | pd->base = of_iomap(np, 0); | ||
104 | pd->pd.power_off = exynos_pd_power_off; | ||
105 | pd->pd.power_on = exynos_pd_power_on; | ||
106 | pd->pd.of_node = np; | ||
107 | pm_genpd_init(&pd->pd, NULL, false); | ||
108 | } | ||
109 | return 0; | ||
110 | } | ||
111 | #else | ||
112 | static __init int exynos_pm_dt_parse_domains(void) | ||
113 | { | ||
114 | return 0; | ||
115 | } | ||
116 | #endif /* CONFIG_OF */ | ||
117 | |||
118 | static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev, | ||
119 | struct exynos_pm_domain *pd) | ||
120 | { | ||
121 | if (pdev->dev.bus) { | ||
122 | if (pm_genpd_add_device(&pd->pd, &pdev->dev)) | ||
123 | pr_info("%s: error in adding %s device to %s power" | ||
124 | "domain\n", __func__, dev_name(&pdev->dev), | ||
125 | pd->name); | ||
126 | } | ||
127 | } | ||
128 | |||
129 | EXYNOS_GPD(exynos4_pd_mfc, S5P_PMU_MFC_CONF, "pd-mfc"); | ||
130 | EXYNOS_GPD(exynos4_pd_g3d, S5P_PMU_G3D_CONF, "pd-g3d"); | ||
131 | EXYNOS_GPD(exynos4_pd_lcd0, S5P_PMU_LCD0_CONF, "pd-lcd0"); | ||
132 | EXYNOS_GPD(exynos4_pd_lcd1, S5P_PMU_LCD1_CONF, "pd-lcd1"); | ||
133 | EXYNOS_GPD(exynos4_pd_tv, S5P_PMU_TV_CONF, "pd-tv"); | ||
134 | EXYNOS_GPD(exynos4_pd_cam, S5P_PMU_CAM_CONF, "pd-cam"); | ||
135 | EXYNOS_GPD(exynos4_pd_gps, S5P_PMU_GPS_CONF, "pd-gps"); | ||
136 | |||
137 | static struct exynos_pm_domain *exynos4_pm_domains[] = { | ||
138 | &exynos4_pd_mfc, | ||
139 | &exynos4_pd_g3d, | ||
140 | &exynos4_pd_lcd0, | ||
141 | &exynos4_pd_lcd1, | ||
142 | &exynos4_pd_tv, | ||
143 | &exynos4_pd_cam, | ||
144 | &exynos4_pd_gps, | ||
145 | }; | ||
146 | |||
147 | static __init int exynos4_pm_init_power_domain(void) | ||
148 | { | ||
149 | int idx; | ||
150 | |||
151 | if (of_have_populated_dt()) | ||
152 | return exynos_pm_dt_parse_domains(); | ||
153 | |||
154 | for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) | ||
155 | pm_genpd_init(&exynos4_pm_domains[idx]->pd, NULL, | ||
156 | exynos4_pm_domains[idx]->is_off); | ||
157 | |||
158 | #ifdef CONFIG_S5P_DEV_FIMD0 | ||
159 | exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0); | ||
160 | #endif | ||
161 | #ifdef CONFIG_S5P_DEV_TV | ||
162 | exynos_pm_add_dev_to_genpd(&s5p_device_hdmi, &exynos4_pd_tv); | ||
163 | exynos_pm_add_dev_to_genpd(&s5p_device_mixer, &exynos4_pd_tv); | ||
164 | #endif | ||
165 | #ifdef CONFIG_S5P_DEV_MFC | ||
166 | exynos_pm_add_dev_to_genpd(&s5p_device_mfc, &exynos4_pd_mfc); | ||
167 | #endif | ||
168 | #ifdef CONFIG_S5P_DEV_FIMC0 | ||
169 | exynos_pm_add_dev_to_genpd(&s5p_device_fimc0, &exynos4_pd_cam); | ||
170 | #endif | ||
171 | #ifdef CONFIG_S5P_DEV_FIMC1 | ||
172 | exynos_pm_add_dev_to_genpd(&s5p_device_fimc1, &exynos4_pd_cam); | ||
173 | #endif | ||
174 | #ifdef CONFIG_S5P_DEV_FIMC2 | ||
175 | exynos_pm_add_dev_to_genpd(&s5p_device_fimc2, &exynos4_pd_cam); | ||
176 | #endif | ||
177 | #ifdef CONFIG_S5P_DEV_FIMC3 | ||
178 | exynos_pm_add_dev_to_genpd(&s5p_device_fimc3, &exynos4_pd_cam); | ||
179 | #endif | ||
180 | #ifdef CONFIG_S5P_DEV_CSIS0 | ||
181 | exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis0, &exynos4_pd_cam); | ||
182 | #endif | ||
183 | #ifdef CONFIG_S5P_DEV_CSIS1 | ||
184 | exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam); | ||
185 | #endif | ||
186 | return 0; | ||
187 | } | ||
188 | arch_initcall(exynos4_pm_init_power_domain); | ||
189 | |||
190 | static __init int exynos_pm_late_initcall(void) | ||
191 | { | ||
192 | pm_genpd_poweroff_unused(); | ||
193 | return 0; | ||
194 | } | ||
195 | late_initcall(exynos_pm_late_initcall); | ||
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index f685650c25d7..3194d3f73503 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c | |||
@@ -275,11 +275,13 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys) | |||
275 | allocate_resource(&iomem_resource, &res[0], 0x40000000, | 275 | allocate_resource(&iomem_resource, &res[0], 0x40000000, |
276 | 0x80000000, 0xffffffff, 0x40000000, NULL, NULL); | 276 | 0x80000000, 0xffffffff, 0x40000000, NULL, NULL); |
277 | 277 | ||
278 | pci_add_resource(&sys->resources, &ioport_resource); | ||
279 | pci_add_resource(&sys->resources, &res[0]); | ||
280 | pci_add_resource(&sys->resources, &res[1]); | ||
281 | sys->mem_offset = DC21285_PCI_MEM; | 278 | sys->mem_offset = DC21285_PCI_MEM; |
282 | 279 | ||
280 | pci_add_resource_offset(&sys->resources, | ||
281 | &ioport_resource, sys->io_offset); | ||
282 | pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset); | ||
283 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); | ||
284 | |||
283 | return 1; | 285 | return 1; |
284 | } | 286 | } |
285 | 287 | ||
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S index d3847be0c667..dabbd5c54a78 100644 --- a/arch/arm/mach-footbridge/include/mach/entry-macro.S +++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S | |||
@@ -14,9 +14,6 @@ | |||
14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 | 14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 |
15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff | 15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | mov \base, #dc21285_high | 18 | mov \base, #dc21285_high |
22 | .if dc21285_low | 19 | .if dc21285_low |
@@ -24,9 +21,6 @@ | |||
24 | .endif | 21 | .endif |
25 | .endm | 22 | .endm |
26 | 23 | ||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
30 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
31 | ldr \irqstat, [\base, #0x180] @ get interrupts | 25 | ldr \irqstat, [\base, #0x180] @ get interrupts |
32 | 26 | ||
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h deleted file mode 100644 index a174a5841bc2..000000000000 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-footbridge/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index c5b24b95a76e..7355c0bbcb5e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := irq.o mm.o time.o devices.o gpio.o | 7 | obj-y := irq.o mm.o time.o devices.o gpio.o idle.o |
8 | 8 | ||
9 | # Board-specific support | 9 | # Board-specific support |
10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o | 10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o |
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c new file mode 100644 index 000000000000..92bbd6bb600a --- /dev/null +++ b/arch/arm/mach-gemini/idle.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-gemini/idle.c | ||
3 | */ | ||
4 | |||
5 | #include <linux/init.h> | ||
6 | #include <asm/system.h> | ||
7 | #include <asm/proc-fns.h> | ||
8 | |||
9 | static void gemini_idle(void) | ||
10 | { | ||
11 | /* | ||
12 | * Because of broken hardware we have to enable interrupts or the CPU | ||
13 | * will never wakeup... Acctualy it is not very good to enable | ||
14 | * interrupts first since scheduler can miss a tick, but there is | ||
15 | * no other way around this. Platforms that needs it for power saving | ||
16 | * should call enable_hlt() in init code, since by default it is | ||
17 | * disabled. | ||
18 | */ | ||
19 | local_irq_enable(); | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | static int __init gemini_idle_init(void) | ||
24 | { | ||
25 | arm_pm_idle = gemini_idle; | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | arch_initcall(gemini_idle_init); | ||
diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S index 1624f91a2b8b..f044e430bfa4 100644 --- a/arch/arm/mach-gemini/include/mach/entry-macro.S +++ b/arch/arm/mach-gemini/include/mach/entry-macro.S | |||
@@ -12,15 +12,9 @@ | |||
12 | 12 | ||
13 | #define IRQ_STATUS 0x14 | 13 | #define IRQ_STATUS 0x14 |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) | 19 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) |
26 | ldr \irqnr, [\irqstat] | 20 | ldr \irqnr, [\irqstat] |
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h index 4d9c1f872472..a33b5a1f8ab4 100644 --- a/arch/arm/mach-gemini/include/mach/system.h +++ b/arch/arm/mach-gemini/include/mach/system.h | |||
@@ -14,20 +14,6 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/global_reg.h> | 15 | #include <mach/global_reg.h> |
16 | 16 | ||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * Because of broken hardware we have to enable interrupts or the CPU | ||
21 | * will never wakeup... Acctualy it is not very good to enable | ||
22 | * interrupts here since scheduler can miss a tick, but there is | ||
23 | * no other way around this. Platforms that needs it for power saving | ||
24 | * should call enable_hlt() in init code, since by default it is | ||
25 | * disabled. | ||
26 | */ | ||
27 | local_irq_enable(); | ||
28 | cpu_do_idle(); | ||
29 | } | ||
30 | |||
31 | static inline void arch_reset(char mode, const char *cmd) | 17 | static inline void arch_reset(char mode, const char *cmd) |
32 | { | 18 | { |
33 | __raw_writel(RESET_GLOBAL | RESET_CPU1, | 19 | __raw_writel(RESET_GLOBAL | RESET_CPU1, |
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 9485a8fdf851..ca70e5fcc7ac 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c | |||
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void) | |||
73 | unsigned int i, mode = 0, level = 0; | 73 | unsigned int i, mode = 0, level = 0; |
74 | 74 | ||
75 | /* | 75 | /* |
76 | * Disable arch_idle() by default since it is buggy | 76 | * Disable the idle handler by default since it is buggy |
77 | * For more info see arch/arm/mach-gemini/include/mach/system.h | 77 | * For more info see arch/arm/mach-gemini/idle.c |
78 | */ | 78 | */ |
79 | disable_hlt(); | 79 | disable_hlt(); |
80 | 80 | ||
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index f8a2f6bb5483..e756d1ac00c2 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd) | |||
247 | { | 247 | { |
248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; | 248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; |
249 | } | 249 | } |
250 | |||
251 | static void h720x__idle(void) | ||
252 | { | ||
253 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
254 | nop(); | ||
255 | nop(); | ||
256 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
257 | nop(); | ||
258 | nop(); | ||
259 | } | ||
260 | |||
261 | static int __init h720x_idle_init(void) | ||
262 | { | ||
263 | arm_pm_idle = h720x__idle; | ||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | arch_initcall(h720x_idle_init); | ||
diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S index c3948e5ba4a0..75267fad7012 100644 --- a/arch/arm/mach-h720x/include/mach/entry-macro.S +++ b/arch/arm/mach-h720x/include/mach/entry-macro.S | |||
@@ -8,15 +8,9 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) | 15 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) |
22 | @ we could use the id register on H7202, but this is not | 16 | @ we could use the id register on H7202, but this is not |
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h deleted file mode 100644 index 16ac46e239aa..000000000000 --- a/arch/arm/mach-h720x/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-h720x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * arch/arm/mach-h720x/include/mach/system.h | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H | ||
15 | #include <mach/hardware.h> | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
20 | nop(); | ||
21 | nop(); | ||
22 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
23 | nop(); | ||
24 | nop(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-highbank/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h deleted file mode 100644 index b1d8b5fbe373..000000000000 --- a/arch/arm/mach-highbank/include/mach/system.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2010-2011 Calxeda, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along with | ||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #ifndef __MACH_SYSTEM_H | ||
17 | #define __MACH_SYSTEM_H | ||
18 | |||
19 | static inline void arch_idle(void) | ||
20 | { | ||
21 | cpu_do_idle(); | ||
22 | } | ||
23 | |||
24 | #endif | ||
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 4defb97bbfc8..3919fba52ac8 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -46,7 +46,6 @@ config SOC_IMX21 | |||
46 | bool | 46 | bool |
47 | select MACH_MX21 | 47 | select MACH_MX21 |
48 | select CPU_ARM926T | 48 | select CPU_ARM926T |
49 | select ARCH_MXC_AUDMUX_V1 | ||
50 | select IMX_HAVE_DMA_V1 | 49 | select IMX_HAVE_DMA_V1 |
51 | select IMX_HAVE_IOMUX_V1 | 50 | select IMX_HAVE_IOMUX_V1 |
52 | select MXC_AVIC | 51 | select MXC_AVIC |
@@ -55,7 +54,6 @@ config SOC_IMX25 | |||
55 | bool | 54 | bool |
56 | select ARCH_MX25 | 55 | select ARCH_MX25 |
57 | select CPU_ARM926T | 56 | select CPU_ARM926T |
58 | select ARCH_MXC_AUDMUX_V2 | ||
59 | select ARCH_MXC_IOMUX_V3 | 57 | select ARCH_MXC_IOMUX_V3 |
60 | select MXC_AVIC | 58 | select MXC_AVIC |
61 | 59 | ||
@@ -63,7 +61,6 @@ config SOC_IMX27 | |||
63 | bool | 61 | bool |
64 | select MACH_MX27 | 62 | select MACH_MX27 |
65 | select CPU_ARM926T | 63 | select CPU_ARM926T |
66 | select ARCH_MXC_AUDMUX_V1 | ||
67 | select IMX_HAVE_DMA_V1 | 64 | select IMX_HAVE_DMA_V1 |
68 | select IMX_HAVE_IOMUX_V1 | 65 | select IMX_HAVE_IOMUX_V1 |
69 | select MXC_AVIC | 66 | select MXC_AVIC |
@@ -72,7 +69,6 @@ config SOC_IMX31 | |||
72 | bool | 69 | bool |
73 | select CPU_V6 | 70 | select CPU_V6 |
74 | select IMX_HAVE_PLATFORM_MXC_RNGA | 71 | select IMX_HAVE_PLATFORM_MXC_RNGA |
75 | select ARCH_MXC_AUDMUX_V2 | ||
76 | select MXC_AVIC | 72 | select MXC_AVIC |
77 | select SMP_ON_UP if SMP | 73 | select SMP_ON_UP if SMP |
78 | 74 | ||
@@ -80,7 +76,6 @@ config SOC_IMX35 | |||
80 | bool | 76 | bool |
81 | select CPU_V6 | 77 | select CPU_V6 |
82 | select ARCH_MXC_IOMUX_V3 | 78 | select ARCH_MXC_IOMUX_V3 |
83 | select ARCH_MXC_AUDMUX_V2 | ||
84 | select HAVE_EPIT | 79 | select HAVE_EPIT |
85 | select MXC_AVIC | 80 | select MXC_AVIC |
86 | select SMP_ON_UP if SMP | 81 | select SMP_ON_UP if SMP |
@@ -89,7 +84,6 @@ config SOC_IMX5 | |||
89 | select CPU_V7 | 84 | select CPU_V7 |
90 | select MXC_TZIC | 85 | select MXC_TZIC |
91 | select ARCH_MXC_IOMUX_V3 | 86 | select ARCH_MXC_IOMUX_V3 |
92 | select ARCH_MXC_AUDMUX_V2 | ||
93 | select ARCH_HAS_CPUFREQ | 87 | select ARCH_HAS_CPUFREQ |
94 | select ARCH_MX5 | 88 | select ARCH_MX5 |
95 | bool | 89 | bool |
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c index 88fe00a146e3..dc2d7a511d9b 100644 --- a/arch/arm/mach-imx/clock-imx27.c +++ b/arch/arm/mach-imx/clock-imx27.c | |||
@@ -661,7 +661,7 @@ static struct clk_lookup lookups[] = { | |||
661 | _REGISTER_CLOCK(NULL, "dma", dma_clk) | 661 | _REGISTER_CLOCK(NULL, "dma", dma_clk) |
662 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) | 662 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) |
663 | _REGISTER_CLOCK(NULL, "brom", brom_clk) | 663 | _REGISTER_CLOCK(NULL, "brom", brom_clk) |
664 | _REGISTER_CLOCK(NULL, "emma", emma_clk) | 664 | _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk) |
665 | _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) | 665 | _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) |
666 | _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) | 666 | _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) |
667 | _REGISTER_CLOCK(NULL, "emi", emi_clk) | 667 | _REGISTER_CLOCK(NULL, "emi", emi_clk) |
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c index 9d34c3d4c024..7b92cd6da6d3 100644 --- a/arch/arm/mach-imx/cpu_op-mx51.c +++ b/arch/arm/mach-imx/cpu_op-mx51.c | |||
@@ -11,6 +11,7 @@ | |||
11 | * http://www.gnu.org/copyleft/gpl.html | 11 | * http://www.gnu.org/copyleft/gpl.html |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/bug.h> | ||
14 | #include <linux/types.h> | 15 | #include <linux/types.h> |
15 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
16 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 2f727d7c380c..28537a5d9048 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h | |||
@@ -50,6 +50,8 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[]; | |||
50 | extern const struct imx_mx2_camera_data imx27_mx2_camera_data; | 50 | extern const struct imx_mx2_camera_data imx27_mx2_camera_data; |
51 | #define imx27_add_mx2_camera(pdata) \ | 51 | #define imx27_add_mx2_camera(pdata) \ |
52 | imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) | 52 | imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) |
53 | #define imx27_add_mx2_emmaprp(pdata) \ | ||
54 | imx_add_mx2_emmaprp(&imx27_mx2_camera_data) | ||
53 | 55 | ||
54 | extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; | 56 | extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; |
55 | #define imx27_add_mxc_ehci_otg(pdata) \ | 57 | #define imx27_add_mxc_ehci_otg(pdata) \ |
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 5db3e1463af7..5f2f91d1798b 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <mach/common.h> | 32 | #include <mach/common.h> |
33 | #include <mach/iomux-mx27.h> | 33 | #include <mach/iomux-mx27.h> |
34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
35 | #include <mach/audmux.h> | ||
36 | 35 | ||
37 | #include "devices-imx27.h" | 36 | #include "devices-imx27.h" |
38 | 37 | ||
@@ -306,25 +305,6 @@ void __init eukrea_mbimx27_baseboard_init(void) | |||
306 | mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins, | 305 | mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins, |
307 | ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27"); | 306 | ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27"); |
308 | 307 | ||
309 | #if defined(CONFIG_SND_SOC_EUKREA_TLV320) \ | ||
310 | || defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE) | ||
311 | /* SSI unit master I2S codec connected to SSI_PINS_4*/ | ||
312 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, | ||
313 | MXC_AUDMUX_V1_PCR_SYN | | ||
314 | MXC_AUDMUX_V1_PCR_TFSDIR | | ||
315 | MXC_AUDMUX_V1_PCR_TCLKDIR | | ||
316 | MXC_AUDMUX_V1_PCR_RFSDIR | | ||
317 | MXC_AUDMUX_V1_PCR_RCLKDIR | | ||
318 | MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) | | ||
319 | MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) | | ||
320 | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) | ||
321 | ); | ||
322 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4, | ||
323 | MXC_AUDMUX_V1_PCR_SYN | | ||
324 | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0) | ||
325 | ); | ||
326 | #endif | ||
327 | |||
328 | imx27_add_imx_uart1(&uart_pdata); | 308 | imx27_add_imx_uart1(&uart_pdata); |
329 | imx27_add_imx_uart2(&uart_pdata); | 309 | imx27_add_imx_uart2(&uart_pdata); |
330 | #if !defined(MACH_EUKREA_CPUIMX27_USEUART4) | 310 | #if !defined(MACH_EUKREA_CPUIMX27_USEUART4) |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c index d817fc80b986..aaa592fdb9ce 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
38 | #include <mach/common.h> | 38 | #include <mach/common.h> |
39 | #include <mach/iomux-mx51.h> | 39 | #include <mach/iomux-mx51.h> |
40 | #include <mach/audmux.h> | ||
41 | 40 | ||
42 | #include "devices-imx51.h" | 41 | #include "devices-imx51.h" |
43 | 42 | ||
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 66e8726253fa..2cf603e11c4f 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | #include <mach/mx25.h> | 33 | #include <mach/mx25.h> |
34 | #include <mach/audmux.h> | ||
35 | 34 | ||
36 | #include "devices-imx25.h" | 35 | #include "devices-imx25.h" |
37 | 36 | ||
@@ -241,22 +240,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void) | |||
241 | ARRAY_SIZE(eukrea_mbimxsd_pads))) | 240 | ARRAY_SIZE(eukrea_mbimxsd_pads))) |
242 | printk(KERN_ERR "error setting mbimxsd pads !\n"); | 241 | printk(KERN_ERR "error setting mbimxsd pads !\n"); |
243 | 242 | ||
244 | #if defined(CONFIG_SND_SOC_EUKREA_TLV320) | ||
245 | /* SSI unit master I2S codec connected to SSI_AUD5*/ | ||
246 | mxc_audmux_v2_configure_port(0, | ||
247 | MXC_AUDMUX_V2_PTCR_SYN | | ||
248 | MXC_AUDMUX_V2_PTCR_TFSDIR | | ||
249 | MXC_AUDMUX_V2_PTCR_TFSEL(4) | | ||
250 | MXC_AUDMUX_V2_PTCR_TCLKDIR | | ||
251 | MXC_AUDMUX_V2_PTCR_TCSEL(4), | ||
252 | MXC_AUDMUX_V2_PDCR_RXDSEL(4) | ||
253 | ); | ||
254 | mxc_audmux_v2_configure_port(4, | ||
255 | MXC_AUDMUX_V2_PTCR_SYN, | ||
256 | MXC_AUDMUX_V2_PDCR_RXDSEL(0) | ||
257 | ); | ||
258 | #endif | ||
259 | |||
260 | imx25_add_imx_uart1(&uart_pdata); | 243 | imx25_add_imx_uart1(&uart_pdata); |
261 | imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata); | 244 | imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata); |
262 | imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); | 245 | imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index 0f0af02b3182..fd8bf8a425a7 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <mach/hardware.h> | 38 | #include <mach/hardware.h> |
39 | #include <mach/common.h> | 39 | #include <mach/common.h> |
40 | #include <mach/iomux-mx35.h> | 40 | #include <mach/iomux-mx35.h> |
41 | #include <mach/audmux.h> | ||
42 | 41 | ||
43 | #include "devices-imx35.h" | 42 | #include "devices-imx35.h" |
44 | 43 | ||
@@ -252,22 +251,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void) | |||
252 | ARRAY_SIZE(eukrea_mbimxsd_pads))) | 251 | ARRAY_SIZE(eukrea_mbimxsd_pads))) |
253 | printk(KERN_ERR "error setting mbimxsd pads !\n"); | 252 | printk(KERN_ERR "error setting mbimxsd pads !\n"); |
254 | 253 | ||
255 | #if defined(CONFIG_SND_SOC_EUKREA_TLV320) | ||
256 | /* SSI unit master I2S codec connected to SSI_AUD4 */ | ||
257 | mxc_audmux_v2_configure_port(0, | ||
258 | MXC_AUDMUX_V2_PTCR_SYN | | ||
259 | MXC_AUDMUX_V2_PTCR_TFSDIR | | ||
260 | MXC_AUDMUX_V2_PTCR_TFSEL(3) | | ||
261 | MXC_AUDMUX_V2_PTCR_TCLKDIR | | ||
262 | MXC_AUDMUX_V2_PTCR_TCSEL(3), | ||
263 | MXC_AUDMUX_V2_PDCR_RXDSEL(3) | ||
264 | ); | ||
265 | mxc_audmux_v2_configure_port(3, | ||
266 | MXC_AUDMUX_V2_PTCR_SYN, | ||
267 | MXC_AUDMUX_V2_PDCR_RXDSEL(0) | ||
268 | ); | ||
269 | #endif | ||
270 | |||
271 | imx35_add_imx_uart1(&uart_pdata); | 254 | imx35_add_imx_uart1(&uart_pdata); |
272 | imx35_add_ipu_core(&mx3_ipu_data); | 255 | imx35_add_ipu_core(&mx3_ipu_data); |
273 | imx35_add_mx3_sdc_fb(&mx3fb_pdata); | 256 | imx35_add_mx3_sdc_fb(&mx3fb_pdata); |
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index e6bad17b908c..1e03ef42faa0 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c | |||
@@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { | |||
47 | static int __init imx51_tzic_add_irq_domain(struct device_node *np, | 47 | static int __init imx51_tzic_add_irq_domain(struct device_node *np, |
48 | struct device_node *interrupt_parent) | 48 | struct device_node *interrupt_parent) |
49 | { | 49 | { |
50 | irq_domain_add_simple(np, 0); | 50 | irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL); |
51 | return 0; | 51 | return 0; |
52 | } | 52 | } |
53 | 53 | ||
@@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np, | |||
57 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; | 57 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
58 | 58 | ||
59 | gpio_irq_base -= 32; | 59 | gpio_irq_base -= 32; |
60 | irq_domain_add_simple(np, gpio_irq_base); | 60 | irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL); |
61 | 61 | ||
62 | return 0; | 62 | return 0; |
63 | } | 63 | } |
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index 05ebb3e68679..fd5be0f20fbb 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c | |||
@@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { | |||
51 | static int __init imx53_tzic_add_irq_domain(struct device_node *np, | 51 | static int __init imx53_tzic_add_irq_domain(struct device_node *np, |
52 | struct device_node *interrupt_parent) | 52 | struct device_node *interrupt_parent) |
53 | { | 53 | { |
54 | irq_domain_add_simple(np, 0); | 54 | irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL); |
55 | return 0; | 55 | return 0; |
56 | } | 56 | } |
57 | 57 | ||
@@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np, | |||
61 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; | 61 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
62 | 62 | ||
63 | gpio_irq_base -= 32; | 63 | gpio_irq_base -= 32; |
64 | irq_domain_add_simple(np, gpio_irq_base); | 64 | irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL); |
65 | 65 | ||
66 | return 0; | 66 | return 0; |
67 | } | 67 | } |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index c2766ae02b4f..428459fbca4b 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
@@ -263,6 +263,7 @@ static void __init visstrim_m10_board_init(void) | |||
263 | imx27_add_fec(NULL); | 263 | imx27_add_fec(NULL); |
264 | imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); | 264 | imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); |
265 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 265 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
266 | imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0); | ||
266 | } | 267 | } |
267 | 268 | ||
268 | static void __init visstrim_m10_timer_init(void) | 269 | static void __init visstrim_m10_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index c25728106917..6075d4d62dd6 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -97,7 +97,8 @@ static int __init imx6q_gpio_add_irq_domain(struct device_node *np, | |||
97 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; | 97 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
98 | 98 | ||
99 | gpio_irq_base -= 32; | 99 | gpio_irq_base -= 32; |
100 | irq_domain_add_simple(np, gpio_irq_base); | 100 | irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, |
101 | NULL); | ||
101 | 102 | ||
102 | return 0; | 103 | return 0; |
103 | } | 104 | } |
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index d3b9c6b5edde..541152e450c4 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
37 | #include <mach/iomux-mx27.h> | 37 | #include <mach/iomux-mx27.h> |
38 | #include <asm/mach/time.h> | 38 | #include <asm/mach/time.h> |
39 | #include <mach/audmux.h> | ||
40 | #include <mach/irqs.h> | 39 | #include <mach/irqs.h> |
41 | #include <mach/ulpi.h> | 40 | #include <mach/ulpi.h> |
42 | 41 | ||
@@ -359,18 +358,6 @@ static void __init pca100_init(void) | |||
359 | 358 | ||
360 | imx27_soc_init(); | 359 | imx27_soc_init(); |
361 | 360 | ||
362 | /* SSI unit */ | ||
363 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, | ||
364 | MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ | ||
365 | MXC_AUDMUX_V1_PCR_TFCSEL(3) | | ||
366 | MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */ | ||
367 | MXC_AUDMUX_V1_PCR_RXDSEL(3)); | ||
368 | mxc_audmux_v1_configure_port(3, | ||
369 | MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ | ||
370 | MXC_AUDMUX_V1_PCR_TFCSEL(0) | | ||
371 | MXC_AUDMUX_V1_PCR_TFSDIR | | ||
372 | MXC_AUDMUX_V1_PCR_RXDSEL(0)); | ||
373 | |||
374 | ret = mxc_gpio_setup_multiple_pins(pca100_pins, | 361 | ret = mxc_gpio_setup_multiple_pins(pca100_pins, |
375 | ARRAY_SIZE(pca100_pins), "PCA100"); | 362 | ARRAY_SIZE(pca100_pins), "PCA100"); |
376 | if (ret) | 363 | if (ret) |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index e48854b9d990..5fddf94cc969 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -32,6 +32,8 @@ | |||
32 | #include <linux/usb/ulpi.h> | 32 | #include <linux/usb/ulpi.h> |
33 | #include <linux/gfp.h> | 33 | #include <linux/gfp.h> |
34 | #include <linux/memblock.h> | 34 | #include <linux/memblock.h> |
35 | #include <linux/regulator/machine.h> | ||
36 | #include <linux/regulator/fixed.h> | ||
35 | 37 | ||
36 | #include <media/soc_camera.h> | 38 | #include <media/soc_camera.h> |
37 | 39 | ||
@@ -570,6 +572,11 @@ static int __init pcm037_otg_mode(char *options) | |||
570 | } | 572 | } |
571 | __setup("otg_mode=", pcm037_otg_mode); | 573 | __setup("otg_mode=", pcm037_otg_mode); |
572 | 574 | ||
575 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
576 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
577 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
578 | }; | ||
579 | |||
573 | /* | 580 | /* |
574 | * Board specific initialization. | 581 | * Board specific initialization. |
575 | */ | 582 | */ |
@@ -579,6 +586,8 @@ static void __init pcm037_init(void) | |||
579 | 586 | ||
580 | imx31_soc_init(); | 587 | imx31_soc_init(); |
581 | 588 | ||
589 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
590 | |||
582 | mxc_iomux_set_gpr(MUX_PGP_UH2, 1); | 591 | mxc_iomux_set_gpr(MUX_PGP_UH2, 1); |
583 | 592 | ||
584 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), | 593 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), |
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 06dc106519ae..237474fcca23 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <mach/common.h> | 37 | #include <mach/common.h> |
38 | #include <mach/iomux-mx35.h> | 38 | #include <mach/iomux-mx35.h> |
39 | #include <mach/ulpi.h> | 39 | #include <mach/ulpi.h> |
40 | #include <mach/audmux.h> | ||
41 | 40 | ||
42 | #include "devices-imx35.h" | 41 | #include "devices-imx35.h" |
43 | 42 | ||
@@ -362,18 +361,6 @@ static void __init pcm043_init(void) | |||
362 | 361 | ||
363 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); | 362 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); |
364 | 363 | ||
365 | mxc_audmux_v2_configure_port(3, | ||
366 | MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */ | ||
367 | MXC_AUDMUX_V2_PTCR_TFSEL(0) | | ||
368 | MXC_AUDMUX_V2_PTCR_TFSDIR, | ||
369 | MXC_AUDMUX_V2_PDCR_RXDSEL(0)); | ||
370 | |||
371 | mxc_audmux_v2_configure_port(0, | ||
372 | MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */ | ||
373 | MXC_AUDMUX_V2_PTCR_TCSEL(3) | | ||
374 | MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */ | ||
375 | MXC_AUDMUX_V2_PDCR_RXDSEL(3)); | ||
376 | |||
377 | imx35_add_fec(NULL); | 364 | imx35_add_fec(NULL); |
378 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 365 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
379 | imx35_add_imx2_wdt(NULL); | 366 | imx35_add_imx2_wdt(NULL); |
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 3f05dfebacc9..14d540edfd1e 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -75,6 +75,10 @@ void __init mx21_init_irq(void) | |||
75 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); | 75 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); |
76 | } | 76 | } |
77 | 77 | ||
78 | static const struct resource imx21_audmux_res[] __initconst = { | ||
79 | DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K), | ||
80 | }; | ||
81 | |||
78 | void __init imx21_soc_init(void) | 82 | void __init imx21_soc_init(void) |
79 | { | 83 | { |
80 | mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 84 | mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
@@ -85,4 +89,6 @@ void __init imx21_soc_init(void) | |||
85 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 89 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
86 | 90 | ||
87 | imx_add_imx_dma(); | 91 | imx_add_imx_dma(); |
92 | platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, | ||
93 | ARRAY_SIZE(imx21_audmux_res)); | ||
88 | } | 94 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index cc4d152bd9bd..153b457acdc0 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -83,6 +83,10 @@ static struct sdma_platform_data imx25_sdma_pdata __initdata = { | |||
83 | .script_addrs = &imx25_sdma_script, | 83 | .script_addrs = &imx25_sdma_script, |
84 | }; | 84 | }; |
85 | 85 | ||
86 | static const struct resource imx25_audmux_res[] __initconst = { | ||
87 | DEFINE_RES_MEM(MX25_AUDMUX_BASE_ADDR, SZ_16K), | ||
88 | }; | ||
89 | |||
86 | void __init imx25_soc_init(void) | 90 | void __init imx25_soc_init(void) |
87 | { | 91 | { |
88 | /* i.mx25 has the i.mx31 type gpio */ | 92 | /* i.mx25 has the i.mx31 type gpio */ |
@@ -93,4 +97,7 @@ void __init imx25_soc_init(void) | |||
93 | 97 | ||
94 | /* i.mx25 has the i.mx35 type sdma */ | 98 | /* i.mx25 has the i.mx35 type sdma */ |
95 | imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); | 99 | imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); |
100 | /* i.mx25 has the i.mx31 type audmux */ | ||
101 | platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res, | ||
102 | ARRAY_SIZE(imx25_audmux_res)); | ||
96 | } | 103 | } |
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index 96dd1f5ea7bd..8cb3f5e3e569 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -75,6 +75,10 @@ void __init mx27_init_irq(void) | |||
75 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); | 75 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); |
76 | } | 76 | } |
77 | 77 | ||
78 | static const struct resource imx27_audmux_res[] __initconst = { | ||
79 | DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K), | ||
80 | }; | ||
81 | |||
78 | void __init imx27_soc_init(void) | 82 | void __init imx27_soc_init(void) |
79 | { | 83 | { |
80 | /* i.mx27 has the i.mx21 type gpio */ | 84 | /* i.mx27 has the i.mx21 type gpio */ |
@@ -86,4 +90,7 @@ void __init imx27_soc_init(void) | |||
86 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 90 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
87 | 91 | ||
88 | imx_add_imx_dma(); | 92 | imx_add_imx_dma(); |
93 | /* imx27 has the imx21 type audmux */ | ||
94 | platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, | ||
95 | ARRAY_SIZE(imx27_audmux_res)); | ||
89 | } | 96 | } |
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7b..9c9b7f9f43dc 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -34,31 +34,29 @@ static void imx3_idle(void) | |||
34 | { | 34 | { |
35 | unsigned long reg = 0; | 35 | unsigned long reg = 0; |
36 | 36 | ||
37 | if (!need_resched()) | 37 | __asm__ __volatile__( |
38 | __asm__ __volatile__( | 38 | /* disable I and D cache */ |
39 | /* disable I and D cache */ | 39 | "mrc p15, 0, %0, c1, c0, 0\n" |
40 | "mrc p15, 0, %0, c1, c0, 0\n" | 40 | "bic %0, %0, #0x00001000\n" |
41 | "bic %0, %0, #0x00001000\n" | 41 | "bic %0, %0, #0x00000004\n" |
42 | "bic %0, %0, #0x00000004\n" | 42 | "mcr p15, 0, %0, c1, c0, 0\n" |
43 | "mcr p15, 0, %0, c1, c0, 0\n" | 43 | /* invalidate I cache */ |
44 | /* invalidate I cache */ | 44 | "mov %0, #0\n" |
45 | "mov %0, #0\n" | 45 | "mcr p15, 0, %0, c7, c5, 0\n" |
46 | "mcr p15, 0, %0, c7, c5, 0\n" | 46 | /* clear and invalidate D cache */ |
47 | /* clear and invalidate D cache */ | 47 | "mov %0, #0\n" |
48 | "mov %0, #0\n" | 48 | "mcr p15, 0, %0, c7, c14, 0\n" |
49 | "mcr p15, 0, %0, c7, c14, 0\n" | 49 | /* WFI */ |
50 | /* WFI */ | 50 | "mov %0, #0\n" |
51 | "mov %0, #0\n" | 51 | "mcr p15, 0, %0, c7, c0, 4\n" |
52 | "mcr p15, 0, %0, c7, c0, 4\n" | 52 | "nop\n" "nop\n" "nop\n" "nop\n" |
53 | "nop\n" "nop\n" "nop\n" "nop\n" | 53 | "nop\n" "nop\n" "nop\n" |
54 | "nop\n" "nop\n" "nop\n" | 54 | /* enable I and D cache */ |
55 | /* enable I and D cache */ | 55 | "mrc p15, 0, %0, c1, c0, 0\n" |
56 | "mrc p15, 0, %0, c1, c0, 0\n" | 56 | "orr %0, %0, #0x00001000\n" |
57 | "orr %0, %0, #0x00001000\n" | 57 | "orr %0, %0, #0x00000004\n" |
58 | "orr %0, %0, #0x00000004\n" | 58 | "mcr p15, 0, %0, c1, c0, 0\n" |
59 | "mcr p15, 0, %0, c1, c0, 0\n" | 59 | : "=r" (reg)); |
60 | : "=r" (reg)); | ||
61 | local_irq_enable(); | ||
62 | } | 60 | } |
63 | 61 | ||
64 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, | 62 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, |
@@ -134,8 +132,8 @@ void __init imx31_init_early(void) | |||
134 | { | 132 | { |
135 | mxc_set_cpu_type(MXC_CPU_MX31); | 133 | mxc_set_cpu_type(MXC_CPU_MX31); |
136 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 134 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
137 | pm_idle = imx3_idle; | ||
138 | imx_ioremap = imx3_ioremap; | 135 | imx_ioremap = imx3_ioremap; |
136 | arm_pm_idle = imx3_idle; | ||
139 | } | 137 | } |
140 | 138 | ||
141 | void __init mx31_init_irq(void) | 139 | void __init mx31_init_irq(void) |
@@ -158,6 +156,10 @@ static struct sdma_platform_data imx31_sdma_pdata __initdata = { | |||
158 | .script_addrs = &imx31_to2_sdma_script, | 156 | .script_addrs = &imx31_to2_sdma_script, |
159 | }; | 157 | }; |
160 | 158 | ||
159 | static const struct resource imx31_audmux_res[] __initconst = { | ||
160 | DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), | ||
161 | }; | ||
162 | |||
161 | void __init imx31_soc_init(void) | 163 | void __init imx31_soc_init(void) |
162 | { | 164 | { |
163 | int to_version = mx31_revision() >> 4; | 165 | int to_version = mx31_revision() >> 4; |
@@ -175,6 +177,8 @@ void __init imx31_soc_init(void) | |||
175 | } | 177 | } |
176 | 178 | ||
177 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); | 179 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); |
180 | platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res, | ||
181 | ARRAY_SIZE(imx31_audmux_res)); | ||
178 | } | 182 | } |
179 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 183 | #endif /* ifdef CONFIG_SOC_IMX31 */ |
180 | 184 | ||
@@ -197,7 +201,7 @@ void __init imx35_init_early(void) | |||
197 | mxc_set_cpu_type(MXC_CPU_MX35); | 201 | mxc_set_cpu_type(MXC_CPU_MX35); |
198 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | 202 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); |
199 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | 203 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); |
200 | pm_idle = imx3_idle; | 204 | arm_pm_idle = imx3_idle; |
201 | imx_ioremap = imx3_ioremap; | 205 | imx_ioremap = imx3_ioremap; |
202 | } | 206 | } |
203 | 207 | ||
@@ -241,6 +245,10 @@ static struct sdma_platform_data imx35_sdma_pdata __initdata = { | |||
241 | .script_addrs = &imx35_to2_sdma_script, | 245 | .script_addrs = &imx35_to2_sdma_script, |
242 | }; | 246 | }; |
243 | 247 | ||
248 | static const struct resource imx35_audmux_res[] __initconst = { | ||
249 | DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K), | ||
250 | }; | ||
251 | |||
244 | void __init imx35_soc_init(void) | 252 | void __init imx35_soc_init(void) |
245 | { | 253 | { |
246 | int to_version = mx35_revision() >> 4; | 254 | int to_version = mx35_revision() >> 4; |
@@ -259,5 +267,8 @@ void __init imx35_soc_init(void) | |||
259 | } | 267 | } |
260 | 268 | ||
261 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); | 269 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); |
270 | /* i.mx35 has the i.mx31 type audmux */ | ||
271 | platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res, | ||
272 | ARRAY_SIZE(imx35_audmux_res)); | ||
262 | } | 273 | } |
263 | #endif /* ifdef CONFIG_SOC_IMX35 */ | 274 | #endif /* ifdef CONFIG_SOC_IMX35 */ |
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index bc17dfea3817..dc7c4ed81531 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c | |||
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk; | |||
26 | 26 | ||
27 | static void imx5_idle(void) | 27 | static void imx5_idle(void) |
28 | { | 28 | { |
29 | if (!need_resched()) { | 29 | /* gpc clock is needed for SRPG */ |
30 | /* gpc clock is needed for SRPG */ | 30 | if (gpc_dvfs_clk == NULL) { |
31 | if (gpc_dvfs_clk == NULL) { | 31 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); |
32 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | 32 | if (IS_ERR(gpc_dvfs_clk)) |
33 | if (IS_ERR(gpc_dvfs_clk)) | 33 | return; |
34 | goto err0; | ||
35 | } | ||
36 | clk_enable(gpc_dvfs_clk); | ||
37 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
38 | if (tzic_enable_wake()) | ||
39 | goto err1; | ||
40 | cpu_do_idle(); | ||
41 | err1: | ||
42 | clk_disable(gpc_dvfs_clk); | ||
43 | } | 34 | } |
44 | err0: | 35 | clk_enable(gpc_dvfs_clk); |
45 | local_irq_enable(); | 36 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); |
37 | if (tzic_enable_wake() != 0) | ||
38 | cpu_do_idle(); | ||
39 | clk_disable(gpc_dvfs_clk); | ||
46 | } | 40 | } |
47 | 41 | ||
48 | /* | 42 | /* |
@@ -108,7 +102,7 @@ void __init imx51_init_early(void) | |||
108 | mxc_set_cpu_type(MXC_CPU_MX51); | 102 | mxc_set_cpu_type(MXC_CPU_MX51); |
109 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); | 103 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); |
110 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); | 104 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); |
111 | pm_idle = imx5_idle; | 105 | arm_pm_idle = imx5_idle; |
112 | } | 106 | } |
113 | 107 | ||
114 | void __init imx53_init_early(void) | 108 | void __init imx53_init_early(void) |
@@ -170,6 +164,18 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = { | |||
170 | .script_addrs = &imx53_sdma_script, | 164 | .script_addrs = &imx53_sdma_script, |
171 | }; | 165 | }; |
172 | 166 | ||
167 | static const struct resource imx50_audmux_res[] __initconst = { | ||
168 | DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K), | ||
169 | }; | ||
170 | |||
171 | static const struct resource imx51_audmux_res[] __initconst = { | ||
172 | DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K), | ||
173 | }; | ||
174 | |||
175 | static const struct resource imx53_audmux_res[] __initconst = { | ||
176 | DEFINE_RES_MEM(MX53_AUDMUX_BASE_ADDR, SZ_16K), | ||
177 | }; | ||
178 | |||
173 | void __init imx50_soc_init(void) | 179 | void __init imx50_soc_init(void) |
174 | { | 180 | { |
175 | /* i.mx50 has the i.mx31 type gpio */ | 181 | /* i.mx50 has the i.mx31 type gpio */ |
@@ -179,6 +185,10 @@ void __init imx50_soc_init(void) | |||
179 | mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); | 185 | mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); |
180 | mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); | 186 | mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); |
181 | mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); | 187 | mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); |
188 | |||
189 | /* i.mx50 has the i.mx31 type audmux */ | ||
190 | platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res, | ||
191 | ARRAY_SIZE(imx50_audmux_res)); | ||
182 | } | 192 | } |
183 | 193 | ||
184 | void __init imx51_soc_init(void) | 194 | void __init imx51_soc_init(void) |
@@ -191,6 +201,9 @@ void __init imx51_soc_init(void) | |||
191 | 201 | ||
192 | /* i.mx51 has the i.mx35 type sdma */ | 202 | /* i.mx51 has the i.mx35 type sdma */ |
193 | imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); | 203 | imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); |
204 | /* i.mx51 has the i.mx31 type audmux */ | ||
205 | platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res, | ||
206 | ARRAY_SIZE(imx51_audmux_res)); | ||
194 | } | 207 | } |
195 | 208 | ||
196 | void __init imx53_soc_init(void) | 209 | void __init imx53_soc_init(void) |
@@ -206,4 +219,7 @@ void __init imx53_soc_init(void) | |||
206 | 219 | ||
207 | /* i.mx53 has the i.mx35 type sdma */ | 220 | /* i.mx53 has the i.mx35 type sdma */ |
208 | imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); | 221 | imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); |
222 | /* i.mx53 has the i.mx31 type audmux */ | ||
223 | platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res, | ||
224 | ARRAY_SIZE(imx53_audmux_res)); | ||
209 | } | 225 | } |
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c index 0aa25364360d..cc285e507286 100644 --- a/arch/arm/mach-imx/mx31moboard-devboard.c +++ b/arch/arm/mach-imx/mx31moboard-devboard.c | |||
@@ -158,7 +158,7 @@ static int devboard_usbh1_hw_init(struct platform_device *pdev) | |||
158 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) | 158 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) |
159 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) | 159 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) |
160 | 160 | ||
161 | static int devboard_isp1105_init(struct otg_transceiver *otg) | 161 | static int devboard_isp1105_init(struct usb_phy *otg) |
162 | { | 162 | { |
163 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); | 163 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); |
164 | if (ret) | 164 | if (ret) |
@@ -177,7 +177,7 @@ static int devboard_isp1105_init(struct otg_transceiver *otg) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | 179 | ||
180 | static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on) | 180 | static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on) |
181 | { | 181 | { |
182 | if (on) | 182 | if (on) |
183 | gpio_set_value(USBH1_VBUSEN_B, 0); | 183 | gpio_set_value(USBH1_VBUSEN_B, 0); |
@@ -194,18 +194,24 @@ static struct mxc_usbh_platform_data usbh1_pdata __initdata = { | |||
194 | 194 | ||
195 | static int __init devboard_usbh1_init(void) | 195 | static int __init devboard_usbh1_init(void) |
196 | { | 196 | { |
197 | struct otg_transceiver *otg; | 197 | struct usb_phy *phy; |
198 | struct platform_device *pdev; | 198 | struct platform_device *pdev; |
199 | 199 | ||
200 | otg = kzalloc(sizeof(*otg), GFP_KERNEL); | 200 | phy = kzalloc(sizeof(*phy), GFP_KERNEL); |
201 | if (!otg) | 201 | if (!phy) |
202 | return -ENOMEM; | 202 | return -ENOMEM; |
203 | 203 | ||
204 | otg->label = "ISP1105"; | 204 | phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); |
205 | otg->init = devboard_isp1105_init; | 205 | if (!phy->otg) { |
206 | otg->set_vbus = devboard_isp1105_set_vbus; | 206 | kfree(phy); |
207 | return -ENOMEM; | ||
208 | } | ||
209 | |||
210 | phy->label = "ISP1105"; | ||
211 | phy->init = devboard_isp1105_init; | ||
212 | phy->otg->set_vbus = devboard_isp1105_set_vbus; | ||
207 | 213 | ||
208 | usbh1_pdata.otg = otg; | 214 | usbh1_pdata.otg = phy; |
209 | 215 | ||
210 | pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); | 216 | pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); |
211 | if (IS_ERR(pdev)) | 217 | if (IS_ERR(pdev)) |
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c index bb639cbda4e5..135c90e3a45f 100644 --- a/arch/arm/mach-imx/mx31moboard-marxbot.c +++ b/arch/arm/mach-imx/mx31moboard-marxbot.c | |||
@@ -272,7 +272,7 @@ static int marxbot_usbh1_hw_init(struct platform_device *pdev) | |||
272 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) | 272 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) |
273 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) | 273 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) |
274 | 274 | ||
275 | static int marxbot_isp1105_init(struct otg_transceiver *otg) | 275 | static int marxbot_isp1105_init(struct usb_phy *otg) |
276 | { | 276 | { |
277 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); | 277 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); |
278 | if (ret) | 278 | if (ret) |
@@ -291,7 +291,7 @@ static int marxbot_isp1105_init(struct otg_transceiver *otg) | |||
291 | } | 291 | } |
292 | 292 | ||
293 | 293 | ||
294 | static int marxbot_isp1105_set_vbus(struct otg_transceiver *otg, bool on) | 294 | static int marxbot_isp1105_set_vbus(struct usb_otg *otg, bool on) |
295 | { | 295 | { |
296 | if (on) | 296 | if (on) |
297 | gpio_set_value(USBH1_VBUSEN_B, 0); | 297 | gpio_set_value(USBH1_VBUSEN_B, 0); |
@@ -308,18 +308,24 @@ static struct mxc_usbh_platform_data usbh1_pdata __initdata = { | |||
308 | 308 | ||
309 | static int __init marxbot_usbh1_init(void) | 309 | static int __init marxbot_usbh1_init(void) |
310 | { | 310 | { |
311 | struct otg_transceiver *otg; | 311 | struct usb_phy *phy; |
312 | struct platform_device *pdev; | 312 | struct platform_device *pdev; |
313 | 313 | ||
314 | otg = kzalloc(sizeof(*otg), GFP_KERNEL); | 314 | phy = kzalloc(sizeof(*phy), GFP_KERNEL); |
315 | if (!otg) | 315 | if (!phy) |
316 | return -ENOMEM; | 316 | return -ENOMEM; |
317 | 317 | ||
318 | otg->label = "ISP1105"; | 318 | phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); |
319 | otg->init = marxbot_isp1105_init; | 319 | if (!phy->otg) { |
320 | otg->set_vbus = marxbot_isp1105_set_vbus; | 320 | kfree(phy); |
321 | return -ENOMEM; | ||
322 | } | ||
323 | |||
324 | phy->label = "ISP1105"; | ||
325 | phy->init = marxbot_isp1105_init; | ||
326 | phy->otg->set_vbus = marxbot_isp1105_set_vbus; | ||
321 | 327 | ||
322 | usbh1_pdata.otg = otg; | 328 | usbh1_pdata.otg = phy; |
323 | 329 | ||
324 | pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); | 330 | pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); |
325 | if (IS_ERR(pdev)) | 331 | if (IS_ERR(pdev)) |
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index e455d2f855bf..6fcffa7db978 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c | |||
@@ -10,7 +10,6 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/suspend.h> | 11 | #include <linux/suspend.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <mach/system.h> | ||
14 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
15 | 14 | ||
16 | static int mx27_suspend_enter(suspend_state_t state) | 15 | static int mx27_suspend_enter(suspend_state_t state) |
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) | |||
23 | cscr &= 0xFFFFFFFC; | 22 | cscr &= 0xFFFFFFFC; |
24 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); | 23 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); |
25 | /* Executes WFI */ | 24 | /* Executes WFI */ |
26 | arch_idle(); | 25 | cpu_do_idle(); |
27 | break; | 26 | break; |
28 | 27 | ||
29 | default: | 28 | default: |
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 019f0ab08f66..15b87f26ac96 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -35,67 +35,23 @@ | |||
35 | 35 | ||
36 | static struct amba_pl010_data integrator_uart_data; | 36 | static struct amba_pl010_data integrator_uart_data; |
37 | 37 | ||
38 | static struct amba_device rtc_device = { | 38 | #define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } |
39 | .dev = { | 39 | #define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } |
40 | .init_name = "mb:15", | 40 | #define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } |
41 | }, | 41 | #define KMI0_IRQ { IRQ_KMIINT0 } |
42 | .res = { | 42 | #define KMI1_IRQ { IRQ_KMIINT1 } |
43 | .start = INTEGRATOR_RTC_BASE, | ||
44 | .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, | ||
47 | .irq = { IRQ_RTCINT, NO_IRQ }, | ||
48 | }; | ||
49 | 43 | ||
50 | static struct amba_device uart0_device = { | 44 | static AMBA_APB_DEVICE(rtc, "mb:15", 0, |
51 | .dev = { | 45 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); |
52 | .init_name = "mb:16", | ||
53 | .platform_data = &integrator_uart_data, | ||
54 | }, | ||
55 | .res = { | ||
56 | .start = INTEGRATOR_UART0_BASE, | ||
57 | .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, | ||
58 | .flags = IORESOURCE_MEM, | ||
59 | }, | ||
60 | .irq = { IRQ_UARTINT0, NO_IRQ }, | ||
61 | }; | ||
62 | 46 | ||
63 | static struct amba_device uart1_device = { | 47 | static AMBA_APB_DEVICE(uart0, "mb:16", 0, |
64 | .dev = { | 48 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); |
65 | .init_name = "mb:17", | ||
66 | .platform_data = &integrator_uart_data, | ||
67 | }, | ||
68 | .res = { | ||
69 | .start = INTEGRATOR_UART1_BASE, | ||
70 | .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, | ||
71 | .flags = IORESOURCE_MEM, | ||
72 | }, | ||
73 | .irq = { IRQ_UARTINT1, NO_IRQ }, | ||
74 | }; | ||
75 | 49 | ||
76 | static struct amba_device kmi0_device = { | 50 | static AMBA_APB_DEVICE(uart1, "mb:17", 0, |
77 | .dev = { | 51 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); |
78 | .init_name = "mb:18", | ||
79 | }, | ||
80 | .res = { | ||
81 | .start = KMI0_BASE, | ||
82 | .end = KMI0_BASE + SZ_4K - 1, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | }, | ||
85 | .irq = { IRQ_KMIINT0, NO_IRQ }, | ||
86 | }; | ||
87 | 52 | ||
88 | static struct amba_device kmi1_device = { | 53 | static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); |
89 | .dev = { | 54 | static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); |
90 | .init_name = "mb:19", | ||
91 | }, | ||
92 | .res = { | ||
93 | .start = KMI1_BASE, | ||
94 | .end = KMI1_BASE + SZ_4K - 1, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | .irq = { IRQ_KMIINT1, NO_IRQ }, | ||
98 | }; | ||
99 | 55 | ||
100 | static struct amba_device *amba_devs[] __initdata = { | 56 | static struct amba_device *amba_devs[] __initdata = { |
101 | &rtc_device, | 57 | &rtc_device, |
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 8cbb75a96bd4..3e538da6cb1f 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c | |||
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev) | |||
401 | 401 | ||
402 | pc_base = dev->resource.start + idev->offset; | 402 | pc_base = dev->resource.start + idev->offset; |
403 | 403 | ||
404 | d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); | 404 | d = amba_device_alloc(NULL, pc_base, SZ_4K); |
405 | if (!d) | 405 | if (!d) |
406 | continue; | 406 | continue; |
407 | 407 | ||
408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); | 408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); |
409 | d->dev.parent = &dev->dev; | 409 | d->dev.parent = &dev->dev; |
410 | d->res.start = dev->resource.start + idev->offset; | ||
411 | d->res.end = d->res.start + SZ_4K - 1; | ||
412 | d->res.flags = IORESOURCE_MEM; | ||
413 | d->irq[0] = dev->irq; | 410 | d->irq[0] = dev->irq; |
414 | d->irq[1] = dev->irq; | 411 | d->irq[1] = dev->irq; |
415 | d->periphid = idev->id; | 412 | d->periphid = idev->id; |
416 | d->dev.platform_data = idev->platform_data; | 413 | d->dev.platform_data = idev->platform_data; |
417 | 414 | ||
418 | ret = amba_device_register(d, &dev->resource); | 415 | ret = amba_device_add(d, &dev->resource); |
419 | if (ret) { | 416 | if (ret) { |
420 | dev_err(&d->dev, "unable to register device: %d\n", ret); | 417 | dev_err(&d->dev, "unable to register device: %d\n", ret); |
421 | kfree(d); | 418 | amba_device_put(d); |
422 | } | 419 | } |
423 | } | 420 | } |
424 | 421 | ||
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S index 3d029c9f3ef6..5cc7b85ad9df 100644 --- a/arch/arm/mach-integrator/include/mach/entry-macro.S +++ b/arch/arm/mach-integrator/include/mach/entry-macro.S | |||
@@ -11,15 +11,9 @@ | |||
11 | #include <mach/platform.h> | 11 | #include <mach/platform.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | /* FIXME: should not be using soo many LDRs here */ | 18 | /* FIXME: should not be using soo many LDRs here */ |
25 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) | 19 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) |
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h deleted file mode 100644 index 901514eba4a6..000000000000 --- a/arch/arm/mach-integrator/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-integrator/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a8b6aa6003f3..be9ead4a3bcc 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = { | |||
347 | .gpio_cd = -1, | 347 | .gpio_cd = -1, |
348 | }; | 348 | }; |
349 | 349 | ||
350 | static struct amba_device mmc_device = { | 350 | #define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } |
351 | .dev = { | 351 | #define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } |
352 | .init_name = "mb:1c", | ||
353 | .platform_data = &mmc_data, | ||
354 | }, | ||
355 | .res = { | ||
356 | .start = INTEGRATOR_CP_MMC_BASE, | ||
357 | .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, | ||
358 | .flags = IORESOURCE_MEM, | ||
359 | }, | ||
360 | .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, | ||
361 | .periphid = 0, | ||
362 | }; | ||
363 | 352 | ||
364 | static struct amba_device aaci_device = { | 353 | static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, |
365 | .dev = { | 354 | INTEGRATOR_CP_MMC_IRQS, &mmc_data); |
366 | .init_name = "mb:1d", | 355 | |
367 | }, | 356 | static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, |
368 | .res = { | 357 | INTEGRATOR_CP_AACI_IRQS, NULL); |
369 | .start = INTEGRATOR_CP_AACI_BASE, | ||
370 | .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, | ||
371 | .flags = IORESOURCE_MEM, | ||
372 | }, | ||
373 | .irq = { IRQ_CP_AACIINT, NO_IRQ }, | ||
374 | .periphid = 0, | ||
375 | }; | ||
376 | 358 | ||
377 | 359 | ||
378 | /* | 360 | /* |
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = { | |||
425 | .remove = versatile_clcd_remove_dma, | 407 | .remove = versatile_clcd_remove_dma, |
426 | }; | 408 | }; |
427 | 409 | ||
428 | static struct amba_device clcd_device = { | 410 | static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, |
429 | .dev = { | 411 | { IRQ_CP_CLCDCINT }, &clcd_data); |
430 | .init_name = "mb:c0", | ||
431 | .coherent_dma_mask = ~0, | ||
432 | .platform_data = &clcd_data, | ||
433 | }, | ||
434 | .res = { | ||
435 | .start = INTCP_PA_CLCD_BASE, | ||
436 | .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, | ||
437 | .flags = IORESOURCE_MEM, | ||
438 | }, | ||
439 | .dma_mask = ~0, | ||
440 | .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, | ||
441 | .periphid = 0, | ||
442 | }; | ||
443 | 412 | ||
444 | static struct amba_device *amba_devs[] __initdata = { | 413 | static struct amba_device *amba_devs[] __initdata = { |
445 | &mmc_device, | 414 | &mmc_device, |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 3c82566acece..015be770c1d8 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -378,9 +378,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys) | |||
378 | * the mem resource for this bus | 378 | * the mem resource for this bus |
379 | * the prefetch mem resource for this bus | 379 | * the prefetch mem resource for this bus |
380 | */ | 380 | */ |
381 | pci_add_resource(&sys->resources, &ioport_resource); | 381 | pci_add_resource_offset(&sys->resources, |
382 | pci_add_resource(&sys->resources, &non_mem); | 382 | &ioport_resource, sys->io_offset); |
383 | pci_add_resource(&sys->resources, &pre_mem); | 383 | pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset); |
384 | pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset); | ||
384 | 385 | ||
385 | return 1; | 386 | return 1; |
386 | } | 387 | } |
diff --git a/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/arch/arm/mach-iop13xx/include/mach/entry-macro.S index a624a7870c64..1a2d603488d8 100644 --- a/arch/arm/mach-iop13xx/include/mach/entry-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/entry-macro.S | |||
@@ -16,9 +16,6 @@ | |||
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | 16 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
17 | * | 17 | * |
18 | */ | 18 | */ |
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
23 | mrc p15, 0, \tmp, c15, c1, 0 | 20 | mrc p15, 0, \tmp, c15, c1, 0 |
24 | orr \tmp, \tmp, #(1 << 6) | 21 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h deleted file mode 100644 index 1f31ed3f8ae2..000000000000 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop13xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Intel Corp. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index b8f5a8736511..861cb12ef436 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
@@ -1084,8 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1084 | request_resource(&ioport_resource, &res[0]); | 1084 | request_resource(&ioport_resource, &res[0]); |
1085 | request_resource(&iomem_resource, &res[1]); | 1085 | request_resource(&iomem_resource, &res[1]); |
1086 | 1086 | ||
1087 | pci_add_resource(&sys->resources, &res[0]); | 1087 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); |
1088 | pci_add_resource(&sys->resources, &res[1]); | 1088 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); |
1089 | 1089 | ||
1090 | return 1; | 1090 | return 1; |
1091 | } | 1091 | } |
diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S index b02fb56bafcc..ea13ae02d9b1 100644 --- a/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop32x.h> | 10 | #include <mach/iop32x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h deleted file mode 100644 index 4a88727bca98..000000000000 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop32x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop33x/include/mach/entry-macro.S b/arch/arm/mach-iop33x/include/mach/entry-macro.S index 4e1f7282b354..0a398fe1fba4 100644 --- a/arch/arm/mach-iop33x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop33x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop33x.h> | 10 | #include <mach/iop33x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h deleted file mode 100644 index 4f98e765397c..000000000000 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop33x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S index 5850ffc8c751..c4444dff9202 100644 --- a/arch/arm/mach-ixp2000/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/irqs.h> | 10 | #include <mach/irqs.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 16 | ||
23 | mov \irqnr, #0x0 @clear out irqnr as default | 17 | mov \irqnr, #0x0 @clear out irqnr as default |
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h deleted file mode 100644 index a7fb08b2b8e7..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp2000/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corp. | ||
5 | * Copyricht (C) 2003-2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index f53e911ec94a..d519944653ad 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c | |||
@@ -134,11 +134,11 @@ static void ixdp2400_pci_postinit(void) | |||
134 | 134 | ||
135 | if (ixdp2x00_master_npu()) { | 135 | if (ixdp2x00_master_npu()) { |
136 | dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN); | 136 | dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN); |
137 | pci_remove_bus_device(dev); | 137 | pci_stop_and_remove_bus_device(dev); |
138 | pci_dev_put(dev); | 138 | pci_dev_put(dev); |
139 | } else { | 139 | } else { |
140 | dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN); | 140 | dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN); |
141 | pci_remove_bus_device(dev); | 141 | pci_stop_and_remove_bus_device(dev); |
142 | pci_dev_put(dev); | 142 | pci_dev_put(dev); |
143 | 143 | ||
144 | ixdp2x00_slave_pci_postinit(); | 144 | ixdp2x00_slave_pci_postinit(); |
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index a2e7c393e74f..b415febd2025 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c | |||
@@ -262,14 +262,14 @@ int __init ixdp2800_pci_init(void) | |||
262 | pci_common_init(&ixdp2800_pci); | 262 | pci_common_init(&ixdp2800_pci); |
263 | if (ixdp2x00_master_npu()) { | 263 | if (ixdp2x00_master_npu()) { |
264 | dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN); | 264 | dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN); |
265 | pci_remove_bus_device(dev); | 265 | pci_stop_and_remove_bus_device(dev); |
266 | pci_dev_put(dev); | 266 | pci_dev_put(dev); |
267 | 267 | ||
268 | ixdp2800_master_enable_slave(); | 268 | ixdp2800_master_enable_slave(); |
269 | ixdp2800_master_wait_for_slave_bus_scan(); | 269 | ixdp2800_master_wait_for_slave_bus_scan(); |
270 | } else { | 270 | } else { |
271 | dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN); | 271 | dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN); |
272 | pci_remove_bus_device(dev); | 272 | pci_stop_and_remove_bus_device(dev); |
273 | pci_dev_put(dev); | 273 | pci_dev_put(dev); |
274 | } | 274 | } |
275 | } | 275 | } |
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 634b6c852f68..dd9838299068 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c | |||
@@ -239,12 +239,12 @@ void ixdp2x00_slave_pci_postinit(void) | |||
239 | * Remove PMC device is there is one | 239 | * Remove PMC device is there is one |
240 | */ | 240 | */ |
241 | if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) { | 241 | if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) { |
242 | pci_remove_bus_device(dev); | 242 | pci_stop_and_remove_bus_device(dev); |
243 | pci_dev_put(dev); | 243 | pci_dev_put(dev); |
244 | } | 244 | } |
245 | 245 | ||
246 | dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN); | 246 | dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN); |
247 | pci_remove_bus_device(dev); | 247 | pci_stop_and_remove_bus_device(dev); |
248 | pci_dev_put(dev); | 248 | pci_dev_put(dev); |
249 | } | 249 | } |
250 | 250 | ||
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c index 626fda435aa9..49c36f3cd602 100644 --- a/arch/arm/mach-ixp2000/pci.c +++ b/arch/arm/mach-ixp2000/pci.c | |||
@@ -243,8 +243,10 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys) | |||
243 | if (nr >= 1) | 243 | if (nr >= 1) |
244 | return 0; | 244 | return 0; |
245 | 245 | ||
246 | pci_add_resource(&sys->resources, &ixp2000_pci_io_space); | 246 | pci_add_resource_offset(&sys->resources, |
247 | pci_add_resource(&sys->resources, &ixp2000_pci_mem_space); | 247 | &ixp2000_pci_io_space, sys->io_offset); |
248 | pci_add_resource_offset(&sys->resources, | ||
249 | &ixp2000_pci_mem_space, sys->mem_offset); | ||
248 | 250 | ||
249 | return 1; | 251 | return 1; |
250 | } | 252 | } |
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 0923bb905cc0..7c1495e4fe7a 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = { | |||
441 | 441 | ||
442 | void __init ixp23xx_sys_init(void) | 442 | void __init ixp23xx_sys_init(void) |
443 | { | 443 | { |
444 | /* by default, the idle code is disabled */ | ||
445 | disable_hlt(); | ||
446 | |||
444 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; | 447 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; |
445 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); | 448 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); |
446 | } | 449 | } |
diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S index 3f5338a7bbdd..3fd2cb984e42 100644 --- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S | |||
@@ -2,15 +2,9 @@ | |||
2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S | 2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S |
3 | */ | 3 | */ |
4 | 4 | ||
5 | .macro disable_fiq | ||
6 | .endm | ||
7 | |||
8 | .macro get_irqnr_preamble, base, tmp | 5 | .macro get_irqnr_preamble, base, tmp |
9 | .endm | 6 | .endm |
10 | 7 | ||
11 | .macro arch_ret_to_user, tmp1, tmp2 | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 8 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
15 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) | 9 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) |
16 | ldr \irqnr, [\irqnr] @ get interrupt number | 10 | ldr \irqnr, [\irqnr] @ get interrupt number |
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h deleted file mode 100644 index 277dda7334b9..000000000000 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp23xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | #if 0 | ||
13 | if (!hlt_counter) | ||
14 | cpu_do_idle(); | ||
15 | #endif | ||
16 | } | ||
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c index 25b5c462cea2..3cbbd3208fa8 100644 --- a/arch/arm/mach-ixp23xx/pci.c +++ b/arch/arm/mach-ixp23xx/pci.c | |||
@@ -281,8 +281,10 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
281 | if (nr >= 1) | 281 | if (nr >= 1) |
282 | return 0; | 282 | return 0; |
283 | 283 | ||
284 | pci_add_resource(&sys->resources, &ixp23xx_pci_io_space); | 284 | pci_add_resource_offset(&sys->resources, |
285 | pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space); | 285 | &ixp23xx_pci_io_space, sys->io_offset); |
286 | pci_add_resource_offset(&sys->resources, | ||
287 | &ixp23xx_pci_mem_space, sys->mem_offset); | ||
286 | 288 | ||
287 | return 1; | 289 | return 1; |
288 | } | 290 | } |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 5eff15f24bc2..8508882b13f0 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -472,8 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) | |||
472 | request_resource(&ioport_resource, &res[0]); | 472 | request_resource(&ioport_resource, &res[0]); |
473 | request_resource(&iomem_resource, &res[1]); | 473 | request_resource(&iomem_resource, &res[1]); |
474 | 474 | ||
475 | pci_add_resource(&sys->resources, &res[0]); | 475 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); |
476 | pci_add_resource(&sys->resources, &res[1]); | 476 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); |
477 | 477 | ||
478 | platform_notify = ixp4xx_pci_platform_notify; | 478 | platform_notify = ixp4xx_pci_platform_notify; |
479 | platform_notify_remove = ixp4xx_pci_platform_notify_remove; | 479 | platform_notify_remove = ixp4xx_pci_platform_notify_remove; |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 3841ab4146ba..a6329a0a8ec4 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void) | |||
236 | { | 236 | { |
237 | int i = 0; | 237 | int i = 0; |
238 | 238 | ||
239 | /* | ||
240 | * ixp4xx does not implement the XScale PWRMODE register | ||
241 | * so it must not call cpu_do_idle(). | ||
242 | */ | ||
243 | disable_hlt(); | ||
244 | |||
239 | /* Route all sources to IRQ instead of FIQ */ | 245 | /* Route all sources to IRQ instead of FIQ */ |
240 | *IXP4XX_ICLR = 0x0; | 246 | *IXP4XX_ICLR = 0x0; |
241 | 247 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S index f2e14e94ed15..79adf83e2c3d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) | 16 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) |
23 | ldr \irqstat, [\irqstat] @ get interrupts | 17 | ldr \irqstat, [\irqstat] @ get interrupts |
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h deleted file mode 100644 index 140a9bef4466..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp4xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* ixp4xx does not implement the XScale PWRMODE register, | ||
14 | * so it must not call cpu_do_idle() here. | ||
15 | */ | ||
16 | #if 0 | ||
17 | cpu_do_idle(); | ||
18 | #endif | ||
19 | } | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 8939d36f893c..82db29f7af8f 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h deleted file mode 100644 index 5fddde002b5e..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 01f8c8992880..7e99c3f340fc 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c | |||
@@ -83,6 +83,11 @@ static struct i2c_board_info i2c_board_info[] __initdata = { | |||
83 | }, | 83 | }, |
84 | }; | 84 | }; |
85 | 85 | ||
86 | static struct platform_device openrd_client_audio_device = { | ||
87 | .name = "openrd-client-audio", | ||
88 | .id = -1, | ||
89 | }; | ||
90 | |||
86 | static int __initdata uart1; | 91 | static int __initdata uart1; |
87 | 92 | ||
88 | static int __init sd_uart_selection(char *str) | 93 | static int __init sd_uart_selection(char *str) |
@@ -172,6 +177,7 @@ static void __init openrd_init(void) | |||
172 | kirkwood_i2c_init(); | 177 | kirkwood_i2c_init(); |
173 | 178 | ||
174 | if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { | 179 | if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { |
180 | platform_device_register(&openrd_client_audio_device); | ||
175 | i2c_register_board_info(0, i2c_board_info, | 181 | i2c_register_board_info(0, i2c_board_info, |
176 | ARRAY_SIZE(i2c_board_info)); | 182 | ARRAY_SIZE(i2c_board_info)); |
177 | kirkwood_audio_init(); | 183 | kirkwood_audio_init(); |
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index a066a6d8d9d2..f56a0118c1bb 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c | |||
@@ -198,9 +198,9 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
198 | if (request_resource(&iomem_resource, &pp->res[1])) | 198 | if (request_resource(&iomem_resource, &pp->res[1])) |
199 | panic("Request PCIe%d Memory resource failed\n", index); | 199 | panic("Request PCIe%d Memory resource failed\n", index); |
200 | 200 | ||
201 | pci_add_resource(&sys->resources, &pp->res[0]); | ||
202 | pci_add_resource(&sys->resources, &pp->res[1]); | ||
203 | sys->io_offset = 0; | 201 | sys->io_offset = 0; |
202 | pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset); | ||
203 | pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); | ||
204 | 204 | ||
205 | /* | 205 | /* |
206 | * Generic PCIe unit setup. | 206 | * Generic PCIe unit setup. |
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index 966b2b3bb813..f9d2a11b7f96 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c | |||
@@ -106,6 +106,11 @@ static struct platform_device hp_t5325_button_device = { | |||
106 | } | 106 | } |
107 | }; | 107 | }; |
108 | 108 | ||
109 | static struct platform_device hp_t5325_audio_device = { | ||
110 | .name = "t5325-audio", | ||
111 | .id = -1, | ||
112 | }; | ||
113 | |||
109 | static unsigned int hp_t5325_mpp_config[] __initdata = { | 114 | static unsigned int hp_t5325_mpp_config[] __initdata = { |
110 | MPP0_NF_IO2, | 115 | MPP0_NF_IO2, |
111 | MPP1_SPI_MOSI, | 116 | MPP1_SPI_MOSI, |
@@ -179,6 +184,7 @@ static void __init hp_t5325_init(void) | |||
179 | kirkwood_sata_init(&hp_t5325_sata_data); | 184 | kirkwood_sata_init(&hp_t5325_sata_data); |
180 | kirkwood_ehci_init(); | 185 | kirkwood_ehci_init(); |
181 | platform_device_register(&hp_t5325_button_device); | 186 | platform_device_register(&hp_t5325_button_device); |
187 | platform_device_register(&hp_t5325_audio_device); | ||
182 | 188 | ||
183 | i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info)); | 189 | i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info)); |
184 | kirkwood_audio_init(); | 190 | kirkwood_audio_init(); |
diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S index b4fe0c11c6ce..8315b34f32ff 100644 --- a/arch/arm/mach-ks8695/include/mach/entry-macro.S +++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S | |||
@@ -14,16 +14,10 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/regs-irq.h> | 15 | #include <mach/regs-irq.h> |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller | 18 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register | 22 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register |
29 | 23 | ||
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h deleted file mode 100644 index 59fe992395bf..000000000000 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-s3c2410/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * KS8695 - System function defines and includes | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks, | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | |||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-ks8695/leds.c b/arch/arm/mach-ks8695/leds.c index d6f6502ac9b5..4bd707547293 100644 --- a/arch/arm/mach-ks8695/leds.c +++ b/arch/arm/mach-ks8695/leds.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/gpio.h> | ||
15 | 14 | ||
16 | #include <asm/leds.h> | 15 | #include <asm/leds.h> |
17 | #include <mach/devices.h> | 16 | #include <mach/devices.h> |
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c index b26f992071df..acc701435817 100644 --- a/arch/arm/mach-ks8695/pci.c +++ b/arch/arm/mach-ks8695/pci.c | |||
@@ -169,8 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys) | |||
169 | request_resource(&iomem_resource, &pci_mem); | 169 | request_resource(&iomem_resource, &pci_mem); |
170 | request_resource(&ioport_resource, &pci_io); | 170 | request_resource(&ioport_resource, &pci_io); |
171 | 171 | ||
172 | pci_add_resource(&sys->resources, &pci_io); | 172 | pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset); |
173 | pci_add_resource(&sys->resources, &pci_mem); | 173 | pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset); |
174 | 174 | ||
175 | /* Assign and enable processor bridge */ | 175 | /* Assign and enable processor bridge */ |
176 | ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); | 176 | ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); |
diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S index b725f6c93975..24ca11b377c8 100644 --- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S | |||
@@ -21,16 +21,10 @@ | |||
21 | 21 | ||
22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 | 22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_preamble, base, tmp | 24 | .macro get_irqnr_preamble, base, tmp |
28 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) | 25 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) |
29 | .endm | 26 | .endm |
30 | 27 | ||
31 | .macro arch_ret_to_user, tmp1, tmp2 | ||
32 | .endm | ||
33 | |||
34 | /* | 28 | /* |
35 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR | 29 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR |
36 | * as set if an interrupt is pending. | 30 | * as set if an interrupt is pending. |
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h deleted file mode 100644 index bf176c991520..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/system.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bfee5b455105..5d51c102c255 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = { | |||
149 | .remove = lpc32xx_clcd_remove, | 149 | .remove = lpc32xx_clcd_remove, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static struct amba_device lpc32xx_clcd_device = { | 152 | static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, |
153 | .dev = { | 153 | LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); |
154 | .coherent_dma_mask = ~0, | ||
155 | .init_name = "dev:clcd", | ||
156 | .platform_data = &lpc32xx_clcd_data, | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = LPC32XX_LCD_BASE, | ||
160 | .end = (LPC32XX_LCD_BASE + SZ_4K - 1), | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .dma_mask = ~0, | ||
164 | .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, | ||
165 | }; | ||
166 | 154 | ||
167 | /* | 155 | /* |
168 | * AMBA SSP (SPI) | 156 | * AMBA SSP (SPI) |
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { | |||
191 | .enable_dma = 0, | 179 | .enable_dma = 0, |
192 | }; | 180 | }; |
193 | 181 | ||
194 | static struct amba_device lpc32xx_ssp0_device = { | 182 | static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, |
195 | .dev = { | 183 | LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); |
196 | .coherent_dma_mask = ~0, | ||
197 | .init_name = "dev:ssp0", | ||
198 | .platform_data = &lpc32xx_ssp0_data, | ||
199 | }, | ||
200 | .res = { | ||
201 | .start = LPC32XX_SSP0_BASE, | ||
202 | .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), | ||
203 | .flags = IORESOURCE_MEM, | ||
204 | }, | ||
205 | .dma_mask = ~0, | ||
206 | .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, | ||
207 | }; | ||
208 | 184 | ||
209 | /* AT25 driver registration */ | 185 | /* AT25 driver registration */ |
210 | static int __init phy3250_spi_board_register(void) | 186 | static int __init phy3250_spi_board_register(void) |
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S index c42d9d4e892d..9cff9e7a2b26 100644 --- a/arch/arm/mach-mmp/include/mach/entry-macro.S +++ b/arch/arm/mach-mmp/include/mach/entry-macro.S | |||
@@ -8,12 +8,6 @@ | |||
8 | 8 | ||
9 | #include <mach/regs-icu.h> | 9 | #include <mach/regs-icu.h> |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
18 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID | 12 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID |
19 | and \tmp, \tmp, #0xff00 | 13 | and \tmp, \tmp, #0xff00 |
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h deleted file mode 100644 index 1d001eab81e1..000000000000 --- a/arch/arm/mach-mmp/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/system.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_MACH_SYSTEM_H | ||
10 | #define __ASM_MACH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | #endif /* __ASM_MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 0a113424632c..962e71169750 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c | |||
@@ -80,12 +80,8 @@ static struct of_device_id msm_dt_gic_match[] __initdata = { | |||
80 | 80 | ||
81 | static void __init msm8x60_dt_init(void) | 81 | static void __init msm8x60_dt_init(void) |
82 | { | 82 | { |
83 | struct device_node *node; | 83 | irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS, |
84 | 84 | GIC_SPI_START); | |
85 | node = of_find_matching_node_by_address(NULL, msm_dt_gic_match, | ||
86 | MSM8X60_QGIC_DIST_PHYS); | ||
87 | if (node) | ||
88 | irq_domain_add_simple(node, GIC_SPI_START); | ||
89 | 85 | ||
90 | if (of_machine_is_compatible("qcom,msm8660-surf")) { | 86 | if (of_machine_is_compatible("qcom,msm8660-surf")) { |
91 | printk(KERN_INFO "Init surf UART registers\n"); | 87 | printk(KERN_INFO "Init surf UART registers\n"); |
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S deleted file mode 100644 index 6a94f0527137..000000000000 --- a/arch/arm/mach-msm/idle.S +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/idle.S | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/linkage.h> | ||
20 | #include <asm/assembler.h> | ||
21 | |||
22 | ENTRY(arch_idle) | ||
23 | #ifdef CONFIG_MSM7X00A_IDLE | ||
24 | mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | ||
25 | bic r0, r1, #(1 << 2) /* clear dcache bit */ | ||
26 | bic r0, r0, #(1 << 12) /* clear icache bit */ | ||
27 | mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | ||
28 | |||
29 | mov r0, #0 /* prepare wfi value */ | ||
30 | mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ | ||
31 | mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ | ||
32 | mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | ||
33 | |||
34 | mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | ||
35 | #endif | ||
36 | mov pc, lr | ||
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c new file mode 100644 index 000000000000..0c9e13c65743 --- /dev/null +++ b/arch/arm/mach-msm/idle.c | |||
@@ -0,0 +1,49 @@ | |||
1 | /* arch/arm/mach-msm/idle.c | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/init.h> | ||
20 | #include <asm/system.h> | ||
21 | |||
22 | static void msm_idle(void) | ||
23 | { | ||
24 | #ifdef CONFIG_MSM7X00A_IDLE | ||
25 | asm volatile ( | ||
26 | |||
27 | "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" | ||
28 | "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" | ||
29 | "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" | ||
30 | "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" | ||
31 | |||
32 | "mov r0, #0 /* prepare wfi value */ \n\t" | ||
33 | "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" | ||
34 | "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" | ||
35 | "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" | ||
36 | |||
37 | "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" | ||
38 | |||
39 | : : : "r0","r1" ); | ||
40 | #endif | ||
41 | } | ||
42 | |||
43 | static int __init msm_idle_init(void) | ||
44 | { | ||
45 | arm_pm_idle = msm_idle; | ||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | arch_initcall(msm_idle_init); | ||
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S index 41f7003ef34f..f2ae9087f654 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/arch/arm/mach-msm/include/mach/entry-macro.S | |||
@@ -16,12 +16,6 @@ | |||
16 | * | 16 | * |
17 | */ | 17 | */ |
18 | 18 | ||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | #if !defined(CONFIG_ARM_GIC) | 19 | #if !defined(CONFIG_ARM_GIC) |
26 | #include <mach/msm_iomap.h> | 20 | #include <mach/msm_iomap.h> |
27 | 21 | ||
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index 311db2b35da0..f5fb2ec87ffe 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h | |||
@@ -12,7 +12,6 @@ | |||
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | void arch_idle(void); | ||
16 | 15 | ||
17 | /* low level hardware reset hook -- for example, hitting the | 16 | /* low level hardware reset hook -- for example, hitting the |
18 | * PSHOLD line on the PMIC to hard reset the system | 17 | * PSHOLD line on the PMIC to hard reset the system |
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index 66ae2d29e773..6b1f088e0597 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h deleted file mode 100644 index 8c3a5387cec7..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-mv78xx0/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index 8459f6d7d8ca..df3e38055a24 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c | |||
@@ -155,8 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) | |||
155 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | 155 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); |
156 | orion_pcie_setup(pp->base); | 156 | orion_pcie_setup(pp->base); |
157 | 157 | ||
158 | pci_add_resource(&sys->resources, &pp->res[0]); | 158 | pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset); |
159 | pci_add_resource(&sys->resources, &pp->res[1]); | 159 | pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); |
160 | 160 | ||
161 | return 1; | 161 | return 1; |
162 | } | 162 | } |
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index fe3e847930c9..01faffec3064 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c | |||
@@ -77,16 +77,18 @@ err: | |||
77 | 77 | ||
78 | int __init mxs_add_amba_device(const struct amba_device *dev) | 78 | int __init mxs_add_amba_device(const struct amba_device *dev) |
79 | { | 79 | { |
80 | struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); | 80 | struct amba_device *adev = amba_device_alloc(dev->dev.init_name, |
81 | dev->res.start, resource_size(&dev->res)); | ||
81 | 82 | ||
82 | if (!adev) { | 83 | if (!adev) { |
83 | pr_err("%s: failed to allocate memory", __func__); | 84 | pr_err("%s: failed to allocate memory", __func__); |
84 | return -ENOMEM; | 85 | return -ENOMEM; |
85 | } | 86 | } |
86 | 87 | ||
87 | *adev = *dev; | 88 | adev->irq[0] = dev->irq[0]; |
89 | adev->irq[1] = dev->irq[1]; | ||
88 | 90 | ||
89 | return amba_device_register(adev, &iomem_resource); | 91 | return amba_device_add(adev, &iomem_resource); |
90 | } | 92 | } |
91 | 93 | ||
92 | struct device mxs_apbh_bus = { | 94 | struct device mxs_apbh_bus = { |
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c index a559db09b49c..a5479f766046 100644 --- a/arch/arm/mach-mxs/devices/amba-duart.c +++ b/arch/arm/mach-mxs/devices/amba-duart.c | |||
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ | |||
23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ | 23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ |
24 | .flags = IORESOURCE_MEM, \ | 24 | .flags = IORESOURCE_MEM, \ |
25 | }, \ | 25 | }, \ |
26 | .irq = {soc ## _INT_DUART, NO_IRQ}, \ | 26 | .irq = {soc ## _INT_DUART}, \ |
27 | } | 27 | } |
28 | 28 | ||
29 | #ifdef CONFIG_SOC_IMX23 | 29 | #ifdef CONFIG_SOC_IMX23 |
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S index 9f0da12e657a..0c14259705b9 100644 --- a/arch/arm/mach-mxs/include/mach/entry-macro.S +++ b/arch/arm/mach-mxs/include/mach/entry-macro.S | |||
@@ -23,9 +23,6 @@ | |||
23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) | 23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) |
24 | #define HW_ICOLL_STAT_OFFSET 0x70 | 24 | #define HW_ICOLL_STAT_OFFSET 0x70 |
25 | 25 | ||
26 | .macro disable_fiq | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
30 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] | 27 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] |
31 | cmp \irqnr, #0x7F | 28 | cmp \irqnr, #0x7F |
@@ -36,6 +33,3 @@ | |||
36 | .macro get_irqnr_preamble, base, tmp | 33 | .macro get_irqnr_preamble, base, tmp |
37 | ldr \base, =MXS_ICOLL_VBASE | 34 | ldr \base, =MXS_ICOLL_VBASE |
38 | .endm | 35 | .endm |
39 | |||
40 | .macro arch_ret_to_user, tmp1, tmp2 | ||
41 | .endm | ||
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h deleted file mode 100644 index e7ad1bb29423..000000000000 --- a/arch/arm/mach-mxs/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_MXS_SYSTEM_H__ | ||
18 | #define __MACH_MXS_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __MACH_MXS_SYSTEM_H__ */ | ||
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c index fb042da29bda..a9b4bbcdafb4 100644 --- a/arch/arm/mach-mxs/pm.c +++ b/arch/arm/mach-mxs/pm.c | |||
@@ -15,13 +15,12 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/suspend.h> | 16 | #include <linux/suspend.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <mach/system.h> | ||
19 | 18 | ||
20 | static int mxs_suspend_enter(suspend_state_t state) | 19 | static int mxs_suspend_enter(suspend_state_t state) |
21 | { | 20 | { |
22 | switch (state) { | 21 | switch (state) { |
23 | case PM_SUSPEND_MEM: | 22 | case PM_SUSPEND_MEM: |
24 | arch_idle(); | 23 | cpu_do_idle(); |
25 | break; | 24 | break; |
26 | 25 | ||
27 | default: | 26 | default: |
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index b9913234bbf6..2cdf6ef69bee 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c | |||
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk) | |||
92 | { | 92 | { |
93 | } | 93 | } |
94 | 94 | ||
95 | static struct amba_device fb_device = { | 95 | static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); |
96 | .dev = { | ||
97 | .init_name = "fb", | ||
98 | .coherent_dma_mask = ~0, | ||
99 | }, | ||
100 | .res = { | ||
101 | .start = 0x00104000, | ||
102 | .end = 0x00104fff, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | .irq = { NETX_IRQ_LCD, NO_IRQ }, | ||
106 | }; | ||
107 | 96 | ||
108 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | 97 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) |
109 | { | 98 | { |
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S deleted file mode 100644 index 6e9f1cbe1634..000000000000 --- a/arch/arm/mach-netx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Hilscher netX based platforms | ||
5 | * | ||
6 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 | ||
10 | * as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | .macro disable_fiq | ||
23 | .endm | ||
24 | |||
25 | .macro arch_ret_to_user, tmp1, tmp2 | ||
26 | .endm | ||
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h deleted file mode 100644 index b38fa36d58c4..000000000000 --- a/arch/arm/mach-netx/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static inline void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
28 | |||
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 7c878bf00340..f6f74adbe8c4 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void) | |||
185 | #endif | 185 | #endif |
186 | } | 186 | } |
187 | 187 | ||
188 | #define __MEM_4K_RESOURCE(x) \ | 188 | static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, |
189 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 189 | { IRQ_UART0 }, NULL); |
190 | 190 | ||
191 | static struct amba_device uart0_device = { | 191 | static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, |
192 | .dev = { .init_name = "uart0" }, | 192 | { IRQ_UART1 }, NULL); |
193 | __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), | ||
194 | .irq = {IRQ_UART0, NO_IRQ}, | ||
195 | }; | ||
196 | |||
197 | static struct amba_device uart1_device = { | ||
198 | .dev = { .init_name = "uart1" }, | ||
199 | __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), | ||
200 | .irq = {IRQ_UART1, NO_IRQ}, | ||
201 | }; | ||
202 | 193 | ||
203 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
204 | &uart0_device, | 195 | &uart0_device, |
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 65df7b4fdd3e..27f43a46985e 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = { | |||
97 | GPIO_DEVICE(3), | 97 | GPIO_DEVICE(3), |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static struct amba_device cpu8815_amba_rng = { | 100 | static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); |
101 | .dev = { | ||
102 | .init_name = "rng", | ||
103 | }, | ||
104 | __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), | ||
105 | }; | ||
106 | 101 | ||
107 | static struct platform_device *platform_devs[] __initdata = { | 102 | static struct platform_device *platform_devs[] __initdata = { |
108 | cpu8815_platform_gpio + 0, | 103 | cpu8815_platform_gpio + 0, |
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = { | |||
112 | }; | 107 | }; |
113 | 108 | ||
114 | static struct amba_device *amba_devs[] __initdata = { | 109 | static struct amba_device *amba_devs[] __initdata = { |
115 | &cpu8815_amba_rng | 110 | &cpu8815_amba_rng_device |
116 | }; | 111 | }; |
117 | 112 | ||
118 | static int __init cpu8815_init(void) | 113 | static int __init cpu8815_init(void) |
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S deleted file mode 100644 index 98ea1c1fbbab..000000000000 --- a/arch/arm/mach-nomadik/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Nomadik platforms | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | .macro disable_fiq | ||
10 | .endm | ||
11 | |||
12 | .macro arch_ret_to_user, tmp1, tmp2 | ||
13 | .endm | ||
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h deleted file mode 100644 index 25e198b8976c..000000000000 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * mach-nomadik/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2008 STMicroelectronics | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | /* | ||
26 | * This should do all the clock switching | ||
27 | * and wait for interrupt tricks | ||
28 | */ | ||
29 | cpu_do_idle(); | ||
30 | } | ||
31 | |||
32 | #endif | ||
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 4f8d66f044e7..922ab0dc2bcd 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig | |||
@@ -37,7 +37,6 @@ comment "OMAP Board Type" | |||
37 | config MACH_OMAP_INNOVATOR | 37 | config MACH_OMAP_INNOVATOR |
38 | bool "TI Innovator" | 38 | bool "TI Innovator" |
39 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX) | 39 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX) |
40 | select OMAP_MCBSP | ||
41 | help | 40 | help |
42 | TI OMAP 1510 or 1610 Innovator board support. Say Y here if you | 41 | TI OMAP 1510 or 1610 Innovator board support. Say Y here if you |
43 | have such a board. | 42 | have such a board. |
@@ -45,7 +44,6 @@ config MACH_OMAP_INNOVATOR | |||
45 | config MACH_OMAP_H2 | 44 | config MACH_OMAP_H2 |
46 | bool "TI H2 Support" | 45 | bool "TI H2 Support" |
47 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | 46 | depends on ARCH_OMAP1 && ARCH_OMAP16XX |
48 | select OMAP_MCBSP | ||
49 | help | 47 | help |
50 | TI OMAP 1610/1611B H2 board support. Say Y here if you have such | 48 | TI OMAP 1610/1611B H2 board support. Say Y here if you have such |
51 | a board. | 49 | a board. |
@@ -72,7 +70,6 @@ config MACH_HERALD | |||
72 | config MACH_OMAP_OSK | 70 | config MACH_OMAP_OSK |
73 | bool "TI OSK Support" | 71 | bool "TI OSK Support" |
74 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | 72 | depends on ARCH_OMAP1 && ARCH_OMAP16XX |
75 | select OMAP_MCBSP | ||
76 | help | 73 | help |
77 | TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here | 74 | TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here |
78 | if you have such a board. | 75 | if you have such a board. |
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 11c85cd2731a..9923f92b5450 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -6,7 +6,9 @@ | |||
6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o | 6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o |
7 | obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o | 7 | obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o |
8 | 8 | ||
9 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | 9 | ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) |
10 | obj-y += mcbsp.o | ||
11 | endif | ||
10 | 12 | ||
11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o | 13 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o |
12 | 14 | ||
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 88909cc0b254..e0e8245f3c9f 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/serial_8250.h> | 21 | #include <linux/serial_8250.h> |
22 | #include <linux/export.h> | 22 | #include <linux/export.h> |
23 | #include <linux/omapfb.h> | ||
23 | 24 | ||
24 | #include <media/soc_camera.h> | 25 | #include <media/soc_camera.h> |
25 | 26 | ||
@@ -169,10 +170,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { | |||
169 | .pins[0] = 2, | 170 | .pins[0] = 2, |
170 | }; | 171 | }; |
171 | 172 | ||
172 | static struct omap_board_config_kernel ams_delta_config[] __initdata = { | ||
173 | { OMAP_TAG_LCD, &ams_delta_lcd_config }, | ||
174 | }; | ||
175 | |||
176 | static struct resource ams_delta_nand_resources[] = { | 173 | static struct resource ams_delta_nand_resources[] = { |
177 | [0] = { | 174 | [0] = { |
178 | .start = OMAP1_MPUIO_BASE, | 175 | .start = OMAP1_MPUIO_BASE, |
@@ -302,8 +299,6 @@ static void __init ams_delta_init(void) | |||
302 | omap_cfg_reg(J19_1610_CAM_D6); | 299 | omap_cfg_reg(J19_1610_CAM_D6); |
303 | omap_cfg_reg(J18_1610_CAM_D7); | 300 | omap_cfg_reg(J18_1610_CAM_D7); |
304 | 301 | ||
305 | omap_board_config = ams_delta_config; | ||
306 | omap_board_config_size = ARRAY_SIZE(ams_delta_config); | ||
307 | omap_serial_init(); | 302 | omap_serial_init(); |
308 | omap_register_i2c_bus(1, 100, NULL, 0); | 303 | omap_register_i2c_bus(1, 100, NULL, 0); |
309 | 304 | ||
@@ -321,6 +316,8 @@ static void __init ams_delta_init(void) | |||
321 | ams_delta_init_fiq(); | 316 | ams_delta_init_fiq(); |
322 | 317 | ||
323 | omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); | 318 | omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); |
319 | |||
320 | omapfb_set_lcd_config(&ams_delta_lcd_config); | ||
324 | } | 321 | } |
325 | 322 | ||
326 | static struct plat_serial8250_port ams_delta_modem_ports[] = { | 323 | static struct plat_serial8250_port ams_delta_modem_ports[] = { |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 0b9464b41212..7afaf3c5bdc6 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
22 | #include <linux/input.h> | 22 | #include <linux/input.h> |
23 | #include <linux/smc91x.h> | 23 | #include <linux/smc91x.h> |
24 | #include <linux/omapfb.h> | ||
24 | 25 | ||
25 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
26 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
@@ -273,27 +274,17 @@ static struct platform_device kp_device = { | |||
273 | .resource = kp_resources, | 274 | .resource = kp_resources, |
274 | }; | 275 | }; |
275 | 276 | ||
276 | static struct platform_device lcd_device = { | ||
277 | .name = "lcd_p2", | ||
278 | .id = -1, | ||
279 | }; | ||
280 | |||
281 | static struct platform_device *devices[] __initdata = { | 277 | static struct platform_device *devices[] __initdata = { |
282 | &nor_device, | 278 | &nor_device, |
283 | &nand_device, | 279 | &nand_device, |
284 | &smc91x_device, | 280 | &smc91x_device, |
285 | &kp_device, | 281 | &kp_device, |
286 | &lcd_device, | ||
287 | }; | 282 | }; |
288 | 283 | ||
289 | static struct omap_lcd_config fsample_lcd_config = { | 284 | static struct omap_lcd_config fsample_lcd_config = { |
290 | .ctrl_name = "internal", | 285 | .ctrl_name = "internal", |
291 | }; | 286 | }; |
292 | 287 | ||
293 | static struct omap_board_config_kernel fsample_config[] __initdata = { | ||
294 | { OMAP_TAG_LCD, &fsample_lcd_config }, | ||
295 | }; | ||
296 | |||
297 | static void __init omap_fsample_init(void) | 288 | static void __init omap_fsample_init(void) |
298 | { | 289 | { |
299 | /* Early, board-dependent init */ | 290 | /* Early, board-dependent init */ |
@@ -352,10 +343,10 @@ static void __init omap_fsample_init(void) | |||
352 | 343 | ||
353 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 344 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
354 | 345 | ||
355 | omap_board_config = fsample_config; | ||
356 | omap_board_config_size = ARRAY_SIZE(fsample_config); | ||
357 | omap_serial_init(); | 346 | omap_serial_init(); |
358 | omap_register_i2c_bus(1, 100, NULL, 0); | 347 | omap_register_i2c_bus(1, 100, NULL, 0); |
348 | |||
349 | omapfb_set_lcd_config(&fsample_lcd_config); | ||
359 | } | 350 | } |
360 | 351 | ||
361 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ | 352 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 00ad6b22d60a..af2be8c12c07 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/input.h> | 30 | #include <linux/input.h> |
31 | #include <linux/i2c/tps65010.h> | 31 | #include <linux/i2c/tps65010.h> |
32 | #include <linux/smc91x.h> | 32 | #include <linux/smc91x.h> |
33 | #include <linux/omapfb.h> | ||
33 | 34 | ||
34 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
35 | 36 | ||
@@ -325,18 +326,12 @@ static struct platform_device h2_irda_device = { | |||
325 | .resource = h2_irda_resources, | 326 | .resource = h2_irda_resources, |
326 | }; | 327 | }; |
327 | 328 | ||
328 | static struct platform_device h2_lcd_device = { | ||
329 | .name = "lcd_h2", | ||
330 | .id = -1, | ||
331 | }; | ||
332 | |||
333 | static struct platform_device *h2_devices[] __initdata = { | 329 | static struct platform_device *h2_devices[] __initdata = { |
334 | &h2_nor_device, | 330 | &h2_nor_device, |
335 | &h2_nand_device, | 331 | &h2_nand_device, |
336 | &h2_smc91x_device, | 332 | &h2_smc91x_device, |
337 | &h2_irda_device, | 333 | &h2_irda_device, |
338 | &h2_kp_device, | 334 | &h2_kp_device, |
339 | &h2_lcd_device, | ||
340 | }; | 335 | }; |
341 | 336 | ||
342 | static void __init h2_init_smc91x(void) | 337 | static void __init h2_init_smc91x(void) |
@@ -391,10 +386,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = { | |||
391 | .ctrl_name = "internal", | 386 | .ctrl_name = "internal", |
392 | }; | 387 | }; |
393 | 388 | ||
394 | static struct omap_board_config_kernel h2_config[] __initdata = { | ||
395 | { OMAP_TAG_LCD, &h2_lcd_config }, | ||
396 | }; | ||
397 | |||
398 | static void __init h2_init(void) | 389 | static void __init h2_init(void) |
399 | { | 390 | { |
400 | h2_init_smc91x(); | 391 | h2_init_smc91x(); |
@@ -438,13 +429,13 @@ static void __init h2_init(void) | |||
438 | omap_cfg_reg(N19_1610_KBR5); | 429 | omap_cfg_reg(N19_1610_KBR5); |
439 | 430 | ||
440 | platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); | 431 | platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); |
441 | omap_board_config = h2_config; | ||
442 | omap_board_config_size = ARRAY_SIZE(h2_config); | ||
443 | omap_serial_init(); | 432 | omap_serial_init(); |
444 | omap_register_i2c_bus(1, 100, h2_i2c_board_info, | 433 | omap_register_i2c_bus(1, 100, h2_i2c_board_info, |
445 | ARRAY_SIZE(h2_i2c_board_info)); | 434 | ARRAY_SIZE(h2_i2c_board_info)); |
446 | omap1_usb_init(&h2_usb_config); | 435 | omap1_usb_init(&h2_usb_config); |
447 | h2_mmc_init(); | 436 | h2_mmc_init(); |
437 | |||
438 | omapfb_set_lcd_config(&h2_lcd_config); | ||
448 | } | 439 | } |
449 | 440 | ||
450 | MACHINE_START(OMAP_H2, "TI-H2") | 441 | MACHINE_START(OMAP_H2, "TI-H2") |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4a7f25149703..7cfd25b90735 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/spi/spi.h> | 30 | #include <linux/spi/spi.h> |
31 | #include <linux/i2c/tps65010.h> | 31 | #include <linux/i2c/tps65010.h> |
32 | #include <linux/smc91x.h> | 32 | #include <linux/smc91x.h> |
33 | #include <linux/omapfb.h> | ||
33 | 34 | ||
34 | #include <asm/setup.h> | 35 | #include <asm/setup.h> |
35 | #include <asm/page.h> | 36 | #include <asm/page.h> |
@@ -370,10 +371,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = { | |||
370 | .ctrl_name = "internal", | 371 | .ctrl_name = "internal", |
371 | }; | 372 | }; |
372 | 373 | ||
373 | static struct omap_board_config_kernel h3_config[] __initdata = { | ||
374 | { OMAP_TAG_LCD, &h3_lcd_config }, | ||
375 | }; | ||
376 | |||
377 | static struct i2c_board_info __initdata h3_i2c_board_info[] = { | 374 | static struct i2c_board_info __initdata h3_i2c_board_info[] = { |
378 | { | 375 | { |
379 | I2C_BOARD_INFO("tps65013", 0x48), | 376 | I2C_BOARD_INFO("tps65013", 0x48), |
@@ -426,13 +423,13 @@ static void __init h3_init(void) | |||
426 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 423 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
427 | spi_register_board_info(h3_spi_board_info, | 424 | spi_register_board_info(h3_spi_board_info, |
428 | ARRAY_SIZE(h3_spi_board_info)); | 425 | ARRAY_SIZE(h3_spi_board_info)); |
429 | omap_board_config = h3_config; | ||
430 | omap_board_config_size = ARRAY_SIZE(h3_config); | ||
431 | omap_serial_init(); | 426 | omap_serial_init(); |
432 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, | 427 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, |
433 | ARRAY_SIZE(h3_i2c_board_info)); | 428 | ARRAY_SIZE(h3_i2c_board_info)); |
434 | omap1_usb_init(&h3_usb_config); | 429 | omap1_usb_init(&h3_usb_config); |
435 | h3_mmc_init(); | 430 | h3_mmc_init(); |
431 | |||
432 | omapfb_set_lcd_config(&h3_lcd_config); | ||
436 | } | 433 | } |
437 | 434 | ||
438 | MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") | 435 | MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") |
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 731cc3db7ab3..af2afcf24f75 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <linux/leds.h> | 36 | #include <linux/leds.h> |
37 | #include <linux/spi/spi.h> | 37 | #include <linux/spi/spi.h> |
38 | #include <linux/spi/ads7846.h> | 38 | #include <linux/spi/ads7846.h> |
39 | #include <linux/omapfb.h> | ||
39 | 40 | ||
40 | #include <asm/mach-types.h> | 41 | #include <asm/mach-types.h> |
41 | #include <asm/mach/arch.h> | 42 | #include <asm/mach/arch.h> |
@@ -398,10 +399,6 @@ static struct omap_lcd_config htcherald_lcd_config __initdata = { | |||
398 | .ctrl_name = "internal", | 399 | .ctrl_name = "internal", |
399 | }; | 400 | }; |
400 | 401 | ||
401 | static struct omap_board_config_kernel htcherald_config[] __initdata = { | ||
402 | { OMAP_TAG_LCD, &htcherald_lcd_config }, | ||
403 | }; | ||
404 | |||
405 | static struct platform_device lcd_device = { | 402 | static struct platform_device lcd_device = { |
406 | .name = "lcd_htcherald", | 403 | .name = "lcd_htcherald", |
407 | .id = -1, | 404 | .id = -1, |
@@ -580,8 +577,6 @@ static void __init htcherald_init(void) | |||
580 | printk(KERN_INFO "HTC Herald init.\n"); | 577 | printk(KERN_INFO "HTC Herald init.\n"); |
581 | 578 | ||
582 | /* Do board initialization before we register all the devices */ | 579 | /* Do board initialization before we register all the devices */ |
583 | omap_board_config = htcherald_config; | ||
584 | omap_board_config_size = ARRAY_SIZE(htcherald_config); | ||
585 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 580 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
586 | 581 | ||
587 | htcherald_disable_watchdog(); | 582 | htcherald_disable_watchdog(); |
@@ -598,6 +593,8 @@ static void __init htcherald_init(void) | |||
598 | htc_mmc_data[0] = &htc_mmc1_data; | 593 | htc_mmc_data[0] = &htc_mmc1_data; |
599 | omap1_init_mmc(htc_mmc_data, 1); | 594 | omap1_init_mmc(htc_mmc_data, 1); |
600 | #endif | 595 | #endif |
596 | |||
597 | omapfb_set_lcd_config(&htcherald_lcd_config); | ||
601 | } | 598 | } |
602 | 599 | ||
603 | MACHINE_START(HERALD, "HTC Herald") | 600 | MACHINE_START(HERALD, "HTC Herald") |
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index be2002f42dea..1d5ab6606b9f 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/input.h> | 26 | #include <linux/input.h> |
27 | #include <linux/smc91x.h> | 27 | #include <linux/smc91x.h> |
28 | #include <linux/omapfb.h> | ||
28 | 29 | ||
29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
30 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
@@ -370,10 +371,6 @@ static inline void innovator_mmc_init(void) | |||
370 | } | 371 | } |
371 | #endif | 372 | #endif |
372 | 373 | ||
373 | static struct omap_board_config_kernel innovator_config[] = { | ||
374 | { OMAP_TAG_LCD, NULL }, | ||
375 | }; | ||
376 | |||
377 | static void __init innovator_init(void) | 374 | static void __init innovator_init(void) |
378 | { | 375 | { |
379 | if (cpu_is_omap1510()) | 376 | if (cpu_is_omap1510()) |
@@ -416,17 +413,15 @@ static void __init innovator_init(void) | |||
416 | #ifdef CONFIG_ARCH_OMAP15XX | 413 | #ifdef CONFIG_ARCH_OMAP15XX |
417 | if (cpu_is_omap1510()) { | 414 | if (cpu_is_omap1510()) { |
418 | omap1_usb_init(&innovator1510_usb_config); | 415 | omap1_usb_init(&innovator1510_usb_config); |
419 | innovator_config[0].data = &innovator1510_lcd_config; | 416 | omapfb_set_lcd_config(&innovator1510_lcd_config); |
420 | } | 417 | } |
421 | #endif | 418 | #endif |
422 | #ifdef CONFIG_ARCH_OMAP16XX | 419 | #ifdef CONFIG_ARCH_OMAP16XX |
423 | if (cpu_is_omap1610()) { | 420 | if (cpu_is_omap1610()) { |
424 | omap1_usb_init(&h2_usb_config); | 421 | omap1_usb_init(&h2_usb_config); |
425 | innovator_config[0].data = &innovator1610_lcd_config; | 422 | omapfb_set_lcd_config(&innovator1610_lcd_config); |
426 | } | 423 | } |
427 | #endif | 424 | #endif |
428 | omap_board_config = innovator_config; | ||
429 | omap_board_config_size = ARRAY_SIZE(innovator_config); | ||
430 | omap_serial_init(); | 425 | omap_serial_init(); |
431 | omap_register_i2c_bus(1, 100, NULL, 0); | 426 | omap_register_i2c_bus(1, 100, NULL, 0); |
432 | innovator_mmc_init(); | 427 | innovator_mmc_init(); |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index f9efc036ba96..9b6332a31fb6 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <plat/board.h> | 31 | #include <plat/board.h> |
32 | #include <plat/keypad.h> | 32 | #include <plat/keypad.h> |
33 | #include "common.h" | 33 | #include "common.h" |
34 | #include <plat/hwa742.h> | ||
35 | #include <plat/lcd_mipid.h> | 34 | #include <plat/lcd_mipid.h> |
36 | #include <plat/mmc.h> | 35 | #include <plat/mmc.h> |
37 | #include <plat/clock.h> | 36 | #include <plat/clock.h> |
@@ -99,15 +98,16 @@ static struct mipid_platform_data nokia770_mipid_platform_data = { | |||
99 | .shutdown = mipid_shutdown, | 98 | .shutdown = mipid_shutdown, |
100 | }; | 99 | }; |
101 | 100 | ||
101 | static struct omap_lcd_config nokia770_lcd_config __initdata = { | ||
102 | .ctrl_name = "hwa742", | ||
103 | }; | ||
104 | |||
102 | static void __init mipid_dev_init(void) | 105 | static void __init mipid_dev_init(void) |
103 | { | 106 | { |
104 | const struct omap_lcd_config *conf; | 107 | nokia770_mipid_platform_data.nreset_gpio = 13; |
108 | nokia770_mipid_platform_data.data_lines = 16; | ||
105 | 109 | ||
106 | conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config); | 110 | omapfb_set_lcd_config(&nokia770_lcd_config); |
107 | if (conf != NULL) { | ||
108 | nokia770_mipid_platform_data.nreset_gpio = conf->nreset_gpio; | ||
109 | nokia770_mipid_platform_data.data_lines = conf->data_lines; | ||
110 | } | ||
111 | } | 111 | } |
112 | 112 | ||
113 | static void __init ads7846_dev_init(void) | 113 | static void __init ads7846_dev_init(void) |
@@ -150,14 +150,9 @@ static struct spi_board_info nokia770_spi_board_info[] __initdata = { | |||
150 | }, | 150 | }, |
151 | }; | 151 | }; |
152 | 152 | ||
153 | static struct hwa742_platform_data nokia770_hwa742_platform_data = { | ||
154 | .te_connected = 1, | ||
155 | }; | ||
156 | |||
157 | static void __init hwa742_dev_init(void) | 153 | static void __init hwa742_dev_init(void) |
158 | { | 154 | { |
159 | clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL); | 155 | clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL); |
160 | omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data); | ||
161 | } | 156 | } |
162 | 157 | ||
163 | /* assume no Mini-AB port */ | 158 | /* assume no Mini-AB port */ |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 675de06557aa..ef874655fbd3 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/i2c.h> | 34 | #include <linux/i2c.h> |
35 | #include <linux/leds.h> | 35 | #include <linux/leds.h> |
36 | #include <linux/smc91x.h> | 36 | #include <linux/smc91x.h> |
37 | #include <linux/omapfb.h> | ||
37 | 38 | ||
38 | #include <linux/mtd/mtd.h> | 39 | #include <linux/mtd/mtd.h> |
39 | #include <linux/mtd/partitions.h> | 40 | #include <linux/mtd/partitions.h> |
@@ -300,12 +301,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = { | |||
300 | }; | 301 | }; |
301 | #endif | 302 | #endif |
302 | 303 | ||
303 | static struct omap_board_config_kernel osk_config[] __initdata = { | ||
304 | #ifdef CONFIG_OMAP_OSK_MISTRAL | ||
305 | { OMAP_TAG_LCD, &osk_lcd_config }, | ||
306 | #endif | ||
307 | }; | ||
308 | |||
309 | #ifdef CONFIG_OMAP_OSK_MISTRAL | 304 | #ifdef CONFIG_OMAP_OSK_MISTRAL |
310 | 305 | ||
311 | #include <linux/input.h> | 306 | #include <linux/input.h> |
@@ -549,8 +544,6 @@ static void __init osk_init(void) | |||
549 | osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); | 544 | osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); |
550 | osk_flash_resource.end += SZ_32M - 1; | 545 | osk_flash_resource.end += SZ_32M - 1; |
551 | platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); | 546 | platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); |
552 | omap_board_config = osk_config; | ||
553 | omap_board_config_size = ARRAY_SIZE(osk_config); | ||
554 | 547 | ||
555 | l = omap_readl(USB_TRANSCEIVER_CTRL); | 548 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
556 | l |= (3 << 1); | 549 | l |= (3 << 1); |
@@ -567,6 +560,11 @@ static void __init osk_init(void) | |||
567 | omap_register_i2c_bus(1, 400, osk_i2c_board_info, | 560 | omap_register_i2c_bus(1, 400, osk_i2c_board_info, |
568 | ARRAY_SIZE(osk_i2c_board_info)); | 561 | ARRAY_SIZE(osk_i2c_board_info)); |
569 | osk_mistral_init(); | 562 | osk_mistral_init(); |
563 | |||
564 | #ifdef CONFIG_OMAP_OSK_MISTRAL | ||
565 | omapfb_set_lcd_config(&osk_lcd_config); | ||
566 | #endif | ||
567 | |||
570 | } | 568 | } |
571 | 569 | ||
572 | MACHINE_START(OMAP_OSK, "TI-OSK") | 570 | MACHINE_START(OMAP_OSK, "TI-OSK") |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 81fa27f88369..612342cb2a2d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/apm-emulation.h> | 29 | #include <linux/apm-emulation.h> |
30 | #include <linux/omapfb.h> | ||
30 | 31 | ||
31 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
32 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
@@ -209,10 +210,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { | |||
209 | .ctrl_name = "internal", | 210 | .ctrl_name = "internal", |
210 | }; | 211 | }; |
211 | 212 | ||
212 | static struct omap_board_config_kernel palmte_config[] __initdata = { | ||
213 | { OMAP_TAG_LCD, &palmte_lcd_config }, | ||
214 | }; | ||
215 | |||
216 | static struct spi_board_info palmte_spi_info[] __initdata = { | 213 | static struct spi_board_info palmte_spi_info[] __initdata = { |
217 | { | 214 | { |
218 | .modalias = "tsc2102", | 215 | .modalias = "tsc2102", |
@@ -250,9 +247,6 @@ static void __init omap_palmte_init(void) | |||
250 | omap_cfg_reg(UART3_TX); | 247 | omap_cfg_reg(UART3_TX); |
251 | omap_cfg_reg(UART3_RX); | 248 | omap_cfg_reg(UART3_RX); |
252 | 249 | ||
253 | omap_board_config = palmte_config; | ||
254 | omap_board_config_size = ARRAY_SIZE(palmte_config); | ||
255 | |||
256 | platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices)); | 250 | platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices)); |
257 | 251 | ||
258 | spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); | 252 | spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); |
@@ -260,6 +254,8 @@ static void __init omap_palmte_init(void) | |||
260 | omap_serial_init(); | 254 | omap_serial_init(); |
261 | omap1_usb_init(&palmte_usb_config); | 255 | omap1_usb_init(&palmte_usb_config); |
262 | omap_register_i2c_bus(1, 100, NULL, 0); | 256 | omap_register_i2c_bus(1, 100, NULL, 0); |
257 | |||
258 | omapfb_set_lcd_config(&palmte_lcd_config); | ||
263 | } | 259 | } |
264 | 260 | ||
265 | MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") | 261 | MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 81cb82178388..b63350bc88fd 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/mtd/partitions.h> | 24 | #include <linux/mtd/partitions.h> |
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/leds.h> | 26 | #include <linux/leds.h> |
27 | #include <linux/omapfb.h> | ||
27 | 28 | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
@@ -273,10 +274,6 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = { | |||
273 | .ctrl_name = "internal", | 274 | .ctrl_name = "internal", |
274 | }; | 275 | }; |
275 | 276 | ||
276 | static struct omap_board_config_kernel palmtt_config[] __initdata = { | ||
277 | { OMAP_TAG_LCD, &palmtt_lcd_config }, | ||
278 | }; | ||
279 | |||
280 | static void __init omap_mpu_wdt_mode(int mode) { | 277 | static void __init omap_mpu_wdt_mode(int mode) { |
281 | if (mode) | 278 | if (mode) |
282 | omap_writew(0x8000, OMAP_WDT_TIMER_MODE); | 279 | omap_writew(0x8000, OMAP_WDT_TIMER_MODE); |
@@ -298,15 +295,14 @@ static void __init omap_palmtt_init(void) | |||
298 | 295 | ||
299 | omap_mpu_wdt_mode(0); | 296 | omap_mpu_wdt_mode(0); |
300 | 297 | ||
301 | omap_board_config = palmtt_config; | ||
302 | omap_board_config_size = ARRAY_SIZE(palmtt_config); | ||
303 | |||
304 | platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices)); | 298 | platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices)); |
305 | 299 | ||
306 | spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); | 300 | spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); |
307 | omap_serial_init(); | 301 | omap_serial_init(); |
308 | omap1_usb_init(&palmtt_usb_config); | 302 | omap1_usb_init(&palmtt_usb_config); |
309 | omap_register_i2c_bus(1, 100, NULL, 0); | 303 | omap_register_i2c_bus(1, 100, NULL, 0); |
304 | |||
305 | omapfb_set_lcd_config(&palmtt_lcd_config); | ||
310 | } | 306 | } |
311 | 307 | ||
312 | MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") | 308 | MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index e881945ce8ec..9924c70af09f 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/mtd/mtd.h> | 27 | #include <linux/mtd/mtd.h> |
28 | #include <linux/mtd/partitions.h> | 28 | #include <linux/mtd/partitions.h> |
29 | #include <linux/mtd/physmap.h> | 29 | #include <linux/mtd/physmap.h> |
30 | #include <linux/omapfb.h> | ||
30 | 31 | ||
31 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
32 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
@@ -239,10 +240,6 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = { | |||
239 | .ctrl_name = "internal", | 240 | .ctrl_name = "internal", |
240 | }; | 241 | }; |
241 | 242 | ||
242 | static struct omap_board_config_kernel palmz71_config[] __initdata = { | ||
243 | {OMAP_TAG_LCD, &palmz71_lcd_config}, | ||
244 | }; | ||
245 | |||
246 | static irqreturn_t | 243 | static irqreturn_t |
247 | palmz71_powercable(int irq, void *dev_id) | 244 | palmz71_powercable(int irq, void *dev_id) |
248 | { | 245 | { |
@@ -313,9 +310,6 @@ omap_palmz71_init(void) | |||
313 | palmz71_gpio_setup(1); | 310 | palmz71_gpio_setup(1); |
314 | omap_mpu_wdt_mode(0); | 311 | omap_mpu_wdt_mode(0); |
315 | 312 | ||
316 | omap_board_config = palmz71_config; | ||
317 | omap_board_config_size = ARRAY_SIZE(palmz71_config); | ||
318 | |||
319 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 313 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
320 | 314 | ||
321 | spi_register_board_info(palmz71_boardinfo, | 315 | spi_register_board_info(palmz71_boardinfo, |
@@ -324,6 +318,8 @@ omap_palmz71_init(void) | |||
324 | omap_serial_init(); | 318 | omap_serial_init(); |
325 | omap_register_i2c_bus(1, 100, NULL, 0); | 319 | omap_register_i2c_bus(1, 100, NULL, 0); |
326 | palmz71_gpio_setup(0); | 320 | palmz71_gpio_setup(0); |
321 | |||
322 | omapfb_set_lcd_config(&palmz71_lcd_config); | ||
327 | } | 323 | } |
328 | 324 | ||
329 | MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") | 325 | MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index c000bed76276..8e0153447c6d 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
22 | #include <linux/input.h> | 22 | #include <linux/input.h> |
23 | #include <linux/smc91x.h> | 23 | #include <linux/smc91x.h> |
24 | #include <linux/omapfb.h> | ||
24 | 25 | ||
25 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
26 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
@@ -232,27 +233,17 @@ static struct platform_device kp_device = { | |||
232 | .resource = kp_resources, | 233 | .resource = kp_resources, |
233 | }; | 234 | }; |
234 | 235 | ||
235 | static struct platform_device lcd_device = { | ||
236 | .name = "lcd_p2", | ||
237 | .id = -1, | ||
238 | }; | ||
239 | |||
240 | static struct platform_device *devices[] __initdata = { | 236 | static struct platform_device *devices[] __initdata = { |
241 | &nor_device, | 237 | &nor_device, |
242 | &nand_device, | 238 | &nand_device, |
243 | &smc91x_device, | 239 | &smc91x_device, |
244 | &kp_device, | 240 | &kp_device, |
245 | &lcd_device, | ||
246 | }; | 241 | }; |
247 | 242 | ||
248 | static struct omap_lcd_config perseus2_lcd_config __initdata = { | 243 | static struct omap_lcd_config perseus2_lcd_config __initdata = { |
249 | .ctrl_name = "internal", | 244 | .ctrl_name = "internal", |
250 | }; | 245 | }; |
251 | 246 | ||
252 | static struct omap_board_config_kernel perseus2_config[] __initdata = { | ||
253 | { OMAP_TAG_LCD, &perseus2_lcd_config }, | ||
254 | }; | ||
255 | |||
256 | static void __init perseus2_init_smc91x(void) | 247 | static void __init perseus2_init_smc91x(void) |
257 | { | 248 | { |
258 | fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); | 249 | fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); |
@@ -320,10 +311,10 @@ static void __init omap_perseus2_init(void) | |||
320 | 311 | ||
321 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 312 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
322 | 313 | ||
323 | omap_board_config = perseus2_config; | ||
324 | omap_board_config_size = ARRAY_SIZE(perseus2_config); | ||
325 | omap_serial_init(); | 314 | omap_serial_init(); |
326 | omap_register_i2c_bus(1, 100, NULL, 0); | 315 | omap_register_i2c_bus(1, 100, NULL, 0); |
316 | |||
317 | omapfb_set_lcd_config(&perseus2_lcd_config); | ||
327 | } | 318 | } |
328 | 319 | ||
329 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ | 320 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 7bcd82ab0fd0..0c76e12337d9 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
28 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
29 | #include <linux/export.h> | 29 | #include <linux/export.h> |
30 | #include <linux/omapfb.h> | ||
30 | 31 | ||
31 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
32 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
@@ -355,11 +356,6 @@ static struct omap_usb_config sx1_usb_config __initdata = { | |||
355 | 356 | ||
356 | /*----------- LCD -------------------------*/ | 357 | /*----------- LCD -------------------------*/ |
357 | 358 | ||
358 | static struct platform_device sx1_lcd_device = { | ||
359 | .name = "lcd_sx1", | ||
360 | .id = -1, | ||
361 | }; | ||
362 | |||
363 | static struct omap_lcd_config sx1_lcd_config __initdata = { | 359 | static struct omap_lcd_config sx1_lcd_config __initdata = { |
364 | .ctrl_name = "internal", | 360 | .ctrl_name = "internal", |
365 | }; | 361 | }; |
@@ -368,14 +364,8 @@ static struct omap_lcd_config sx1_lcd_config __initdata = { | |||
368 | static struct platform_device *sx1_devices[] __initdata = { | 364 | static struct platform_device *sx1_devices[] __initdata = { |
369 | &sx1_flash_device, | 365 | &sx1_flash_device, |
370 | &sx1_kp_device, | 366 | &sx1_kp_device, |
371 | &sx1_lcd_device, | ||
372 | &sx1_irda_device, | 367 | &sx1_irda_device, |
373 | }; | 368 | }; |
374 | /*-----------------------------------------*/ | ||
375 | |||
376 | static struct omap_board_config_kernel sx1_config[] __initdata = { | ||
377 | { OMAP_TAG_LCD, &sx1_lcd_config }, | ||
378 | }; | ||
379 | 369 | ||
380 | /*-----------------------------------------*/ | 370 | /*-----------------------------------------*/ |
381 | 371 | ||
@@ -391,8 +381,6 @@ static void __init omap_sx1_init(void) | |||
391 | 381 | ||
392 | platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices)); | 382 | platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices)); |
393 | 383 | ||
394 | omap_board_config = sx1_config; | ||
395 | omap_board_config_size = ARRAY_SIZE(sx1_config); | ||
396 | omap_serial_init(); | 384 | omap_serial_init(); |
397 | omap_register_i2c_bus(1, 100, NULL, 0); | 385 | omap_register_i2c_bus(1, 100, NULL, 0); |
398 | omap1_usb_init(&sx1_usb_config); | 386 | omap1_usb_init(&sx1_usb_config); |
@@ -406,6 +394,8 @@ static void __init omap_sx1_init(void) | |||
406 | gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */ | 394 | gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */ |
407 | gpio_direction_output(11, 0); /*A_SWITCH = 0 */ | 395 | gpio_direction_output(11, 0); /*A_SWITCH = 0 */ |
408 | gpio_direction_output(15, 0); /*A_USB_ON = 0 */ | 396 | gpio_direction_output(15, 0); /*A_USB_ON = 0 */ |
397 | |||
398 | omapfb_set_lcd_config(&sx1_lcd_config); | ||
409 | } | 399 | } |
410 | 400 | ||
411 | MACHINE_START(SX1, "OMAP310 based Siemens SX1") | 401 | MACHINE_START(SX1, "OMAP310 based Siemens SX1") |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 1d76a63c0983..187b2fe132e9 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <plat/mux.h> | 28 | #include <plat/mux.h> |
29 | #include <plat/mmc.h> | 29 | #include <plat/mmc.h> |
30 | #include <plat/omap7xx.h> | 30 | #include <plat/omap7xx.h> |
31 | #include <plat/mcbsp.h> | ||
32 | 31 | ||
33 | #include "clock.h" | 32 | #include "clock.h" |
34 | 33 | ||
@@ -250,16 +249,8 @@ static struct platform_device omap_pcm = { | |||
250 | .id = -1, | 249 | .id = -1, |
251 | }; | 250 | }; |
252 | 251 | ||
253 | OMAP_MCBSP_PLATFORM_DEVICE(1); | ||
254 | OMAP_MCBSP_PLATFORM_DEVICE(2); | ||
255 | OMAP_MCBSP_PLATFORM_DEVICE(3); | ||
256 | |||
257 | static void omap_init_audio(void) | 252 | static void omap_init_audio(void) |
258 | { | 253 | { |
259 | platform_device_register(&omap_mcbsp1); | ||
260 | platform_device_register(&omap_mcbsp2); | ||
261 | if (!cpu_is_omap7xx()) | ||
262 | platform_device_register(&omap_mcbsp3); | ||
263 | platform_device_register(&omap_pcm); | 254 | platform_device_register(&omap_pcm); |
264 | } | 255 | } |
265 | 256 | ||
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index bfb4fb1d7382..83c0250c530a 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S | |||
@@ -14,15 +14,9 @@ | |||
14 | #include <mach/irqs.h> | 14 | #include <mach/irqs.h> |
15 | #include <asm/hardware/gic.h> | 15 | #include <asm/hardware/gic.h> |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | .endm | 18 | .endm |
22 | 19 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | ||
24 | .endm | ||
25 | |||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
27 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) | 21 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) |
28 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | 22 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] |
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h deleted file mode 100644 index a6c1b3a16dfc..000000000000 --- a/arch/arm/mach-omap1/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap1/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c index 453809359ba6..4c5ce7d829c2 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/arch/arm/mach-omap1/lcd_dma.c | |||
@@ -117,7 +117,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); | |||
117 | void omap_set_lcd_dma_b1_vxres(unsigned long vxres) | 117 | void omap_set_lcd_dma_b1_vxres(unsigned long vxres) |
118 | { | 118 | { |
119 | if (cpu_is_omap15xx()) { | 119 | if (cpu_is_omap15xx()) { |
120 | printk(KERN_ERR "DMA virtual resulotion is not supported " | 120 | printk(KERN_ERR "DMA virtual resolution is not supported " |
121 | "in 1510 mode\n"); | 121 | "in 1510 mode\n"); |
122 | BUG(); | 122 | BUG(); |
123 | } | 123 | } |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 91f9abbd3250..3e8410a99990 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -420,18 +420,6 @@ static int __init omap1_mcbsp_init(void) | |||
420 | return -ENODEV; | 420 | return -ENODEV; |
421 | 421 | ||
422 | if (cpu_is_omap7xx()) | 422 | if (cpu_is_omap7xx()) |
423 | omap_mcbsp_count = OMAP7XX_MCBSP_COUNT; | ||
424 | else if (cpu_is_omap15xx()) | ||
425 | omap_mcbsp_count = OMAP15XX_MCBSP_COUNT; | ||
426 | else if (cpu_is_omap16xx()) | ||
427 | omap_mcbsp_count = OMAP16XX_MCBSP_COUNT; | ||
428 | |||
429 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | ||
430 | GFP_KERNEL); | ||
431 | if (!mcbsp_ptr) | ||
432 | return -ENOMEM; | ||
433 | |||
434 | if (cpu_is_omap7xx()) | ||
435 | omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0, | 423 | omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0, |
436 | OMAP7XX_MCBSP_RES_SZ, | 424 | OMAP7XX_MCBSP_RES_SZ, |
437 | omap7xx_mcbsp_pdata, | 425 | omap7xx_mcbsp_pdata, |
@@ -449,7 +437,7 @@ static int __init omap1_mcbsp_init(void) | |||
449 | omap16xx_mcbsp_pdata, | 437 | omap16xx_mcbsp_pdata, |
450 | OMAP16XX_MCBSP_COUNT); | 438 | OMAP16XX_MCBSP_COUNT); |
451 | 439 | ||
452 | return omap_mcbsp_init(); | 440 | return 0; |
453 | } | 441 | } |
454 | 442 | ||
455 | arch_initcall(omap1_mcbsp_init); | 443 | arch_initcall(omap1_mcbsp_init); |
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 89ea20ca0ccc..0c2c3669d594 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -42,9 +42,9 @@ | |||
42 | #include <linux/sysfs.h> | 42 | #include <linux/sysfs.h> |
43 | #include <linux/module.h> | 43 | #include <linux/module.h> |
44 | #include <linux/io.h> | 44 | #include <linux/io.h> |
45 | #include <linux/atomic.h> | ||
45 | 46 | ||
46 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
47 | #include <linux/atomic.h> | ||
48 | #include <asm/mach/time.h> | 48 | #include <asm/mach/time.h> |
49 | #include <asm/mach/irq.h> | 49 | #include <asm/mach/irq.h> |
50 | 50 | ||
@@ -108,13 +108,7 @@ void omap1_pm_idle(void) | |||
108 | __u32 use_idlect1 = arm_idlect1_mask; | 108 | __u32 use_idlect1 = arm_idlect1_mask; |
109 | int do_sleep = 0; | 109 | int do_sleep = 0; |
110 | 110 | ||
111 | local_irq_disable(); | ||
112 | local_fiq_disable(); | 111 | local_fiq_disable(); |
113 | if (need_resched()) { | ||
114 | local_fiq_enable(); | ||
115 | local_irq_enable(); | ||
116 | return; | ||
117 | } | ||
118 | 112 | ||
119 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) | 113 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) |
120 | #warning Enable 32kHz OS timer in order to allow sleep states in idle | 114 | #warning Enable 32kHz OS timer in order to allow sleep states in idle |
@@ -157,14 +151,12 @@ void omap1_pm_idle(void) | |||
157 | omap_writel(saved_idlect1, ARM_IDLECT1); | 151 | omap_writel(saved_idlect1, ARM_IDLECT1); |
158 | 152 | ||
159 | local_fiq_enable(); | 153 | local_fiq_enable(); |
160 | local_irq_enable(); | ||
161 | return; | 154 | return; |
162 | } | 155 | } |
163 | omap_sram_suspend(omap_readl(ARM_IDLECT1), | 156 | omap_sram_suspend(omap_readl(ARM_IDLECT1), |
164 | omap_readl(ARM_IDLECT2)); | 157 | omap_readl(ARM_IDLECT2)); |
165 | 158 | ||
166 | local_fiq_enable(); | 159 | local_fiq_enable(); |
167 | local_irq_enable(); | ||
168 | } | 160 | } |
169 | 161 | ||
170 | /* | 162 | /* |
@@ -583,8 +575,6 @@ static void omap_pm_init_proc(void) | |||
583 | 575 | ||
584 | #endif /* DEBUG && CONFIG_PROC_FS */ | 576 | #endif /* DEBUG && CONFIG_PROC_FS */ |
585 | 577 | ||
586 | static void (*saved_idle)(void) = NULL; | ||
587 | |||
588 | /* | 578 | /* |
589 | * omap_pm_prepare - Do preliminary suspend work. | 579 | * omap_pm_prepare - Do preliminary suspend work. |
590 | * | 580 | * |
@@ -592,8 +582,7 @@ static void (*saved_idle)(void) = NULL; | |||
592 | static int omap_pm_prepare(void) | 582 | static int omap_pm_prepare(void) |
593 | { | 583 | { |
594 | /* We cannot sleep in idle until we have resumed */ | 584 | /* We cannot sleep in idle until we have resumed */ |
595 | saved_idle = pm_idle; | 585 | disable_hlt(); |
596 | pm_idle = NULL; | ||
597 | 586 | ||
598 | return 0; | 587 | return 0; |
599 | } | 588 | } |
@@ -630,7 +619,7 @@ static int omap_pm_enter(suspend_state_t state) | |||
630 | 619 | ||
631 | static void omap_pm_finish(void) | 620 | static void omap_pm_finish(void) |
632 | { | 621 | { |
633 | pm_idle = saved_idle; | 622 | enable_hlt(); |
634 | } | 623 | } |
635 | 624 | ||
636 | 625 | ||
@@ -687,7 +676,7 @@ static int __init omap_pm_init(void) | |||
687 | return -ENODEV; | 676 | return -ENODEV; |
688 | } | 677 | } |
689 | 678 | ||
690 | pm_idle = omap1_pm_idle; | 679 | arm_pm_idle = omap1_pm_idle; |
691 | 680 | ||
692 | if (cpu_is_omap7xx()) | 681 | if (cpu_is_omap7xx()) |
693 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); | 682 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index bd76394ccaf8..06326a6e460d 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -17,7 +17,9 @@ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) | |||
17 | obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) | 17 | obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) |
18 | obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) | 18 | obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) |
19 | 19 | ||
20 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | 20 | ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) |
21 | obj-y += mcbsp.o | ||
22 | endif | ||
21 | 23 | ||
22 | obj-$(CONFIG_TWL4030_CORE) += omap_twl.o | 24 | obj-$(CONFIG_TWL4030_CORE) += omap_twl.o |
23 | 25 | ||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 4e9071589bfb..44cf1893829a 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/regulator/fixed.h> | 25 | #include <linux/regulator/fixed.h> |
26 | #include <linux/leds.h> | 26 | #include <linux/leds.h> |
27 | #include <linux/leds_pwm.h> | 27 | #include <linux/leds_pwm.h> |
28 | #include <linux/platform_data/omap4-keypad.h> | ||
28 | 29 | ||
29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
30 | #include <asm/hardware/gic.h> | 31 | #include <asm/hardware/gic.h> |
@@ -41,6 +42,7 @@ | |||
41 | #include <video/omap-panel-nokia-dsi.h> | 42 | #include <video/omap-panel-nokia-dsi.h> |
42 | #include <video/omap-panel-picodlp.h> | 43 | #include <video/omap-panel-picodlp.h> |
43 | #include <linux/wl12xx.h> | 44 | #include <linux/wl12xx.h> |
45 | #include <linux/platform_data/omap-abe-twl6040.h> | ||
44 | 46 | ||
45 | #include "mux.h" | 47 | #include "mux.h" |
46 | #include "hsmmc.h" | 48 | #include "hsmmc.h" |
@@ -378,12 +380,40 @@ static struct platform_device sdp4430_dmic_codec = { | |||
378 | .id = -1, | 380 | .id = -1, |
379 | }; | 381 | }; |
380 | 382 | ||
383 | static struct omap_abe_twl6040_data sdp4430_abe_audio_data = { | ||
384 | .card_name = "SDP4430", | ||
385 | .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
386 | .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
387 | .has_ep = 1, | ||
388 | .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
389 | .has_vibra = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
390 | |||
391 | .has_dmic = 1, | ||
392 | .has_hsmic = 1, | ||
393 | .has_mainmic = 1, | ||
394 | .has_submic = 1, | ||
395 | .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
396 | |||
397 | .jack_detection = 1, | ||
398 | /* MCLK input is 38.4MHz */ | ||
399 | .mclk_freq = 38400000, | ||
400 | }; | ||
401 | |||
402 | static struct platform_device sdp4430_abe_audio = { | ||
403 | .name = "omap-abe-twl6040", | ||
404 | .id = -1, | ||
405 | .dev = { | ||
406 | .platform_data = &sdp4430_abe_audio_data, | ||
407 | }, | ||
408 | }; | ||
409 | |||
381 | static struct platform_device *sdp4430_devices[] __initdata = { | 410 | static struct platform_device *sdp4430_devices[] __initdata = { |
382 | &sdp4430_gpio_keys_device, | 411 | &sdp4430_gpio_keys_device, |
383 | &sdp4430_leds_gpio, | 412 | &sdp4430_leds_gpio, |
384 | &sdp4430_leds_pwm, | 413 | &sdp4430_leds_pwm, |
385 | &sdp4430_vbat, | 414 | &sdp4430_vbat, |
386 | &sdp4430_dmic_codec, | 415 | &sdp4430_dmic_codec, |
416 | &sdp4430_abe_audio, | ||
387 | }; | 417 | }; |
388 | 418 | ||
389 | static struct omap_musb_board_data musb_board_data = { | 419 | static struct omap_musb_board_data musb_board_data = { |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index ad497620539b..45fdfe2bd9d5 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -68,7 +68,7 @@ static void __init omap_generic_init(void) | |||
68 | { | 68 | { |
69 | struct device_node *node = of_find_matching_node(NULL, intc_match); | 69 | struct device_node *node = of_find_matching_node(NULL, intc_match); |
70 | if (node) | 70 | if (node) |
71 | irq_domain_add_simple(node, 0); | 71 | irq_domain_add_legacy(node, 32, 0, 0, &irq_domain_simple_ops, NULL); |
72 | 72 | ||
73 | omap_sdrc_init(NULL, NULL); | 73 | omap_sdrc_init(NULL, NULL); |
74 | 74 | ||
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 28fc271f7031..e4415917693f 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/regulator/machine.h> | 28 | #include <linux/regulator/machine.h> |
29 | #include <linux/regulator/fixed.h> | 29 | #include <linux/regulator/fixed.h> |
30 | #include <linux/wl12xx.h> | 30 | #include <linux/wl12xx.h> |
31 | #include <linux/platform_data/omap-abe-twl6040.h> | ||
31 | 32 | ||
32 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
33 | #include <asm/hardware/gic.h> | 34 | #include <asm/hardware/gic.h> |
@@ -91,9 +92,34 @@ static struct platform_device leds_gpio = { | |||
91 | }, | 92 | }, |
92 | }; | 93 | }; |
93 | 94 | ||
95 | static struct omap_abe_twl6040_data panda_abe_audio_data = { | ||
96 | /* Audio out */ | ||
97 | .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
98 | /* HandsFree through expasion connector */ | ||
99 | .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
100 | /* PandaBoard: FM TX, PandaBoardES: can be connected to audio out */ | ||
101 | .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
102 | /* PandaBoard: FM RX, PandaBoardES: audio in */ | ||
103 | .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, | ||
104 | /* No jack detection. */ | ||
105 | .jack_detection = 0, | ||
106 | /* MCLK input is 38.4MHz */ | ||
107 | .mclk_freq = 38400000, | ||
108 | |||
109 | }; | ||
110 | |||
111 | static struct platform_device panda_abe_audio = { | ||
112 | .name = "omap-abe-twl6040", | ||
113 | .id = -1, | ||
114 | .dev = { | ||
115 | .platform_data = &panda_abe_audio_data, | ||
116 | }, | ||
117 | }; | ||
118 | |||
94 | static struct platform_device *panda_devices[] __initdata = { | 119 | static struct platform_device *panda_devices[] __initdata = { |
95 | &leds_gpio, | 120 | &leds_gpio, |
96 | &wl1271_device, | 121 | &wl1271_device, |
122 | &panda_abe_audio, | ||
97 | }; | 123 | }; |
98 | 124 | ||
99 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | 125 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
@@ -252,8 +278,25 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
252 | return 0; | 278 | return 0; |
253 | } | 279 | } |
254 | 280 | ||
281 | static struct twl4030_codec_data twl6040_codec = { | ||
282 | /* single-step ramp for headset and handsfree */ | ||
283 | .hs_left_step = 0x0f, | ||
284 | .hs_right_step = 0x0f, | ||
285 | .hf_left_step = 0x1d, | ||
286 | .hf_right_step = 0x1d, | ||
287 | }; | ||
288 | |||
289 | static struct twl4030_audio_data twl6040_audio = { | ||
290 | .codec = &twl6040_codec, | ||
291 | .audpwron_gpio = 127, | ||
292 | .naudint_irq = OMAP44XX_IRQ_SYS_2N, | ||
293 | .irq_base = TWL6040_CODEC_IRQ_BASE, | ||
294 | }; | ||
295 | |||
255 | /* Panda board uses the common PMIC configuration */ | 296 | /* Panda board uses the common PMIC configuration */ |
256 | static struct twl4030_platform_data omap4_panda_twldata; | 297 | static struct twl4030_platform_data omap4_panda_twldata = { |
298 | .audio = &twl6040_audio, | ||
299 | }; | ||
257 | 300 | ||
258 | /* | 301 | /* |
259 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM | 302 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM |
@@ -485,6 +528,20 @@ void omap4_panda_display_init(void) | |||
485 | omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN); | 528 | omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN); |
486 | } | 529 | } |
487 | 530 | ||
531 | static void omap4_panda_init_rev(void) | ||
532 | { | ||
533 | if (cpu_is_omap443x()) { | ||
534 | /* PandaBoard 4430 */ | ||
535 | /* ASoC audio configuration */ | ||
536 | panda_abe_audio_data.card_name = "PandaBoard"; | ||
537 | panda_abe_audio_data.has_hsmic = 1; | ||
538 | } else { | ||
539 | /* PandaBoard ES */ | ||
540 | /* ASoC audio configuration */ | ||
541 | panda_abe_audio_data.card_name = "PandaBoardES"; | ||
542 | } | ||
543 | } | ||
544 | |||
488 | static void __init omap4_panda_init(void) | 545 | static void __init omap4_panda_init(void) |
489 | { | 546 | { |
490 | int package = OMAP_PACKAGE_CBS; | 547 | int package = OMAP_PACKAGE_CBS; |
@@ -498,6 +555,7 @@ static void __init omap4_panda_init(void) | |||
498 | if (ret) | 555 | if (ret) |
499 | pr_err("error setting wl12xx data: %d\n", ret); | 556 | pr_err("error setting wl12xx data: %d\n", ret); |
500 | 557 | ||
558 | omap4_panda_init_rev(); | ||
501 | omap4_panda_i2c_init(); | 559 | omap4_panda_i2c_init(); |
502 | platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); | 560 | platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); |
503 | platform_device_register(&omap_vwlan_device); | 561 | platform_device_register(&omap_vwlan_device); |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 283d11eae693..f713818be06f 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/slab.h> | 18 | #include <linux/slab.h> |
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/platform_data/omap4-keypad.h> | ||
20 | 21 | ||
21 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
22 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
@@ -26,7 +27,6 @@ | |||
26 | 27 | ||
27 | #include <plat/tc.h> | 28 | #include <plat/tc.h> |
28 | #include <plat/board.h> | 29 | #include <plat/board.h> |
29 | #include <plat/mcbsp.h> | ||
30 | #include <plat/mmc.h> | 30 | #include <plat/mmc.h> |
31 | #include <plat/dma.h> | 31 | #include <plat/dma.h> |
32 | #include <plat/omap_hwmod.h> | 32 | #include <plat/omap_hwmod.h> |
@@ -304,29 +304,8 @@ static struct platform_device omap_pcm = { | |||
304 | .id = -1, | 304 | .id = -1, |
305 | }; | 305 | }; |
306 | 306 | ||
307 | /* | ||
308 | * OMAP2420 has 2 McBSP ports | ||
309 | * OMAP2430 has 5 McBSP ports | ||
310 | * OMAP3 has 5 McBSP ports | ||
311 | * OMAP4 has 4 McBSP ports | ||
312 | */ | ||
313 | OMAP_MCBSP_PLATFORM_DEVICE(1); | ||
314 | OMAP_MCBSP_PLATFORM_DEVICE(2); | ||
315 | OMAP_MCBSP_PLATFORM_DEVICE(3); | ||
316 | OMAP_MCBSP_PLATFORM_DEVICE(4); | ||
317 | OMAP_MCBSP_PLATFORM_DEVICE(5); | ||
318 | |||
319 | static void omap_init_audio(void) | 307 | static void omap_init_audio(void) |
320 | { | 308 | { |
321 | platform_device_register(&omap_mcbsp1); | ||
322 | platform_device_register(&omap_mcbsp2); | ||
323 | if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
324 | platform_device_register(&omap_mcbsp3); | ||
325 | platform_device_register(&omap_mcbsp4); | ||
326 | } | ||
327 | if (cpu_is_omap243x() || cpu_is_omap34xx()) | ||
328 | platform_device_register(&omap_mcbsp5); | ||
329 | |||
330 | platform_device_register(&omap_pcm); | 309 | platform_device_register(&omap_pcm); |
331 | } | 310 | } |
332 | 311 | ||
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c index 9c442e290ccb..ce91aad4cdad 100644 --- a/arch/arm/mach-omap2/emu.c +++ b/arch/arm/mach-omap2/emu.c | |||
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin"); | |||
30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) | 30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) |
31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) | 31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) |
32 | 32 | ||
33 | static struct amba_device omap3_etb_device = { | 33 | static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); |
34 | .dev = { | 34 | static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); |
35 | .init_name = "etb", | ||
36 | }, | ||
37 | .res = { | ||
38 | .start = ETB_BASE, | ||
39 | .end = ETB_BASE + SZ_4K - 1, | ||
40 | .flags = IORESOURCE_MEM, | ||
41 | }, | ||
42 | .periphid = 0x000bb907, | ||
43 | }; | ||
44 | |||
45 | static struct amba_device omap3_etm_device = { | ||
46 | .dev = { | ||
47 | .init_name = "etm", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = ETM_BASE, | ||
51 | .end = ETM_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .periphid = 0x102bb921, | ||
55 | }; | ||
56 | 35 | ||
57 | static int __init emu_init(void) | 36 | static int __init emu_init(void) |
58 | { | 37 | { |
@@ -66,4 +45,3 @@ static int __init emu_init(void) | |||
66 | } | 45 | } |
67 | 46 | ||
68 | subsys_initcall(emu_init); | 47 | subsys_initcall(emu_init); |
69 | |||
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S deleted file mode 100644 index 56964a0c4c7e..000000000000 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for OMAP-based platforms | ||
5 | * | ||
6 | * Copyright (C) 2009 Texas Instruments | ||
7 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h deleted file mode 100644 index d488721ab90b..000000000000 --- a/arch/arm/mach-omap2/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap2/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index fb11b44fbdec..e501b4972a64 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/omapfb.h> | ||
25 | 24 | ||
26 | #include <asm/tlb.h> | 25 | #include <asm/tlb.h> |
27 | 26 | ||
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index fb4bcf81a183..ecc039e794db 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include "cm2xxx_3xxx.h" | 34 | #include "cm2xxx_3xxx.h" |
35 | #include "cm-regbits-34xx.h" | 35 | #include "cm-regbits-34xx.h" |
36 | 36 | ||
37 | /* McBSP internal signal muxing function */ | 37 | /* McBSP1 internal signal muxing function for OMAP2/3 */ |
38 | static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, | 38 | static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, |
39 | const char *src) | 39 | const char *src) |
40 | { | 40 | { |
@@ -65,6 +65,42 @@ static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, | |||
65 | return 0; | 65 | return 0; |
66 | } | 66 | } |
67 | 67 | ||
68 | /* McBSP4 internal signal muxing function for OMAP4 */ | ||
69 | #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX (1 << 31) | ||
70 | #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX (1 << 30) | ||
71 | static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal, | ||
72 | const char *src) | ||
73 | { | ||
74 | u32 v; | ||
75 | |||
76 | /* | ||
77 | * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR | ||
78 | * mux) is used */ | ||
79 | v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP); | ||
80 | |||
81 | if (!strcmp(signal, "clkr")) { | ||
82 | if (!strcmp(src, "clkr")) | ||
83 | v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX; | ||
84 | else if (!strcmp(src, "clkx")) | ||
85 | v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX; | ||
86 | else | ||
87 | return -EINVAL; | ||
88 | } else if (!strcmp(signal, "fsr")) { | ||
89 | if (!strcmp(src, "fsr")) | ||
90 | v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX; | ||
91 | else if (!strcmp(src, "fsx")) | ||
92 | v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX; | ||
93 | else | ||
94 | return -EINVAL; | ||
95 | } else { | ||
96 | return -EINVAL; | ||
97 | } | ||
98 | |||
99 | omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
68 | /* McBSP CLKS source switching function */ | 104 | /* McBSP CLKS source switching function */ |
69 | static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, | 105 | static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, |
70 | const char *src) | 106 | const char *src) |
@@ -146,9 +182,15 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | |||
146 | pdata->has_ccr = true; | 182 | pdata->has_ccr = true; |
147 | } | 183 | } |
148 | pdata->set_clk_src = omap2_mcbsp_set_clk_src; | 184 | pdata->set_clk_src = omap2_mcbsp_set_clk_src; |
149 | if (id == 1) | 185 | |
186 | /* On OMAP2/3 the McBSP1 port has 6 pin configuration */ | ||
187 | if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4) | ||
150 | pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; | 188 | pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; |
151 | 189 | ||
190 | /* On OMAP4 the McBSP4 port has 6 pin configuration */ | ||
191 | if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4) | ||
192 | pdata->mux_signal = omap4_mcbsp4_mux_rx_clk; | ||
193 | |||
152 | if (oh->class->rev == MCBSP_CONFIG_TYPE3) { | 194 | if (oh->class->rev == MCBSP_CONFIG_TYPE3) { |
153 | if (id == 2) | 195 | if (id == 2) |
154 | /* The FIFO has 1024 + 256 locations */ | 196 | /* The FIFO has 1024 + 256 locations */ |
@@ -180,7 +222,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | |||
180 | name, oh->name); | 222 | name, oh->name); |
181 | return PTR_ERR(pdev); | 223 | return PTR_ERR(pdev); |
182 | } | 224 | } |
183 | omap_mcbsp_count++; | ||
184 | return 0; | 225 | return 0; |
185 | } | 226 | } |
186 | 227 | ||
@@ -188,11 +229,6 @@ static int __init omap2_mcbsp_init(void) | |||
188 | { | 229 | { |
189 | omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); | 230 | omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); |
190 | 231 | ||
191 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | 232 | return 0; |
192 | GFP_KERNEL); | ||
193 | if (!mcbsp_ptr) | ||
194 | return -ENOMEM; | ||
195 | |||
196 | return omap_mcbsp_init(); | ||
197 | } | 233 | } |
198 | arch_initcall(omap2_mcbsp_init); | 234 | arch_initcall(omap2_mcbsp_init); |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 23de98d03841..a4eb5c280435 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -226,7 +226,6 @@ static int omap2_can_sleep(void) | |||
226 | 226 | ||
227 | static void omap2_pm_idle(void) | 227 | static void omap2_pm_idle(void) |
228 | { | 228 | { |
229 | local_irq_disable(); | ||
230 | local_fiq_disable(); | 229 | local_fiq_disable(); |
231 | 230 | ||
232 | if (!omap2_can_sleep()) { | 231 | if (!omap2_can_sleep()) { |
@@ -243,7 +242,6 @@ static void omap2_pm_idle(void) | |||
243 | 242 | ||
244 | out: | 243 | out: |
245 | local_fiq_enable(); | 244 | local_fiq_enable(); |
246 | local_irq_enable(); | ||
247 | } | 245 | } |
248 | 246 | ||
249 | #ifdef CONFIG_SUSPEND | 247 | #ifdef CONFIG_SUSPEND |
@@ -462,7 +460,7 @@ static int __init omap2_pm_init(void) | |||
462 | } | 460 | } |
463 | 461 | ||
464 | suspend_set_ops(&omap_pm_ops); | 462 | suspend_set_ops(&omap_pm_ops); |
465 | pm_idle = omap2_pm_idle; | 463 | arm_pm_idle = omap2_pm_idle; |
466 | 464 | ||
467 | return 0; | 465 | return 0; |
468 | } | 466 | } |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fc6987578920..b77df735fa6c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -418,10 +418,9 @@ void omap_sram_idle(void) | |||
418 | 418 | ||
419 | static void omap3_pm_idle(void) | 419 | static void omap3_pm_idle(void) |
420 | { | 420 | { |
421 | local_irq_disable(); | ||
422 | local_fiq_disable(); | 421 | local_fiq_disable(); |
423 | 422 | ||
424 | if (omap_irq_pending() || need_resched()) | 423 | if (omap_irq_pending()) |
425 | goto out; | 424 | goto out; |
426 | 425 | ||
427 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); | 426 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); |
@@ -434,7 +433,6 @@ static void omap3_pm_idle(void) | |||
434 | 433 | ||
435 | out: | 434 | out: |
436 | local_fiq_enable(); | 435 | local_fiq_enable(); |
437 | local_irq_enable(); | ||
438 | } | 436 | } |
439 | 437 | ||
440 | #ifdef CONFIG_SUSPEND | 438 | #ifdef CONFIG_SUSPEND |
@@ -848,7 +846,7 @@ static int __init omap3_pm_init(void) | |||
848 | suspend_set_ops(&omap_pm_ops); | 846 | suspend_set_ops(&omap_pm_ops); |
849 | #endif /* CONFIG_SUSPEND */ | 847 | #endif /* CONFIG_SUSPEND */ |
850 | 848 | ||
851 | pm_idle = omap3_pm_idle; | 849 | arm_pm_idle = omap3_pm_idle; |
852 | omap3_idle_init(); | 850 | omap3_idle_init(); |
853 | 851 | ||
854 | /* | 852 | /* |
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index c264ef7219c1..c840689df24a 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | |||
173 | * omap_default_idle - OMAP4 default ilde routine.' | 173 | * omap_default_idle - OMAP4 default ilde routine.' |
174 | * | 174 | * |
175 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed | 175 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed |
176 | * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and | 176 | * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and |
177 | * by secondary CPU with CONFIG_CPUIDLE. | 177 | * by secondary CPU with CONFIG_CPUIDLE. |
178 | */ | 178 | */ |
179 | static void omap_default_idle(void) | 179 | static void omap_default_idle(void) |
180 | { | 180 | { |
181 | local_irq_disable(); | ||
182 | local_fiq_disable(); | 181 | local_fiq_disable(); |
183 | 182 | ||
184 | omap_do_wfi(); | 183 | omap_do_wfi(); |
185 | 184 | ||
186 | local_fiq_enable(); | 185 | local_fiq_enable(); |
187 | local_irq_enable(); | ||
188 | } | 186 | } |
189 | 187 | ||
190 | /** | 188 | /** |
@@ -255,8 +253,8 @@ static int __init omap4_pm_init(void) | |||
255 | suspend_set_ops(&omap_pm_ops); | 253 | suspend_set_ops(&omap_pm_ops); |
256 | #endif /* CONFIG_SUSPEND */ | 254 | #endif /* CONFIG_SUSPEND */ |
257 | 255 | ||
258 | /* Overwrite the default arch_idle() */ | 256 | /* Overwrite the default cpu_do_idle() */ |
259 | pm_idle = omap_default_idle; | 257 | arm_pm_idle = omap_default_idle; |
260 | 258 | ||
261 | omap4_idle_init(); | 259 | omap4_idle_init(); |
262 | 260 | ||
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 860118ab43e2..873b51d494ea 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include <mach/system.h> | ||
28 | #include <plat/common.h> | 27 | #include <plat/common.h> |
29 | #include <plat/prcm.h> | 28 | #include <plat/prcm.h> |
30 | #include <plat/irqs.h> | 29 | #include <plat/irqs.h> |
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index a104d5a80e11..e52108c9aaea 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c | |||
@@ -214,7 +214,7 @@ void __init db88f5281_pci_preinit(void) | |||
214 | if (gpio_direction_input(pin) == 0) { | 214 | if (gpio_direction_input(pin) == 0) { |
215 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); | 215 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); |
216 | } else { | 216 | } else { |
217 | printk(KERN_ERR "db88f5281_pci_preinit faield to " | 217 | printk(KERN_ERR "db88f5281_pci_preinit failed to " |
218 | "set_irq_type pin %d\n", pin); | 218 | "set_irq_type pin %d\n", pin); |
219 | gpio_free(pin); | 219 | gpio_free(pin); |
220 | } | 220 | } |
@@ -227,7 +227,7 @@ void __init db88f5281_pci_preinit(void) | |||
227 | if (gpio_direction_input(pin) == 0) { | 227 | if (gpio_direction_input(pin) == 0) { |
228 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); | 228 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); |
229 | } else { | 229 | } else { |
230 | printk(KERN_ERR "db88f5281_pci_preinit faield " | 230 | printk(KERN_ERR "db88f5281_pci_preinit failed " |
231 | "to set_irq_type pin %d\n", pin); | 231 | "to set_irq_type pin %d\n", pin); |
232 | gpio_free(pin); | 232 | gpio_free(pin); |
233 | } | 233 | } |
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S index d658992e5401..79eb502a1e64 100644 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =MAIN_IRQ_CAUSE | 14 | ldr \base, =MAIN_IRQ_CAUSE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h deleted file mode 100644 index 825a2650cefa..000000000000 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion5x/include/mach/system.h | ||
3 | * | ||
4 | * Tzachi Perelstein <tzachi@marvell.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | static inline void arch_idle(void) | ||
15 | { | ||
16 | cpu_do_idle(); | ||
17 | } | ||
18 | |||
19 | #endif | ||
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index 09a045f0c406..d6a91948e4dc 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -171,13 +171,14 @@ static int __init pcie_setup(struct pci_sys_data *sys) | |||
171 | /* | 171 | /* |
172 | * IORESOURCE_IO | 172 | * IORESOURCE_IO |
173 | */ | 173 | */ |
174 | sys->io_offset = 0; | ||
174 | res[0].name = "PCIe I/O Space"; | 175 | res[0].name = "PCIe I/O Space"; |
175 | res[0].flags = IORESOURCE_IO; | 176 | res[0].flags = IORESOURCE_IO; |
176 | res[0].start = ORION5X_PCIE_IO_BUS_BASE; | 177 | res[0].start = ORION5X_PCIE_IO_BUS_BASE; |
177 | res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; | 178 | res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; |
178 | if (request_resource(&ioport_resource, &res[0])) | 179 | if (request_resource(&ioport_resource, &res[0])) |
179 | panic("Request PCIe IO resource failed\n"); | 180 | panic("Request PCIe IO resource failed\n"); |
180 | pci_add_resource(&sys->resources, &res[0]); | 181 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); |
181 | 182 | ||
182 | /* | 183 | /* |
183 | * IORESOURCE_MEM | 184 | * IORESOURCE_MEM |
@@ -188,9 +189,7 @@ static int __init pcie_setup(struct pci_sys_data *sys) | |||
188 | res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; | 189 | res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; |
189 | if (request_resource(&iomem_resource, &res[1])) | 190 | if (request_resource(&iomem_resource, &res[1])) |
190 | panic("Request PCIe Memory resource failed\n"); | 191 | panic("Request PCIe Memory resource failed\n"); |
191 | pci_add_resource(&sys->resources, &res[1]); | 192 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); |
192 | |||
193 | sys->io_offset = 0; | ||
194 | 193 | ||
195 | return 1; | 194 | return 1; |
196 | } | 195 | } |
@@ -499,13 +498,14 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
499 | /* | 498 | /* |
500 | * IORESOURCE_IO | 499 | * IORESOURCE_IO |
501 | */ | 500 | */ |
501 | sys->io_offset = 0; | ||
502 | res[0].name = "PCI I/O Space"; | 502 | res[0].name = "PCI I/O Space"; |
503 | res[0].flags = IORESOURCE_IO; | 503 | res[0].flags = IORESOURCE_IO; |
504 | res[0].start = ORION5X_PCI_IO_BUS_BASE; | 504 | res[0].start = ORION5X_PCI_IO_BUS_BASE; |
505 | res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; | 505 | res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; |
506 | if (request_resource(&ioport_resource, &res[0])) | 506 | if (request_resource(&ioport_resource, &res[0])) |
507 | panic("Request PCI IO resource failed\n"); | 507 | panic("Request PCI IO resource failed\n"); |
508 | pci_add_resource(&sys->resources, &res[0]); | 508 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); |
509 | 509 | ||
510 | /* | 510 | /* |
511 | * IORESOURCE_MEM | 511 | * IORESOURCE_MEM |
@@ -516,9 +516,7 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
516 | res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; | 516 | res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; |
517 | if (request_resource(&iomem_resource, &res[1])) | 517 | if (request_resource(&iomem_resource, &res[1])) |
518 | panic("Request PCI Memory resource failed\n"); | 518 | panic("Request PCI Memory resource failed\n"); |
519 | pci_add_resource(&sys->resources, &res[1]); | 519 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); |
520 | |||
521 | sys->io_offset = 0; | ||
522 | 520 | ||
523 | return 1; | 521 | return 1; |
524 | } | 522 | } |
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 96438b6b2022..e3ce61711478 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c | |||
@@ -149,7 +149,7 @@ void __init rd88f5182_pci_preinit(void) | |||
149 | if (gpio_direction_input(pin) == 0) { | 149 | if (gpio_direction_input(pin) == 0) { |
150 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); | 150 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); |
151 | } else { | 151 | } else { |
152 | printk(KERN_ERR "rd88f5182_pci_preinit faield to " | 152 | printk(KERN_ERR "rd88f5182_pci_preinit failed to " |
153 | "set_irq_type pin %d\n", pin); | 153 | "set_irq_type pin %d\n", pin); |
154 | gpio_free(pin); | 154 | gpio_free(pin); |
155 | } | 155 | } |
@@ -162,7 +162,7 @@ void __init rd88f5182_pci_preinit(void) | |||
162 | if (gpio_direction_input(pin) == 0) { | 162 | if (gpio_direction_input(pin) == 0) { |
163 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); | 163 | irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); |
164 | } else { | 164 | } else { |
165 | printk(KERN_ERR "rd88f5182_pci_preinit faield to " | 165 | printk(KERN_ERR "rd88f5182_pci_preinit failed to " |
166 | "set_irq_type pin %d\n", pin); | 166 | "set_irq_type pin %d\n", pin); |
167 | gpio_free(pin); | 167 | gpio_free(pin); |
168 | } | 168 | } |
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S deleted file mode 100644 index 9b505ac00be9..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * entry-macro.S | ||
3 | * | ||
4 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
5 | * | ||
6 | * Low-level IRQ helper macros for picoXcell platforms | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h deleted file mode 100644 index 1a5d8cb57df4..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching and wait for interrupt | ||
21 | * tricks. | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/arch/arm/mach-pnx4008/include/mach/entry-macro.S index db7eeebf30d7..77a555846719 100644 --- a/arch/arm/mach-pnx4008/include/mach/entry-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/entry-macro.S | |||
@@ -25,15 +25,9 @@ | |||
25 | #define SIC1_BASE_INT 32 | 25 | #define SIC1_BASE_INT 32 |
26 | #define SIC2_BASE_INT 64 | 26 | #define SIC2_BASE_INT 64 |
27 | 27 | ||
28 | .macro disable_fiq | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_preamble, base, tmp | 28 | .macro get_irqnr_preamble, base, tmp |
32 | .endm | 29 | .endm |
33 | 30 | ||
34 | .macro arch_ret_to_user, tmp1, tmp2 | ||
35 | .endm | ||
36 | |||
37 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
38 | /* decode the MIC interrupt numbers */ | 32 | /* decode the MIC interrupt numbers */ |
39 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) | 33 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) |
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h deleted file mode 100644 index 60cfe7188091..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Philips Semiconductors | ||
5 | * Copyright (C) 2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static void arch_idle(void) | ||
25 | { | ||
26 | cpu_do_idle(); | ||
27 | } | ||
28 | |||
29 | #endif | ||
diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S index 1c8a50f102a7..86434e7a5be9 100644 --- a/arch/arm/mach-prima2/include/mach/entry-macro.S +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S | |||
@@ -20,10 +20,3 @@ | |||
20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f | 20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f |
21 | movges \irqnr, #0 | 21 | movges \irqnr, #0 |
22 | .endm | 22 | .endm |
23 | |||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h deleted file mode 100644 index 2c7d2a9d0c92..000000000000 --- a/arch/arm/mach-prima2/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-prima2/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
5 | * | ||
6 | * Licensed under GPLv2 or later. | ||
7 | */ | ||
8 | |||
9 | #ifndef __MACH_SYSTEM_H__ | ||
10 | #define __MACH_SYSTEM_H__ | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c index d93ceef4a50a..37c2de9b6f26 100644 --- a/arch/arm/mach-prima2/irq.c +++ b/arch/arm/mach-prima2/irq.c | |||
@@ -68,7 +68,7 @@ void __init sirfsoc_of_irq_init(void) | |||
68 | if (!sirfsoc_intc_base) | 68 | if (!sirfsoc_intc_base) |
69 | panic("unable to map intc cpu registers\n"); | 69 | panic("unable to map intc cpu registers\n"); |
70 | 70 | ||
71 | irq_domain_add_simple(np, 0); | 71 | irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL); |
72 | 72 | ||
73 | of_node_put(np); | 73 | of_node_put(np); |
74 | 74 | ||
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index f02fa1e6ba86..954641e6c8b1 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h | |||
@@ -174,7 +174,6 @@ enum balloon3_features { | |||
174 | 174 | ||
175 | #define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) | 175 | #define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) |
176 | #define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) | 176 | #define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) |
177 | #define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD) | ||
178 | 177 | ||
179 | #define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) | 178 | #define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) |
180 | 179 | ||
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S deleted file mode 100644 index 260c0c17692a..000000000000 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for PXA-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h deleted file mode 100644 index c5afacd3cc0b..000000000000 --- a/arch/arm/mach-pxa/include/mach/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/system.h | ||
3 | * | ||
4 | * Author: Nicolas Pitre | ||
5 | * Created: Jun 15, 2001 | ||
6 | * Copyright: MontaVista Software Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c index e28dfb88827f..5ead6d480c6d 100644 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c | |||
@@ -33,7 +33,7 @@ struct pxa3xx_u2d_ulpi { | |||
33 | struct clk *clk; | 33 | struct clk *clk; |
34 | void __iomem *mmio_base; | 34 | void __iomem *mmio_base; |
35 | 35 | ||
36 | struct otg_transceiver *otg; | 36 | struct usb_phy *otg; |
37 | unsigned int ulpi_mode; | 37 | unsigned int ulpi_mode; |
38 | }; | 38 | }; |
39 | 39 | ||
@@ -79,7 +79,7 @@ static int pxa310_ulpi_poll(void) | |||
79 | return -ETIMEDOUT; | 79 | return -ETIMEDOUT; |
80 | } | 80 | } |
81 | 81 | ||
82 | static int pxa310_ulpi_read(struct otg_transceiver *otg, u32 reg) | 82 | static int pxa310_ulpi_read(struct usb_phy *otg, u32 reg) |
83 | { | 83 | { |
84 | int err; | 84 | int err; |
85 | 85 | ||
@@ -98,7 +98,7 @@ static int pxa310_ulpi_read(struct otg_transceiver *otg, u32 reg) | |||
98 | return u2d_readl(U2DOTGUCR) & U2DOTGUCR_RDATA; | 98 | return u2d_readl(U2DOTGUCR) & U2DOTGUCR_RDATA; |
99 | } | 99 | } |
100 | 100 | ||
101 | static int pxa310_ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) | 101 | static int pxa310_ulpi_write(struct usb_phy *otg, u32 val, u32 reg) |
102 | { | 102 | { |
103 | if (pxa310_ulpi_get_phymode() != SYNCH) { | 103 | if (pxa310_ulpi_get_phymode() != SYNCH) { |
104 | pr_warning("%s: PHY is not in SYNCH mode!\n", __func__); | 104 | pr_warning("%s: PHY is not in SYNCH mode!\n", __func__); |
@@ -111,7 +111,7 @@ static int pxa310_ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) | |||
111 | return pxa310_ulpi_poll(); | 111 | return pxa310_ulpi_poll(); |
112 | } | 112 | } |
113 | 113 | ||
114 | struct otg_io_access_ops pxa310_ulpi_access_ops = { | 114 | struct usb_phy_io_ops pxa310_ulpi_access_ops = { |
115 | .read = pxa310_ulpi_read, | 115 | .read = pxa310_ulpi_read, |
116 | .write = pxa310_ulpi_write, | 116 | .write = pxa310_ulpi_write, |
117 | }; | 117 | }; |
@@ -139,19 +139,19 @@ static int pxa310_start_otg_host_transcvr(struct usb_bus *host) | |||
139 | 139 | ||
140 | pxa310_otg_transceiver_rtsm(); | 140 | pxa310_otg_transceiver_rtsm(); |
141 | 141 | ||
142 | err = otg_init(u2d->otg); | 142 | err = usb_phy_init(u2d->otg); |
143 | if (err) { | 143 | if (err) { |
144 | pr_err("OTG transceiver init failed"); | 144 | pr_err("OTG transceiver init failed"); |
145 | return err; | 145 | return err; |
146 | } | 146 | } |
147 | 147 | ||
148 | err = otg_set_vbus(u2d->otg, 1); | 148 | err = otg_set_vbus(u2d->otg->otg, 1); |
149 | if (err) { | 149 | if (err) { |
150 | pr_err("OTG transceiver VBUS set failed"); | 150 | pr_err("OTG transceiver VBUS set failed"); |
151 | return err; | 151 | return err; |
152 | } | 152 | } |
153 | 153 | ||
154 | err = otg_set_host(u2d->otg, host); | 154 | err = otg_set_host(u2d->otg->otg, host); |
155 | if (err) | 155 | if (err) |
156 | pr_err("OTG transceiver Host mode set failed"); | 156 | pr_err("OTG transceiver Host mode set failed"); |
157 | 157 | ||
@@ -189,9 +189,9 @@ static void pxa310_stop_otg_hc(void) | |||
189 | { | 189 | { |
190 | pxa310_otg_transceiver_rtsm(); | 190 | pxa310_otg_transceiver_rtsm(); |
191 | 191 | ||
192 | otg_set_host(u2d->otg, NULL); | 192 | otg_set_host(u2d->otg->otg, NULL); |
193 | otg_set_vbus(u2d->otg, 0); | 193 | otg_set_vbus(u2d->otg->otg, 0); |
194 | otg_shutdown(u2d->otg); | 194 | usb_phy_shutdown(u2d->otg); |
195 | } | 195 | } |
196 | 196 | ||
197 | static void pxa310_u2d_setup_otg_hc(void) | 197 | static void pxa310_u2d_setup_otg_hc(void) |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 735b57aaf2d6..f8f2c0ac4c01 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -28,21 +28,11 @@ | |||
28 | #include <asm/setup.h> | 28 | #include <asm/setup.h> |
29 | #include <asm/leds.h> | 29 | #include <asm/leds.h> |
30 | 30 | ||
31 | #define AMBA_DEVICE(name,busid,base,plat) \ | 31 | #define APB_DEVICE(name, busid, base, plat) \ |
32 | static struct amba_device name##_device = { \ | 32 | static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
33 | .dev = { \ | 33 | |
34 | .coherent_dma_mask = ~0, \ | 34 | #define AHB_DEVICE(name, busid, base, plat) \ |
35 | .init_name = busid, \ | 35 | static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
36 | .platform_data = plat, \ | ||
37 | }, \ | ||
38 | .res = { \ | ||
39 | .start = REALVIEW_##base##_BASE, \ | ||
40 | .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ | ||
41 | .flags = IORESOURCE_MEM, \ | ||
42 | }, \ | ||
43 | .dma_mask = ~0, \ | ||
44 | .irq = base##_IRQ, \ | ||
45 | } | ||
46 | 36 | ||
47 | struct machine_desc; | 37 | struct machine_desc; |
48 | 38 | ||
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S deleted file mode 100644 index e8a5179c2653..000000000000 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for RealView platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h index 204d5378f309..d6b5073692d2 100644 --- a/arch/arm/mach-realview/include/mach/irqs-eb.h +++ b/arch/arm/mach-realview/include/mach/irqs-eb.h | |||
@@ -96,16 +96,19 @@ | |||
96 | #define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) | 96 | #define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) |
97 | #define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) | 97 | #define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) |
98 | 98 | ||
99 | #define IRQ_EB11MP_UART2 -1 | 99 | /* |
100 | #define IRQ_EB11MP_UART3 -1 | 100 | * The 11MPcore tile leaves the following unconnected. |
101 | #define IRQ_EB11MP_CLCD -1 | 101 | */ |
102 | #define IRQ_EB11MP_DMA -1 | 102 | #define IRQ_EB11MP_UART2 0 |
103 | #define IRQ_EB11MP_WDOG -1 | 103 | #define IRQ_EB11MP_UART3 0 |
104 | #define IRQ_EB11MP_GPIO0 -1 | 104 | #define IRQ_EB11MP_CLCD 0 |
105 | #define IRQ_EB11MP_GPIO1 -1 | 105 | #define IRQ_EB11MP_DMA 0 |
106 | #define IRQ_EB11MP_GPIO2 -1 | 106 | #define IRQ_EB11MP_WDOG 0 |
107 | #define IRQ_EB11MP_SCI -1 | 107 | #define IRQ_EB11MP_GPIO0 0 |
108 | #define IRQ_EB11MP_SSP -1 | 108 | #define IRQ_EB11MP_GPIO1 0 |
109 | #define IRQ_EB11MP_GPIO2 0 | ||
110 | #define IRQ_EB11MP_SCI 0 | ||
111 | #define IRQ_EB11MP_SSP 0 | ||
109 | 112 | ||
110 | #define NR_GIC_EB11MP 2 | 113 | #define NR_GIC_EB11MP 2 |
111 | 114 | ||
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 5c3c625e3e04..708f84156f2c 100644 --- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h | |||
@@ -40,6 +40,7 @@ | |||
40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) | 40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) |
41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) | 41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) |
42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ | 42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ |
43 | #define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) | ||
43 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ | 44 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ |
44 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ | 45 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ |
45 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ | 46 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ |
@@ -73,7 +74,6 @@ | |||
73 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ | 74 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ |
74 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ | 75 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ |
75 | 76 | ||
76 | #define IRQ_PB1176_GPIO0 -1 | ||
77 | #define IRQ_PB1176_SCTL -1 | 77 | #define IRQ_PB1176_SCTL -1 |
78 | 78 | ||
79 | #define NR_GIC_PB1176 2 | 79 | #define NR_GIC_PB1176 2 |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h deleted file mode 100644 index 471b671159ce..000000000000 --- a/arch/arm/mach-realview/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 9578145f2df0..157e1bc6e83c 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
135 | /* | 135 | /* |
136 | * These devices are connected via the core APB bridge | 136 | * These devices are connected via the core APB bridge |
137 | */ | 137 | */ |
138 | #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } | 138 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
139 | #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } | 139 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } |
140 | 140 | ||
141 | #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } | 141 | #define AACI_IRQ { IRQ_EB_AACI } |
142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } | 142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
143 | #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } | 143 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
144 | #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } | 144 | #define KMI1_IRQ { IRQ_EB_KMI1 } |
145 | 145 | ||
146 | /* | 146 | /* |
147 | * These devices are connected directly to the multi-layer AHB switch | 147 | * These devices are connected directly to the multi-layer AHB switch |
148 | */ | 148 | */ |
149 | #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } | 149 | #define EB_SMC_IRQ { } |
150 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 150 | #define MPMC_IRQ { } |
151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } | 151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } |
152 | #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } | 152 | #define DMAC_IRQ { IRQ_EB_DMA } |
153 | 153 | ||
154 | /* | 154 | /* |
155 | * These devices are connected via the core APB bridge | 155 | * These devices are connected via the core APB bridge |
156 | */ | 156 | */ |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } | 158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } |
159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } | 159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } |
161 | #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } | 161 | #define EB_RTC_IRQ { IRQ_EB_RTC } |
162 | 162 | ||
163 | /* | 163 | /* |
164 | * These devices are connected via the DMA APB bridge | 164 | * These devices are connected via the DMA APB bridge |
165 | */ | 165 | */ |
166 | #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } | 166 | #define SCI_IRQ { IRQ_EB_SCI } |
167 | #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } | 167 | #define EB_UART0_IRQ { IRQ_EB_UART0 } |
168 | #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } | 168 | #define EB_UART1_IRQ { IRQ_EB_UART1 } |
169 | #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } | 169 | #define EB_UART2_IRQ { IRQ_EB_UART2 } |
170 | #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } | 170 | #define EB_UART3_IRQ { IRQ_EB_UART3 } |
171 | #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } | 171 | #define EB_SSP_IRQ { IRQ_EB_SSP } |
172 | 172 | ||
173 | /* FPGA Primecells */ | 173 | /* FPGA Primecells */ |
174 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 174 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
175 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 175 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
176 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 176 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
177 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 177 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
178 | AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); | 178 | APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); |
179 | 179 | ||
180 | /* DevChip Primecells */ | 180 | /* DevChip Primecells */ |
181 | AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); | 181 | AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); |
182 | AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); | 182 | AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); |
183 | AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); | 183 | AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); |
184 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 184 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
185 | AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); | 185 | APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); |
186 | AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); | 186 | APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); |
187 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 187 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
188 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 188 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
189 | AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); | 189 | APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); |
190 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 190 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
191 | AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); | 191 | APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); |
192 | AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); | 192 | APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); |
193 | AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); | 193 | APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); |
194 | AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); | 194 | APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); |
195 | 195 | ||
196 | static struct amba_device *amba_devs[] __initdata = { | 196 | static struct amba_device *amba_devs[] __initdata = { |
197 | &dmac_device, | 197 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index e4abe94fb11a..b1d7cafa1a6d 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
132 | /* | 132 | /* |
133 | * RealView PB1176 AMBA devices | 133 | * RealView PB1176 AMBA devices |
134 | */ | 134 | */ |
135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } | 135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } |
136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } | 136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } |
137 | #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } | 137 | #define AACI_IRQ { IRQ_PB1176_AACI } |
138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } | 138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } |
139 | #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } | 139 | #define KMI0_IRQ { IRQ_PB1176_KMI0 } |
140 | #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } | 140 | #define KMI1_IRQ { IRQ_PB1176_KMI1 } |
141 | #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } | 141 | #define PB1176_SMC_IRQ { } |
142 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 142 | #define MPMC_IRQ { } |
143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } | 143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } |
144 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 144 | #define SCTL_IRQ { } |
145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } | 145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } |
146 | #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } | 146 | #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } |
147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } | 147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } |
148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } | 148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } |
149 | #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } | 149 | #define SCI_IRQ { IRQ_PB1176_SCI } |
150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } | 150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } |
151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } | 151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } |
152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } | 152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } |
153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } | 153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } |
154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } | 154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } |
155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } | 155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } |
156 | 156 | ||
157 | /* FPGA Primecells */ | 157 | /* FPGA Primecells */ |
158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 158 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
159 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 159 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
160 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 160 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
161 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 161 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
162 | AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); | 162 | APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); |
163 | 163 | ||
164 | /* DevChip Primecells */ | 164 | /* DevChip Primecells */ |
165 | AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); | 165 | AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); |
166 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 166 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
167 | AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); | 167 | APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); |
168 | AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); | 168 | APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); |
169 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 169 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
170 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 170 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
171 | AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); | 171 | APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); |
172 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 172 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
173 | AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); | 173 | APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); |
174 | AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); | 174 | APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); |
175 | AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); | 175 | APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); |
176 | AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); | 176 | APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); |
177 | AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); | 177 | APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); |
178 | AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); | 178 | AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); |
179 | 179 | ||
180 | static struct amba_device *amba_devs[] __initdata = { | 180 | static struct amba_device *amba_devs[] __initdata = { |
181 | &uart0_device, | 181 | &uart0_device, |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 2147335f66f5..ae7fe54f6eb6 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
127 | * RealView PB11MPCore AMBA devices | 127 | * RealView PB11MPCore AMBA devices |
128 | */ | 128 | */ |
129 | 129 | ||
130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } | 130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } |
131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } | 131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } |
132 | #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } | 132 | #define AACI_IRQ { IRQ_TC11MP_AACI } |
133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } | 133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } |
134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } | 134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0 } |
135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } | 135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1 } |
136 | #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } | 136 | #define PB11MP_SMC_IRQ { } |
137 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 137 | #define MPMC_IRQ { } |
138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } | 138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } |
139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } | 139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC } |
140 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 140 | #define SCTL_IRQ { } |
141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } | 141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } |
142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } | 142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } |
143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } | 143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } |
144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } | 144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } |
145 | #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } | 145 | #define SCI_IRQ { IRQ_PB11MP_SCI } |
146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } | 146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } |
147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } | 147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } |
148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } | 148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } |
149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } | 149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } |
150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } | 150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } |
151 | 151 | ||
152 | /* FPGA Primecells */ | 152 | /* FPGA Primecells */ |
153 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 153 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
154 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 154 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
155 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 155 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
156 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 156 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
157 | AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); | 157 | APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); |
158 | 158 | ||
159 | /* DevChip Primecells */ | 159 | /* DevChip Primecells */ |
160 | AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); | 160 | AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); |
161 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 161 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
162 | AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); | 162 | APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); |
163 | AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); | 163 | APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); |
164 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 164 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
165 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 165 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
166 | AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); | 166 | APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); |
167 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 167 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
168 | AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); | 168 | APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); |
169 | AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); | 169 | APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); |
170 | AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); | 170 | APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); |
171 | AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); | 171 | APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); |
172 | 172 | ||
173 | /* Primecells on the NEC ISSP chip */ | 173 | /* Primecells on the NEC ISSP chip */ |
174 | AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); | 174 | AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); |
175 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 175 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
176 | 176 | ||
177 | static struct amba_device *amba_devs[] __initdata = { | 177 | static struct amba_device *amba_devs[] __initdata = { |
178 | &dmac_device, | 178 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 25b2e59296f8..59650174e6ed 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
122 | * RealView PBA8Core AMBA devices | 122 | * RealView PBA8Core AMBA devices |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } | 125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2 } |
126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } | 126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3 } |
127 | #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } | 127 | #define AACI_IRQ { IRQ_PBA8_AACI } |
128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } | 128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } |
129 | #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } | 129 | #define KMI0_IRQ { IRQ_PBA8_KMI0 } |
130 | #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } | 130 | #define KMI1_IRQ { IRQ_PBA8_KMI1 } |
131 | #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } | 131 | #define PBA8_SMC_IRQ { } |
132 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 132 | #define MPMC_IRQ { } |
133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } | 133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } |
134 | #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } | 134 | #define DMAC_IRQ { IRQ_PBA8_DMAC } |
135 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 135 | #define SCTL_IRQ { } |
136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } | 136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } |
137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } | 137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } |
138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } | 138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1 } |
139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } | 139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC } |
140 | #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } | 140 | #define SCI_IRQ { IRQ_PBA8_SCI } |
141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } | 141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } |
142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } | 142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } |
143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } | 143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } |
144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } | 144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } |
145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } | 145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP } |
146 | 146 | ||
147 | /* FPGA Primecells */ | 147 | /* FPGA Primecells */ |
148 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 148 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
149 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 149 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
150 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 150 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
151 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 151 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
152 | AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); | 152 | APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); |
153 | 153 | ||
154 | /* DevChip Primecells */ | 154 | /* DevChip Primecells */ |
155 | AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); | 155 | AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); |
156 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 156 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
157 | AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); | 157 | APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); |
158 | AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); | 158 | APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); |
159 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 159 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
160 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 160 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
161 | AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); | 161 | APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); |
162 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 162 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
163 | AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); | 163 | APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); |
164 | AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); | 164 | APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); |
165 | AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); | 165 | APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); |
166 | AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); | 166 | APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); |
167 | 167 | ||
168 | /* Primecells on the NEC ISSP chip */ | 168 | /* Primecells on the NEC ISSP chip */ |
169 | AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); | 169 | AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); |
170 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 170 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
171 | 171 | ||
172 | static struct amba_device *amba_devs[] __initdata = { | 172 | static struct amba_device *amba_devs[] __initdata = { |
173 | &dmac_device, | 173 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index ac715645b860..1cd9956f5875 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
144 | * RealView PBXCore AMBA devices | 144 | * RealView PBXCore AMBA devices |
145 | */ | 145 | */ |
146 | 146 | ||
147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } | 147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2 } |
148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } | 148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3 } |
149 | #define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } | 149 | #define AACI_IRQ { IRQ_PBX_AACI } |
150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } | 150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } |
151 | #define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } | 151 | #define KMI0_IRQ { IRQ_PBX_KMI0 } |
152 | #define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } | 152 | #define KMI1_IRQ { IRQ_PBX_KMI1 } |
153 | #define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } | 153 | #define PBX_SMC_IRQ { } |
154 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 154 | #define MPMC_IRQ { } |
155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } | 155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD } |
156 | #define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } | 156 | #define DMAC_IRQ { IRQ_PBX_DMAC } |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } | 158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } |
159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } | 159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1 } |
161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } | 161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC } |
162 | #define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } | 162 | #define SCI_IRQ { IRQ_PBX_SCI } |
163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } | 163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0 } |
164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } | 164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1 } |
165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } | 165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2 } |
166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } | 166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3 } |
167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } | 167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP } |
168 | 168 | ||
169 | /* FPGA Primecells */ | 169 | /* FPGA Primecells */ |
170 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 170 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
171 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 171 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
172 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 172 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
173 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 173 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
174 | AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); | 174 | APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); |
175 | 175 | ||
176 | /* DevChip Primecells */ | 176 | /* DevChip Primecells */ |
177 | AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); | 177 | AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); |
178 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 178 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
179 | AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); | 179 | APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); |
180 | AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); | 180 | APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); |
181 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 181 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
182 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 182 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
183 | AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); | 183 | APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); |
184 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 184 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
185 | AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); | 185 | APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); |
186 | AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); | 186 | APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); |
187 | AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); | 187 | APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); |
188 | AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); | 188 | APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); |
189 | 189 | ||
190 | /* Primecells on the NEC ISSP chip */ | 190 | /* Primecells on the NEC ISSP chip */ |
191 | AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); | 191 | AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); |
192 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 192 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
193 | 193 | ||
194 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
195 | &dmac_device, | 195 | &dmac_device, |
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile index aa77bc9efbbb..dfa405c0cfde 100644 --- a/arch/arm/mach-rpc/Makefile +++ b/arch/arm/mach-rpc/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := dma.o irq.o riscpc.o | 7 | obj-y := dma.o fiq.o irq.o riscpc.o |
8 | obj-m := | 8 | obj-m := |
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S new file mode 100644 index 000000000000..48ddd57db16e --- /dev/null +++ b/arch/arm/mach-rpc/fiq.S | |||
@@ -0,0 +1,16 @@ | |||
1 | #include <linux/linkage.h> | ||
2 | #include <asm/assembler.h> | ||
3 | #include <mach/hardware.h> | ||
4 | #include <mach/entry-macro.S> | ||
5 | |||
6 | .text | ||
7 | |||
8 | .global rpc_default_fiq_end | ||
9 | ENTRY(rpc_default_fiq_start) | ||
10 | mov r12, #ioc_base_high | ||
11 | .if ioc_base_low | ||
12 | orr r12, r12, #ioc_base_low | ||
13 | .endif | ||
14 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
15 | subs pc, lr, #4 | ||
16 | rpc_default_fiq_end: | ||
diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S index 4e7e54144093..7178368d7062 100644 --- a/arch/arm/mach-rpc/include/mach/entry-macro.S +++ b/arch/arm/mach-rpc/include/mach/entry-macro.S | |||
@@ -10,7 +10,3 @@ | |||
10 | orr \base, \base, #ioc_base_low | 10 | orr \base, \base, #ioc_base_low |
11 | .endif | 11 | .endif |
12 | .endm | 12 | .endm |
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h deleted file mode 100644 index 359bab94b6af..000000000000 --- a/arch/arm/mach-rpc/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-rpc/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 2e1b5309fbab..cf0e669eaf1a 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c | |||
@@ -5,6 +5,7 @@ | |||
5 | #include <asm/mach/irq.h> | 5 | #include <asm/mach/irq.h> |
6 | #include <asm/hardware/iomd.h> | 6 | #include <asm/hardware/iomd.h> |
7 | #include <asm/irq.h> | 7 | #include <asm/irq.h> |
8 | #include <asm/fiq.h> | ||
8 | 9 | ||
9 | static void iomd_ack_irq_a(struct irq_data *d) | 10 | static void iomd_ack_irq_a(struct irq_data *d) |
10 | { | 11 | { |
@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = { | |||
112 | .irq_unmask = iomd_unmask_irq_fiq, | 113 | .irq_unmask = iomd_unmask_irq_fiq, |
113 | }; | 114 | }; |
114 | 115 | ||
116 | extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; | ||
117 | |||
115 | void __init rpc_init_irq(void) | 118 | void __init rpc_init_irq(void) |
116 | { | 119 | { |
117 | unsigned int irq, flags; | 120 | unsigned int irq, flags; |
@@ -121,6 +124,9 @@ void __init rpc_init_irq(void) | |||
121 | iomd_writeb(0, IOMD_FIQMASK); | 124 | iomd_writeb(0, IOMD_FIQMASK); |
122 | iomd_writeb(0, IOMD_DMAMASK); | 125 | iomd_writeb(0, IOMD_DMAMASK); |
123 | 126 | ||
127 | set_fiq_handler(&rpc_default_fiq_start, | ||
128 | &rpc_default_fiq_end - &rpc_default_fiq_start); | ||
129 | |||
124 | for (irq = 0; irq < NR_IRQS; irq++) { | 130 | for (irq = 0; irq < NR_IRQS; irq++) { |
125 | flags = IRQF_VALID; | 131 | flags = IRQF_VALID; |
126 | 132 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/arch/arm/mach-s3c2410/include/mach/entry-macro.S index 473b3cd37d9b..7615a14773fa 100644 --- a/arch/arm/mach-s3c2410/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/entry-macro.S | |||
@@ -25,9 +25,6 @@ | |||
25 | .macro get_irqnr_preamble, base, tmp | 25 | .macro get_irqnr_preamble, base, tmp |
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro arch_ret_to_user, tmp1, tmp2 | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 28 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
32 | 29 | ||
33 | mov \base, #S3C24XX_VA_IRQ | 30 | mov \base, #S3C24XX_VA_IRQ |
@@ -71,8 +68,3 @@ | |||
71 | @@ exit here, Z flag unset if IRQ | 68 | @@ exit here, Z flag unset if IRQ |
72 | 69 | ||
73 | .endm | 70 | .endm |
74 | |||
75 | /* currently don't need an disable_fiq macro */ | ||
76 | |||
77 | .macro disable_fiq | ||
78 | .endm | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h deleted file mode 100644 index 5e215c1a5c8f..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - System function defines and includes | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <mach/idle.h> | ||
18 | |||
19 | #include <mach/regs-clock.h> | ||
20 | |||
21 | void (*s3c24xx_idle)(void); | ||
22 | |||
23 | void s3c24xx_default_idle(void) | ||
24 | { | ||
25 | unsigned long tmp; | ||
26 | int i; | ||
27 | |||
28 | /* idle the system by using the idle mode which will wait for an | ||
29 | * interrupt to happen before restarting the system. | ||
30 | */ | ||
31 | |||
32 | /* Warning: going into idle state upsets jtag scanning */ | ||
33 | |||
34 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
35 | S3C2410_CLKCON); | ||
36 | |||
37 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
38 | for (i = 0; i < 50; i++) { | ||
39 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
40 | } | ||
41 | |||
42 | /* this bit is not cleared on re-start... */ | ||
43 | |||
44 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
45 | S3C2410_CLKCON); | ||
46 | } | ||
47 | |||
48 | static void arch_idle(void) | ||
49 | { | ||
50 | if (s3c24xx_idle != NULL) | ||
51 | (s3c24xx_idle)(); | ||
52 | else | ||
53 | s3c24xx_default_idle(); | ||
54 | } | ||
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index aff6e85a97c6..c6eac9871093 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -32,8 +32,6 @@ | |||
32 | #include <asm/proc-fns.h> | 32 | #include <asm/proc-fns.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | 34 | ||
35 | #include <mach/idle.h> | ||
36 | |||
37 | #include <plat/cpu-freq.h> | 35 | #include <plat/cpu-freq.h> |
38 | 36 | ||
39 | #include <mach/regs-clock.h> | 37 | #include <mach/regs-clock.h> |
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void) | |||
164 | 162 | ||
165 | /* set our idle function */ | 163 | /* set our idle function */ |
166 | 164 | ||
167 | s3c24xx_idle = s3c2412_idle; | 165 | arm_pm_idle = s3c2412_idle; |
168 | 166 | ||
169 | /* register our io-tables */ | 167 | /* register our io-tables */ |
170 | 168 | ||
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 5287d2808d3e..08bb0355159d 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/proc-fns.h> | 44 | #include <asm/proc-fns.h> |
45 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
46 | 46 | ||
47 | #include <mach/idle.h> | ||
48 | #include <mach/regs-s3c2443-clock.h> | 47 | #include <mach/regs-s3c2443-clock.h> |
49 | 48 | ||
50 | #include <plat/gpio-core.h> | 49 | #include <plat/gpio-core.h> |
@@ -88,8 +87,6 @@ int __init s3c2416_init(void) | |||
88 | { | 87 | { |
89 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); | 88 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); |
90 | 89 | ||
91 | /* s3c24xx_idle = s3c2416_idle; */ | ||
92 | |||
93 | /* change WDT IRQ number */ | 90 | /* change WDT IRQ number */ |
94 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | 91 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; |
95 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | 92 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; |
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S deleted file mode 100644 index dc2bc15142ce..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S3C64XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h deleted file mode 100644 index 353ed4389ae7..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - system implementation | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index cd3c97e2ee75..32a30f38ba0c 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c | |||
@@ -102,6 +102,7 @@ static struct wm8962_pdata wm8962_pdata __initdata = { | |||
102 | 0x8000 | WM8962_GPIO_FN_DMICDAT, | 102 | 0x8000 | WM8962_GPIO_FN_DMICDAT, |
103 | WM8962_GPIO_FN_IRQ, /* Open drain mode */ | 103 | WM8962_GPIO_FN_IRQ, /* Open drain mode */ |
104 | }, | 104 | }, |
105 | .in4_dc_measure = true, | ||
105 | }; | 106 | }; |
106 | 107 | ||
107 | static struct wm9081_pdata wm9081_pdata __initdata = { | 108 | static struct wm9081_pdata wm9081_pdata __initdata = { |
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 52b89a376447..9143f8b19962 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void) | |||
146 | { | 146 | { |
147 | unsigned long val; | 147 | unsigned long val; |
148 | 148 | ||
149 | if (!need_resched()) { | 149 | val = __raw_readl(S5P64X0_PWR_CFG); |
150 | val = __raw_readl(S5P64X0_PWR_CFG); | 150 | val &= ~(0x3 << 5); |
151 | val &= ~(0x3 << 5); | 151 | val |= (0x1 << 5); |
152 | val |= (0x1 << 5); | 152 | __raw_writel(val, S5P64X0_PWR_CFG); |
153 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
154 | 153 | ||
155 | cpu_do_idle(); | 154 | cpu_do_idle(); |
156 | } | ||
157 | local_irq_enable(); | ||
158 | } | 155 | } |
159 | 156 | ||
160 | /* | 157 | /* |
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void) | |||
286 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | 283 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); |
287 | 284 | ||
288 | /* set idle function */ | 285 | /* set idle function */ |
289 | pm_idle = s5p64x0_idle; | 286 | arm_pm_idle = s5p64x0_idle; |
290 | 287 | ||
291 | return device_register(&s5p64x0_dev); | 288 | return device_register(&s5p64x0_dev); |
292 | } | 289 | } |
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index f820c0744405..f7f68ad77910 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = { | |||
108 | .peri_id = s5p6450_pdma_peri, | 108 | .peri_id = s5p6450_pdma_peri, |
109 | }; | 109 | }; |
110 | 110 | ||
111 | struct amba_device s5p64x0_device_pdma = { | 111 | AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA, |
112 | .dev = { | 112 | {IRQ_DMA0}, NULL); |
113 | .init_name = "dma-pl330", | ||
114 | .dma_mask = &dma_dmamask, | ||
115 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
116 | }, | ||
117 | .res = { | ||
118 | .start = S5P64X0_PA_PDMA, | ||
119 | .end = S5P64X0_PA_PDMA + SZ_4K, | ||
120 | .flags = IORESOURCE_MEM, | ||
121 | }, | ||
122 | .irq = {IRQ_DMA0, NO_IRQ}, | ||
123 | .periphid = 0x00041330, | ||
124 | }; | ||
125 | 113 | ||
126 | static int __init s5p64x0_dma_init(void) | 114 | static int __init s5p64x0_dma_init(void) |
127 | { | 115 | { |
128 | if (soc_is_s5p6450()) { | 116 | if (soc_is_s5p6450()) { |
129 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); | 117 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); |
130 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); | 118 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); |
131 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | 119 | s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; |
132 | } else { | 120 | } else { |
133 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); |
134 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); |
135 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 123 | s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; |
136 | } | 124 | } |
137 | 125 | ||
138 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); | 126 | amba_device_register(&s5p64x0_pdma_device, &iomem_resource); |
139 | 127 | ||
140 | return 0; | 128 | return 0; |
141 | } | 129 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S deleted file mode 100644 index fbb246d0a3df..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5P64X0 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h deleted file mode 100644 index cf26e0954a2f..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index c9095730a7f5..ff71e2d467c6 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c | |||
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = { | |||
129 | } | 129 | } |
130 | }; | 130 | }; |
131 | 131 | ||
132 | static void s5pc100_idle(void) | ||
133 | { | ||
134 | if (!need_resched()) | ||
135 | cpu_do_idle(); | ||
136 | |||
137 | local_irq_enable(); | ||
138 | } | ||
139 | |||
140 | /* | 132 | /* |
141 | * s5pc100_map_io | 133 | * s5pc100_map_io |
142 | * | 134 | * |
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init); | |||
210 | int __init s5pc100_init(void) | 202 | int __init s5pc100_init(void) |
211 | { | 203 | { |
212 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); | 204 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
213 | |||
214 | /* set idle function */ | ||
215 | pm_idle = s5pc100_idle; | ||
216 | |||
217 | return device_register(&s5pc100_dev); | 205 | return device_register(&s5pc100_dev); |
218 | } | 206 | } |
219 | 207 | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index c841f4d313f2..96b1ab3dcd48 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = { | |||
73 | .peri_id = pdma0_peri, | 73 | .peri_id = pdma0_peri, |
74 | }; | 74 | }; |
75 | 75 | ||
76 | struct amba_device s5pc100_device_pdma0 = { | 76 | AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0, |
77 | .dev = { | 77 | {IRQ_PDMA0}, &s5pc100_pdma0_pdata); |
78 | .init_name = "dma-pl330.0", | ||
79 | .dma_mask = &dma_dmamask, | ||
80 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
81 | .platform_data = &s5pc100_pdma0_pdata, | ||
82 | }, | ||
83 | .res = { | ||
84 | .start = S5PC100_PA_PDMA0, | ||
85 | .end = S5PC100_PA_PDMA0 + SZ_4K, | ||
86 | .flags = IORESOURCE_MEM, | ||
87 | }, | ||
88 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
89 | .periphid = 0x00041330, | ||
90 | }; | ||
91 | 78 | ||
92 | u8 pdma1_peri[] = { | 79 | u8 pdma1_peri[] = { |
93 | DMACH_UART0_RX, | 80 | DMACH_UART0_RX, |
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = { | |||
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pc100_device_pdma1 = { | 117 | AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1, |
131 | .dev = { | 118 | {IRQ_PDMA1}, &s5pc100_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pc100_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PC100_PA_PDMA1, | ||
139 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pc100_dma_init(void) | 120 | static int __init s5pc100_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pc100_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pc100_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index b8c242edfa22..bad0700457db 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
@@ -12,14 +12,8 @@ | |||
12 | * warranty of any kind, whether express or implied. | 12 | * warranty of any kind, whether express or implied. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | .endm | 19 | .endm |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h deleted file mode 100644 index afc96c298518..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * S5PC100 - system implementation | ||
7 | * | ||
8 | * Based on mach-s3c6400/include/mach/system.h | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 9c1bcdcc12c3..4c9e9027df9a 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c | |||
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { | |||
142 | } | 142 | } |
143 | }; | 143 | }; |
144 | 144 | ||
145 | static void s5pv210_idle(void) | ||
146 | { | ||
147 | if (!need_resched()) | ||
148 | cpu_do_idle(); | ||
149 | |||
150 | local_irq_enable(); | ||
151 | } | ||
152 | |||
153 | void s5pv210_restart(char mode, const char *cmd) | 145 | void s5pv210_restart(char mode, const char *cmd) |
154 | { | 146 | { |
155 | __raw_writel(0x1, S5P_SWRESET); | 147 | __raw_writel(0x1, S5P_SWRESET); |
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init); | |||
247 | int __init s5pv210_init(void) | 239 | int __init s5pv210_init(void) |
248 | { | 240 | { |
249 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); | 241 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); |
250 | |||
251 | /* set idle function */ | ||
252 | pm_idle = s5pv210_idle; | ||
253 | |||
254 | return device_register(&s5pv210_dev); | 242 | return device_register(&s5pv210_dev); |
255 | } | 243 | } |
256 | 244 | ||
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index a6113e0267f2..f6885d247d14 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c | |||
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = { | |||
71 | .peri_id = pdma0_peri, | 71 | .peri_id = pdma0_peri, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | struct amba_device s5pv210_device_pdma0 = { | 74 | AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0, |
75 | .dev = { | 75 | {IRQ_PDMA0}, &s5pv210_pdma0_pdata); |
76 | .init_name = "dma-pl330.0", | ||
77 | .dma_mask = &dma_dmamask, | ||
78 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
79 | .platform_data = &s5pv210_pdma0_pdata, | ||
80 | }, | ||
81 | .res = { | ||
82 | .start = S5PV210_PA_PDMA0, | ||
83 | .end = S5PV210_PA_PDMA0 + SZ_4K, | ||
84 | .flags = IORESOURCE_MEM, | ||
85 | }, | ||
86 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
87 | .periphid = 0x00041330, | ||
88 | }; | ||
89 | 76 | ||
90 | u8 pdma1_peri[] = { | 77 | u8 pdma1_peri[] = { |
91 | DMACH_UART0_RX, | 78 | DMACH_UART0_RX, |
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = { | |||
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pv210_device_pdma1 = { | 117 | AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1, |
131 | .dev = { | 118 | {IRQ_PDMA1}, &s5pv210_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pv210_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PV210_PA_PDMA1, | ||
139 | .end = S5PV210_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pv210_dma_init(void) | 120 | static int __init s5pv210_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pv210_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pv210_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S deleted file mode 100644 index bebca1b5d0b1..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5PV210 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h deleted file mode 100644 index bf288ced860a..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h index 28c2cf50c259..307391488c22 100644 --- a/arch/arm/mach-sa1100/include/mach/assabet.h +++ b/arch/arm/mach-sa1100/include/mach/assabet.h | |||
@@ -85,21 +85,18 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); | |||
85 | #define ASSABET_BSR_RAD_RI (1 << 31) | 85 | #define ASSABET_BSR_RAD_RI (1 << 31) |
86 | 86 | ||
87 | 87 | ||
88 | /* GPIOs for which the generic definition doesn't say much */ | 88 | /* GPIOs (bitmasks) for which the generic definition doesn't say much */ |
89 | #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ | 89 | #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ |
90 | #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ | 90 | #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ |
91 | #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ | 91 | #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ |
92 | #define ASSABET_GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */ | ||
93 | #define ASSABET_GPIO_CF_CD GPIO_GPIO (22) /* CF CD */ | ||
94 | #define ASSABET_GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */ | ||
95 | #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ | 92 | #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ |
96 | #define ASSABET_GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */ | ||
97 | #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ | 93 | #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ |
98 | #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ | 94 | #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ |
99 | 95 | ||
100 | #define ASSABET_IRQ_GPIO_CF_IRQ IRQ_GPIO21 | 96 | /* These are gpiolib GPIO numbers, not bitmasks */ |
101 | #define ASSABET_IRQ_GPIO_CF_CD IRQ_GPIO22 | 97 | #define ASSABET_GPIO_CF_IRQ 21 /* CF IRQ */ |
102 | #define ASSABET_IRQ_GPIO_CF_BVD2 IRQ_GPIO24 | 98 | #define ASSABET_GPIO_CF_CD 22 /* CF CD */ |
103 | #define ASSABET_IRQ_GPIO_CF_BVD1 IRQ_GPIO25 | 99 | #define ASSABET_GPIO_CF_BVD2 24 /* CF BVD / IOSPKR */ |
100 | #define ASSABET_GPIO_CF_BVD1 25 /* CF BVD / IOSTSCHG */ | ||
104 | 101 | ||
105 | #endif | 102 | #endif |
diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h index c3ac3d0f9465..88fd9c006ce0 100644 --- a/arch/arm/mach-sa1100/include/mach/cerf.h +++ b/arch/arm/mach-sa1100/include/mach/cerf.h | |||
@@ -14,15 +14,10 @@ | |||
14 | #define CERF_ETH_IO 0xf0000000 | 14 | #define CERF_ETH_IO 0xf0000000 |
15 | #define CERF_ETH_IRQ IRQ_GPIO26 | 15 | #define CERF_ETH_IRQ IRQ_GPIO26 |
16 | 16 | ||
17 | #define CERF_GPIO_CF_BVD2 GPIO_GPIO (19) | 17 | #define CERF_GPIO_CF_BVD2 19 |
18 | #define CERF_GPIO_CF_BVD1 GPIO_GPIO (20) | 18 | #define CERF_GPIO_CF_BVD1 20 |
19 | #define CERF_GPIO_CF_RESET GPIO_GPIO (21) | 19 | #define CERF_GPIO_CF_RESET 21 |
20 | #define CERF_GPIO_CF_IRQ GPIO_GPIO (22) | 20 | #define CERF_GPIO_CF_IRQ 22 |
21 | #define CERF_GPIO_CF_CD GPIO_GPIO (23) | 21 | #define CERF_GPIO_CF_CD 23 |
22 | |||
23 | #define CERF_IRQ_GPIO_CF_BVD2 IRQ_GPIO19 | ||
24 | #define CERF_IRQ_GPIO_CF_BVD1 IRQ_GPIO20 | ||
25 | #define CERF_IRQ_GPIO_CF_IRQ IRQ_GPIO22 | ||
26 | #define CERF_IRQ_GPIO_CF_CD IRQ_GPIO23 | ||
27 | 22 | ||
28 | #endif // _INCLUDE_CERF_H_ | 23 | #endif // _INCLUDE_CERF_H_ |
diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S index 6aa13c46c5d3..8cf7630bf024 100644 --- a/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ b/arch/arm/mach-sa1100/include/mach/entry-macro.S | |||
@@ -8,17 +8,11 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 | 12 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 |
16 | add \base, \base, #0x00050000 | 13 | add \base, \base, #0x00050000 |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 16 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldr \irqstat, [\base] @ get irqs | 17 | ldr \irqstat, [\base] @ get irqs |
24 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 | 18 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 |
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h index 14f8382d0665..5ebd469a31f2 100644 --- a/arch/arm/mach-sa1100/include/mach/nanoengine.h +++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h | |||
@@ -16,12 +16,12 @@ | |||
16 | 16 | ||
17 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
18 | 18 | ||
19 | #define GPIO_PC_READY0 GPIO_GPIO(11) /* ready for socket 0 (active high)*/ | 19 | #define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/ |
20 | #define GPIO_PC_READY1 GPIO_GPIO(12) /* ready for socket 1 (active high) */ | 20 | #define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */ |
21 | #define GPIO_PC_CD0 GPIO_GPIO(13) /* detect for socket 0 (active low) */ | 21 | #define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */ |
22 | #define GPIO_PC_CD1 GPIO_GPIO(14) /* detect for socket 1 (active low) */ | 22 | #define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */ |
23 | #define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */ | 23 | #define GPIO_PC_RESET0 15 /* reset socket 0 */ |
24 | #define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */ | 24 | #define GPIO_PC_RESET1 16 /* reset socket 1 */ |
25 | 25 | ||
26 | #define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 | 26 | #define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 |
27 | #define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 | 27 | #define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 |
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h index ec27d6e12140..019f857a7938 100644 --- a/arch/arm/mach-sa1100/include/mach/shannon.h +++ b/arch/arm/mach-sa1100/include/mach/shannon.h | |||
@@ -23,14 +23,10 @@ | |||
23 | #define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ | 23 | #define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ |
24 | #define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */ | 24 | #define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */ |
25 | /* XXX GPIO 23 unaccounted for */ | 25 | /* XXX GPIO 23 unaccounted for */ |
26 | #define SHANNON_GPIO_EJECT_0 GPIO_GPIO (24) /* in */ | 26 | #define SHANNON_GPIO_EJECT_0 24 /* in */ |
27 | #define SHANNON_IRQ_GPIO_EJECT_0 IRQ_GPIO24 | 27 | #define SHANNON_GPIO_EJECT_1 25 /* in */ |
28 | #define SHANNON_GPIO_EJECT_1 GPIO_GPIO (25) /* in */ | 28 | #define SHANNON_GPIO_RDY_0 26 /* in */ |
29 | #define SHANNON_IRQ_GPIO_EJECT_1 IRQ_GPIO25 | 29 | #define SHANNON_GPIO_RDY_1 27 /* in */ |
30 | #define SHANNON_GPIO_RDY_0 GPIO_GPIO (26) /* in */ | ||
31 | #define SHANNON_IRQ_GPIO_RDY_0 IRQ_GPIO26 | ||
32 | #define SHANNON_GPIO_RDY_1 GPIO_GPIO (27) /* in */ | ||
33 | #define SHANNON_IRQ_GPIO_RDY_1 IRQ_GPIO27 | ||
34 | 30 | ||
35 | /* MCP UCB codec GPIO pins... */ | 31 | /* MCP UCB codec GPIO pins... */ |
36 | 32 | ||
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h index db28118103eb..cdea671e8931 100644 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ b/arch/arm/mach-sa1100/include/mach/simpad.h | |||
@@ -39,10 +39,8 @@ | |||
39 | 39 | ||
40 | 40 | ||
41 | /*--- PCMCIA ---*/ | 41 | /*--- PCMCIA ---*/ |
42 | #define GPIO_CF_CD GPIO_GPIO24 | 42 | #define GPIO_CF_CD 24 |
43 | #define GPIO_CF_IRQ GPIO_GPIO1 | 43 | #define GPIO_CF_IRQ 1 |
44 | #define IRQ_GPIO_CF_IRQ IRQ_GPIO1 | ||
45 | #define IRQ_GPIO_CF_CD IRQ_GPIO24 | ||
46 | 44 | ||
47 | /*--- SmartCard ---*/ | 45 | /*--- SmartCard ---*/ |
48 | #define GPIO_SMART_CARD GPIO_GPIO10 | 46 | #define GPIO_SMART_CARD GPIO_GPIO10 |
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h deleted file mode 100644 index e17b208f76d4..000000000000 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
5 | */ | ||
6 | static inline void arch_idle(void) | ||
7 | { | ||
8 | cpu_do_idle(); | ||
9 | } | ||
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c index 0d01ca788922..b466bca9c651 100644 --- a/arch/arm/mach-sa1100/pci-nanoengine.c +++ b/arch/arm/mach-sa1100/pci-nanoengine.c | |||
@@ -244,9 +244,11 @@ static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys) | |||
244 | printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); | 244 | printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); |
245 | return -EBUSY; | 245 | return -EBUSY; |
246 | } | 246 | } |
247 | pci_add_resource(&sys->resources, &pci_io_ports); | 247 | pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset); |
248 | pci_add_resource(&sys->resources, &pci_non_prefetchable_memory); | 248 | pci_add_resource_offset(&sys->resources, |
249 | pci_add_resource(&sys->resources, &pci_prefetchable_memory); | 249 | &pci_non_prefetchable_memory, sys->mem_offset); |
250 | pci_add_resource_offset(&sys->resources, | ||
251 | &pci_prefetchable_memory, sys->mem_offset); | ||
250 | 252 | ||
251 | return 1; | 253 | return 1; |
252 | } | 254 | } |
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a851c254ad6c..6a2a7f2c2557 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = { | |||
149 | .init = shark_timer_init, | 149 | .init = shark_timer_init, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static void shark_init_early(void) | ||
153 | { | ||
154 | disable_hlt(); | ||
155 | } | ||
156 | |||
152 | MACHINE_START(SHARK, "Shark") | 157 | MACHINE_START(SHARK, "Shark") |
153 | /* Maintainer: Alexander Schulz */ | 158 | /* Maintainer: Alexander Schulz */ |
154 | .atag_offset = 0x3000, | 159 | .atag_offset = 0x3000, |
155 | .map_io = shark_map_io, | 160 | .map_io = shark_map_io, |
161 | .init_early = shark_init_early, | ||
156 | .init_irq = shark_init_irq, | 162 | .init_irq = shark_init_irq, |
157 | .timer = &shark_timer, | 163 | .timer = &shark_timer, |
158 | .dma_zone_size = SZ_4M, | 164 | .dma_zone_size = SZ_4M, |
diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S index 0bb6cc626eb7..5901b09fc96a 100644 --- a/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/arch/arm/mach-shark/include/mach/entry-macro.S | |||
@@ -7,16 +7,10 @@ | |||
7 | * License version 2. This program is licensed "as is" without any | 7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | .macro disable_fiq | ||
11 | .endm | ||
12 | |||
13 | .macro get_irqnr_preamble, base, tmp | 10 | .macro get_irqnr_preamble, base, tmp |
14 | mov \base, #0xe0000000 | 11 | mov \base, #0xe0000000 |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | 15 | ||
22 | mov \irqstat, #0x0C | 16 | mov \irqstat, #0x0C |
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h deleted file mode 100644 index 1b2f2c5050a8..000000000000 --- a/arch/arm/mach-shark/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-shark/include/mach/system.h | ||
3 | * | ||
4 | * by Alexander Schulz | ||
5 | */ | ||
6 | #ifndef __ASM_ARCH_SYSTEM_H | ||
7 | #define __ASM_ARCH_SYSTEM_H | ||
8 | |||
9 | static inline void arch_idle(void) | ||
10 | { | ||
11 | } | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 8aea3a2dd889..12c431f3443f 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -230,16 +230,6 @@ static void lcd_backlight_reset(void) | |||
230 | gpio_set_value(GPIO_PORT235, 1); | 230 | gpio_set_value(GPIO_PORT235, 1); |
231 | } | 231 | } |
232 | 232 | ||
233 | static void lcd_on(void *board_data, struct fb_info *info) | ||
234 | { | ||
235 | lcd_backlight_on(); | ||
236 | } | ||
237 | |||
238 | static void lcd_off(void *board_data) | ||
239 | { | ||
240 | lcd_backlight_reset(); | ||
241 | } | ||
242 | |||
243 | /* LCDC0 */ | 233 | /* LCDC0 */ |
244 | static const struct fb_videomode lcdc0_modes[] = { | 234 | static const struct fb_videomode lcdc0_modes[] = { |
245 | { | 235 | { |
@@ -263,14 +253,14 @@ static struct sh_mobile_lcdc_info lcdc0_info = { | |||
263 | .interface_type = RGB24, | 253 | .interface_type = RGB24, |
264 | .clock_divider = 1, | 254 | .clock_divider = 1, |
265 | .flags = LCDC_FLAGS_DWPOL, | 255 | .flags = LCDC_FLAGS_DWPOL, |
266 | .lcd_size_cfg.width = 44, | ||
267 | .lcd_size_cfg.height = 79, | ||
268 | .fourcc = V4L2_PIX_FMT_RGB565, | 256 | .fourcc = V4L2_PIX_FMT_RGB565, |
269 | .lcd_cfg = lcdc0_modes, | 257 | .lcd_modes = lcdc0_modes, |
270 | .num_cfg = ARRAY_SIZE(lcdc0_modes), | 258 | .num_modes = ARRAY_SIZE(lcdc0_modes), |
271 | .board_cfg = { | 259 | .panel_cfg = { |
272 | .display_on = lcd_on, | 260 | .width = 44, |
273 | .display_off = lcd_off, | 261 | .height = 79, |
262 | .display_on = lcd_backlight_on, | ||
263 | .display_off = lcd_backlight_reset, | ||
274 | }, | 264 | }, |
275 | } | 265 | } |
276 | }; | 266 | }; |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index b4718b00e827..f90ba5b850a3 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -258,10 +258,16 @@ static struct sh_mobile_meram_info meram_info = { | |||
258 | 258 | ||
259 | static struct resource meram_resources[] = { | 259 | static struct resource meram_resources[] = { |
260 | [0] = { | 260 | [0] = { |
261 | .name = "MERAM", | 261 | .name = "regs", |
262 | .start = 0xe8000000, | 262 | .start = 0xe8000000, |
263 | .end = 0xe81fffff, | 263 | .end = 0xe807ffff, |
264 | .flags = IORESOURCE_MEM, | 264 | .flags = IORESOURCE_MEM, |
265 | }, | ||
266 | [1] = { | ||
267 | .name = "meram", | ||
268 | .start = 0xe8080000, | ||
269 | .end = 0xe81fffff, | ||
270 | .flags = IORESOURCE_MEM, | ||
265 | }, | 271 | }, |
266 | }; | 272 | }; |
267 | 273 | ||
@@ -437,82 +443,6 @@ static struct platform_device usb1_host_device = { | |||
437 | .resource = usb1_host_resources, | 443 | .resource = usb1_host_resources, |
438 | }; | 444 | }; |
439 | 445 | ||
440 | static const struct fb_videomode ap4evb_lcdc_modes[] = { | ||
441 | { | ||
442 | #ifdef CONFIG_AP4EVB_QHD | ||
443 | .name = "R63302(QHD)", | ||
444 | .xres = 544, | ||
445 | .yres = 961, | ||
446 | .left_margin = 72, | ||
447 | .right_margin = 600, | ||
448 | .hsync_len = 16, | ||
449 | .upper_margin = 8, | ||
450 | .lower_margin = 8, | ||
451 | .vsync_len = 2, | ||
452 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | ||
453 | #else | ||
454 | .name = "WVGA Panel", | ||
455 | .xres = 800, | ||
456 | .yres = 480, | ||
457 | .left_margin = 220, | ||
458 | .right_margin = 110, | ||
459 | .hsync_len = 70, | ||
460 | .upper_margin = 20, | ||
461 | .lower_margin = 5, | ||
462 | .vsync_len = 5, | ||
463 | .sync = 0, | ||
464 | #endif | ||
465 | }, | ||
466 | }; | ||
467 | static struct sh_mobile_meram_cfg lcd_meram_cfg = { | ||
468 | .icb[0] = { | ||
469 | .marker_icb = 28, | ||
470 | .cache_icb = 24, | ||
471 | .meram_offset = 0x0, | ||
472 | .meram_size = 0x40, | ||
473 | }, | ||
474 | .icb[1] = { | ||
475 | .marker_icb = 29, | ||
476 | .cache_icb = 25, | ||
477 | .meram_offset = 0x40, | ||
478 | .meram_size = 0x40, | ||
479 | }, | ||
480 | }; | ||
481 | |||
482 | static struct sh_mobile_lcdc_info lcdc_info = { | ||
483 | .meram_dev = &meram_info, | ||
484 | .ch[0] = { | ||
485 | .chan = LCDC_CHAN_MAINLCD, | ||
486 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
487 | .lcd_cfg = ap4evb_lcdc_modes, | ||
488 | .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes), | ||
489 | .meram_cfg = &lcd_meram_cfg, | ||
490 | } | ||
491 | }; | ||
492 | |||
493 | static struct resource lcdc_resources[] = { | ||
494 | [0] = { | ||
495 | .name = "LCDC", | ||
496 | .start = 0xfe940000, /* P4-only space */ | ||
497 | .end = 0xfe943fff, | ||
498 | .flags = IORESOURCE_MEM, | ||
499 | }, | ||
500 | [1] = { | ||
501 | .start = intcs_evt2irq(0x580), | ||
502 | .flags = IORESOURCE_IRQ, | ||
503 | }, | ||
504 | }; | ||
505 | |||
506 | static struct platform_device lcdc_device = { | ||
507 | .name = "sh_mobile_lcdc_fb", | ||
508 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
509 | .resource = lcdc_resources, | ||
510 | .dev = { | ||
511 | .platform_data = &lcdc_info, | ||
512 | .coherent_dma_mask = ~0, | ||
513 | }, | ||
514 | }; | ||
515 | |||
516 | /* | 446 | /* |
517 | * QHD display | 447 | * QHD display |
518 | */ | 448 | */ |
@@ -556,20 +486,25 @@ static struct platform_device keysc_device = { | |||
556 | }; | 486 | }; |
557 | 487 | ||
558 | /* MIPI-DSI */ | 488 | /* MIPI-DSI */ |
559 | #define PHYCTRL 0x0070 | ||
560 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, | 489 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, |
561 | void __iomem *base, | 490 | void __iomem *base, |
562 | int enable) | 491 | int enable) |
563 | { | 492 | { |
564 | struct clk *pck = clk_get(&pdev->dev, "dsip_clk"); | 493 | struct clk *pck = clk_get(&pdev->dev, "dsip_clk"); |
565 | void __iomem *phy = base + PHYCTRL; | ||
566 | 494 | ||
567 | if (IS_ERR(pck)) | 495 | if (IS_ERR(pck)) |
568 | return PTR_ERR(pck); | 496 | return PTR_ERR(pck); |
569 | 497 | ||
570 | if (enable) { | 498 | if (enable) { |
499 | /* | ||
500 | * DSIPCLK = 24MHz | ||
501 | * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl) | ||
502 | * HsByteCLK = D-PHY/8 = 39MHz | ||
503 | * | ||
504 | * X * Y * FPS = | ||
505 | * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz | ||
506 | */ | ||
571 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); | 507 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); |
572 | iowrite32(ioread32(phy) | (0xb << 8), phy); | ||
573 | clk_enable(pck); | 508 | clk_enable(pck); |
574 | } else { | 509 | } else { |
575 | clk_disable(pck); | 510 | clk_disable(pck); |
@@ -593,11 +528,14 @@ static struct resource mipidsi0_resources[] = { | |||
593 | }, | 528 | }, |
594 | }; | 529 | }; |
595 | 530 | ||
531 | static struct sh_mobile_lcdc_info lcdc_info; | ||
532 | |||
596 | static struct sh_mipi_dsi_info mipidsi0_info = { | 533 | static struct sh_mipi_dsi_info mipidsi0_info = { |
597 | .data_format = MIPI_RGB888, | 534 | .data_format = MIPI_RGB888, |
598 | .lcd_chan = &lcdc_info.ch[0], | 535 | .lcd_chan = &lcdc_info.ch[0], |
599 | .lane = 2, | 536 | .lane = 2, |
600 | .vsynw_offset = 17, | 537 | .vsynw_offset = 17, |
538 | .phyctrl = 0x6 << 8, | ||
601 | .flags = SH_MIPI_DSI_SYNC_PULSES_MODE | | 539 | .flags = SH_MIPI_DSI_SYNC_PULSES_MODE | |
602 | SH_MIPI_DSI_HSbyteCLK, | 540 | SH_MIPI_DSI_HSbyteCLK, |
603 | .set_dot_clock = sh_mipi_set_dot_clock, | 541 | .set_dot_clock = sh_mipi_set_dot_clock, |
@@ -619,6 +557,81 @@ static struct platform_device *qhd_devices[] __initdata = { | |||
619 | }; | 557 | }; |
620 | #endif /* CONFIG_AP4EVB_QHD */ | 558 | #endif /* CONFIG_AP4EVB_QHD */ |
621 | 559 | ||
560 | /* LCDC0 */ | ||
561 | static const struct fb_videomode ap4evb_lcdc_modes[] = { | ||
562 | { | ||
563 | #ifdef CONFIG_AP4EVB_QHD | ||
564 | .name = "R63302(QHD)", | ||
565 | .xres = 544, | ||
566 | .yres = 961, | ||
567 | .left_margin = 72, | ||
568 | .right_margin = 600, | ||
569 | .hsync_len = 16, | ||
570 | .upper_margin = 8, | ||
571 | .lower_margin = 8, | ||
572 | .vsync_len = 2, | ||
573 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | ||
574 | #else | ||
575 | .name = "WVGA Panel", | ||
576 | .xres = 800, | ||
577 | .yres = 480, | ||
578 | .left_margin = 220, | ||
579 | .right_margin = 110, | ||
580 | .hsync_len = 70, | ||
581 | .upper_margin = 20, | ||
582 | .lower_margin = 5, | ||
583 | .vsync_len = 5, | ||
584 | .sync = 0, | ||
585 | #endif | ||
586 | }, | ||
587 | }; | ||
588 | |||
589 | static const struct sh_mobile_meram_cfg lcd_meram_cfg = { | ||
590 | .icb[0] = { | ||
591 | .meram_size = 0x40, | ||
592 | }, | ||
593 | .icb[1] = { | ||
594 | .meram_size = 0x40, | ||
595 | }, | ||
596 | }; | ||
597 | |||
598 | static struct sh_mobile_lcdc_info lcdc_info = { | ||
599 | .meram_dev = &meram_info, | ||
600 | .ch[0] = { | ||
601 | .chan = LCDC_CHAN_MAINLCD, | ||
602 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
603 | .lcd_modes = ap4evb_lcdc_modes, | ||
604 | .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes), | ||
605 | .meram_cfg = &lcd_meram_cfg, | ||
606 | #ifdef CONFIG_AP4EVB_QHD | ||
607 | .tx_dev = &mipidsi0_device, | ||
608 | #endif | ||
609 | } | ||
610 | }; | ||
611 | |||
612 | static struct resource lcdc_resources[] = { | ||
613 | [0] = { | ||
614 | .name = "LCDC", | ||
615 | .start = 0xfe940000, /* P4-only space */ | ||
616 | .end = 0xfe943fff, | ||
617 | .flags = IORESOURCE_MEM, | ||
618 | }, | ||
619 | [1] = { | ||
620 | .start = intcs_evt2irq(0x580), | ||
621 | .flags = IORESOURCE_IRQ, | ||
622 | }, | ||
623 | }; | ||
624 | |||
625 | static struct platform_device lcdc_device = { | ||
626 | .name = "sh_mobile_lcdc_fb", | ||
627 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
628 | .resource = lcdc_resources, | ||
629 | .dev = { | ||
630 | .platform_data = &lcdc_info, | ||
631 | .coherent_dma_mask = ~0, | ||
632 | }, | ||
633 | }; | ||
634 | |||
622 | /* FSI */ | 635 | /* FSI */ |
623 | #define IRQ_FSI evt2irq(0x1840) | 636 | #define IRQ_FSI evt2irq(0x1840) |
624 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) | 637 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) |
@@ -737,26 +750,18 @@ fsi_set_rate_end: | |||
737 | return ret; | 750 | return ret; |
738 | } | 751 | } |
739 | 752 | ||
740 | static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable) | ||
741 | { | ||
742 | int ret; | ||
743 | |||
744 | if (is_porta) | ||
745 | ret = fsi_ak4642_set_rate(dev, rate, enable); | ||
746 | else | ||
747 | ret = fsi_hdmi_set_rate(dev, rate, enable); | ||
748 | |||
749 | return ret; | ||
750 | } | ||
751 | |||
752 | static struct sh_fsi_platform_info fsi_info = { | 753 | static struct sh_fsi_platform_info fsi_info = { |
753 | .porta_flags = SH_FSI_BRS_INV, | 754 | .port_a = { |
754 | 755 | .flags = SH_FSI_BRS_INV, | |
755 | .portb_flags = SH_FSI_BRS_INV | | 756 | .set_rate = fsi_ak4642_set_rate, |
756 | SH_FSI_BRM_INV | | 757 | }, |
757 | SH_FSI_LRS_INV | | 758 | .port_b = { |
758 | SH_FSI_FMT_SPDIF, | 759 | .flags = SH_FSI_BRS_INV | |
759 | .set_rate = fsi_set_rate, | 760 | SH_FSI_BRM_INV | |
761 | SH_FSI_LRS_INV | | ||
762 | SH_FSI_FMT_SPDIF, | ||
763 | .set_rate = fsi_hdmi_set_rate, | ||
764 | }, | ||
760 | }; | 765 | }; |
761 | 766 | ||
762 | static struct resource fsi_resources[] = { | 767 | static struct resource fsi_resources[] = { |
@@ -798,65 +803,11 @@ static struct platform_device fsi_ak4643_device = { | |||
798 | }, | 803 | }, |
799 | }; | 804 | }; |
800 | 805 | ||
801 | static struct sh_mobile_meram_cfg hdmi_meram_cfg = { | 806 | /* LCDC1 */ |
802 | .icb[0] = { | ||
803 | .marker_icb = 30, | ||
804 | .cache_icb = 26, | ||
805 | .meram_offset = 0x80, | ||
806 | .meram_size = 0x100, | ||
807 | }, | ||
808 | .icb[1] = { | ||
809 | .marker_icb = 31, | ||
810 | .cache_icb = 27, | ||
811 | .meram_offset = 0x180, | ||
812 | .meram_size = 0x100, | ||
813 | }, | ||
814 | }; | ||
815 | |||
816 | static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = { | ||
817 | .clock_source = LCDC_CLK_EXTERNAL, | ||
818 | .meram_dev = &meram_info, | ||
819 | .ch[0] = { | ||
820 | .chan = LCDC_CHAN_MAINLCD, | ||
821 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
822 | .interface_type = RGB24, | ||
823 | .clock_divider = 1, | ||
824 | .flags = LCDC_FLAGS_DWPOL, | ||
825 | .meram_cfg = &hdmi_meram_cfg, | ||
826 | } | ||
827 | }; | ||
828 | |||
829 | static struct resource lcdc1_resources[] = { | ||
830 | [0] = { | ||
831 | .name = "LCDC1", | ||
832 | .start = 0xfe944000, | ||
833 | .end = 0xfe947fff, | ||
834 | .flags = IORESOURCE_MEM, | ||
835 | }, | ||
836 | [1] = { | ||
837 | .start = intcs_evt2irq(0x1780), | ||
838 | .flags = IORESOURCE_IRQ, | ||
839 | }, | ||
840 | }; | ||
841 | |||
842 | static struct platform_device lcdc1_device = { | ||
843 | .name = "sh_mobile_lcdc_fb", | ||
844 | .num_resources = ARRAY_SIZE(lcdc1_resources), | ||
845 | .resource = lcdc1_resources, | ||
846 | .id = 1, | ||
847 | .dev = { | ||
848 | .platform_data = &sh_mobile_lcdc1_info, | ||
849 | .coherent_dma_mask = ~0, | ||
850 | }, | ||
851 | }; | ||
852 | |||
853 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, | 807 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, |
854 | unsigned long *parent_freq); | 808 | unsigned long *parent_freq); |
855 | 809 | ||
856 | |||
857 | static struct sh_mobile_hdmi_info hdmi_info = { | 810 | static struct sh_mobile_hdmi_info hdmi_info = { |
858 | .lcd_chan = &sh_mobile_lcdc1_info.ch[0], | ||
859 | .lcd_dev = &lcdc1_device.dev, | ||
860 | .flags = HDMI_SND_SRC_SPDIF, | 811 | .flags = HDMI_SND_SRC_SPDIF, |
861 | .clk_optimize_parent = ap4evb_clk_optimize, | 812 | .clk_optimize_parent = ap4evb_clk_optimize, |
862 | }; | 813 | }; |
@@ -885,10 +836,6 @@ static struct platform_device hdmi_device = { | |||
885 | }, | 836 | }, |
886 | }; | 837 | }; |
887 | 838 | ||
888 | static struct platform_device fsi_hdmi_device = { | ||
889 | .name = "sh_fsi2_b_hdmi", | ||
890 | }; | ||
891 | |||
892 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, | 839 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, |
893 | unsigned long *parent_freq) | 840 | unsigned long *parent_freq) |
894 | { | 841 | { |
@@ -908,6 +855,57 @@ static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, | |||
908 | return error; | 855 | return error; |
909 | } | 856 | } |
910 | 857 | ||
858 | static const struct sh_mobile_meram_cfg hdmi_meram_cfg = { | ||
859 | .icb[0] = { | ||
860 | .meram_size = 0x100, | ||
861 | }, | ||
862 | .icb[1] = { | ||
863 | .meram_size = 0x100, | ||
864 | }, | ||
865 | }; | ||
866 | |||
867 | static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = { | ||
868 | .clock_source = LCDC_CLK_EXTERNAL, | ||
869 | .meram_dev = &meram_info, | ||
870 | .ch[0] = { | ||
871 | .chan = LCDC_CHAN_MAINLCD, | ||
872 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
873 | .interface_type = RGB24, | ||
874 | .clock_divider = 1, | ||
875 | .flags = LCDC_FLAGS_DWPOL, | ||
876 | .meram_cfg = &hdmi_meram_cfg, | ||
877 | .tx_dev = &hdmi_device, | ||
878 | } | ||
879 | }; | ||
880 | |||
881 | static struct resource lcdc1_resources[] = { | ||
882 | [0] = { | ||
883 | .name = "LCDC1", | ||
884 | .start = 0xfe944000, | ||
885 | .end = 0xfe947fff, | ||
886 | .flags = IORESOURCE_MEM, | ||
887 | }, | ||
888 | [1] = { | ||
889 | .start = intcs_evt2irq(0x1780), | ||
890 | .flags = IORESOURCE_IRQ, | ||
891 | }, | ||
892 | }; | ||
893 | |||
894 | static struct platform_device lcdc1_device = { | ||
895 | .name = "sh_mobile_lcdc_fb", | ||
896 | .num_resources = ARRAY_SIZE(lcdc1_resources), | ||
897 | .resource = lcdc1_resources, | ||
898 | .id = 1, | ||
899 | .dev = { | ||
900 | .platform_data = &sh_mobile_lcdc1_info, | ||
901 | .coherent_dma_mask = ~0, | ||
902 | }, | ||
903 | }; | ||
904 | |||
905 | static struct platform_device fsi_hdmi_device = { | ||
906 | .name = "sh_fsi2_b_hdmi", | ||
907 | }; | ||
908 | |||
911 | static struct gpio_led ap4evb_leds[] = { | 909 | static struct gpio_led ap4evb_leds[] = { |
912 | { | 910 | { |
913 | .name = "led4", | 911 | .name = "led4", |
@@ -1042,9 +1040,9 @@ static struct platform_device *ap4evb_devices[] __initdata = { | |||
1042 | &fsi_ak4643_device, | 1040 | &fsi_ak4643_device, |
1043 | &fsi_hdmi_device, | 1041 | &fsi_hdmi_device, |
1044 | &sh_mmcif_device, | 1042 | &sh_mmcif_device, |
1045 | &lcdc1_device, | ||
1046 | &lcdc_device, | ||
1047 | &hdmi_device, | 1043 | &hdmi_device, |
1044 | &lcdc_device, | ||
1045 | &lcdc1_device, | ||
1048 | &ceu_device, | 1046 | &ceu_device, |
1049 | &ap4evb_camera, | 1047 | &ap4evb_camera, |
1050 | &meram_device, | 1048 | &meram_device, |
@@ -1355,8 +1353,8 @@ static void __init ap4evb_init(void) | |||
1355 | lcdc_info.ch[0].interface_type = RGB24; | 1353 | lcdc_info.ch[0].interface_type = RGB24; |
1356 | lcdc_info.ch[0].clock_divider = 1; | 1354 | lcdc_info.ch[0].clock_divider = 1; |
1357 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; | 1355 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; |
1358 | lcdc_info.ch[0].lcd_size_cfg.width = 44; | 1356 | lcdc_info.ch[0].panel_cfg.width = 44; |
1359 | lcdc_info.ch[0].lcd_size_cfg.height = 79; | 1357 | lcdc_info.ch[0].panel_cfg.height = 79; |
1360 | 1358 | ||
1361 | platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices)); | 1359 | platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices)); |
1362 | 1360 | ||
@@ -1397,8 +1395,8 @@ static void __init ap4evb_init(void) | |||
1397 | lcdc_info.ch[0].interface_type = RGB18; | 1395 | lcdc_info.ch[0].interface_type = RGB18; |
1398 | lcdc_info.ch[0].clock_divider = 3; | 1396 | lcdc_info.ch[0].clock_divider = 3; |
1399 | lcdc_info.ch[0].flags = 0; | 1397 | lcdc_info.ch[0].flags = 0; |
1400 | lcdc_info.ch[0].lcd_size_cfg.width = 152; | 1398 | lcdc_info.ch[0].panel_cfg.width = 152; |
1401 | lcdc_info.ch[0].lcd_size_cfg.height = 91; | 1399 | lcdc_info.ch[0].panel_cfg.height = 91; |
1402 | 1400 | ||
1403 | /* enable TouchScreen */ | 1401 | /* enable TouchScreen */ |
1404 | irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); | 1402 | irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); |
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index 4bd1162ce0df..c79baa9ef61b 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c | |||
@@ -246,9 +246,9 @@ static struct sh_mobile_lcdc_info lcdc0_info = { | |||
246 | .interface_type = RGB24, | 246 | .interface_type = RGB24, |
247 | .clock_divider = 5, | 247 | .clock_divider = 5, |
248 | .flags = 0, | 248 | .flags = 0, |
249 | .lcd_cfg = &lcdc0_mode, | 249 | .lcd_modes = &lcdc0_mode, |
250 | .num_cfg = 1, | 250 | .num_modes = 1, |
251 | .lcd_size_cfg = { | 251 | .panel_cfg = { |
252 | .width = 152, | 252 | .width = 152, |
253 | .height = 91, | 253 | .height = 91, |
254 | }, | 254 | }, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 7b53cda41851..865d56d96299 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -318,8 +318,14 @@ static struct sh_mobile_meram_info mackerel_meram_info = { | |||
318 | 318 | ||
319 | static struct resource meram_resources[] = { | 319 | static struct resource meram_resources[] = { |
320 | [0] = { | 320 | [0] = { |
321 | .name = "MERAM", | 321 | .name = "regs", |
322 | .start = 0xe8000000, | 322 | .start = 0xe8000000, |
323 | .end = 0xe807ffff, | ||
324 | .flags = IORESOURCE_MEM, | ||
325 | }, | ||
326 | [1] = { | ||
327 | .name = "meram", | ||
328 | .start = 0xe8080000, | ||
323 | .end = 0xe81fffff, | 329 | .end = 0xe81fffff, |
324 | .flags = IORESOURCE_MEM, | 330 | .flags = IORESOURCE_MEM, |
325 | }, | 331 | }, |
@@ -351,29 +357,23 @@ static struct fb_videomode mackerel_lcdc_modes[] = { | |||
351 | }, | 357 | }, |
352 | }; | 358 | }; |
353 | 359 | ||
354 | static int mackerel_set_brightness(void *board_data, int brightness) | 360 | static int mackerel_set_brightness(int brightness) |
355 | { | 361 | { |
356 | gpio_set_value(GPIO_PORT31, brightness); | 362 | gpio_set_value(GPIO_PORT31, brightness); |
357 | 363 | ||
358 | return 0; | 364 | return 0; |
359 | } | 365 | } |
360 | 366 | ||
361 | static int mackerel_get_brightness(void *board_data) | 367 | static int mackerel_get_brightness(void) |
362 | { | 368 | { |
363 | return gpio_get_value(GPIO_PORT31); | 369 | return gpio_get_value(GPIO_PORT31); |
364 | } | 370 | } |
365 | 371 | ||
366 | static struct sh_mobile_meram_cfg lcd_meram_cfg = { | 372 | static const struct sh_mobile_meram_cfg lcd_meram_cfg = { |
367 | .icb[0] = { | 373 | .icb[0] = { |
368 | .marker_icb = 28, | ||
369 | .cache_icb = 24, | ||
370 | .meram_offset = 0x0, | ||
371 | .meram_size = 0x40, | 374 | .meram_size = 0x40, |
372 | }, | 375 | }, |
373 | .icb[1] = { | 376 | .icb[1] = { |
374 | .marker_icb = 29, | ||
375 | .cache_icb = 25, | ||
376 | .meram_offset = 0x40, | ||
377 | .meram_size = 0x40, | 377 | .meram_size = 0x40, |
378 | }, | 378 | }, |
379 | }; | 379 | }; |
@@ -384,20 +384,20 @@ static struct sh_mobile_lcdc_info lcdc_info = { | |||
384 | .ch[0] = { | 384 | .ch[0] = { |
385 | .chan = LCDC_CHAN_MAINLCD, | 385 | .chan = LCDC_CHAN_MAINLCD, |
386 | .fourcc = V4L2_PIX_FMT_RGB565, | 386 | .fourcc = V4L2_PIX_FMT_RGB565, |
387 | .lcd_cfg = mackerel_lcdc_modes, | 387 | .lcd_modes = mackerel_lcdc_modes, |
388 | .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), | 388 | .num_modes = ARRAY_SIZE(mackerel_lcdc_modes), |
389 | .interface_type = RGB24, | 389 | .interface_type = RGB24, |
390 | .clock_divider = 3, | 390 | .clock_divider = 3, |
391 | .flags = 0, | 391 | .flags = 0, |
392 | .lcd_size_cfg.width = 152, | 392 | .panel_cfg = { |
393 | .lcd_size_cfg.height = 91, | 393 | .width = 152, |
394 | .board_cfg = { | 394 | .height = 91, |
395 | .set_brightness = mackerel_set_brightness, | ||
396 | .get_brightness = mackerel_get_brightness, | ||
397 | }, | 395 | }, |
398 | .bl_info = { | 396 | .bl_info = { |
399 | .name = "sh_mobile_lcdc_bl", | 397 | .name = "sh_mobile_lcdc_bl", |
400 | .max_brightness = 1, | 398 | .max_brightness = 1, |
399 | .set_brightness = mackerel_set_brightness, | ||
400 | .get_brightness = mackerel_get_brightness, | ||
401 | }, | 401 | }, |
402 | .meram_cfg = &lcd_meram_cfg, | 402 | .meram_cfg = &lcd_meram_cfg, |
403 | } | 403 | } |
@@ -426,21 +426,44 @@ static struct platform_device lcdc_device = { | |||
426 | }, | 426 | }, |
427 | }; | 427 | }; |
428 | 428 | ||
429 | static struct sh_mobile_meram_cfg hdmi_meram_cfg = { | 429 | /* HDMI */ |
430 | static struct sh_mobile_hdmi_info hdmi_info = { | ||
431 | .flags = HDMI_SND_SRC_SPDIF, | ||
432 | }; | ||
433 | |||
434 | static struct resource hdmi_resources[] = { | ||
435 | [0] = { | ||
436 | .name = "HDMI", | ||
437 | .start = 0xe6be0000, | ||
438 | .end = 0xe6be00ff, | ||
439 | .flags = IORESOURCE_MEM, | ||
440 | }, | ||
441 | [1] = { | ||
442 | /* There's also an HDMI interrupt on INTCS @ 0x18e0 */ | ||
443 | .start = evt2irq(0x17e0), | ||
444 | .flags = IORESOURCE_IRQ, | ||
445 | }, | ||
446 | }; | ||
447 | |||
448 | static struct platform_device hdmi_device = { | ||
449 | .name = "sh-mobile-hdmi", | ||
450 | .num_resources = ARRAY_SIZE(hdmi_resources), | ||
451 | .resource = hdmi_resources, | ||
452 | .id = -1, | ||
453 | .dev = { | ||
454 | .platform_data = &hdmi_info, | ||
455 | }, | ||
456 | }; | ||
457 | |||
458 | static const struct sh_mobile_meram_cfg hdmi_meram_cfg = { | ||
430 | .icb[0] = { | 459 | .icb[0] = { |
431 | .marker_icb = 30, | ||
432 | .cache_icb = 26, | ||
433 | .meram_offset = 0x80, | ||
434 | .meram_size = 0x100, | 460 | .meram_size = 0x100, |
435 | }, | 461 | }, |
436 | .icb[1] = { | 462 | .icb[1] = { |
437 | .marker_icb = 31, | ||
438 | .cache_icb = 27, | ||
439 | .meram_offset = 0x180, | ||
440 | .meram_size = 0x100, | 463 | .meram_size = 0x100, |
441 | }, | 464 | }, |
442 | }; | 465 | }; |
443 | /* HDMI */ | 466 | |
444 | static struct sh_mobile_lcdc_info hdmi_lcdc_info = { | 467 | static struct sh_mobile_lcdc_info hdmi_lcdc_info = { |
445 | .meram_dev = &mackerel_meram_info, | 468 | .meram_dev = &mackerel_meram_info, |
446 | .clock_source = LCDC_CLK_EXTERNAL, | 469 | .clock_source = LCDC_CLK_EXTERNAL, |
@@ -451,6 +474,7 @@ static struct sh_mobile_lcdc_info hdmi_lcdc_info = { | |||
451 | .clock_divider = 1, | 474 | .clock_divider = 1, |
452 | .flags = LCDC_FLAGS_DWPOL, | 475 | .flags = LCDC_FLAGS_DWPOL, |
453 | .meram_cfg = &hdmi_meram_cfg, | 476 | .meram_cfg = &hdmi_meram_cfg, |
477 | .tx_dev = &hdmi_device, | ||
454 | } | 478 | } |
455 | }; | 479 | }; |
456 | 480 | ||
@@ -478,36 +502,6 @@ static struct platform_device hdmi_lcdc_device = { | |||
478 | }, | 502 | }, |
479 | }; | 503 | }; |
480 | 504 | ||
481 | static struct sh_mobile_hdmi_info hdmi_info = { | ||
482 | .lcd_chan = &hdmi_lcdc_info.ch[0], | ||
483 | .lcd_dev = &hdmi_lcdc_device.dev, | ||
484 | .flags = HDMI_SND_SRC_SPDIF, | ||
485 | }; | ||
486 | |||
487 | static struct resource hdmi_resources[] = { | ||
488 | [0] = { | ||
489 | .name = "HDMI", | ||
490 | .start = 0xe6be0000, | ||
491 | .end = 0xe6be00ff, | ||
492 | .flags = IORESOURCE_MEM, | ||
493 | }, | ||
494 | [1] = { | ||
495 | /* There's also an HDMI interrupt on INTCS @ 0x18e0 */ | ||
496 | .start = evt2irq(0x17e0), | ||
497 | .flags = IORESOURCE_IRQ, | ||
498 | }, | ||
499 | }; | ||
500 | |||
501 | static struct platform_device hdmi_device = { | ||
502 | .name = "sh-mobile-hdmi", | ||
503 | .num_resources = ARRAY_SIZE(hdmi_resources), | ||
504 | .resource = hdmi_resources, | ||
505 | .id = -1, | ||
506 | .dev = { | ||
507 | .platform_data = &hdmi_info, | ||
508 | }, | ||
509 | }; | ||
510 | |||
511 | static struct platform_device fsi_hdmi_device = { | 505 | static struct platform_device fsi_hdmi_device = { |
512 | .name = "sh_fsi2_b_hdmi", | 506 | .name = "sh_fsi2_b_hdmi", |
513 | }; | 507 | }; |
@@ -860,7 +854,7 @@ static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) | |||
860 | return clk_enable(clk); | 854 | return clk_enable(clk); |
861 | } | 855 | } |
862 | 856 | ||
863 | static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable) | 857 | static int fsi_b_set_rate(struct device *dev, int rate, int enable) |
864 | { | 858 | { |
865 | struct clk *fsib_clk; | 859 | struct clk *fsib_clk; |
866 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | 860 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; |
@@ -869,10 +863,6 @@ static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable) | |||
869 | int ackmd_bpfmd; | 863 | int ackmd_bpfmd; |
870 | int ret; | 864 | int ret; |
871 | 865 | ||
872 | /* FSIA is slave mode. nothing to do here */ | ||
873 | if (is_porta) | ||
874 | return 0; | ||
875 | |||
876 | /* clock start */ | 866 | /* clock start */ |
877 | switch (rate) { | 867 | switch (rate) { |
878 | case 44100: | 868 | case 44100: |
@@ -916,14 +906,16 @@ fsi_set_rate_end: | |||
916 | } | 906 | } |
917 | 907 | ||
918 | static struct sh_fsi_platform_info fsi_info = { | 908 | static struct sh_fsi_platform_info fsi_info = { |
919 | .porta_flags = SH_FSI_BRS_INV, | 909 | .port_a = { |
920 | 910 | .flags = SH_FSI_BRS_INV, | |
921 | .portb_flags = SH_FSI_BRS_INV | | 911 | }, |
912 | .port_b = { | ||
913 | .flags = SH_FSI_BRS_INV | | ||
922 | SH_FSI_BRM_INV | | 914 | SH_FSI_BRM_INV | |
923 | SH_FSI_LRS_INV | | 915 | SH_FSI_LRS_INV | |
924 | SH_FSI_FMT_SPDIF, | 916 | SH_FSI_FMT_SPDIF, |
925 | 917 | .set_rate = fsi_b_set_rate, | |
926 | .set_rate = fsi_set_rate, | 918 | } |
927 | }; | 919 | }; |
928 | 920 | ||
929 | static struct resource fsi_resources[] = { | 921 | static struct resource fsi_resources[] = { |
@@ -1276,8 +1268,8 @@ static struct platform_device *mackerel_devices[] __initdata = { | |||
1276 | &sh_mmcif_device, | 1268 | &sh_mmcif_device, |
1277 | &ceu_device, | 1269 | &ceu_device, |
1278 | &mackerel_camera, | 1270 | &mackerel_camera, |
1279 | &hdmi_lcdc_device, | ||
1280 | &hdmi_device, | 1271 | &hdmi_device, |
1272 | &hdmi_lcdc_device, | ||
1281 | &meram_device, | 1273 | &meram_device, |
1282 | }; | 1274 | }; |
1283 | 1275 | ||
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S deleted file mode 100644 index 2a57b2964ee9..000000000000 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Paul Mundt | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; version 2 of the License. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
16 | */ | ||
17 | |||
18 | .macro disable_fiq | ||
19 | .endm | ||
20 | |||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h index 956ac18ddbf9..3bbcb3fa0775 100644 --- a/arch/arm/mach-shmobile/include/mach/system.h +++ b/arch/arm/mach-shmobile/include/mach/system.h | |||
@@ -1,11 +1,6 @@ | |||
1 | #ifndef __ASM_ARCH_SYSTEM_H | 1 | #ifndef __ASM_ARCH_SYSTEM_H |
2 | #define __ASM_ARCH_SYSTEM_H | 2 | #define __ASM_ARCH_SYSTEM_H |
3 | 3 | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
8 | |||
9 | static inline void arch_reset(char mode, const char *cmd) | 4 | static inline void arch_reset(char mode, const char *cmd) |
10 | { | 5 | { |
11 | soft_restart(0); | 6 | soft_restart(0); |
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index a83cf51fc099..cccf91b8fae1 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -1043,6 +1043,8 @@ void __init sh7372_add_standard_devices(void) | |||
1043 | sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device); | 1043 | sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device); |
1044 | sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device); | 1044 | sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device); |
1045 | sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); | 1045 | sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); |
1046 | sh7372_add_device_to_domain(&sh7372_a4r, &tmu00_device); | ||
1047 | sh7372_add_device_to_domain(&sh7372_a4r, &tmu01_device); | ||
1046 | } | 1048 | } |
1047 | 1049 | ||
1048 | void __init sh7372_add_early_devices(void) | 1050 | void __init sh7372_add_early_devices(void) |
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S deleted file mode 100644 index de3bb41c8e9e..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr3xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h deleted file mode 100644 index 92cee6335c90..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr3xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index a5e46b4ade20..f7db66812abb 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = { | |||
430 | .irq_base = SPEAR300_GPIO1_INT_BASE, | 430 | .irq_base = SPEAR300_GPIO1_INT_BASE, |
431 | }; | 431 | }; |
432 | 432 | ||
433 | struct amba_device spear300_gpio1_device = { | 433 | AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, |
434 | .dev = { | 434 | {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); |
435 | .init_name = "gpio1", | ||
436 | .platform_data = &gpio1_plat_data, | ||
437 | }, | ||
438 | .res = { | ||
439 | .start = SPEAR300_GPIO_BASE, | ||
440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, | ||
441 | .flags = IORESOURCE_MEM, | ||
442 | }, | ||
443 | .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, | ||
444 | }; | ||
445 | 435 | ||
446 | /* spear300 routines */ | 436 | /* spear300 routines */ |
447 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | 437 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, |
@@ -469,7 +459,7 @@ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | |||
469 | if (pmx_driver.base) { | 459 | if (pmx_driver.base) { |
470 | ret = pmx_register(&pmx_driver); | 460 | ret = pmx_register(&pmx_driver); |
471 | if (ret) | 461 | if (ret) |
472 | printk(KERN_ERR "padmux: registeration failed. err no" | 462 | printk(KERN_ERR "padmux: registration failed. err no" |
473 | ": %d\n", ret); | 463 | ": %d\n", ret); |
474 | /* Free Mapping, device selection already done */ | 464 | /* Free Mapping, device selection already done */ |
475 | iounmap(pmx_driver.base); | 465 | iounmap(pmx_driver.base); |
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 9004cf9f01bf..febaa6fcfb6a 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c | |||
@@ -303,6 +303,6 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | |||
303 | 303 | ||
304 | ret = pmx_register(&pmx_driver); | 304 | ret = pmx_register(&pmx_driver); |
305 | if (ret) | 305 | if (ret) |
306 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | 306 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", |
307 | ret); | 307 | ret); |
308 | } | 308 | } |
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index ee29bef43074..deaaf199612c 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -550,6 +550,6 @@ void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | |||
550 | 550 | ||
551 | ret = pmx_register(&pmx_driver); | 551 | ret = pmx_register(&pmx_driver); |
552 | if (ret) | 552 | if (ret) |
553 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | 553 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", |
554 | ret); | 554 | ret); |
555 | } | 555 | } |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 10af45da86a0..b1733c37f209 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = { | |||
28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, | 28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, |
29 | }; | 29 | }; |
30 | 30 | ||
31 | struct amba_device spear3xx_gpio_device = { | 31 | AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, |
32 | .dev = { | 32 | {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); |
33 | .init_name = "gpio", | ||
34 | .platform_data = &gpio_plat_data, | ||
35 | }, | ||
36 | .res = { | ||
37 | .start = SPEAR3XX_ICM3_GPIO_BASE, | ||
38 | .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, | ||
39 | .flags = IORESOURCE_MEM, | ||
40 | }, | ||
41 | .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, | ||
42 | }; | ||
43 | 33 | ||
44 | /* uart device registration */ | 34 | /* uart device registration */ |
45 | struct amba_device spear3xx_uart_device = { | 35 | AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, |
46 | .dev = { | 36 | {SPEAR3XX_IRQ_UART}, NULL); |
47 | .init_name = "uart", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = SPEAR3XX_ICM1_UART_BASE, | ||
51 | .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, | ||
55 | }; | ||
56 | 37 | ||
57 | /* Do spear3xx familiy common initialization part here */ | 38 | /* Do spear3xx familiy common initialization part here */ |
58 | void __init spear3xx_init(void) | 39 | void __init spear3xx_init(void) |
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S deleted file mode 100644 index d490a910d925..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr6xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h deleted file mode 100644 index 0b1d2be81cfb..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr6xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index e0f6628c8b2c..b997b1b10ba0 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = { | |||
34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, | 34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, |
35 | .flags = IORESOURCE_MEM, | 35 | .flags = IORESOURCE_MEM, |
36 | }, | 36 | }, |
37 | .irq = {IRQ_UART_0, NO_IRQ}, | 37 | .irq = {IRQ_UART_0}, |
38 | }, { | 38 | }, { |
39 | .dev = { | 39 | .dev = { |
40 | .init_name = "uart1", | 40 | .init_name = "uart1", |
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = { | |||
44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, | 44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, |
45 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
46 | }, | 46 | }, |
47 | .irq = {IRQ_UART_1, NO_IRQ}, | 47 | .irq = {IRQ_UART_1}, |
48 | } | 48 | } |
49 | }; | 49 | }; |
50 | 50 | ||
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = { | |||
73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, | 73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, |
74 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
75 | }, | 75 | }, |
76 | .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, | 76 | .irq = {IRQ_LOCAL_GPIO}, |
77 | }, { | 77 | }, { |
78 | .dev = { | 78 | .dev = { |
79 | .init_name = "gpio1", | 79 | .init_name = "gpio1", |
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = { | |||
84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, | 84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, |
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 87 | .irq = {IRQ_BASIC_GPIO}, |
88 | }, { | 88 | }, { |
89 | .dev = { | 89 | .dev = { |
90 | .init_name = "gpio2", | 90 | .init_name = "gpio2", |
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = { | |||
95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, | 95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, |
96 | .flags = IORESOURCE_MEM, | 96 | .flags = IORESOURCE_MEM, |
97 | }, | 97 | }, |
98 | .irq = {IRQ_APPL_GPIO, NO_IRQ}, | 98 | .irq = {IRQ_APPL_GPIO}, |
99 | } | 99 | } |
100 | }; | 100 | }; |
101 | 101 | ||
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d76b90..32b420a90c3d 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -7,6 +7,8 @@ config ARCH_TEGRA_2x_SOC | |||
7 | select CPU_V7 | 7 | select CPU_V7 |
8 | select ARM_GIC | 8 | select ARM_GIC |
9 | select ARCH_REQUIRE_GPIOLIB | 9 | select ARCH_REQUIRE_GPIOLIB |
10 | select PINCTRL | ||
11 | select PINCTRL_TEGRA20 | ||
10 | select USB_ARCH_HAS_EHCI if USB_SUPPORT | 12 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
11 | select USB_ULPI if USB_SUPPORT | 13 | select USB_ULPI if USB_SUPPORT |
12 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 14 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
@@ -19,6 +21,8 @@ config ARCH_TEGRA_3x_SOC | |||
19 | select CPU_V7 | 21 | select CPU_V7 |
20 | select ARM_GIC | 22 | select ARM_GIC |
21 | select ARCH_REQUIRE_GPIOLIB | 23 | select ARCH_REQUIRE_GPIOLIB |
24 | select PINCTRL | ||
25 | select PINCTRL_TEGRA30 | ||
22 | select USB_ARCH_HAS_EHCI if USB_SUPPORT | 26 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
23 | select USB_ULPI if USB_SUPPORT | 27 | select USB_ULPI if USB_SUPPORT |
24 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 28 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index a2eb90169aed..2db20da1d585 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | 29 | #include <mach/iomap.h> |
30 | #include <mach/system.h> | ||
31 | 30 | ||
32 | #include "board.h" | 31 | #include "board.h" |
33 | #include "clock.h" | 32 | #include "clock.h" |
@@ -96,6 +95,8 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) | |||
96 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | 95 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
97 | void __init tegra20_init_early(void) | 96 | void __init tegra20_init_early(void) |
98 | { | 97 | { |
98 | disable_hlt(); /* idle WFI usage needs to be confirmed */ | ||
99 | |||
99 | tegra_init_fuse(); | 100 | tegra_init_fuse(); |
100 | tegra2_init_clocks(); | 101 | tegra2_init_clocks(); |
101 | tegra_clk_init_from_table(tegra20_clk_init_table); | 102 | tegra_clk_init_from_table(tegra20_clk_init_table); |
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 1fa26d9a1a68..ea49bd93c6b9 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/module.h> | ||
22 | 23 | ||
23 | #include <mach/iomap.h> | 24 | #include <mach/iomap.h> |
24 | 25 | ||
@@ -58,6 +59,7 @@ unsigned long long tegra_chip_uid(void) | |||
58 | hi = fuse_readl(FUSE_UID_HIGH); | 59 | hi = fuse_readl(FUSE_UID_HIGH); |
59 | return (hi << 32ull) | lo; | 60 | return (hi << 32ull) | lo; |
60 | } | 61 | } |
62 | EXPORT_SYMBOL(tegra_chip_uid); | ||
61 | 63 | ||
62 | int tegra_sku_id(void) | 64 | int tegra_sku_id(void) |
63 | { | 65 | { |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S deleted file mode 100644 index e577cfe27e72..000000000000 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* arch/arm/mach-tegra/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (C) 2009 Palm, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h index 20bb0545f992..a13025612939 100644 --- a/arch/arm/mach-tegra/include/mach/kbc.h +++ b/arch/arm/mach-tegra/include/mach/kbc.h | |||
@@ -24,20 +24,21 @@ | |||
24 | #include <linux/types.h> | 24 | #include <linux/types.h> |
25 | #include <linux/input/matrix_keypad.h> | 25 | #include <linux/input/matrix_keypad.h> |
26 | 26 | ||
27 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | ||
28 | #define KBC_MAX_GPIO 24 | 27 | #define KBC_MAX_GPIO 24 |
29 | #define KBC_MAX_KPENT 8 | 28 | #define KBC_MAX_KPENT 8 |
30 | #else | ||
31 | #define KBC_MAX_GPIO 20 | ||
32 | #define KBC_MAX_KPENT 7 | ||
33 | #endif | ||
34 | 29 | ||
35 | #define KBC_MAX_ROW 16 | 30 | #define KBC_MAX_ROW 16 |
36 | #define KBC_MAX_COL 8 | 31 | #define KBC_MAX_COL 8 |
37 | #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL) | 32 | #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL) |
38 | 33 | ||
34 | enum tegra_pin_type { | ||
35 | PIN_CFG_IGNORE, | ||
36 | PIN_CFG_COL, | ||
37 | PIN_CFG_ROW, | ||
38 | }; | ||
39 | |||
39 | struct tegra_kbc_pin_cfg { | 40 | struct tegra_kbc_pin_cfg { |
40 | bool is_row; | 41 | enum tegra_pin_type type; |
41 | unsigned char num; | 42 | unsigned char num; |
42 | }; | 43 | }; |
43 | 44 | ||
diff --git a/arch/arm/mach-tegra/include/mach/pinconf-tegra.h b/arch/arm/mach-tegra/include/mach/pinconf-tegra.h new file mode 100644 index 000000000000..1f24d304921e --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/pinconf-tegra.h | |||
@@ -0,0 +1,63 @@ | |||
1 | /* | ||
2 | * pinctrl configuration definitions for the NVIDIA Tegra pinmux | ||
3 | * | ||
4 | * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __PINCONF_TEGRA_H__ | ||
17 | #define __PINCONF_TEGRA_H__ | ||
18 | |||
19 | enum tegra_pinconf_param { | ||
20 | /* argument: tegra_pinconf_pull */ | ||
21 | TEGRA_PINCONF_PARAM_PULL, | ||
22 | /* argument: tegra_pinconf_tristate */ | ||
23 | TEGRA_PINCONF_PARAM_TRISTATE, | ||
24 | /* argument: Boolean */ | ||
25 | TEGRA_PINCONF_PARAM_ENABLE_INPUT, | ||
26 | /* argument: Boolean */ | ||
27 | TEGRA_PINCONF_PARAM_OPEN_DRAIN, | ||
28 | /* argument: Boolean */ | ||
29 | TEGRA_PINCONF_PARAM_LOCK, | ||
30 | /* argument: Boolean */ | ||
31 | TEGRA_PINCONF_PARAM_IORESET, | ||
32 | /* argument: Boolean */ | ||
33 | TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, | ||
34 | /* argument: Boolean */ | ||
35 | TEGRA_PINCONF_PARAM_SCHMITT, | ||
36 | /* argument: Boolean */ | ||
37 | TEGRA_PINCONF_PARAM_LOW_POWER_MODE, | ||
38 | /* argument: Integer, range is HW-dependant */ | ||
39 | TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, | ||
40 | /* argument: Integer, range is HW-dependant */ | ||
41 | TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, | ||
42 | /* argument: Integer, range is HW-dependant */ | ||
43 | TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, | ||
44 | /* argument: Integer, range is HW-dependant */ | ||
45 | TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, | ||
46 | }; | ||
47 | |||
48 | enum tegra_pinconf_pull { | ||
49 | TEGRA_PINCONFIG_PULL_NONE, | ||
50 | TEGRA_PINCONFIG_PULL_DOWN, | ||
51 | TEGRA_PINCONFIG_PULL_UP, | ||
52 | }; | ||
53 | |||
54 | enum tegra_pinconf_tristate { | ||
55 | TEGRA_PINCONFIG_DRIVEN, | ||
56 | TEGRA_PINCONFIG_TRISTATE, | ||
57 | }; | ||
58 | |||
59 | #define TEGRA_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_)) | ||
60 | #define TEGRA_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16) | ||
61 | #define TEGRA_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff) | ||
62 | |||
63 | #endif | ||
diff --git a/arch/arm/mach-tegra/include/mach/smmu.h b/arch/arm/mach-tegra/include/mach/smmu.h new file mode 100644 index 000000000000..dad403a9cf00 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/smmu.h | |||
@@ -0,0 +1,63 @@ | |||
1 | /* | ||
2 | * IOMMU API for SMMU in Tegra30 | ||
3 | * | ||
4 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along with | ||
16 | * this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef MACH_SMMU_H | ||
21 | #define MACH_SMMU_H | ||
22 | |||
23 | enum smmu_hwgrp { | ||
24 | HWGRP_AFI, | ||
25 | HWGRP_AVPC, | ||
26 | HWGRP_DC, | ||
27 | HWGRP_DCB, | ||
28 | HWGRP_EPP, | ||
29 | HWGRP_G2, | ||
30 | HWGRP_HC, | ||
31 | HWGRP_HDA, | ||
32 | HWGRP_ISP, | ||
33 | HWGRP_MPE, | ||
34 | HWGRP_NV, | ||
35 | HWGRP_NV2, | ||
36 | HWGRP_PPCS, | ||
37 | HWGRP_SATA, | ||
38 | HWGRP_VDE, | ||
39 | HWGRP_VI, | ||
40 | |||
41 | HWGRP_COUNT, | ||
42 | |||
43 | HWGRP_END = ~0, | ||
44 | }; | ||
45 | |||
46 | #define HWG_AFI (1 << HWGRP_AFI) | ||
47 | #define HWG_AVPC (1 << HWGRP_AVPC) | ||
48 | #define HWG_DC (1 << HWGRP_DC) | ||
49 | #define HWG_DCB (1 << HWGRP_DCB) | ||
50 | #define HWG_EPP (1 << HWGRP_EPP) | ||
51 | #define HWG_G2 (1 << HWGRP_G2) | ||
52 | #define HWG_HC (1 << HWGRP_HC) | ||
53 | #define HWG_HDA (1 << HWGRP_HDA) | ||
54 | #define HWG_ISP (1 << HWGRP_ISP) | ||
55 | #define HWG_MPE (1 << HWGRP_MPE) | ||
56 | #define HWG_NV (1 << HWGRP_NV) | ||
57 | #define HWG_NV2 (1 << HWGRP_NV2) | ||
58 | #define HWG_PPCS (1 << HWGRP_PPCS) | ||
59 | #define HWG_SATA (1 << HWGRP_SATA) | ||
60 | #define HWG_VDE (1 << HWGRP_VDE) | ||
61 | #define HWG_VI (1 << HWGRP_VI) | ||
62 | |||
63 | #endif /* MACH_SMMU_H */ | ||
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h deleted file mode 100644 index a312988bf6f8..000000000000 --- a/arch/arm/mach-tegra/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-tegra/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Google, Inc. | ||
5 | * | ||
6 | * Author: | ||
7 | * Colin Cross <ccross@google.com> | ||
8 | * Erik Gilling <konkers@google.com> | ||
9 | * | ||
10 | * This software is licensed under the terms of the GNU General Public | ||
11 | * License version 2, as published by the Free Software Foundation, and | ||
12 | * may be copied, distributed, and modified under those terms. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_TEGRA_SYSTEM_H | ||
22 | #define __MACH_TEGRA_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h index d4b8f9e298a8..de1a0f602b28 100644 --- a/arch/arm/mach-tegra/include/mach/usb_phy.h +++ b/arch/arm/mach-tegra/include/mach/usb_phy.h | |||
@@ -58,7 +58,7 @@ struct tegra_usb_phy { | |||
58 | struct clk *pad_clk; | 58 | struct clk *pad_clk; |
59 | enum tegra_usb_phy_mode mode; | 59 | enum tegra_usb_phy_mode mode; |
60 | void *config; | 60 | void *config; |
61 | struct otg_transceiver *ulpi; | 61 | struct usb_phy *ulpi; |
62 | }; | 62 | }; |
63 | 63 | ||
64 | struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, | 64 | struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, |
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index af8b63435727..14b29ab5d8f0 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c | |||
@@ -408,7 +408,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) | |||
408 | pp->res[0].flags = IORESOURCE_IO; | 408 | pp->res[0].flags = IORESOURCE_IO; |
409 | if (request_resource(&ioport_resource, &pp->res[0])) | 409 | if (request_resource(&ioport_resource, &pp->res[0])) |
410 | panic("Request PCIe IO resource failed\n"); | 410 | panic("Request PCIe IO resource failed\n"); |
411 | pci_add_resource(&sys->resources, &pp->res[0]); | 411 | pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset); |
412 | 412 | ||
413 | /* | 413 | /* |
414 | * IORESOURCE_MEM | 414 | * IORESOURCE_MEM |
@@ -427,7 +427,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) | |||
427 | pp->res[1].flags = IORESOURCE_MEM; | 427 | pp->res[1].flags = IORESOURCE_MEM; |
428 | if (request_resource(&iomem_resource, &pp->res[1])) | 428 | if (request_resource(&iomem_resource, &pp->res[1])) |
429 | panic("Request PCIe Memory resource failed\n"); | 429 | panic("Request PCIe Memory resource failed\n"); |
430 | pci_add_resource(&sys->resources, &pp->res[1]); | 430 | pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); |
431 | 431 | ||
432 | /* | 432 | /* |
433 | * IORESOURCE_MEM | IORESOURCE_PREFETCH | 433 | * IORESOURCE_MEM | IORESOURCE_PREFETCH |
@@ -446,7 +446,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) | |||
446 | pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; | 446 | pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
447 | if (request_resource(&iomem_resource, &pp->res[2])) | 447 | if (request_resource(&iomem_resource, &pp->res[2])) |
448 | panic("Request PCIe Prefetch Memory resource failed\n"); | 448 | panic("Request PCIe Prefetch Memory resource failed\n"); |
449 | pci_add_resource(&sys->resources, &pp->res[2]); | 449 | pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset); |
450 | 450 | ||
451 | return 1; | 451 | return 1; |
452 | } | 452 | } |
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 37576a721aeb..ad321f9e2bb8 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c | |||
@@ -608,13 +608,13 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy) | |||
608 | writel(val, base + ULPI_TIMING_CTRL_1); | 608 | writel(val, base + ULPI_TIMING_CTRL_1); |
609 | 609 | ||
610 | /* Fix VbusInvalid due to floating VBUS */ | 610 | /* Fix VbusInvalid due to floating VBUS */ |
611 | ret = otg_io_write(phy->ulpi, 0x40, 0x08); | 611 | ret = usb_phy_io_write(phy->ulpi, 0x40, 0x08); |
612 | if (ret) { | 612 | if (ret) { |
613 | pr_err("%s: ulpi write failed\n", __func__); | 613 | pr_err("%s: ulpi write failed\n", __func__); |
614 | return ret; | 614 | return ret; |
615 | } | 615 | } |
616 | 616 | ||
617 | ret = otg_io_write(phy->ulpi, 0x80, 0x0B); | 617 | ret = usb_phy_io_write(phy->ulpi, 0x80, 0x0B); |
618 | if (ret) { | 618 | if (ret) { |
619 | pr_err("%s: ulpi write failed\n", __func__); | 619 | pr_err("%s: ulpi write failed\n", __func__); |
620 | return ret; | 620 | return ret; |
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile index 285538124e5e..fd3a5c382f47 100644 --- a/arch/arm/mach-u300/Makefile +++ b/arch/arm/mach-u300/Makefile | |||
@@ -8,7 +8,6 @@ obj-n := | |||
8 | obj- := | 8 | obj- := |
9 | 9 | ||
10 | obj-$(CONFIG_ARCH_U300) += u300.o | 10 | obj-$(CONFIG_ARCH_U300) += u300.o |
11 | obj-$(CONFIG_MMC) += mmc.o | ||
12 | obj-$(CONFIG_SPI_PL022) += spi.o | 11 | obj-$(CONFIG_SPI_PL022) += spi.o |
13 | obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o | 12 | obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o |
14 | obj-$(CONFIG_I2C_STU300) += i2c.o | 13 | obj-$(CONFIG_I2C_STU300) += i2c.o |
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index b4c6926a700c..8b90c44d237f 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/termios.h> | 18 | #include <linux/termios.h> |
19 | #include <linux/dmaengine.h> | 19 | #include <linux/dmaengine.h> |
20 | #include <linux/amba/bus.h> | 20 | #include <linux/amba/bus.h> |
21 | #include <linux/amba/mmci.h> | ||
21 | #include <linux/amba/serial.h> | 22 | #include <linux/amba/serial.h> |
22 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
@@ -26,7 +27,8 @@ | |||
26 | #include <linux/mtd/nand.h> | 27 | #include <linux/mtd/nand.h> |
27 | #include <linux/mtd/fsmc.h> | 28 | #include <linux/mtd/fsmc.h> |
28 | #include <linux/pinctrl/machine.h> | 29 | #include <linux/pinctrl/machine.h> |
29 | #include <linux/pinctrl/pinmux.h> | 30 | #include <linux/pinctrl/consumer.h> |
31 | #include <linux/pinctrl/pinconf-generic.h> | ||
30 | #include <linux/dma-mapping.h> | 32 | #include <linux/dma-mapping.h> |
31 | 33 | ||
32 | #include <asm/types.h> | 34 | #include <asm/types.h> |
@@ -43,9 +45,9 @@ | |||
43 | #include <mach/gpio-u300.h> | 45 | #include <mach/gpio-u300.h> |
44 | 46 | ||
45 | #include "clock.h" | 47 | #include "clock.h" |
46 | #include "mmc.h" | ||
47 | #include "spi.h" | 48 | #include "spi.h" |
48 | #include "i2c.h" | 49 | #include "i2c.h" |
50 | #include "u300-gpio.h" | ||
49 | 51 | ||
50 | /* | 52 | /* |
51 | * Static I/O mappings that are needed for booting the U300 platforms. The | 53 | * Static I/O mappings that are needed for booting the U300 platforms. The |
@@ -94,19 +96,9 @@ static struct amba_pl011_data uart0_plat_data = { | |||
94 | #endif | 96 | #endif |
95 | }; | 97 | }; |
96 | 98 | ||
97 | static struct amba_device uart0_device = { | 99 | /* Slow device at 0x3000 offset */ |
98 | .dev = { | 100 | static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, |
99 | .coherent_dma_mask = ~0, | 101 | { IRQ_U300_UART0 }, &uart0_plat_data); |
100 | .init_name = "uart0", /* Slow device at 0x3000 offset */ | ||
101 | .platform_data = &uart0_plat_data, | ||
102 | }, | ||
103 | .res = { | ||
104 | .start = U300_UART0_BASE, | ||
105 | .end = U300_UART0_BASE + SZ_4K - 1, | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | }, | ||
108 | .irq = { IRQ_U300_UART0, NO_IRQ }, | ||
109 | }; | ||
110 | 102 | ||
111 | /* The U335 have an additional UART1 on the APP CPU */ | 103 | /* The U335 have an additional UART1 on the APP CPU */ |
112 | #ifdef CONFIG_MACH_U300_BS335 | 104 | #ifdef CONFIG_MACH_U300_BS335 |
@@ -118,72 +110,42 @@ static struct amba_pl011_data uart1_plat_data = { | |||
118 | #endif | 110 | #endif |
119 | }; | 111 | }; |
120 | 112 | ||
121 | static struct amba_device uart1_device = { | 113 | /* Fast device at 0x7000 offset */ |
122 | .dev = { | 114 | static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, |
123 | .coherent_dma_mask = ~0, | 115 | { IRQ_U300_UART1 }, &uart1_plat_data); |
124 | .init_name = "uart1", /* Fast device at 0x7000 offset */ | ||
125 | .platform_data = &uart1_plat_data, | ||
126 | }, | ||
127 | .res = { | ||
128 | .start = U300_UART1_BASE, | ||
129 | .end = U300_UART1_BASE + SZ_4K - 1, | ||
130 | .flags = IORESOURCE_MEM, | ||
131 | }, | ||
132 | .irq = { IRQ_U300_UART1, NO_IRQ }, | ||
133 | }; | ||
134 | #endif | 116 | #endif |
135 | 117 | ||
136 | static struct amba_device pl172_device = { | 118 | /* AHB device at 0x4000 offset */ |
137 | .dev = { | 119 | static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); |
138 | .init_name = "pl172", /* AHB device at 0x4000 offset */ | ||
139 | .platform_data = NULL, | ||
140 | }, | ||
141 | .res = { | ||
142 | .start = U300_EMIF_CFG_BASE, | ||
143 | .end = U300_EMIF_CFG_BASE + SZ_4K - 1, | ||
144 | .flags = IORESOURCE_MEM, | ||
145 | }, | ||
146 | }; | ||
147 | 120 | ||
121 | /* Fast device at 0x6000 offset */ | ||
122 | static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE, | ||
123 | { IRQ_U300_SPI }, NULL); | ||
148 | 124 | ||
149 | /* | 125 | /* Fast device at 0x1000 offset */ |
150 | * Everything within this next ifdef deals with external devices connected to | 126 | #define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 } |
151 | * the APP SPI bus. | ||
152 | */ | ||
153 | static struct amba_device pl022_device = { | ||
154 | .dev = { | ||
155 | .coherent_dma_mask = ~0, | ||
156 | .init_name = "pl022", /* Fast device at 0x6000 offset */ | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = U300_SPI_BASE, | ||
160 | .end = U300_SPI_BASE + SZ_4K - 1, | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .irq = {IRQ_U300_SPI, NO_IRQ }, | ||
164 | /* | ||
165 | * This device has a DMA channel but the Linux driver does not use | ||
166 | * it currently. | ||
167 | */ | ||
168 | }; | ||
169 | 127 | ||
170 | static struct amba_device mmcsd_device = { | 128 | static struct mmci_platform_data mmcsd_platform_data = { |
171 | .dev = { | ||
172 | .init_name = "mmci", /* Fast device at 0x1000 offset */ | ||
173 | .platform_data = NULL, /* Added later */ | ||
174 | }, | ||
175 | .res = { | ||
176 | .start = U300_MMCSD_BASE, | ||
177 | .end = U300_MMCSD_BASE + SZ_4K - 1, | ||
178 | .flags = IORESOURCE_MEM, | ||
179 | }, | ||
180 | .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, | ||
181 | /* | 129 | /* |
182 | * This device has a DMA channel but the Linux driver does not use | 130 | * Do not set ocr_mask or voltage translation function, |
183 | * it currently. | 131 | * we have a regulator we can control instead. |
184 | */ | 132 | */ |
133 | .f_max = 24000000, | ||
134 | .gpio_wp = -1, | ||
135 | .gpio_cd = U300_GPIO_PIN_MMC_CD, | ||
136 | .cd_invert = true, | ||
137 | .capabilities = MMC_CAP_MMC_HIGHSPEED | | ||
138 | MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
139 | #ifdef CONFIG_COH901318 | ||
140 | .dma_filter = coh901318_filter_id, | ||
141 | .dma_rx_param = (void *) U300_DMA_MMCSD_RX_TX, | ||
142 | /* Don't specify a TX channel, this RX channel is bidirectional */ | ||
143 | #endif | ||
185 | }; | 144 | }; |
186 | 145 | ||
146 | static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, | ||
147 | U300_MMCSD_IRQS, &mmcsd_platform_data); | ||
148 | |||
187 | /* | 149 | /* |
188 | * The order of device declaration may be important, since some devices | 150 | * The order of device declaration may be important, since some devices |
189 | * have dependencies on other devices being initialized first. | 151 | * have dependencies on other devices being initialized first. |
@@ -1477,7 +1439,7 @@ static struct coh901318_platform coh901318_platform = { | |||
1477 | .max_channels = U300_DMA_CHANNELS, | 1439 | .max_channels = U300_DMA_CHANNELS, |
1478 | }; | 1440 | }; |
1479 | 1441 | ||
1480 | static struct resource pinmux_resources[] = { | 1442 | static struct resource pinctrl_resources[] = { |
1481 | { | 1443 | { |
1482 | .start = U300_SYSCON_BASE, | 1444 | .start = U300_SYSCON_BASE, |
1483 | .end = U300_SYSCON_BASE + SZ_4K - 1, | 1445 | .end = U300_SYSCON_BASE + SZ_4K - 1, |
@@ -1506,6 +1468,13 @@ static struct platform_device i2c1_device = { | |||
1506 | .resource = i2c1_resources, | 1468 | .resource = i2c1_resources, |
1507 | }; | 1469 | }; |
1508 | 1470 | ||
1471 | static struct platform_device pinctrl_device = { | ||
1472 | .name = "pinctrl-u300", | ||
1473 | .id = -1, | ||
1474 | .num_resources = ARRAY_SIZE(pinctrl_resources), | ||
1475 | .resource = pinctrl_resources, | ||
1476 | }; | ||
1477 | |||
1509 | /* | 1478 | /* |
1510 | * The different variants have a few different versions of the | 1479 | * The different variants have a few different versions of the |
1511 | * GPIO block, with different number of ports. | 1480 | * GPIO block, with different number of ports. |
@@ -1525,6 +1494,7 @@ static struct u300_gpio_platform u300_gpio_plat = { | |||
1525 | #endif | 1494 | #endif |
1526 | .gpio_base = 0, | 1495 | .gpio_base = 0, |
1527 | .gpio_irq_base = IRQ_U300_GPIO_BASE, | 1496 | .gpio_irq_base = IRQ_U300_GPIO_BASE, |
1497 | .pinctrl_device = &pinctrl_device, | ||
1528 | }; | 1498 | }; |
1529 | 1499 | ||
1530 | static struct platform_device gpio_device = { | 1500 | static struct platform_device gpio_device = { |
@@ -1597,71 +1567,67 @@ static struct platform_device dma_device = { | |||
1597 | }, | 1567 | }, |
1598 | }; | 1568 | }; |
1599 | 1569 | ||
1600 | static struct platform_device pinmux_device = { | 1570 | static unsigned long pin_pullup_conf[] = { |
1601 | .name = "pinmux-u300", | 1571 | PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 1), |
1602 | .id = -1, | 1572 | }; |
1603 | .num_resources = ARRAY_SIZE(pinmux_resources), | 1573 | |
1604 | .resource = pinmux_resources, | 1574 | static unsigned long pin_highz_conf[] = { |
1575 | PIN_CONF_PACKED(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0), | ||
1605 | }; | 1576 | }; |
1606 | 1577 | ||
1607 | /* Pinmux settings */ | 1578 | /* Pin control settings */ |
1608 | static struct pinmux_map __initdata u300_pinmux_map[] = { | 1579 | static struct pinctrl_map __initdata u300_pinmux_map[] = { |
1609 | /* anonymous maps for chip power and EMIFs */ | 1580 | /* anonymous maps for chip power and EMIFs */ |
1610 | PINMUX_MAP_SYS_HOG("POWER", "pinmux-u300", "power"), | 1581 | PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "power"), |
1611 | PINMUX_MAP_SYS_HOG("EMIF0", "pinmux-u300", "emif0"), | 1582 | PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif0"), |
1612 | PINMUX_MAP_SYS_HOG("EMIF1", "pinmux-u300", "emif1"), | 1583 | PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif1"), |
1613 | /* per-device maps for MMC/SD, SPI and UART */ | 1584 | /* per-device maps for MMC/SD, SPI and UART */ |
1614 | PINMUX_MAP("MMCSD", "pinmux-u300", "mmc0", "mmci"), | 1585 | PIN_MAP_MUX_GROUP_DEFAULT("mmci", "pinctrl-u300", NULL, "mmc0"), |
1615 | PINMUX_MAP("SPI", "pinmux-u300", "spi0", "pl022"), | 1586 | PIN_MAP_MUX_GROUP_DEFAULT("pl022", "pinctrl-u300", NULL, "spi0"), |
1616 | PINMUX_MAP("UART0", "pinmux-u300", "uart0", "uart0"), | 1587 | PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-u300", NULL, "uart0"), |
1588 | /* This pin is used for clock return rather than GPIO */ | ||
1589 | PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO APP GPIO 11", | ||
1590 | pin_pullup_conf), | ||
1591 | /* This pin is used for card detect */ | ||
1592 | PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO MS INS", | ||
1593 | pin_highz_conf), | ||
1617 | }; | 1594 | }; |
1618 | 1595 | ||
1619 | struct u300_mux_hog { | 1596 | struct u300_mux_hog { |
1620 | const char *name; | ||
1621 | struct device *dev; | 1597 | struct device *dev; |
1622 | struct pinmux *pmx; | 1598 | struct pinctrl *p; |
1623 | }; | 1599 | }; |
1624 | 1600 | ||
1625 | static struct u300_mux_hog u300_mux_hogs[] = { | 1601 | static struct u300_mux_hog u300_mux_hogs[] = { |
1626 | { | 1602 | { |
1627 | .name = "uart0", | ||
1628 | .dev = &uart0_device.dev, | 1603 | .dev = &uart0_device.dev, |
1629 | }, | 1604 | }, |
1630 | { | 1605 | { |
1631 | .name = "spi0", | ||
1632 | .dev = &pl022_device.dev, | 1606 | .dev = &pl022_device.dev, |
1633 | }, | 1607 | }, |
1634 | { | 1608 | { |
1635 | .name = "mmc0", | ||
1636 | .dev = &mmcsd_device.dev, | 1609 | .dev = &mmcsd_device.dev, |
1637 | }, | 1610 | }, |
1638 | }; | 1611 | }; |
1639 | 1612 | ||
1640 | static int __init u300_pinmux_fetch(void) | 1613 | static int __init u300_pinctrl_fetch(void) |
1641 | { | 1614 | { |
1642 | int i; | 1615 | int i; |
1643 | 1616 | ||
1644 | for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) { | 1617 | for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) { |
1645 | struct pinmux *pmx; | 1618 | struct pinctrl *p; |
1646 | int ret; | ||
1647 | 1619 | ||
1648 | pmx = pinmux_get(u300_mux_hogs[i].dev, NULL); | 1620 | p = pinctrl_get_select_default(u300_mux_hogs[i].dev); |
1649 | if (IS_ERR(pmx)) { | 1621 | if (IS_ERR(p)) { |
1650 | pr_err("u300: could not get pinmux hog %s\n", | 1622 | pr_err("u300: could not get pinmux hog for dev %s\n", |
1651 | u300_mux_hogs[i].name); | 1623 | dev_name(u300_mux_hogs[i].dev)); |
1652 | continue; | ||
1653 | } | ||
1654 | ret = pinmux_enable(pmx); | ||
1655 | if (ret) { | ||
1656 | pr_err("u300: could enable pinmux hog %s\n", | ||
1657 | u300_mux_hogs[i].name); | ||
1658 | continue; | 1624 | continue; |
1659 | } | 1625 | } |
1660 | u300_mux_hogs[i].pmx = pmx; | 1626 | u300_mux_hogs[i].p = p; |
1661 | } | 1627 | } |
1662 | return 0; | 1628 | return 0; |
1663 | } | 1629 | } |
1664 | subsys_initcall(u300_pinmux_fetch); | 1630 | subsys_initcall(u300_pinctrl_fetch); |
1665 | 1631 | ||
1666 | /* | 1632 | /* |
1667 | * Notice that AMBA devices are initialized before platform devices. | 1633 | * Notice that AMBA devices are initialized before platform devices. |
@@ -1676,7 +1642,6 @@ static struct platform_device *platform_devs[] __initdata = { | |||
1676 | &gpio_device, | 1642 | &gpio_device, |
1677 | &nand_device, | 1643 | &nand_device, |
1678 | &wdog_device, | 1644 | &wdog_device, |
1679 | &pinmux_device, | ||
1680 | }; | 1645 | }; |
1681 | 1646 | ||
1682 | /* | 1647 | /* |
@@ -1861,8 +1826,8 @@ void __init u300_init_devices(void) | |||
1861 | u300_assign_physmem(); | 1826 | u300_assign_physmem(); |
1862 | 1827 | ||
1863 | /* Initialize pinmuxing */ | 1828 | /* Initialize pinmuxing */ |
1864 | pinmux_register_mappings(u300_pinmux_map, | 1829 | pinctrl_register_mappings(u300_pinmux_map, |
1865 | ARRAY_SIZE(u300_pinmux_map)); | 1830 | ARRAY_SIZE(u300_pinmux_map)); |
1866 | 1831 | ||
1867 | /* Register subdevices on the I2C buses */ | 1832 | /* Register subdevices on the I2C buses */ |
1868 | u300_i2c_register_board_devices(); | 1833 | u300_i2c_register_board_devices(); |
@@ -1879,16 +1844,6 @@ void __init u300_init_devices(void) | |||
1879 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR); | 1844 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR); |
1880 | } | 1845 | } |
1881 | 1846 | ||
1882 | static int core_module_init(void) | ||
1883 | { | ||
1884 | /* | ||
1885 | * This needs to be initialized later: it needs the input framework | ||
1886 | * to be initialized first. | ||
1887 | */ | ||
1888 | return mmc_init(&mmcsd_device); | ||
1889 | } | ||
1890 | module_init(core_module_init); | ||
1891 | |||
1892 | /* Forward declare this function from the watchdog */ | 1847 | /* Forward declare this function from the watchdog */ |
1893 | void coh901327_watchdog_reset(void); | 1848 | void coh901327_watchdog_reset(void); |
1894 | 1849 | ||
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index 5140deeddf7b..a38f80238ea9 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
@@ -60,7 +60,6 @@ static struct regulator_consumer_supply supply_ldo_c[] = { | |||
60 | */ | 60 | */ |
61 | static struct regulator_consumer_supply supply_ldo_d[] = { | 61 | static struct regulator_consumer_supply supply_ldo_d[] = { |
62 | { | 62 | { |
63 | .dev = NULL, | ||
64 | .supply = "vana15", /* Powers the SoC (CPU etc) */ | 63 | .supply = "vana15", /* Powers the SoC (CPU etc) */ |
65 | }, | 64 | }, |
66 | }; | 65 | }; |
@@ -92,7 +91,6 @@ static struct regulator_consumer_supply supply_ldo_k[] = { | |||
92 | */ | 91 | */ |
93 | static struct regulator_consumer_supply supply_ldo_ext[] = { | 92 | static struct regulator_consumer_supply supply_ldo_ext[] = { |
94 | { | 93 | { |
95 | .dev = NULL, | ||
96 | .supply = "vext", /* External power */ | 94 | .supply = "vext", /* External power */ |
97 | }, | 95 | }, |
98 | }; | 96 | }; |
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S deleted file mode 100644 index 7181d6ac6651..000000000000 --- a/arch/arm/mach-u300/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch-arm/mach-u300/include/mach/entry-macro.S | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2006-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * Low-level IRQ helper macros for ST-Ericsson U300 | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-u300/include/mach/gpio-u300.h b/arch/arm/mach-u300/include/mach/gpio-u300.h index bf4c7935aecd..e81400c1753a 100644 --- a/arch/arm/mach-u300/include/mach/gpio-u300.h +++ b/arch/arm/mach-u300/include/mach/gpio-u300.h | |||
@@ -24,12 +24,14 @@ enum u300_gpio_variant { | |||
24 | * @ports: number of GPIO block ports | 24 | * @ports: number of GPIO block ports |
25 | * @gpio_base: first GPIO number for this block (use a free range) | 25 | * @gpio_base: first GPIO number for this block (use a free range) |
26 | * @gpio_irq_base: first GPIO IRQ number for this block (use a free range) | 26 | * @gpio_irq_base: first GPIO IRQ number for this block (use a free range) |
27 | * @pinctrl_device: pin control device to spawn as child | ||
27 | */ | 28 | */ |
28 | struct u300_gpio_platform { | 29 | struct u300_gpio_platform { |
29 | enum u300_gpio_variant variant; | 30 | enum u300_gpio_variant variant; |
30 | u8 ports; | 31 | u8 ports; |
31 | int gpio_base; | 32 | int gpio_base; |
32 | int gpio_irq_base; | 33 | int gpio_irq_base; |
34 | struct platform_device *pinctrl_device; | ||
33 | }; | 35 | }; |
34 | 36 | ||
35 | #endif /* __MACH_U300_GPIO_U300_H */ | 37 | #endif /* __MACH_U300_GPIO_U300_H */ |
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h deleted file mode 100644 index 574d46e38290..000000000000 --- a/arch/arm/mach-u300/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/include/mach/system.h | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * System shutdown and reset functions. | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c deleted file mode 100644 index 05abd6ad9fab..000000000000 --- a/arch/arm/mach-u300/mmc.c +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/mmc.c | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2009 ST-Ericsson SA | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | * Author: Johan Lundin | ||
11 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
12 | */ | ||
13 | #include <linux/device.h> | ||
14 | #include <linux/amba/bus.h> | ||
15 | #include <linux/mmc/host.h> | ||
16 | #include <linux/dmaengine.h> | ||
17 | #include <linux/amba/mmci.h> | ||
18 | #include <linux/slab.h> | ||
19 | #include <mach/coh901318.h> | ||
20 | #include <mach/dma_channels.h> | ||
21 | |||
22 | #include "u300-gpio.h" | ||
23 | #include "mmc.h" | ||
24 | |||
25 | static struct mmci_platform_data mmc0_plat_data = { | ||
26 | /* | ||
27 | * Do not set ocr_mask or voltage translation function, | ||
28 | * we have a regulator we can control instead. | ||
29 | */ | ||
30 | /* Nominally 2.85V on our platform */ | ||
31 | .f_max = 24000000, | ||
32 | .gpio_wp = -1, | ||
33 | .gpio_cd = U300_GPIO_PIN_MMC_CD, | ||
34 | .cd_invert = true, | ||
35 | .capabilities = MMC_CAP_MMC_HIGHSPEED | | ||
36 | MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
37 | #ifdef CONFIG_COH901318 | ||
38 | .dma_filter = coh901318_filter_id, | ||
39 | .dma_rx_param = (void *) U300_DMA_MMCSD_RX_TX, | ||
40 | /* Don't specify a TX channel, this RX channel is bidirectional */ | ||
41 | #endif | ||
42 | }; | ||
43 | |||
44 | int __devinit mmc_init(struct amba_device *adev) | ||
45 | { | ||
46 | struct device *mmcsd_device = &adev->dev; | ||
47 | int ret = 0; | ||
48 | |||
49 | mmcsd_device->platform_data = &mmc0_plat_data; | ||
50 | |||
51 | return ret; | ||
52 | } | ||
diff --git a/arch/arm/mach-u300/mmc.h b/arch/arm/mach-u300/mmc.h deleted file mode 100644 index 92b85125abb3..000000000000 --- a/arch/arm/mach-u300/mmc.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/mmc.h | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * | ||
9 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
10 | */ | ||
11 | #ifndef MMC_H | ||
12 | #define MMC_H | ||
13 | |||
14 | #include <linux/amba/bus.h> | ||
15 | |||
16 | int __devinit mmc_init(struct amba_device *adev); | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 74bfcff2bdf3..f5413dca532c 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -6,6 +6,7 @@ | |||
6 | 6 | ||
7 | #include <linux/kernel.h> | 7 | #include <linux/kernel.h> |
8 | #include <linux/init.h> | 8 | #include <linux/init.h> |
9 | #include <linux/bug.h> | ||
9 | 10 | ||
10 | #include <asm/mach-types.h> | 11 | #include <asm/mach-types.h> |
11 | #include <plat/pincfg.h> | 12 | #include <plat/pincfg.h> |
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 5dde4d4ebe88..1daead3e583e 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c | |||
@@ -31,21 +31,13 @@ | |||
31 | * SDI 0 (MicroSD slot) | 31 | * SDI 0 (MicroSD slot) |
32 | */ | 32 | */ |
33 | 33 | ||
34 | /* MMCIPOWER bits */ | ||
35 | #define MCI_DATA2DIREN (1 << 2) | ||
36 | #define MCI_CMDDIREN (1 << 3) | ||
37 | #define MCI_DATA0DIREN (1 << 4) | ||
38 | #define MCI_DATA31DIREN (1 << 5) | ||
39 | #define MCI_FBCLKEN (1 << 7) | ||
40 | |||
41 | /* GPIO pins used by the sdi0 level shifter */ | 34 | /* GPIO pins used by the sdi0 level shifter */ |
42 | static int sdi0_en = -1; | 35 | static int sdi0_en = -1; |
43 | static int sdi0_vsel = -1; | 36 | static int sdi0_vsel = -1; |
44 | 37 | ||
45 | static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, | 38 | static int mop500_sdi0_ios_handler(struct device *dev, struct mmc_ios *ios) |
46 | unsigned char power_mode) | ||
47 | { | 39 | { |
48 | switch (power_mode) { | 40 | switch (ios->power_mode) { |
49 | case MMC_POWER_UP: | 41 | case MMC_POWER_UP: |
50 | case MMC_POWER_ON: | 42 | case MMC_POWER_ON: |
51 | /* | 43 | /* |
@@ -65,8 +57,7 @@ static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, | |||
65 | break; | 57 | break; |
66 | } | 58 | } |
67 | 59 | ||
68 | return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN | | 60 | return 0; |
69 | MCI_DATA2DIREN | MCI_DATA31DIREN; | ||
70 | } | 61 | } |
71 | 62 | ||
72 | #ifdef CONFIG_STE_DMA40 | 63 | #ifdef CONFIG_STE_DMA40 |
@@ -90,13 +81,17 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { | |||
90 | #endif | 81 | #endif |
91 | 82 | ||
92 | static struct mmci_platform_data mop500_sdi0_data = { | 83 | static struct mmci_platform_data mop500_sdi0_data = { |
93 | .vdd_handler = mop500_sdi0_vdd_handler, | 84 | .ios_handler = mop500_sdi0_ios_handler, |
94 | .ocr_mask = MMC_VDD_29_30, | 85 | .ocr_mask = MMC_VDD_29_30, |
95 | .f_max = 50000000, | 86 | .f_max = 50000000, |
96 | .capabilities = MMC_CAP_4_BIT_DATA | | 87 | .capabilities = MMC_CAP_4_BIT_DATA | |
97 | MMC_CAP_SD_HIGHSPEED | | 88 | MMC_CAP_SD_HIGHSPEED | |
98 | MMC_CAP_MMC_HIGHSPEED, | 89 | MMC_CAP_MMC_HIGHSPEED, |
99 | .gpio_wp = -1, | 90 | .gpio_wp = -1, |
91 | .sigdir = MCI_ST_FBCLKEN | | ||
92 | MCI_ST_CMDDIREN | | ||
93 | MCI_ST_DATA0DIREN | | ||
94 | MCI_ST_DATA2DIREN, | ||
100 | #ifdef CONFIG_STE_DMA40 | 95 | #ifdef CONFIG_STE_DMA40 |
101 | .dma_filter = stedma40_filter, | 96 | .dma_filter = stedma40_filter, |
102 | .dma_rx_param = &mop500_sdi0_dma_cfg_rx, | 97 | .dma_rx_param = &mop500_sdi0_dma_cfg_rx, |
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index c563e5418d80..898a64517b09 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c | |||
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base, | |||
26 | struct amba_device *dev; | 26 | struct amba_device *dev; |
27 | int ret; | 27 | int ret; |
28 | 28 | ||
29 | dev = kzalloc(sizeof *dev, GFP_KERNEL); | 29 | dev = amba_device_alloc(name, base, SZ_4K); |
30 | if (!dev) | 30 | if (!dev) |
31 | return ERR_PTR(-ENOMEM); | 31 | return ERR_PTR(-ENOMEM); |
32 | 32 | ||
33 | dev->dev.init_name = name; | ||
34 | |||
35 | dev->res.start = base; | ||
36 | dev->res.end = base + SZ_4K - 1; | ||
37 | dev->res.flags = IORESOURCE_MEM; | ||
38 | |||
39 | dev->dma_mask = DMA_BIT_MASK(32); | 33 | dev->dma_mask = DMA_BIT_MASK(32); |
40 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | 34 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
41 | 35 | ||
42 | dev->irq[0] = irq; | 36 | dev->irq[0] = irq; |
43 | dev->irq[1] = NO_IRQ; | ||
44 | 37 | ||
45 | dev->periphid = periphid; | 38 | dev->periphid = periphid; |
46 | 39 | ||
47 | dev->dev.platform_data = pdata; | 40 | dev->dev.platform_data = pdata; |
48 | 41 | ||
49 | ret = amba_device_register(dev, &iomem_resource); | 42 | ret = amba_device_add(dev, &iomem_resource); |
50 | if (ret) { | 43 | if (ret) { |
51 | kfree(dev); | 44 | amba_device_put(dev); |
52 | return ERR_PTR(ret); | 45 | return ERR_PTR(ret); |
53 | } | 46 | } |
54 | 47 | ||
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S deleted file mode 100644 index e16299e1020a..000000000000 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for U8500 platforms | ||
3 | * | ||
4 | * Copyright (C) 2009 ST-Ericsson. | ||
5 | * | ||
6 | * This file is a copy of ARM Realview platform. | ||
7 | * -just satisfied checkpatch script. | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h deleted file mode 100644 index 258e5c919c24..000000000000 --- a/arch/arm/mach-ux500/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson. | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | #ifndef __ASM_ARCH_SYSTEM_H | ||
9 | #define __ASM_ARCH_SYSTEM_H | ||
10 | |||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* | ||
14 | * This should do all the clock switching | ||
15 | * and wait for interrupt tricks | ||
16 | */ | ||
17 | cpu_do_idle(); | ||
18 | } | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..0968772aedbe 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -98,8 +98,11 @@ static const struct of_device_id sic_of_match[] __initconst = { | |||
98 | 98 | ||
99 | void __init versatile_init_irq(void) | 99 | void __init versatile_init_irq(void) |
100 | { | 100 | { |
101 | vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); | 101 | struct device_node *np; |
102 | irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START); | 102 | |
103 | np = of_find_matching_node_by_address(NULL, vic_of_match, | ||
104 | VERSATILE_VIC_BASE); | ||
105 | __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np); | ||
103 | 106 | ||
104 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); | 107 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |
105 | 108 | ||
@@ -582,58 +585,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
582 | .num_chipselect = 1, | 585 | .num_chipselect = 1, |
583 | }; | 586 | }; |
584 | 587 | ||
585 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } | 588 | #define AACI_IRQ { IRQ_AACI } |
586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } | 589 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
587 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } | 590 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
588 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } | 591 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
589 | 592 | ||
590 | /* | 593 | /* |
591 | * These devices are connected directly to the multi-layer AHB switch | 594 | * These devices are connected directly to the multi-layer AHB switch |
592 | */ | 595 | */ |
593 | #define SMC_IRQ { NO_IRQ, NO_IRQ } | 596 | #define SMC_IRQ { } |
594 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 597 | #define MPMC_IRQ { } |
595 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } | 598 | #define CLCD_IRQ { IRQ_CLCDINT } |
596 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } | 599 | #define DMAC_IRQ { IRQ_DMAINT } |
597 | 600 | ||
598 | /* | 601 | /* |
599 | * These devices are connected via the core APB bridge | 602 | * These devices are connected via the core APB bridge |
600 | */ | 603 | */ |
601 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 604 | #define SCTL_IRQ { } |
602 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } | 605 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
603 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } | 606 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
604 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } | 607 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
605 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } | 608 | #define RTC_IRQ { IRQ_RTCINT } |
606 | 609 | ||
607 | /* | 610 | /* |
608 | * These devices are connected via the DMA APB bridge | 611 | * These devices are connected via the DMA APB bridge |
609 | */ | 612 | */ |
610 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } | 613 | #define SCI_IRQ { IRQ_SCIINT } |
611 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } | 614 | #define UART0_IRQ { IRQ_UARTINT0 } |
612 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } | 615 | #define UART1_IRQ { IRQ_UARTINT1 } |
613 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } | 616 | #define UART2_IRQ { IRQ_UARTINT2 } |
614 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } | 617 | #define SSP_IRQ { IRQ_SSPINT } |
615 | 618 | ||
616 | /* FPGA Primecells */ | 619 | /* FPGA Primecells */ |
617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); | 620 | APB_DEVICE(aaci, "fpga:04", AACI, NULL); |
618 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); | 621 | APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
619 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); | 622 | APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
620 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); | 623 | APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
621 | 624 | ||
622 | /* DevChip Primecells */ | 625 | /* DevChip Primecells */ |
623 | AMBA_DEVICE(smc, "dev:00", SMC, NULL); | 626 | AHB_DEVICE(smc, "dev:00", SMC, NULL); |
624 | AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); | 627 | AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); |
625 | AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); | 628 | AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
626 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); | 629 | AHB_DEVICE(dmac, "dev:30", DMAC, NULL); |
627 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); | 630 | APB_DEVICE(sctl, "dev:e0", SCTL, NULL); |
628 | AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); | 631 | APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
629 | AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); | 632 | APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
630 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); | 633 | APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
631 | AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); | 634 | APB_DEVICE(rtc, "dev:e8", RTC, NULL); |
632 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); | 635 | APB_DEVICE(sci0, "dev:f0", SCI, NULL); |
633 | AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); | 636 | APB_DEVICE(uart0, "dev:f1", UART0, NULL); |
634 | AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); | 637 | APB_DEVICE(uart1, "dev:f2", UART1, NULL); |
635 | AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); | 638 | APB_DEVICE(uart2, "dev:f3", UART2, NULL); |
636 | AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); | 639 | APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); |
637 | 640 | ||
638 | static struct amba_device *amba_devs[] __initdata = { | 641 | static struct amba_device *amba_devs[] __initdata = { |
639 | &dmac_device, | 642 | &dmac_device, |
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 2ef2f555f315..683e60776a85 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h | |||
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev); | |||
36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; | 36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | #define AMBA_DEVICE(name,busid,base,plat) \ | 39 | #define APB_DEVICE(name, busid, base, plat) \ |
40 | static struct amba_device name##_device = { \ | 40 | static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
41 | .dev = { \ | 41 | |
42 | .coherent_dma_mask = ~0, \ | 42 | #define AHB_DEVICE(name, busid, base, plat) \ |
43 | .init_name = busid, \ | 43 | static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
44 | .platform_data = plat, \ | ||
45 | }, \ | ||
46 | .res = { \ | ||
47 | .start = VERSATILE_##base##_BASE, \ | ||
48 | .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ | ||
49 | .flags = IORESOURCE_MEM, \ | ||
50 | }, \ | ||
51 | .dma_mask = ~0, \ | ||
52 | .irq = base##_IRQ, \ | ||
53 | } | ||
54 | 44 | ||
55 | #endif | 45 | #endif |
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S deleted file mode 100644 index b6f0dbf122ee..000000000000 --- a/arch/arm/mach-versatile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Versatile platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h deleted file mode 100644 index f3fa347895f0..000000000000 --- a/arch/arm/mach-versatile/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index 90069bce23bc..51733b022d04 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c | |||
@@ -219,9 +219,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources) | |||
219 | * the mem resource for this bus | 219 | * the mem resource for this bus |
220 | * the prefetch mem resource for this bus | 220 | * the prefetch mem resource for this bus |
221 | */ | 221 | */ |
222 | pci_add_resource(resources, &io_mem); | 222 | pci_add_resource_offset(resources, &io_mem, sys->io_offset); |
223 | pci_add_resource(resources, &non_mem); | 223 | pci_add_resource_offset(resources, &non_mem, sys->mem_offset); |
224 | pci_add_resource(resources, &pre_mem); | 224 | pci_add_resource_offset(resources, &pre_mem, sys->mem_offset); |
225 | 225 | ||
226 | goto out; | 226 | goto out; |
227 | 227 | ||
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..19738331bd3d 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { | |||
58 | .irq_base = IRQ_GPIO3_START, | 58 | .irq_base = IRQ_GPIO3_START, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | 61 | #define UART3_IRQ { IRQ_SIC_UART3 } |
62 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | 62 | #define SCI1_IRQ { IRQ_SIC_SCI3 } |
63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | 63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * These devices are connected via the core APB bridge | 66 | * These devices are connected via the core APB bridge |
67 | */ | 67 | */ |
68 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | 68 | #define GPIO2_IRQ { IRQ_GPIOINT2 } |
69 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | 69 | #define GPIO3_IRQ { IRQ_GPIOINT3 } |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * These devices are connected via the DMA APB bridge | 72 | * These devices are connected via the DMA APB bridge |
73 | */ | 73 | */ |
74 | 74 | ||
75 | /* FPGA Primecells */ | 75 | /* FPGA Primecells */ |
76 | AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); | 76 | APB_DEVICE(uart3, "fpga:09", UART3, NULL); |
77 | AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); | 77 | APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); |
78 | AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); | 78 | APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); |
79 | 79 | ||
80 | /* DevChip Primecells */ | 80 | /* DevChip Primecells */ |
81 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); | 81 | APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); |
82 | AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); | 82 | APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); |
83 | 83 | ||
84 | static struct amba_device *amba_devs[] __initdata = { | 84 | static struct amba_device *amba_devs[] __initdata = { |
85 | &uart3_device, | 85 | &uart3_device, |
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index f4397159c173..9f0f2827c711 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h | |||
@@ -1,19 +1,2 @@ | |||
1 | #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) | 1 | #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) |
2 | #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) | 2 | #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) |
3 | |||
4 | #define AMBA_DEVICE(name,busid,base,plat) \ | ||
5 | struct amba_device name##_device = { \ | ||
6 | .dev = { \ | ||
7 | .coherent_dma_mask = ~0UL, \ | ||
8 | .init_name = busid, \ | ||
9 | .platform_data = plat, \ | ||
10 | }, \ | ||
11 | .res = { \ | ||
12 | .start = base, \ | ||
13 | .end = base + SZ_4K - 1, \ | ||
14 | .flags = IORESOURCE_MEM, \ | ||
15 | }, \ | ||
16 | .dma_mask = ~0UL, \ | ||
17 | .irq = IRQ_##base, \ | ||
18 | /* .dma = DMA_##base,*/ \ | ||
19 | } | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index b1e87c184e54..1b1d2e4892b9 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = { | |||
109 | .remove = versatile_clcd_remove_dma, | 109 | .remove = versatile_clcd_remove_dma, |
110 | }; | 110 | }; |
111 | 111 | ||
112 | static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); | 112 | static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); |
113 | static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); | 113 | static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL); |
114 | static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); | 114 | static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL); |
115 | static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); | 115 | static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL); |
116 | 116 | ||
117 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { | 117 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { |
118 | &clcd_device, | 118 | &clcd_device, |
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index a34d3d4faae1..a40468f3b938 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | |||
@@ -35,7 +35,7 @@ | |||
35 | * Interrupts. Those in {} are for AMBA devices | 35 | * Interrupts. Those in {} are for AMBA devices |
36 | */ | 36 | */ |
37 | #define IRQ_CT_CA9X4_CLCDC { 76 } | 37 | #define IRQ_CT_CA9X4_CLCDC { 76 } |
38 | #define IRQ_CT_CA9X4_DMC { -1 } | 38 | #define IRQ_CT_CA9X4_DMC { 0 } |
39 | #define IRQ_CT_CA9X4_SMC { 77, 78 } | 39 | #define IRQ_CT_CA9X4_SMC { 77, 78 } |
40 | #define IRQ_CT_CA9X4_TIMER0 80 | 40 | #define IRQ_CT_CA9X4_TIMER0 80 |
41 | #define IRQ_CT_CA9X4_TIMER1 81 | 41 | #define IRQ_CT_CA9X4_TIMER1 81 |
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h deleted file mode 100644 index f653a8e265bd..000000000000 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vexpress/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index b4a28ca0e50a..ad64f97a2003 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = { | |||
266 | .status = v2m_mmci_status, | 266 | .status = v2m_mmci_status, |
267 | }; | 267 | }; |
268 | 268 | ||
269 | static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); | 269 | static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); |
270 | static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); | 270 | static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); |
271 | static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); | 271 | static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); |
272 | static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); | 272 | static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); |
273 | static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); | 273 | static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); |
274 | static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); | 274 | static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); |
275 | static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); | 275 | static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); |
276 | static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); | 276 | static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); |
277 | static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); | 277 | static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); |
278 | static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); | 278 | static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); |
279 | 279 | ||
280 | static struct amba_device *v2m_amba_devs[] __initdata = { | 280 | static struct amba_device *v2m_amba_devs[] __initdata = { |
281 | &aaci_device, | 281 | &aaci_device, |
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S index 92684c7eaed3..367d1b55fb9a 100644 --- a/arch/arm/mach-vt8500/include/mach/entry-macro.S +++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S | |||
@@ -8,18 +8,12 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | @ physical 0xd8140000 is virtual 0xf8140000 | 12 | @ physical 0xd8140000 is virtual 0xf8140000 |
16 | mov \base, #0xf8000000 | 13 | mov \base, #0xf8000000 |
17 | orr \base, \base, #0x00140000 | 14 | orr \base, \base, #0x00140000 |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | ldr \irqnr, [\base] | 18 | ldr \irqnr, [\base] |
25 | cmp \irqnr, #63 @ may be false positive, check interrupt status | 19 | cmp \irqnr, #63 @ may be false positive, check interrupt status |
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h index d6c757eaf26b..58fa8010ee61 100644 --- a/arch/arm/mach-vt8500/include/mach/system.h +++ b/arch/arm/mach-vt8500/include/mach/system.h | |||
@@ -7,11 +7,6 @@ | |||
7 | /* PM Software Reset request register */ | 7 | /* PM Software Reset request register */ |
8 | #define VT8500_PMSR_VIRT 0xf8130060 | 8 | #define VT8500_PMSR_VIRT 0xf8130060 |
9 | 9 | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | static inline void arch_reset(char mode, const char *cmd) | 10 | static inline void arch_reset(char mode, const char *cmd) |
16 | { | 11 | { |
17 | writel(1, VT8500_PMSR_VIRT); | 12 | writel(1, VT8500_PMSR_VIRT); |
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 78110befb7a9..db82568a998a 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { | |||
530 | 530 | ||
531 | void __init nuc900_board_init(struct platform_device **device, int size) | 531 | void __init nuc900_board_init(struct platform_device **device, int size) |
532 | { | 532 | { |
533 | disable_hlt(); | ||
533 | platform_add_devices(device, size); | 534 | platform_add_devices(device, size); |
534 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); | 535 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); |
535 | spi_register_board_info(nuc900_spi_board_info, | 536 | spi_register_board_info(nuc900_spi_board_info, |
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S index d39aca5be9ee..e286daca6827 100644 --- a/arch/arm/mach-w90x900/include/mach/entry-macro.S +++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S | |||
@@ -15,9 +15,6 @@ | |||
15 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 16 | .endm |
17 | 17 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 19 | ||
23 | mov \base, #AIC_BA | 20 | mov \base, #AIC_BA |
@@ -27,8 +24,3 @@ | |||
27 | cmp \irqnr, #0 | 24 | cmp \irqnr, #0 |
28 | 25 | ||
29 | .endm | 26 | .endm |
30 | |||
31 | /* currently don't need an disable_fiq macro */ | ||
32 | |||
33 | .macro disable_fiq | ||
34 | .endm | ||
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h deleted file mode 100644 index 2aaeb9311619..000000000000 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-w90x900/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2008 Nuvoton technology corporation | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Wan ZongShun <mcuos.com@gmail.com> | ||
8 | * | ||
9 | * Based on arch/arm/mach-s3c2410/include/mach/system.h | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | } | ||
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S deleted file mode 100644 index d621fb732569..000000000000 --- a/arch/arm/mach-zynq/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-zynq/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros | ||
5 | * | ||
6 | * Copyright (C) 2011 Xilinx | ||
7 | * | ||
8 | * based on arch/plat-mxc/include/mach/entry-macro.S | ||
9 | * | ||
10 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
11 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
12 | * | ||
13 | * This software is licensed under the terms of the GNU General Public | ||
14 | * License version 2, as published by the Free Software Foundation, and | ||
15 | * may be copied, distributed, and modified under those terms. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | */ | ||
22 | |||
23 | .macro disable_fiq | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h deleted file mode 100644 index 8e88e0b8d2ba..000000000000 --- a/arch/arm/mach-zynq/include/mach/system.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_SYSTEM_H__ | ||
16 | #define __MACH_SYSTEM_H__ | ||
17 | |||
18 | static inline void arch_idle(void) | ||
19 | { | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/mm/copypage-fa.c b/arch/arm/mm/copypage-fa.c index d2852e1635b1..d130a5ece5d5 100644 --- a/arch/arm/mm/copypage-fa.c +++ b/arch/arm/mm/copypage-fa.c | |||
@@ -44,11 +44,11 @@ void fa_copy_user_highpage(struct page *to, struct page *from, | |||
44 | { | 44 | { |
45 | void *kto, *kfrom; | 45 | void *kto, *kfrom; |
46 | 46 | ||
47 | kto = kmap_atomic(to, KM_USER0); | 47 | kto = kmap_atomic(to); |
48 | kfrom = kmap_atomic(from, KM_USER1); | 48 | kfrom = kmap_atomic(from); |
49 | fa_copy_user_page(kto, kfrom); | 49 | fa_copy_user_page(kto, kfrom); |
50 | kunmap_atomic(kfrom, KM_USER1); | 50 | kunmap_atomic(kfrom); |
51 | kunmap_atomic(kto, KM_USER0); | 51 | kunmap_atomic(kto); |
52 | } | 52 | } |
53 | 53 | ||
54 | /* | 54 | /* |
@@ -58,7 +58,7 @@ void fa_copy_user_highpage(struct page *to, struct page *from, | |||
58 | */ | 58 | */ |
59 | void fa_clear_user_highpage(struct page *page, unsigned long vaddr) | 59 | void fa_clear_user_highpage(struct page *page, unsigned long vaddr) |
60 | { | 60 | { |
61 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 61 | void *ptr, *kaddr = kmap_atomic(page); |
62 | asm volatile("\ | 62 | asm volatile("\ |
63 | mov r1, %2 @ 1\n\ | 63 | mov r1, %2 @ 1\n\ |
64 | mov r2, #0 @ 1\n\ | 64 | mov r2, #0 @ 1\n\ |
@@ -77,7 +77,7 @@ void fa_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
77 | : "=r" (ptr) | 77 | : "=r" (ptr) |
78 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | 78 | : "0" (kaddr), "I" (PAGE_SIZE / 32) |
79 | : "r1", "r2", "r3", "ip", "lr"); | 79 | : "r1", "r2", "r3", "ip", "lr"); |
80 | kunmap_atomic(kaddr, KM_USER0); | 80 | kunmap_atomic(kaddr); |
81 | } | 81 | } |
82 | 82 | ||
83 | struct cpu_user_fns fa_user_fns __initdata = { | 83 | struct cpu_user_fns fa_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c index ac163de7dc01..49ee0c1a7209 100644 --- a/arch/arm/mm/copypage-feroceon.c +++ b/arch/arm/mm/copypage-feroceon.c | |||
@@ -72,17 +72,17 @@ void feroceon_copy_user_highpage(struct page *to, struct page *from, | |||
72 | { | 72 | { |
73 | void *kto, *kfrom; | 73 | void *kto, *kfrom; |
74 | 74 | ||
75 | kto = kmap_atomic(to, KM_USER0); | 75 | kto = kmap_atomic(to); |
76 | kfrom = kmap_atomic(from, KM_USER1); | 76 | kfrom = kmap_atomic(from); |
77 | flush_cache_page(vma, vaddr, page_to_pfn(from)); | 77 | flush_cache_page(vma, vaddr, page_to_pfn(from)); |
78 | feroceon_copy_user_page(kto, kfrom); | 78 | feroceon_copy_user_page(kto, kfrom); |
79 | kunmap_atomic(kfrom, KM_USER1); | 79 | kunmap_atomic(kfrom); |
80 | kunmap_atomic(kto, KM_USER0); | 80 | kunmap_atomic(kto); |
81 | } | 81 | } |
82 | 82 | ||
83 | void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr) | 83 | void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr) |
84 | { | 84 | { |
85 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 85 | void *ptr, *kaddr = kmap_atomic(page); |
86 | asm volatile ("\ | 86 | asm volatile ("\ |
87 | mov r1, %2 \n\ | 87 | mov r1, %2 \n\ |
88 | mov r2, #0 \n\ | 88 | mov r2, #0 \n\ |
@@ -102,7 +102,7 @@ void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
102 | : "=r" (ptr) | 102 | : "=r" (ptr) |
103 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | 103 | : "0" (kaddr), "I" (PAGE_SIZE / 32) |
104 | : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr"); | 104 | : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr"); |
105 | kunmap_atomic(kaddr, KM_USER0); | 105 | kunmap_atomic(kaddr); |
106 | } | 106 | } |
107 | 107 | ||
108 | struct cpu_user_fns feroceon_user_fns __initdata = { | 108 | struct cpu_user_fns feroceon_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c index f72303e1d804..3935bddd4769 100644 --- a/arch/arm/mm/copypage-v3.c +++ b/arch/arm/mm/copypage-v3.c | |||
@@ -42,11 +42,11 @@ void v3_copy_user_highpage(struct page *to, struct page *from, | |||
42 | { | 42 | { |
43 | void *kto, *kfrom; | 43 | void *kto, *kfrom; |
44 | 44 | ||
45 | kto = kmap_atomic(to, KM_USER0); | 45 | kto = kmap_atomic(to); |
46 | kfrom = kmap_atomic(from, KM_USER1); | 46 | kfrom = kmap_atomic(from); |
47 | v3_copy_user_page(kto, kfrom); | 47 | v3_copy_user_page(kto, kfrom); |
48 | kunmap_atomic(kfrom, KM_USER1); | 48 | kunmap_atomic(kfrom); |
49 | kunmap_atomic(kto, KM_USER0); | 49 | kunmap_atomic(kto); |
50 | } | 50 | } |
51 | 51 | ||
52 | /* | 52 | /* |
@@ -56,7 +56,7 @@ void v3_copy_user_highpage(struct page *to, struct page *from, | |||
56 | */ | 56 | */ |
57 | void v3_clear_user_highpage(struct page *page, unsigned long vaddr) | 57 | void v3_clear_user_highpage(struct page *page, unsigned long vaddr) |
58 | { | 58 | { |
59 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 59 | void *ptr, *kaddr = kmap_atomic(page); |
60 | asm volatile("\n\ | 60 | asm volatile("\n\ |
61 | mov r1, %2 @ 1\n\ | 61 | mov r1, %2 @ 1\n\ |
62 | mov r2, #0 @ 1\n\ | 62 | mov r2, #0 @ 1\n\ |
@@ -72,7 +72,7 @@ void v3_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
72 | : "=r" (ptr) | 72 | : "=r" (ptr) |
73 | : "0" (kaddr), "I" (PAGE_SIZE / 64) | 73 | : "0" (kaddr), "I" (PAGE_SIZE / 64) |
74 | : "r1", "r2", "r3", "ip", "lr"); | 74 | : "r1", "r2", "r3", "ip", "lr"); |
75 | kunmap_atomic(kaddr, KM_USER0); | 75 | kunmap_atomic(kaddr); |
76 | } | 76 | } |
77 | 77 | ||
78 | struct cpu_user_fns v3_user_fns __initdata = { | 78 | struct cpu_user_fns v3_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index 7d0a8c230342..ec8c3befb9c8 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c | |||
@@ -71,7 +71,7 @@ mc_copy_user_page(void *from, void *to) | |||
71 | void v4_mc_copy_user_highpage(struct page *to, struct page *from, | 71 | void v4_mc_copy_user_highpage(struct page *to, struct page *from, |
72 | unsigned long vaddr, struct vm_area_struct *vma) | 72 | unsigned long vaddr, struct vm_area_struct *vma) |
73 | { | 73 | { |
74 | void *kto = kmap_atomic(to, KM_USER1); | 74 | void *kto = kmap_atomic(to); |
75 | 75 | ||
76 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) | 76 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) |
77 | __flush_dcache_page(page_mapping(from), from); | 77 | __flush_dcache_page(page_mapping(from), from); |
@@ -85,7 +85,7 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from, | |||
85 | 85 | ||
86 | raw_spin_unlock(&minicache_lock); | 86 | raw_spin_unlock(&minicache_lock); |
87 | 87 | ||
88 | kunmap_atomic(kto, KM_USER1); | 88 | kunmap_atomic(kto); |
89 | } | 89 | } |
90 | 90 | ||
91 | /* | 91 | /* |
@@ -93,7 +93,7 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from, | |||
93 | */ | 93 | */ |
94 | void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | 94 | void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr) |
95 | { | 95 | { |
96 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 96 | void *ptr, *kaddr = kmap_atomic(page); |
97 | asm volatile("\ | 97 | asm volatile("\ |
98 | mov r1, %2 @ 1\n\ | 98 | mov r1, %2 @ 1\n\ |
99 | mov r2, #0 @ 1\n\ | 99 | mov r2, #0 @ 1\n\ |
@@ -111,7 +111,7 @@ void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
111 | : "=r" (ptr) | 111 | : "=r" (ptr) |
112 | : "0" (kaddr), "I" (PAGE_SIZE / 64) | 112 | : "0" (kaddr), "I" (PAGE_SIZE / 64) |
113 | : "r1", "r2", "r3", "ip", "lr"); | 113 | : "r1", "r2", "r3", "ip", "lr"); |
114 | kunmap_atomic(kaddr, KM_USER0); | 114 | kunmap_atomic(kaddr); |
115 | } | 115 | } |
116 | 116 | ||
117 | struct cpu_user_fns v4_mc_user_fns __initdata = { | 117 | struct cpu_user_fns v4_mc_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c index cb589cbb2b6c..067d0fdd630c 100644 --- a/arch/arm/mm/copypage-v4wb.c +++ b/arch/arm/mm/copypage-v4wb.c | |||
@@ -52,12 +52,12 @@ void v4wb_copy_user_highpage(struct page *to, struct page *from, | |||
52 | { | 52 | { |
53 | void *kto, *kfrom; | 53 | void *kto, *kfrom; |
54 | 54 | ||
55 | kto = kmap_atomic(to, KM_USER0); | 55 | kto = kmap_atomic(to); |
56 | kfrom = kmap_atomic(from, KM_USER1); | 56 | kfrom = kmap_atomic(from); |
57 | flush_cache_page(vma, vaddr, page_to_pfn(from)); | 57 | flush_cache_page(vma, vaddr, page_to_pfn(from)); |
58 | v4wb_copy_user_page(kto, kfrom); | 58 | v4wb_copy_user_page(kto, kfrom); |
59 | kunmap_atomic(kfrom, KM_USER1); | 59 | kunmap_atomic(kfrom); |
60 | kunmap_atomic(kto, KM_USER0); | 60 | kunmap_atomic(kto); |
61 | } | 61 | } |
62 | 62 | ||
63 | /* | 63 | /* |
@@ -67,7 +67,7 @@ void v4wb_copy_user_highpage(struct page *to, struct page *from, | |||
67 | */ | 67 | */ |
68 | void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr) | 68 | void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr) |
69 | { | 69 | { |
70 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 70 | void *ptr, *kaddr = kmap_atomic(page); |
71 | asm volatile("\ | 71 | asm volatile("\ |
72 | mov r1, %2 @ 1\n\ | 72 | mov r1, %2 @ 1\n\ |
73 | mov r2, #0 @ 1\n\ | 73 | mov r2, #0 @ 1\n\ |
@@ -86,7 +86,7 @@ void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
86 | : "=r" (ptr) | 86 | : "=r" (ptr) |
87 | : "0" (kaddr), "I" (PAGE_SIZE / 64) | 87 | : "0" (kaddr), "I" (PAGE_SIZE / 64) |
88 | : "r1", "r2", "r3", "ip", "lr"); | 88 | : "r1", "r2", "r3", "ip", "lr"); |
89 | kunmap_atomic(kaddr, KM_USER0); | 89 | kunmap_atomic(kaddr); |
90 | } | 90 | } |
91 | 91 | ||
92 | struct cpu_user_fns v4wb_user_fns __initdata = { | 92 | struct cpu_user_fns v4wb_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c index 30c7d048a324..b85c5da2e510 100644 --- a/arch/arm/mm/copypage-v4wt.c +++ b/arch/arm/mm/copypage-v4wt.c | |||
@@ -48,11 +48,11 @@ void v4wt_copy_user_highpage(struct page *to, struct page *from, | |||
48 | { | 48 | { |
49 | void *kto, *kfrom; | 49 | void *kto, *kfrom; |
50 | 50 | ||
51 | kto = kmap_atomic(to, KM_USER0); | 51 | kto = kmap_atomic(to); |
52 | kfrom = kmap_atomic(from, KM_USER1); | 52 | kfrom = kmap_atomic(from); |
53 | v4wt_copy_user_page(kto, kfrom); | 53 | v4wt_copy_user_page(kto, kfrom); |
54 | kunmap_atomic(kfrom, KM_USER1); | 54 | kunmap_atomic(kfrom); |
55 | kunmap_atomic(kto, KM_USER0); | 55 | kunmap_atomic(kto); |
56 | } | 56 | } |
57 | 57 | ||
58 | /* | 58 | /* |
@@ -62,7 +62,7 @@ void v4wt_copy_user_highpage(struct page *to, struct page *from, | |||
62 | */ | 62 | */ |
63 | void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr) | 63 | void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr) |
64 | { | 64 | { |
65 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 65 | void *ptr, *kaddr = kmap_atomic(page); |
66 | asm volatile("\ | 66 | asm volatile("\ |
67 | mov r1, %2 @ 1\n\ | 67 | mov r1, %2 @ 1\n\ |
68 | mov r2, #0 @ 1\n\ | 68 | mov r2, #0 @ 1\n\ |
@@ -79,7 +79,7 @@ void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
79 | : "=r" (ptr) | 79 | : "=r" (ptr) |
80 | : "0" (kaddr), "I" (PAGE_SIZE / 64) | 80 | : "0" (kaddr), "I" (PAGE_SIZE / 64) |
81 | : "r1", "r2", "r3", "ip", "lr"); | 81 | : "r1", "r2", "r3", "ip", "lr"); |
82 | kunmap_atomic(kaddr, KM_USER0); | 82 | kunmap_atomic(kaddr); |
83 | } | 83 | } |
84 | 84 | ||
85 | struct cpu_user_fns v4wt_user_fns __initdata = { | 85 | struct cpu_user_fns v4wt_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 3d9a1552cef6..8b03a5814d00 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c | |||
@@ -38,11 +38,11 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to, | |||
38 | { | 38 | { |
39 | void *kto, *kfrom; | 39 | void *kto, *kfrom; |
40 | 40 | ||
41 | kfrom = kmap_atomic(from, KM_USER0); | 41 | kfrom = kmap_atomic(from); |
42 | kto = kmap_atomic(to, KM_USER1); | 42 | kto = kmap_atomic(to); |
43 | copy_page(kto, kfrom); | 43 | copy_page(kto, kfrom); |
44 | kunmap_atomic(kto, KM_USER1); | 44 | kunmap_atomic(kto); |
45 | kunmap_atomic(kfrom, KM_USER0); | 45 | kunmap_atomic(kfrom); |
46 | } | 46 | } |
47 | 47 | ||
48 | /* | 48 | /* |
@@ -51,9 +51,9 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to, | |||
51 | */ | 51 | */ |
52 | static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr) | 52 | static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr) |
53 | { | 53 | { |
54 | void *kaddr = kmap_atomic(page, KM_USER0); | 54 | void *kaddr = kmap_atomic(page); |
55 | clear_page(kaddr); | 55 | clear_page(kaddr); |
56 | kunmap_atomic(kaddr, KM_USER0); | 56 | kunmap_atomic(kaddr); |
57 | } | 57 | } |
58 | 58 | ||
59 | /* | 59 | /* |
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c index f9cde0702f1e..03a2042aced5 100644 --- a/arch/arm/mm/copypage-xsc3.c +++ b/arch/arm/mm/copypage-xsc3.c | |||
@@ -75,12 +75,12 @@ void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, | |||
75 | { | 75 | { |
76 | void *kto, *kfrom; | 76 | void *kto, *kfrom; |
77 | 77 | ||
78 | kto = kmap_atomic(to, KM_USER0); | 78 | kto = kmap_atomic(to); |
79 | kfrom = kmap_atomic(from, KM_USER1); | 79 | kfrom = kmap_atomic(from); |
80 | flush_cache_page(vma, vaddr, page_to_pfn(from)); | 80 | flush_cache_page(vma, vaddr, page_to_pfn(from)); |
81 | xsc3_mc_copy_user_page(kto, kfrom); | 81 | xsc3_mc_copy_user_page(kto, kfrom); |
82 | kunmap_atomic(kfrom, KM_USER1); | 82 | kunmap_atomic(kfrom); |
83 | kunmap_atomic(kto, KM_USER0); | 83 | kunmap_atomic(kto); |
84 | } | 84 | } |
85 | 85 | ||
86 | /* | 86 | /* |
@@ -90,7 +90,7 @@ void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, | |||
90 | */ | 90 | */ |
91 | void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | 91 | void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr) |
92 | { | 92 | { |
93 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 93 | void *ptr, *kaddr = kmap_atomic(page); |
94 | asm volatile ("\ | 94 | asm volatile ("\ |
95 | mov r1, %2 \n\ | 95 | mov r1, %2 \n\ |
96 | mov r2, #0 \n\ | 96 | mov r2, #0 \n\ |
@@ -105,7 +105,7 @@ void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
105 | : "=r" (ptr) | 105 | : "=r" (ptr) |
106 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | 106 | : "0" (kaddr), "I" (PAGE_SIZE / 32) |
107 | : "r1", "r2", "r3"); | 107 | : "r1", "r2", "r3"); |
108 | kunmap_atomic(kaddr, KM_USER0); | 108 | kunmap_atomic(kaddr); |
109 | } | 109 | } |
110 | 110 | ||
111 | struct cpu_user_fns xsc3_mc_user_fns __initdata = { | 111 | struct cpu_user_fns xsc3_mc_user_fns __initdata = { |
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index 610c24ced310..439d106ae638 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c | |||
@@ -93,7 +93,7 @@ mc_copy_user_page(void *from, void *to) | |||
93 | void xscale_mc_copy_user_highpage(struct page *to, struct page *from, | 93 | void xscale_mc_copy_user_highpage(struct page *to, struct page *from, |
94 | unsigned long vaddr, struct vm_area_struct *vma) | 94 | unsigned long vaddr, struct vm_area_struct *vma) |
95 | { | 95 | { |
96 | void *kto = kmap_atomic(to, KM_USER1); | 96 | void *kto = kmap_atomic(to); |
97 | 97 | ||
98 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) | 98 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) |
99 | __flush_dcache_page(page_mapping(from), from); | 99 | __flush_dcache_page(page_mapping(from), from); |
@@ -107,7 +107,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, | |||
107 | 107 | ||
108 | raw_spin_unlock(&minicache_lock); | 108 | raw_spin_unlock(&minicache_lock); |
109 | 109 | ||
110 | kunmap_atomic(kto, KM_USER1); | 110 | kunmap_atomic(kto); |
111 | } | 111 | } |
112 | 112 | ||
113 | /* | 113 | /* |
@@ -116,7 +116,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, | |||
116 | void | 116 | void |
117 | xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | 117 | xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) |
118 | { | 118 | { |
119 | void *ptr, *kaddr = kmap_atomic(page, KM_USER0); | 119 | void *ptr, *kaddr = kmap_atomic(page); |
120 | asm volatile( | 120 | asm volatile( |
121 | "mov r1, %2 \n\ | 121 | "mov r1, %2 \n\ |
122 | mov r2, #0 \n\ | 122 | mov r2, #0 \n\ |
@@ -133,7 +133,7 @@ xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | |||
133 | : "=r" (ptr) | 133 | : "=r" (ptr) |
134 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | 134 | : "0" (kaddr), "I" (PAGE_SIZE / 32) |
135 | : "r1", "r2", "r3", "ip"); | 135 | : "r1", "r2", "r3", "ip"); |
136 | kunmap_atomic(kaddr, KM_USER0); | 136 | kunmap_atomic(kaddr); |
137 | } | 137 | } |
138 | 138 | ||
139 | struct cpu_user_fns xscale_mc_user_fns __initdata = { | 139 | struct cpu_user_fns xscale_mc_user_fns __initdata = { |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 807c0573abbe..5a21505d7550 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -36,7 +36,7 @@ void kunmap(struct page *page) | |||
36 | } | 36 | } |
37 | EXPORT_SYMBOL(kunmap); | 37 | EXPORT_SYMBOL(kunmap); |
38 | 38 | ||
39 | void *__kmap_atomic(struct page *page) | 39 | void *kmap_atomic(struct page *page) |
40 | { | 40 | { |
41 | unsigned int idx; | 41 | unsigned int idx; |
42 | unsigned long vaddr; | 42 | unsigned long vaddr; |
@@ -81,7 +81,7 @@ void *__kmap_atomic(struct page *page) | |||
81 | 81 | ||
82 | return (void *)vaddr; | 82 | return (void *)vaddr; |
83 | } | 83 | } |
84 | EXPORT_SYMBOL(__kmap_atomic); | 84 | EXPORT_SYMBOL(kmap_atomic); |
85 | 85 | ||
86 | void __kunmap_atomic(void *kvaddr) | 86 | void __kunmap_atomic(void *kvaddr) |
87 | { | 87 | { |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 5dc7d127a40f..245a55a0a5bb 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -32,7 +32,6 @@ | |||
32 | 32 | ||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | #include <asm/memblock.h> | ||
36 | 35 | ||
37 | #include "mm.h" | 36 | #include "mm.h" |
38 | 37 | ||
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c index e62956e12030..4614208369f1 100644 --- a/arch/arm/mm/iomap.c +++ b/arch/arm/mm/iomap.c | |||
@@ -32,9 +32,6 @@ EXPORT_SYMBOL(pcibios_min_io); | |||
32 | unsigned long pcibios_min_mem = 0x01000000; | 32 | unsigned long pcibios_min_mem = 0x01000000; |
33 | EXPORT_SYMBOL(pcibios_min_mem); | 33 | EXPORT_SYMBOL(pcibios_min_mem); |
34 | 34 | ||
35 | unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC; | ||
36 | EXPORT_SYMBOL(pci_flags); | ||
37 | |||
38 | void pci_iounmap(struct pci_dev *dev, void __iomem *addr) | 35 | void pci_iounmap(struct pci_dev *dev, void __iomem *addr) |
39 | { | 36 | { |
40 | if ((unsigned long)addr >= VMALLOC_START && | 37 | if ((unsigned long)addr >= VMALLOC_START && |
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index f4d40a27111e..72768356447a 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c | |||
@@ -215,8 +215,8 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
215 | sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; | 215 | sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; |
216 | sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; | 216 | sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; |
217 | 217 | ||
218 | pci_add_resource(&sys->resources, &res[0]); | 218 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); |
219 | pci_add_resource(&sys->resources, &res[1]); | 219 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); |
220 | 220 | ||
221 | return 1; | 221 | return 1; |
222 | } | 222 | } |
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index f0ba0726306c..d1e31fa1b0c3 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c | |||
@@ -16,6 +16,8 @@ | |||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/smsc911x.h> | 18 | #include <linux/smsc911x.h> |
19 | #include <linux/regulator/machine.h> | ||
20 | #include <linux/regulator/fixed.h> | ||
19 | 21 | ||
20 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
21 | 23 | ||
@@ -148,6 +150,11 @@ static struct irq_chip expio_irq_chip = { | |||
148 | .irq_unmask = expio_unmask_irq, | 150 | .irq_unmask = expio_unmask_irq, |
149 | }; | 151 | }; |
150 | 152 | ||
153 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
154 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
155 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
156 | }; | ||
157 | |||
151 | int __init mxc_expio_init(u32 base, u32 p_irq) | 158 | int __init mxc_expio_init(u32 base, u32 p_irq) |
152 | { | 159 | { |
153 | int i; | 160 | int i; |
@@ -188,6 +195,8 @@ int __init mxc_expio_init(u32 base, u32 p_irq) | |||
188 | irq_set_chained_handler(p_irq, mxc_expio_irq_handler); | 195 | irq_set_chained_handler(p_irq, mxc_expio_irq_handler); |
189 | 196 | ||
190 | /* Register Lan device on the debugboard */ | 197 | /* Register Lan device on the debugboard */ |
198 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
199 | |||
191 | smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); | 200 | smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); |
192 | smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1; | 201 | smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1; |
193 | platform_device_register(&smsc_lan9217_device); | 202 | platform_device_register(&smsc_lan9217_device); |
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index dcebb1230f7f..c722f9ce6918 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
@@ -88,12 +88,6 @@ config IMX_HAVE_IOMUX_V1 | |||
88 | config ARCH_MXC_IOMUX_V3 | 88 | config ARCH_MXC_IOMUX_V3 |
89 | bool | 89 | bool |
90 | 90 | ||
91 | config ARCH_MXC_AUDMUX_V1 | ||
92 | bool | ||
93 | |||
94 | config ARCH_MXC_AUDMUX_V2 | ||
95 | bool | ||
96 | |||
97 | config IRAM_ALLOC | 91 | config IRAM_ALLOC |
98 | bool | 92 | bool |
99 | select GENERIC_ALLOCATOR | 93 | select GENERIC_ALLOCATOR |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index 076db84f3e31..e81290c27c65 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -14,8 +14,6 @@ obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o | |||
14 | obj-$(CONFIG_MXC_PWM) += pwm.o | 14 | obj-$(CONFIG_MXC_PWM) += pwm.o |
15 | obj-$(CONFIG_MXC_ULPI) += ulpi.o | 15 | obj-$(CONFIG_MXC_ULPI) += ulpi.o |
16 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o | 16 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o |
17 | obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o | ||
18 | obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o | ||
19 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o | 17 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o |
20 | obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o | 18 | obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o |
21 | ifdef CONFIG_SND_IMX_SOC | 19 | ifdef CONFIG_SND_IMX_SOC |
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c deleted file mode 100644 index 1180bef7664b..000000000000 --- a/arch/arm/plat-mxc/audmux-v1.c +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
3 | * | ||
4 | * Initial development of this code was funded by | ||
5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <linux/err.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/clk.h> | ||
22 | #include <mach/audmux.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | static void __iomem *audmux_base; | ||
26 | |||
27 | static unsigned char port_mapping[] = { | ||
28 | 0x0, 0x4, 0x8, 0x10, 0x14, 0x1c, | ||
29 | }; | ||
30 | |||
31 | int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr) | ||
32 | { | ||
33 | if (!audmux_base) { | ||
34 | printk("%s: not configured\n", __func__); | ||
35 | return -ENOSYS; | ||
36 | } | ||
37 | |||
38 | if (port >= ARRAY_SIZE(port_mapping)) | ||
39 | return -EINVAL; | ||
40 | |||
41 | writel(pcr, audmux_base + port_mapping[port]); | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port); | ||
46 | |||
47 | static int mxc_audmux_v1_init(void) | ||
48 | { | ||
49 | #ifdef CONFIG_MACH_MX21 | ||
50 | if (cpu_is_mx21()) | ||
51 | audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR); | ||
52 | else | ||
53 | #endif | ||
54 | #ifdef CONFIG_MACH_MX27 | ||
55 | if (cpu_is_mx27()) | ||
56 | audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR); | ||
57 | else | ||
58 | #endif | ||
59 | (void)0; | ||
60 | |||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | postcore_initcall(mxc_audmux_v1_init); | ||
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c deleted file mode 100644 index 8cced35009bd..000000000000 --- a/arch/arm/plat-mxc/audmux-v2.c +++ /dev/null | |||
@@ -1,219 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
3 | * | ||
4 | * Initial development of this code was funded by | ||
5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <linux/err.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/clk.h> | ||
22 | #include <linux/debugfs.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <mach/audmux.h> | ||
25 | #include <mach/hardware.h> | ||
26 | |||
27 | static struct clk *audmux_clk; | ||
28 | static void __iomem *audmux_base; | ||
29 | |||
30 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) | ||
31 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) | ||
32 | |||
33 | #ifdef CONFIG_DEBUG_FS | ||
34 | static struct dentry *audmux_debugfs_root; | ||
35 | |||
36 | static int audmux_open_file(struct inode *inode, struct file *file) | ||
37 | { | ||
38 | file->private_data = inode->i_private; | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | /* There is an annoying discontinuity in the SSI numbering with regard | ||
43 | * to the Linux number of the devices */ | ||
44 | static const char *audmux_port_string(int port) | ||
45 | { | ||
46 | switch (port) { | ||
47 | case MX31_AUDMUX_PORT1_SSI0: | ||
48 | return "imx-ssi.0"; | ||
49 | case MX31_AUDMUX_PORT2_SSI1: | ||
50 | return "imx-ssi.1"; | ||
51 | case MX31_AUDMUX_PORT3_SSI_PINS_3: | ||
52 | return "SSI3"; | ||
53 | case MX31_AUDMUX_PORT4_SSI_PINS_4: | ||
54 | return "SSI4"; | ||
55 | case MX31_AUDMUX_PORT5_SSI_PINS_5: | ||
56 | return "SSI5"; | ||
57 | case MX31_AUDMUX_PORT6_SSI_PINS_6: | ||
58 | return "SSI6"; | ||
59 | default: | ||
60 | return "UNKNOWN"; | ||
61 | } | ||
62 | } | ||
63 | |||
64 | static ssize_t audmux_read_file(struct file *file, char __user *user_buf, | ||
65 | size_t count, loff_t *ppos) | ||
66 | { | ||
67 | ssize_t ret; | ||
68 | char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | ||
69 | int port = (int)file->private_data; | ||
70 | u32 pdcr, ptcr; | ||
71 | |||
72 | if (!buf) | ||
73 | return -ENOMEM; | ||
74 | |||
75 | if (audmux_clk) | ||
76 | clk_enable(audmux_clk); | ||
77 | |||
78 | ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port)); | ||
79 | pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port)); | ||
80 | |||
81 | if (audmux_clk) | ||
82 | clk_disable(audmux_clk); | ||
83 | |||
84 | ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n", | ||
85 | pdcr, ptcr); | ||
86 | |||
87 | if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR) | ||
88 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
89 | "TxFS output from %s, ", | ||
90 | audmux_port_string((ptcr >> 27) & 0x7)); | ||
91 | else | ||
92 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
93 | "TxFS input, "); | ||
94 | |||
95 | if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR) | ||
96 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
97 | "TxClk output from %s", | ||
98 | audmux_port_string((ptcr >> 22) & 0x7)); | ||
99 | else | ||
100 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
101 | "TxClk input"); | ||
102 | |||
103 | ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n"); | ||
104 | |||
105 | if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) { | ||
106 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
107 | "Port is symmetric"); | ||
108 | } else { | ||
109 | if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR) | ||
110 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
111 | "RxFS output from %s, ", | ||
112 | audmux_port_string((ptcr >> 17) & 0x7)); | ||
113 | else | ||
114 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
115 | "RxFS input, "); | ||
116 | |||
117 | if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR) | ||
118 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
119 | "RxClk output from %s", | ||
120 | audmux_port_string((ptcr >> 12) & 0x7)); | ||
121 | else | ||
122 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
123 | "RxClk input"); | ||
124 | } | ||
125 | |||
126 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
127 | "\nData received from %s\n", | ||
128 | audmux_port_string((pdcr >> 13) & 0x7)); | ||
129 | |||
130 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); | ||
131 | |||
132 | kfree(buf); | ||
133 | |||
134 | return ret; | ||
135 | } | ||
136 | |||
137 | static const struct file_operations audmux_debugfs_fops = { | ||
138 | .open = audmux_open_file, | ||
139 | .read = audmux_read_file, | ||
140 | .llseek = default_llseek, | ||
141 | }; | ||
142 | |||
143 | static void audmux_debugfs_init(void) | ||
144 | { | ||
145 | int i; | ||
146 | char buf[20]; | ||
147 | |||
148 | audmux_debugfs_root = debugfs_create_dir("audmux", NULL); | ||
149 | if (!audmux_debugfs_root) { | ||
150 | pr_warning("Failed to create AUDMUX debugfs root\n"); | ||
151 | return; | ||
152 | } | ||
153 | |||
154 | for (i = 1; i < 8; i++) { | ||
155 | snprintf(buf, sizeof(buf), "ssi%d", i); | ||
156 | if (!debugfs_create_file(buf, 0444, audmux_debugfs_root, | ||
157 | (void *)i, &audmux_debugfs_fops)) | ||
158 | pr_warning("Failed to create AUDMUX port %d debugfs file\n", | ||
159 | i); | ||
160 | } | ||
161 | } | ||
162 | #else | ||
163 | static inline void audmux_debugfs_init(void) | ||
164 | { | ||
165 | } | ||
166 | #endif | ||
167 | |||
168 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | ||
169 | unsigned int pdcr) | ||
170 | { | ||
171 | if (!audmux_base) | ||
172 | return -ENOSYS; | ||
173 | |||
174 | if (audmux_clk) | ||
175 | clk_enable(audmux_clk); | ||
176 | |||
177 | writel(ptcr, audmux_base + MXC_AUDMUX_V2_PTCR(port)); | ||
178 | writel(pdcr, audmux_base + MXC_AUDMUX_V2_PDCR(port)); | ||
179 | |||
180 | if (audmux_clk) | ||
181 | clk_disable(audmux_clk); | ||
182 | |||
183 | return 0; | ||
184 | } | ||
185 | EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port); | ||
186 | |||
187 | static int mxc_audmux_v2_init(void) | ||
188 | { | ||
189 | int ret; | ||
190 | if (cpu_is_mx51()) { | ||
191 | audmux_base = MX51_IO_ADDRESS(MX51_AUDMUX_BASE_ADDR); | ||
192 | } else if (cpu_is_mx31()) { | ||
193 | audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR); | ||
194 | } else if (cpu_is_mx35()) { | ||
195 | audmux_clk = clk_get(NULL, "audmux"); | ||
196 | if (IS_ERR(audmux_clk)) { | ||
197 | ret = PTR_ERR(audmux_clk); | ||
198 | printk(KERN_ERR "%s: cannot get clock: %d\n", __func__, | ||
199 | ret); | ||
200 | return ret; | ||
201 | } | ||
202 | audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR); | ||
203 | } else if (cpu_is_mx25()) { | ||
204 | audmux_clk = clk_get(NULL, "audmux"); | ||
205 | if (IS_ERR(audmux_clk)) { | ||
206 | ret = PTR_ERR(audmux_clk); | ||
207 | printk(KERN_ERR "%s: cannot get clock: %d\n", __func__, | ||
208 | ret); | ||
209 | return ret; | ||
210 | } | ||
211 | audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR); | ||
212 | } | ||
213 | |||
214 | audmux_debugfs_init(); | ||
215 | |||
216 | return 0; | ||
217 | } | ||
218 | |||
219 | postcore_initcall(mxc_audmux_v2_init); | ||
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/plat-mxc/devices/platform-mx2-camera.c index b3f4828dc447..11eace953a09 100644 --- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c +++ b/arch/arm/plat-mxc/devices/platform-mx2-camera.c | |||
@@ -62,3 +62,21 @@ struct platform_device *__init imx_add_mx2_camera( | |||
62 | res, data->iobaseemmaprp ? 4 : 2, | 62 | res, data->iobaseemmaprp ? 4 : 2, |
63 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); | 63 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); |
64 | } | 64 | } |
65 | |||
66 | struct platform_device *__init imx_add_mx2_emmaprp( | ||
67 | const struct imx_mx2_camera_data *data) | ||
68 | { | ||
69 | struct resource res[] = { | ||
70 | { | ||
71 | .start = data->iobaseemmaprp, | ||
72 | .end = data->iobaseemmaprp + data->iosizeemmaprp - 1, | ||
73 | .flags = IORESOURCE_MEM, | ||
74 | }, { | ||
75 | .start = data->irqemmaprp, | ||
76 | .end = data->irqemmaprp, | ||
77 | .flags = IORESOURCE_IRQ, | ||
78 | }, | ||
79 | }; | ||
80 | return imx_add_platform_device_dmamask("m2m-emmaprp", 0, | ||
81 | res, 2, NULL, 0, DMA_BIT_MASK(32)); | ||
82 | } | ||
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h deleted file mode 100644 index 6fda788ed0e9..000000000000 --- a/arch/arm/plat-mxc/include/mach/audmux.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef __MACH_AUDMUX_H | ||
2 | #define __MACH_AUDMUX_H | ||
3 | |||
4 | #define MX27_AUDMUX_HPCR1_SSI0 0 | ||
5 | #define MX27_AUDMUX_HPCR2_SSI1 1 | ||
6 | #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 | ||
7 | #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 | ||
8 | #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 | ||
9 | #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 | ||
10 | |||
11 | #define MX31_AUDMUX_PORT1_SSI0 0 | ||
12 | #define MX31_AUDMUX_PORT2_SSI1 1 | ||
13 | #define MX31_AUDMUX_PORT3_SSI_PINS_3 2 | ||
14 | #define MX31_AUDMUX_PORT4_SSI_PINS_4 3 | ||
15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 | ||
16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 | ||
17 | |||
18 | #define MX51_AUDMUX_PORT1_SSI0 0 | ||
19 | #define MX51_AUDMUX_PORT2_SSI1 1 | ||
20 | #define MX51_AUDMUX_PORT3 2 | ||
21 | #define MX51_AUDMUX_PORT4 3 | ||
22 | #define MX51_AUDMUX_PORT5 4 | ||
23 | #define MX51_AUDMUX_PORT6 5 | ||
24 | #define MX51_AUDMUX_PORT7 6 | ||
25 | |||
26 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ | ||
27 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) | ||
28 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) | ||
29 | #define MXC_AUDMUX_V1_PCR_TXRXEN (1 << 10) | ||
30 | #define MXC_AUDMUX_V1_PCR_SYN (1 << 12) | ||
31 | #define MXC_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) | ||
32 | #define MXC_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) | ||
33 | #define MXC_AUDMUX_V1_PCR_RCLKDIR (1 << 24) | ||
34 | #define MXC_AUDMUX_V1_PCR_RFSDIR (1 << 25) | ||
35 | #define MXC_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) | ||
36 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) | ||
37 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) | ||
38 | |||
39 | /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ | ||
40 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) | ||
41 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) | ||
42 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) | ||
43 | #define MXC_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) | ||
44 | #define MXC_AUDMUX_V2_PTCR_RFSDIR (1 << 21) | ||
45 | #define MXC_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) | ||
46 | #define MXC_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) | ||
47 | #define MXC_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) | ||
48 | #define MXC_AUDMUX_V2_PTCR_SYN (1 << 11) | ||
49 | |||
50 | #define MXC_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) | ||
51 | #define MXC_AUDMUX_V2_PDCR_TXRXEN (1 << 12) | ||
52 | #define MXC_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) | ||
53 | #define MXC_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) | ||
54 | |||
55 | int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr); | ||
56 | |||
57 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | ||
58 | unsigned int pdcr); | ||
59 | |||
60 | #endif /* __MACH_AUDMUX_H */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index def9ba53e23a..1b2258daa05b 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h | |||
@@ -223,6 +223,8 @@ struct imx_mx2_camera_data { | |||
223 | struct platform_device *__init imx_add_mx2_camera( | 223 | struct platform_device *__init imx_add_mx2_camera( |
224 | const struct imx_mx2_camera_data *data, | 224 | const struct imx_mx2_camera_data *data, |
225 | const struct mx2_camera_platform_data *pdata); | 225 | const struct mx2_camera_platform_data *pdata); |
226 | struct platform_device *__init imx_add_mx2_emmaprp( | ||
227 | const struct imx_mx2_camera_data *data); | ||
226 | 228 | ||
227 | #include <mach/mxc_ehci.h> | 229 | #include <mach/mxc_ehci.h> |
228 | struct imx_mxc_ehci_data { | 230 | struct imx_mxc_ehci_data { |
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S deleted file mode 100644 index def5d30cb67e..000000000000 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
3 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
4 | */ | ||
5 | |||
6 | /* | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h index 2c159dc2398b..9ffd1bbe615f 100644 --- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h +++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h | |||
@@ -44,7 +44,7 @@ struct mxc_usbh_platform_data { | |||
44 | int (*exit)(struct platform_device *pdev); | 44 | int (*exit)(struct platform_device *pdev); |
45 | 45 | ||
46 | unsigned int portsc; | 46 | unsigned int portsc; |
47 | struct otg_transceiver *otg; | 47 | struct usb_phy *otg; |
48 | }; | 48 | }; |
49 | 49 | ||
50 | int mx51_initialize_usb_hw(int port, unsigned int flags); | 50 | int mx51_initialize_usb_hw(int port, unsigned int flags); |
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h deleted file mode 100644 index 13ad0df2e860..000000000000 --- a/arch/arm/plat-mxc/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_MXC_SYSTEM_H__ | ||
18 | #define __ASM_ARCH_MXC_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/plat-mxc/include/mach/ulpi.h index f9161c96d7bd..42bdaca6d7d9 100644 --- a/arch/arm/plat-mxc/include/mach/ulpi.h +++ b/arch/arm/plat-mxc/include/mach/ulpi.h | |||
@@ -2,15 +2,15 @@ | |||
2 | #define __MACH_ULPI_H | 2 | #define __MACH_ULPI_H |
3 | 3 | ||
4 | #ifdef CONFIG_USB_ULPI | 4 | #ifdef CONFIG_USB_ULPI |
5 | struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags); | 5 | struct usb_phy *imx_otg_ulpi_create(unsigned int flags); |
6 | #else | 6 | #else |
7 | static inline struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags) | 7 | static inline struct usb_phy *imx_otg_ulpi_create(unsigned int flags) |
8 | { | 8 | { |
9 | return NULL; | 9 | return NULL; |
10 | } | 10 | } |
11 | #endif | 11 | #endif |
12 | 12 | ||
13 | extern struct otg_io_access_ops mxc_ulpi_access_ops; | 13 | extern struct usb_phy_io_ops mxc_ulpi_access_ops; |
14 | 14 | ||
15 | #endif /* __MACH_ULPI_H */ | 15 | #endif /* __MACH_ULPI_H */ |
16 | 16 | ||
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/plat-mxc/ulpi.c index 477e45bea1be..d2963427184f 100644 --- a/arch/arm/plat-mxc/ulpi.c +++ b/arch/arm/plat-mxc/ulpi.c | |||
@@ -58,7 +58,7 @@ static int ulpi_poll(void __iomem *view, u32 bit) | |||
58 | return -ETIMEDOUT; | 58 | return -ETIMEDOUT; |
59 | } | 59 | } |
60 | 60 | ||
61 | static int ulpi_read(struct otg_transceiver *otg, u32 reg) | 61 | static int ulpi_read(struct usb_phy *otg, u32 reg) |
62 | { | 62 | { |
63 | int ret; | 63 | int ret; |
64 | void __iomem *view = otg->io_priv; | 64 | void __iomem *view = otg->io_priv; |
@@ -84,7 +84,7 @@ static int ulpi_read(struct otg_transceiver *otg, u32 reg) | |||
84 | return (__raw_readl(view) >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK; | 84 | return (__raw_readl(view) >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK; |
85 | } | 85 | } |
86 | 86 | ||
87 | static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) | 87 | static int ulpi_write(struct usb_phy *otg, u32 val, u32 reg) |
88 | { | 88 | { |
89 | int ret; | 89 | int ret; |
90 | void __iomem *view = otg->io_priv; | 90 | void __iomem *view = otg->io_priv; |
@@ -106,13 +106,13 @@ static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) | |||
106 | return ulpi_poll(view, ULPIVW_RUN); | 106 | return ulpi_poll(view, ULPIVW_RUN); |
107 | } | 107 | } |
108 | 108 | ||
109 | struct otg_io_access_ops mxc_ulpi_access_ops = { | 109 | struct usb_phy_io_ops mxc_ulpi_access_ops = { |
110 | .read = ulpi_read, | 110 | .read = ulpi_read, |
111 | .write = ulpi_write, | 111 | .write = ulpi_write, |
112 | }; | 112 | }; |
113 | EXPORT_SYMBOL_GPL(mxc_ulpi_access_ops); | 113 | EXPORT_SYMBOL_GPL(mxc_ulpi_access_ops); |
114 | 114 | ||
115 | struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags) | 115 | struct usb_phy *imx_otg_ulpi_create(unsigned int flags) |
116 | { | 116 | { |
117 | return otg_ulpi_create(&mxc_ulpi_access_ops, flags); | 117 | return otg_ulpi_create(&mxc_ulpi_access_ops, flags); |
118 | } | 118 | } |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index aa59f4247dc5..8f81503a4df7 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -110,14 +110,6 @@ config OMAP_MUX_WARNINGS | |||
110 | to change the pin multiplexing setup. When there are no warnings | 110 | to change the pin multiplexing setup. When there are no warnings |
111 | printed, it's safe to deselect OMAP_MUX for your product. | 111 | printed, it's safe to deselect OMAP_MUX for your product. |
112 | 112 | ||
113 | config OMAP_MCBSP | ||
114 | bool "McBSP support" | ||
115 | depends on ARCH_OMAP | ||
116 | default y | ||
117 | help | ||
118 | Say Y here if you want support for the OMAP Multichannel | ||
119 | Buffered Serial Port. | ||
120 | |||
121 | config OMAP_MBOX_FWK | 113 | config OMAP_MBOX_FWK |
122 | tristate "Mailbox framework support" | 114 | tristate "Mailbox framework support" |
123 | depends on ARCH_OMAP | 115 | depends on ARCH_OMAP |
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 9a584614e7e6..c0fe2757b695 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
@@ -17,8 +17,6 @@ obj-$(CONFIG_ARCH_OMAP2) += omap_device.o | |||
17 | obj-$(CONFIG_ARCH_OMAP3) += omap_device.o | 17 | obj-$(CONFIG_ARCH_OMAP3) += omap_device.o |
18 | obj-$(CONFIG_ARCH_OMAP4) += omap_device.o | 18 | obj-$(CONFIG_ARCH_OMAP4) += omap_device.o |
19 | 19 | ||
20 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | ||
21 | |||
22 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o | 20 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o |
23 | obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o | 21 | obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o |
24 | obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o | 22 | obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 4de7d1e79e73..f1e46ea6b81d 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/dma-mapping.h> | 17 | #include <linux/dma-mapping.h> |
18 | #include <linux/omapfb.h> | ||
19 | 18 | ||
20 | #include <plat/common.h> | 19 | #include <plat/common.h> |
21 | #include <plat/board.h> | 20 | #include <plat/board.h> |
@@ -65,7 +64,6 @@ const void *__init omap_get_var_config(u16 tag, size_t *len) | |||
65 | 64 | ||
66 | void __init omap_reserve(void) | 65 | void __init omap_reserve(void) |
67 | { | 66 | { |
68 | omapfb_reserve_sdram_memblock(); | ||
69 | omap_vram_reserve_sdram_memblock(); | 67 | omap_vram_reserve_sdram_memblock(); |
70 | omap_dsp_reserve_sdram_memblock(); | 68 | omap_dsp_reserve_sdram_memblock(); |
71 | omap_secure_ram_reserve_memblock(); | 69 | omap_secure_ram_reserve_memblock(); |
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index c9e5d7298c40..dd6f92c99e56 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c | |||
@@ -34,15 +34,11 @@ | |||
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | 35 | ||
36 | #include <plat/board.h> | 36 | #include <plat/board.h> |
37 | #include <plat/sram.h> | ||
38 | |||
39 | #include "fb.h" | ||
40 | 37 | ||
41 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) | 38 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) |
42 | 39 | ||
40 | static bool omapfb_lcd_configured; | ||
43 | static struct omapfb_platform_data omapfb_config; | 41 | static struct omapfb_platform_data omapfb_config; |
44 | static int config_invalid; | ||
45 | static int configured_regions; | ||
46 | 42 | ||
47 | static u64 omap_fb_dma_mask = ~(u32)0; | 43 | static u64 omap_fb_dma_mask = ~(u32)0; |
48 | 44 | ||
@@ -57,302 +53,21 @@ static struct platform_device omap_fb_device = { | |||
57 | .num_resources = 0, | 53 | .num_resources = 0, |
58 | }; | 54 | }; |
59 | 55 | ||
60 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | 56 | void __init omapfb_set_lcd_config(const struct omap_lcd_config *config) |
61 | { | ||
62 | } | ||
63 | |||
64 | static inline int ranges_overlap(unsigned long start1, unsigned long size1, | ||
65 | unsigned long start2, unsigned long size2) | ||
66 | { | ||
67 | return (start1 >= start2 && start1 < start2 + size2) || | ||
68 | (start2 >= start1 && start2 < start1 + size1); | ||
69 | } | ||
70 | |||
71 | static inline int range_included(unsigned long start1, unsigned long size1, | ||
72 | unsigned long start2, unsigned long size2) | ||
73 | { | ||
74 | return start1 >= start2 && start1 + size1 <= start2 + size2; | ||
75 | } | ||
76 | |||
77 | |||
78 | /* Check if there is an overlapping region. */ | ||
79 | static int fbmem_region_reserved(unsigned long start, size_t size) | ||
80 | { | ||
81 | struct omapfb_mem_region *rg; | ||
82 | int i; | ||
83 | |||
84 | rg = &omapfb_config.mem_desc.region[0]; | ||
85 | for (i = 0; i < OMAPFB_PLANE_NUM; i++, rg++) { | ||
86 | if (!rg->paddr) | ||
87 | /* Empty slot. */ | ||
88 | continue; | ||
89 | if (ranges_overlap(start, size, rg->paddr, rg->size)) | ||
90 | return 1; | ||
91 | } | ||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * Get the region_idx`th region from board config/ATAG and convert it to | ||
97 | * our internal format. | ||
98 | */ | ||
99 | static int __init get_fbmem_region(int region_idx, struct omapfb_mem_region *rg) | ||
100 | { | 57 | { |
101 | const struct omap_fbmem_config *conf; | 58 | omapfb_config.lcd = *config; |
102 | u32 paddr; | 59 | omapfb_lcd_configured = true; |
103 | |||
104 | conf = omap_get_nr_config(OMAP_TAG_FBMEM, | ||
105 | struct omap_fbmem_config, region_idx); | ||
106 | if (conf == NULL) | ||
107 | return -ENOENT; | ||
108 | |||
109 | paddr = conf->start; | ||
110 | /* | ||
111 | * Low bits encode the page allocation mode, if high bits | ||
112 | * are zero. Otherwise we need a page aligned fixed | ||
113 | * address. | ||
114 | */ | ||
115 | memset(rg, 0, sizeof(*rg)); | ||
116 | rg->type = paddr & ~PAGE_MASK; | ||
117 | rg->paddr = paddr & PAGE_MASK; | ||
118 | rg->size = PAGE_ALIGN(conf->size); | ||
119 | return 0; | ||
120 | } | 60 | } |
121 | 61 | ||
122 | static int set_fbmem_region_type(struct omapfb_mem_region *rg, int mem_type, | 62 | static int __init omap_init_fb(void) |
123 | unsigned long mem_start, | ||
124 | unsigned long mem_size) | ||
125 | { | ||
126 | /* | ||
127 | * Check if the configuration specifies the type explicitly. | ||
128 | * type = 0 && paddr = 0, a default don't care case maps to | ||
129 | * the SDRAM type. | ||
130 | */ | ||
131 | if (rg->type || !rg->paddr) | ||
132 | return 0; | ||
133 | if (ranges_overlap(rg->paddr, rg->size, mem_start, mem_size)) { | ||
134 | rg->type = mem_type; | ||
135 | return 0; | ||
136 | } | ||
137 | /* Can't determine it. */ | ||
138 | return -1; | ||
139 | } | ||
140 | |||
141 | static int check_fbmem_region(int region_idx, struct omapfb_mem_region *rg, | ||
142 | unsigned long start_avail, unsigned size_avail) | ||
143 | { | 63 | { |
144 | unsigned long paddr = rg->paddr; | ||
145 | size_t size = rg->size; | ||
146 | |||
147 | if (rg->type > OMAPFB_MEMTYPE_MAX) { | ||
148 | printk(KERN_ERR | ||
149 | "Invalid start address for FB region %d\n", region_idx); | ||
150 | return -EINVAL; | ||
151 | } | ||
152 | |||
153 | if (!rg->size) { | ||
154 | printk(KERN_ERR "Zero size for FB region %d\n", region_idx); | ||
155 | return -EINVAL; | ||
156 | } | ||
157 | |||
158 | if (!paddr) | ||
159 | /* Allocate this dynamically, leave paddr 0 for now. */ | ||
160 | return 0; | ||
161 | |||
162 | /* | 64 | /* |
163 | * Fixed region for the given RAM range. Check if it's already | 65 | * If the board file has not set the lcd config with |
164 | * reserved by the FB code or someone else. | 66 | * omapfb_set_lcd_config(), don't bother registering the omapfb device |
165 | */ | 67 | */ |
166 | if (fbmem_region_reserved(paddr, size) || | 68 | if (!omapfb_lcd_configured) |
167 | !range_included(paddr, size, start_avail, size_avail)) { | ||
168 | printk(KERN_ERR "Trying to use reserved memory " | ||
169 | "for FB region %d\n", region_idx); | ||
170 | return -EINVAL; | ||
171 | } | ||
172 | |||
173 | return 0; | ||
174 | } | ||
175 | |||
176 | static int valid_sdram(unsigned long addr, unsigned long size) | ||
177 | { | ||
178 | return memblock_is_region_memory(addr, size); | ||
179 | } | ||
180 | |||
181 | static int reserve_sdram(unsigned long addr, unsigned long size) | ||
182 | { | ||
183 | if (memblock_is_region_reserved(addr, size)) | ||
184 | return -EBUSY; | ||
185 | if (memblock_reserve(addr, size)) | ||
186 | return -ENOMEM; | ||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | /* | ||
191 | * Called from map_io. We need to call to this early enough so that we | ||
192 | * can reserve the fixed SDRAM regions before VM could get hold of them. | ||
193 | */ | ||
194 | void __init omapfb_reserve_sdram_memblock(void) | ||
195 | { | ||
196 | unsigned long reserved = 0; | ||
197 | int i; | ||
198 | |||
199 | if (config_invalid) | ||
200 | return; | ||
201 | |||
202 | for (i = 0; ; i++) { | ||
203 | struct omapfb_mem_region rg; | ||
204 | |||
205 | if (get_fbmem_region(i, &rg) < 0) | ||
206 | break; | ||
207 | |||
208 | if (i == OMAPFB_PLANE_NUM) { | ||
209 | pr_err("Extraneous FB mem configuration entries\n"); | ||
210 | config_invalid = 1; | ||
211 | return; | ||
212 | } | ||
213 | |||
214 | /* Check if it's our memory type. */ | ||
215 | if (rg.type != OMAPFB_MEMTYPE_SDRAM) | ||
216 | continue; | ||
217 | |||
218 | /* Check if the region falls within SDRAM */ | ||
219 | if (rg.paddr && !valid_sdram(rg.paddr, rg.size)) | ||
220 | continue; | ||
221 | |||
222 | if (rg.size == 0) { | ||
223 | pr_err("Zero size for FB region %d\n", i); | ||
224 | config_invalid = 1; | ||
225 | return; | ||
226 | } | ||
227 | |||
228 | if (rg.paddr) { | ||
229 | if (reserve_sdram(rg.paddr, rg.size)) { | ||
230 | pr_err("Trying to use reserved memory for FB region %d\n", | ||
231 | i); | ||
232 | config_invalid = 1; | ||
233 | return; | ||
234 | } | ||
235 | reserved += rg.size; | ||
236 | } | ||
237 | |||
238 | if (omapfb_config.mem_desc.region[i].size) { | ||
239 | pr_err("FB region %d already set\n", i); | ||
240 | config_invalid = 1; | ||
241 | return; | ||
242 | } | ||
243 | |||
244 | omapfb_config.mem_desc.region[i] = rg; | ||
245 | configured_regions++; | ||
246 | } | ||
247 | omapfb_config.mem_desc.region_cnt = i; | ||
248 | if (reserved) | ||
249 | pr_info("Reserving %lu bytes SDRAM for frame buffer\n", | ||
250 | reserved); | ||
251 | } | ||
252 | |||
253 | /* | ||
254 | * Called at sram init time, before anything is pushed to the SRAM stack. | ||
255 | * Because of the stack scheme, we will allocate everything from the | ||
256 | * start of the lowest address region to the end of SRAM. This will also | ||
257 | * include padding for page alignment and possible holes between regions. | ||
258 | * | ||
259 | * As opposed to the SDRAM case, we'll also do any dynamic allocations at | ||
260 | * this point, since the driver built as a module would have problem with | ||
261 | * freeing / reallocating the regions. | ||
262 | */ | ||
263 | unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart, | ||
264 | unsigned long sram_vstart, | ||
265 | unsigned long sram_size, | ||
266 | unsigned long pstart_avail, | ||
267 | unsigned long size_avail) | ||
268 | { | ||
269 | struct omapfb_mem_region rg; | ||
270 | unsigned long pend_avail; | ||
271 | unsigned long reserved; | ||
272 | int i; | ||
273 | |||
274 | if (config_invalid) | ||
275 | return 0; | 69 | return 0; |
276 | 70 | ||
277 | reserved = 0; | ||
278 | pend_avail = pstart_avail + size_avail; | ||
279 | for (i = 0; ; i++) { | ||
280 | if (get_fbmem_region(i, &rg) < 0) | ||
281 | break; | ||
282 | if (i == OMAPFB_PLANE_NUM) { | ||
283 | printk(KERN_ERR | ||
284 | "Extraneous FB mem configuration entries\n"); | ||
285 | config_invalid = 1; | ||
286 | return 0; | ||
287 | } | ||
288 | |||
289 | /* Check if it's our memory type. */ | ||
290 | if (set_fbmem_region_type(&rg, OMAPFB_MEMTYPE_SRAM, | ||
291 | sram_pstart, sram_size) < 0 || | ||
292 | (rg.type != OMAPFB_MEMTYPE_SRAM)) | ||
293 | continue; | ||
294 | BUG_ON(omapfb_config.mem_desc.region[i].size); | ||
295 | |||
296 | if (check_fbmem_region(i, &rg, pstart_avail, size_avail) < 0) { | ||
297 | config_invalid = 1; | ||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | if (!rg.paddr) { | ||
302 | /* Dynamic allocation */ | ||
303 | if ((size_avail & PAGE_MASK) < rg.size) { | ||
304 | printk("Not enough SRAM for FB region %d\n", | ||
305 | i); | ||
306 | config_invalid = 1; | ||
307 | return 0; | ||
308 | } | ||
309 | size_avail = (size_avail - rg.size) & PAGE_MASK; | ||
310 | rg.paddr = pstart_avail + size_avail; | ||
311 | } | ||
312 | /* Reserve everything above the start of the region. */ | ||
313 | if (pend_avail - rg.paddr > reserved) | ||
314 | reserved = pend_avail - rg.paddr; | ||
315 | size_avail = pend_avail - reserved - pstart_avail; | ||
316 | |||
317 | /* | ||
318 | * We have a kernel mapping for this already, so the | ||
319 | * driver won't have to make one. | ||
320 | */ | ||
321 | rg.vaddr = (void *)(sram_vstart + rg.paddr - sram_pstart); | ||
322 | omapfb_config.mem_desc.region[i] = rg; | ||
323 | configured_regions++; | ||
324 | } | ||
325 | omapfb_config.mem_desc.region_cnt = i; | ||
326 | if (reserved) | ||
327 | pr_info("Reserving %lu bytes SRAM for frame buffer\n", | ||
328 | reserved); | ||
329 | return reserved; | ||
330 | } | ||
331 | |||
332 | void omapfb_set_ctrl_platform_data(void *data) | ||
333 | { | ||
334 | omapfb_config.ctrl_platform_data = data; | ||
335 | } | ||
336 | |||
337 | static int __init omap_init_fb(void) | ||
338 | { | ||
339 | const struct omap_lcd_config *conf; | ||
340 | |||
341 | if (config_invalid) | ||
342 | return 0; | ||
343 | if (configured_regions != omapfb_config.mem_desc.region_cnt) { | ||
344 | printk(KERN_ERR "Invalid FB mem configuration entries\n"); | ||
345 | return 0; | ||
346 | } | ||
347 | conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config); | ||
348 | if (conf == NULL) { | ||
349 | if (configured_regions) | ||
350 | /* FB mem config, but no LCD config? */ | ||
351 | printk(KERN_ERR "Missing LCD configuration\n"); | ||
352 | return 0; | ||
353 | } | ||
354 | omapfb_config.lcd = *conf; | ||
355 | |||
356 | return platform_device_register(&omap_fb_device); | 71 | return platform_device_register(&omap_fb_device); |
357 | } | 72 | } |
358 | 73 | ||
@@ -374,11 +89,6 @@ static struct platform_device omap_fb_device = { | |||
374 | .num_resources = 0, | 89 | .num_resources = 0, |
375 | }; | 90 | }; |
376 | 91 | ||
377 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | ||
378 | { | ||
379 | omapfb_config = *data; | ||
380 | } | ||
381 | |||
382 | static int __init omap_init_fb(void) | 92 | static int __init omap_init_fb(void) |
383 | { | 93 | { |
384 | return platform_device_register(&omap_fb_device); | 94 | return platform_device_register(&omap_fb_device); |
@@ -386,36 +96,10 @@ static int __init omap_init_fb(void) | |||
386 | 96 | ||
387 | arch_initcall(omap_init_fb); | 97 | arch_initcall(omap_init_fb); |
388 | 98 | ||
389 | void omapfb_reserve_sdram_memblock(void) | ||
390 | { | ||
391 | } | ||
392 | |||
393 | unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart, | ||
394 | unsigned long sram_vstart, | ||
395 | unsigned long sram_size, | ||
396 | unsigned long start_avail, | ||
397 | unsigned long size_avail) | ||
398 | { | ||
399 | return 0; | ||
400 | } | ||
401 | |||
402 | #else | 99 | #else |
403 | 100 | ||
404 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | 101 | void __init omapfb_set_lcd_config(const struct omap_lcd_config *config) |
405 | { | ||
406 | } | ||
407 | |||
408 | void omapfb_reserve_sdram_memblock(void) | ||
409 | { | ||
410 | } | ||
411 | |||
412 | unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart, | ||
413 | unsigned long sram_vstart, | ||
414 | unsigned long sram_size, | ||
415 | unsigned long start_avail, | ||
416 | unsigned long size_avail) | ||
417 | { | 102 | { |
418 | return 0; | ||
419 | } | 103 | } |
420 | 104 | ||
421 | #endif | 105 | #endif |
diff --git a/arch/arm/plat-omap/fb.h b/arch/arm/plat-omap/fb.h deleted file mode 100644 index d765d0bd8520..000000000000 --- a/arch/arm/plat-omap/fb.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __PLAT_OMAP_FB_H__ | ||
2 | #define __PLAT_OMAP_FB_H__ | ||
3 | |||
4 | extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart, | ||
5 | unsigned long sram_vstart, | ||
6 | unsigned long sram_size, | ||
7 | unsigned long pstart_avail, | ||
8 | unsigned long size_avail); | ||
9 | |||
10 | #endif /* __PLAT_OMAP_FB_H__ */ | ||
diff --git a/arch/arm/plat-omap/include/plat/blizzard.h b/arch/arm/plat-omap/include/plat/blizzard.h deleted file mode 100644 index 56e7f2e7d12f..000000000000 --- a/arch/arm/plat-omap/include/plat/blizzard.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _BLIZZARD_H | ||
2 | #define _BLIZZARD_H | ||
3 | |||
4 | struct blizzard_platform_data { | ||
5 | void (*power_up)(struct device *dev); | ||
6 | void (*power_down)(struct device *dev); | ||
7 | unsigned long (*get_clock_rate)(struct device *dev); | ||
8 | |||
9 | unsigned te_connected:1; | ||
10 | }; | ||
11 | |||
12 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h index 97126dfd2888..d5eb4c87db9d 100644 --- a/arch/arm/plat-omap/include/plat/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
@@ -28,9 +28,7 @@ enum { | |||
28 | 28 | ||
29 | /* Different peripheral ids */ | 29 | /* Different peripheral ids */ |
30 | #define OMAP_TAG_CLOCK 0x4f01 | 30 | #define OMAP_TAG_CLOCK 0x4f01 |
31 | #define OMAP_TAG_LCD 0x4f05 | ||
32 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 | 31 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 |
33 | #define OMAP_TAG_FBMEM 0x4f08 | ||
34 | #define OMAP_TAG_STI_CONSOLE 0x4f09 | 32 | #define OMAP_TAG_STI_CONSOLE 0x4f09 |
35 | #define OMAP_TAG_CAMERA_SENSOR 0x4f0a | 33 | #define OMAP_TAG_CAMERA_SENSOR 0x4f0a |
36 | 34 | ||
diff --git a/arch/arm/plat-omap/include/plat/hwa742.h b/arch/arm/plat-omap/include/plat/hwa742.h deleted file mode 100644 index 886248d32b49..000000000000 --- a/arch/arm/plat-omap/include/plat/hwa742.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef _HWA742_H | ||
2 | #define _HWA742_H | ||
3 | |||
4 | struct hwa742_platform_data { | ||
5 | unsigned te_connected:1; | ||
6 | }; | ||
7 | |||
8 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8fa74e2c9d6e..18814127809a 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | |||
@@ -27,271 +27,10 @@ | |||
27 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | 29 | ||
30 | /* macro for building platform_device for McBSP ports */ | ||
31 | #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ | ||
32 | static struct platform_device omap_mcbsp##port_nr = { \ | ||
33 | .name = "omap-mcbsp-dai", \ | ||
34 | .id = port_nr - 1, \ | ||
35 | } | ||
36 | |||
37 | #define MCBSP_CONFIG_TYPE2 0x2 | 30 | #define MCBSP_CONFIG_TYPE2 0x2 |
38 | #define MCBSP_CONFIG_TYPE3 0x3 | 31 | #define MCBSP_CONFIG_TYPE3 0x3 |
39 | #define MCBSP_CONFIG_TYPE4 0x4 | 32 | #define MCBSP_CONFIG_TYPE4 0x4 |
40 | 33 | ||
41 | /* McBSP register numbers. Register address offset = num * reg_step */ | ||
42 | enum { | ||
43 | /* Common registers */ | ||
44 | OMAP_MCBSP_REG_SPCR2 = 4, | ||
45 | OMAP_MCBSP_REG_SPCR1, | ||
46 | OMAP_MCBSP_REG_RCR2, | ||
47 | OMAP_MCBSP_REG_RCR1, | ||
48 | OMAP_MCBSP_REG_XCR2, | ||
49 | OMAP_MCBSP_REG_XCR1, | ||
50 | OMAP_MCBSP_REG_SRGR2, | ||
51 | OMAP_MCBSP_REG_SRGR1, | ||
52 | OMAP_MCBSP_REG_MCR2, | ||
53 | OMAP_MCBSP_REG_MCR1, | ||
54 | OMAP_MCBSP_REG_RCERA, | ||
55 | OMAP_MCBSP_REG_RCERB, | ||
56 | OMAP_MCBSP_REG_XCERA, | ||
57 | OMAP_MCBSP_REG_XCERB, | ||
58 | OMAP_MCBSP_REG_PCR0, | ||
59 | OMAP_MCBSP_REG_RCERC, | ||
60 | OMAP_MCBSP_REG_RCERD, | ||
61 | OMAP_MCBSP_REG_XCERC, | ||
62 | OMAP_MCBSP_REG_XCERD, | ||
63 | OMAP_MCBSP_REG_RCERE, | ||
64 | OMAP_MCBSP_REG_RCERF, | ||
65 | OMAP_MCBSP_REG_XCERE, | ||
66 | OMAP_MCBSP_REG_XCERF, | ||
67 | OMAP_MCBSP_REG_RCERG, | ||
68 | OMAP_MCBSP_REG_RCERH, | ||
69 | OMAP_MCBSP_REG_XCERG, | ||
70 | OMAP_MCBSP_REG_XCERH, | ||
71 | |||
72 | /* OMAP1-OMAP2420 registers */ | ||
73 | OMAP_MCBSP_REG_DRR2 = 0, | ||
74 | OMAP_MCBSP_REG_DRR1, | ||
75 | OMAP_MCBSP_REG_DXR2, | ||
76 | OMAP_MCBSP_REG_DXR1, | ||
77 | |||
78 | /* OMAP2430 and onwards */ | ||
79 | OMAP_MCBSP_REG_DRR = 0, | ||
80 | OMAP_MCBSP_REG_DXR = 2, | ||
81 | OMAP_MCBSP_REG_SYSCON = 35, | ||
82 | OMAP_MCBSP_REG_THRSH2, | ||
83 | OMAP_MCBSP_REG_THRSH1, | ||
84 | OMAP_MCBSP_REG_IRQST = 40, | ||
85 | OMAP_MCBSP_REG_IRQEN, | ||
86 | OMAP_MCBSP_REG_WAKEUPEN, | ||
87 | OMAP_MCBSP_REG_XCCR, | ||
88 | OMAP_MCBSP_REG_RCCR, | ||
89 | OMAP_MCBSP_REG_XBUFFSTAT, | ||
90 | OMAP_MCBSP_REG_RBUFFSTAT, | ||
91 | OMAP_MCBSP_REG_SSELCR, | ||
92 | }; | ||
93 | |||
94 | /* OMAP3 sidetone control registers */ | ||
95 | #define OMAP_ST_REG_REV 0x00 | ||
96 | #define OMAP_ST_REG_SYSCONFIG 0x10 | ||
97 | #define OMAP_ST_REG_IRQSTATUS 0x18 | ||
98 | #define OMAP_ST_REG_IRQENABLE 0x1C | ||
99 | #define OMAP_ST_REG_SGAINCR 0x24 | ||
100 | #define OMAP_ST_REG_SFIRCR 0x28 | ||
101 | #define OMAP_ST_REG_SSELCR 0x2C | ||
102 | |||
103 | /************************** McBSP SPCR1 bit definitions ***********************/ | ||
104 | #define RRST 0x0001 | ||
105 | #define RRDY 0x0002 | ||
106 | #define RFULL 0x0004 | ||
107 | #define RSYNC_ERR 0x0008 | ||
108 | #define RINTM(value) ((value)<<4) /* bits 4:5 */ | ||
109 | #define ABIS 0x0040 | ||
110 | #define DXENA 0x0080 | ||
111 | #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ | ||
112 | #define RJUST(value) ((value)<<13) /* bits 13:14 */ | ||
113 | #define ALB 0x8000 | ||
114 | #define DLB 0x8000 | ||
115 | |||
116 | /************************** McBSP SPCR2 bit definitions ***********************/ | ||
117 | #define XRST 0x0001 | ||
118 | #define XRDY 0x0002 | ||
119 | #define XEMPTY 0x0004 | ||
120 | #define XSYNC_ERR 0x0008 | ||
121 | #define XINTM(value) ((value)<<4) /* bits 4:5 */ | ||
122 | #define GRST 0x0040 | ||
123 | #define FRST 0x0080 | ||
124 | #define SOFT 0x0100 | ||
125 | #define FREE 0x0200 | ||
126 | |||
127 | /************************** McBSP PCR bit definitions *************************/ | ||
128 | #define CLKRP 0x0001 | ||
129 | #define CLKXP 0x0002 | ||
130 | #define FSRP 0x0004 | ||
131 | #define FSXP 0x0008 | ||
132 | #define DR_STAT 0x0010 | ||
133 | #define DX_STAT 0x0020 | ||
134 | #define CLKS_STAT 0x0040 | ||
135 | #define SCLKME 0x0080 | ||
136 | #define CLKRM 0x0100 | ||
137 | #define CLKXM 0x0200 | ||
138 | #define FSRM 0x0400 | ||
139 | #define FSXM 0x0800 | ||
140 | #define RIOEN 0x1000 | ||
141 | #define XIOEN 0x2000 | ||
142 | #define IDLE_EN 0x4000 | ||
143 | |||
144 | /************************** McBSP RCR1 bit definitions ************************/ | ||
145 | #define RWDLEN1(value) ((value)<<5) /* Bits 5:7 */ | ||
146 | #define RFRLEN1(value) ((value)<<8) /* Bits 8:14 */ | ||
147 | |||
148 | /************************** McBSP XCR1 bit definitions ************************/ | ||
149 | #define XWDLEN1(value) ((value)<<5) /* Bits 5:7 */ | ||
150 | #define XFRLEN1(value) ((value)<<8) /* Bits 8:14 */ | ||
151 | |||
152 | /*************************** McBSP RCR2 bit definitions ***********************/ | ||
153 | #define RDATDLY(value) (value) /* Bits 0:1 */ | ||
154 | #define RFIG 0x0004 | ||
155 | #define RCOMPAND(value) ((value)<<3) /* Bits 3:4 */ | ||
156 | #define RWDLEN2(value) ((value)<<5) /* Bits 5:7 */ | ||
157 | #define RFRLEN2(value) ((value)<<8) /* Bits 8:14 */ | ||
158 | #define RPHASE 0x8000 | ||
159 | |||
160 | /*************************** McBSP XCR2 bit definitions ***********************/ | ||
161 | #define XDATDLY(value) (value) /* Bits 0:1 */ | ||
162 | #define XFIG 0x0004 | ||
163 | #define XCOMPAND(value) ((value)<<3) /* Bits 3:4 */ | ||
164 | #define XWDLEN2(value) ((value)<<5) /* Bits 5:7 */ | ||
165 | #define XFRLEN2(value) ((value)<<8) /* Bits 8:14 */ | ||
166 | #define XPHASE 0x8000 | ||
167 | |||
168 | /************************* McBSP SRGR1 bit definitions ************************/ | ||
169 | #define CLKGDV(value) (value) /* Bits 0:7 */ | ||
170 | #define FWID(value) ((value)<<8) /* Bits 8:15 */ | ||
171 | |||
172 | /************************* McBSP SRGR2 bit definitions ************************/ | ||
173 | #define FPER(value) (value) /* Bits 0:11 */ | ||
174 | #define FSGM 0x1000 | ||
175 | #define CLKSM 0x2000 | ||
176 | #define CLKSP 0x4000 | ||
177 | #define GSYNC 0x8000 | ||
178 | |||
179 | /************************* McBSP MCR1 bit definitions *************************/ | ||
180 | #define RMCM 0x0001 | ||
181 | #define RCBLK(value) ((value)<<2) /* Bits 2:4 */ | ||
182 | #define RPABLK(value) ((value)<<5) /* Bits 5:6 */ | ||
183 | #define RPBBLK(value) ((value)<<7) /* Bits 7:8 */ | ||
184 | |||
185 | /************************* McBSP MCR2 bit definitions *************************/ | ||
186 | #define XMCM(value) (value) /* Bits 0:1 */ | ||
187 | #define XCBLK(value) ((value)<<2) /* Bits 2:4 */ | ||
188 | #define XPABLK(value) ((value)<<5) /* Bits 5:6 */ | ||
189 | #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ | ||
190 | |||
191 | /*********************** McBSP XCCR bit definitions *************************/ | ||
192 | #define EXTCLKGATE 0x8000 | ||
193 | #define PPCONNECT 0x4000 | ||
194 | #define DXENDLY(value) ((value)<<12) /* Bits 12:13 */ | ||
195 | #define XFULL_CYCLE 0x0800 | ||
196 | #define DILB 0x0020 | ||
197 | #define XDMAEN 0x0008 | ||
198 | #define XDISABLE 0x0001 | ||
199 | |||
200 | /********************** McBSP RCCR bit definitions *************************/ | ||
201 | #define RFULL_CYCLE 0x0800 | ||
202 | #define RDMAEN 0x0008 | ||
203 | #define RDISABLE 0x0001 | ||
204 | |||
205 | /********************** McBSP SYSCONFIG bit definitions ********************/ | ||
206 | #define CLOCKACTIVITY(value) ((value)<<8) | ||
207 | #define SIDLEMODE(value) ((value)<<3) | ||
208 | #define ENAWAKEUP 0x0004 | ||
209 | #define SOFTRST 0x0002 | ||
210 | |||
211 | /********************** McBSP SSELCR bit definitions ***********************/ | ||
212 | #define SIDETONEEN 0x0400 | ||
213 | |||
214 | /********************** McBSP Sidetone SYSCONFIG bit definitions ***********/ | ||
215 | #define ST_AUTOIDLE 0x0001 | ||
216 | |||
217 | /********************** McBSP Sidetone SGAINCR bit definitions *************/ | ||
218 | #define ST_CH1GAIN(value) ((value<<16)) /* Bits 16:31 */ | ||
219 | #define ST_CH0GAIN(value) (value) /* Bits 0:15 */ | ||
220 | |||
221 | /********************** McBSP Sidetone SFIRCR bit definitions **************/ | ||
222 | #define ST_FIRCOEFF(value) (value) /* Bits 0:15 */ | ||
223 | |||
224 | /********************** McBSP Sidetone SSELCR bit definitions **************/ | ||
225 | #define ST_COEFFWRDONE 0x0004 | ||
226 | #define ST_COEFFWREN 0x0002 | ||
227 | #define ST_SIDETONEEN 0x0001 | ||
228 | |||
229 | /********************** McBSP DMA operating modes **************************/ | ||
230 | #define MCBSP_DMA_MODE_ELEMENT 0 | ||
231 | #define MCBSP_DMA_MODE_THRESHOLD 1 | ||
232 | #define MCBSP_DMA_MODE_FRAME 2 | ||
233 | |||
234 | /********************** McBSP WAKEUPEN bit definitions *********************/ | ||
235 | #define XEMPTYEOFEN 0x4000 | ||
236 | #define XRDYEN 0x0400 | ||
237 | #define XEOFEN 0x0200 | ||
238 | #define XFSXEN 0x0100 | ||
239 | #define XSYNCERREN 0x0080 | ||
240 | #define RRDYEN 0x0008 | ||
241 | #define REOFEN 0x0004 | ||
242 | #define RFSREN 0x0002 | ||
243 | #define RSYNCERREN 0x0001 | ||
244 | |||
245 | /* CLKR signal muxing options */ | ||
246 | #define CLKR_SRC_CLKR 0 | ||
247 | #define CLKR_SRC_CLKX 1 | ||
248 | |||
249 | /* FSR signal muxing options */ | ||
250 | #define FSR_SRC_FSR 0 | ||
251 | #define FSR_SRC_FSX 1 | ||
252 | |||
253 | /* McBSP functional clock sources */ | ||
254 | #define MCBSP_CLKS_PRCM_SRC 0 | ||
255 | #define MCBSP_CLKS_PAD_SRC 1 | ||
256 | |||
257 | /* we don't do multichannel for now */ | ||
258 | struct omap_mcbsp_reg_cfg { | ||
259 | u16 spcr2; | ||
260 | u16 spcr1; | ||
261 | u16 rcr2; | ||
262 | u16 rcr1; | ||
263 | u16 xcr2; | ||
264 | u16 xcr1; | ||
265 | u16 srgr2; | ||
266 | u16 srgr1; | ||
267 | u16 mcr2; | ||
268 | u16 mcr1; | ||
269 | u16 pcr0; | ||
270 | u16 rcerc; | ||
271 | u16 rcerd; | ||
272 | u16 xcerc; | ||
273 | u16 xcerd; | ||
274 | u16 rcere; | ||
275 | u16 rcerf; | ||
276 | u16 xcere; | ||
277 | u16 xcerf; | ||
278 | u16 rcerg; | ||
279 | u16 rcerh; | ||
280 | u16 xcerg; | ||
281 | u16 xcerh; | ||
282 | u16 xccr; | ||
283 | u16 rccr; | ||
284 | }; | ||
285 | |||
286 | typedef enum { | ||
287 | OMAP_MCBSP_WORD_8 = 0, | ||
288 | OMAP_MCBSP_WORD_12, | ||
289 | OMAP_MCBSP_WORD_16, | ||
290 | OMAP_MCBSP_WORD_20, | ||
291 | OMAP_MCBSP_WORD_24, | ||
292 | OMAP_MCBSP_WORD_32, | ||
293 | } omap_mcbsp_word_length; | ||
294 | |||
295 | /* Platform specific configuration */ | 34 | /* Platform specific configuration */ |
296 | struct omap_mcbsp_ops { | 35 | struct omap_mcbsp_ops { |
297 | void (*request)(unsigned int); | 36 | void (*request)(unsigned int); |
@@ -312,43 +51,6 @@ struct omap_mcbsp_platform_data { | |||
312 | int (*mux_signal)(struct device *dev, const char *signal, const char *src); | 51 | int (*mux_signal)(struct device *dev, const char *signal, const char *src); |
313 | }; | 52 | }; |
314 | 53 | ||
315 | struct omap_mcbsp_st_data { | ||
316 | void __iomem *io_base_st; | ||
317 | bool running; | ||
318 | bool enabled; | ||
319 | s16 taps[128]; /* Sidetone filter coefficients */ | ||
320 | int nr_taps; /* Number of filter coefficients in use */ | ||
321 | s16 ch0gain; | ||
322 | s16 ch1gain; | ||
323 | }; | ||
324 | |||
325 | struct omap_mcbsp { | ||
326 | struct device *dev; | ||
327 | unsigned long phys_base; | ||
328 | unsigned long phys_dma_base; | ||
329 | void __iomem *io_base; | ||
330 | u8 id; | ||
331 | u8 free; | ||
332 | |||
333 | int rx_irq; | ||
334 | int tx_irq; | ||
335 | |||
336 | /* DMA stuff */ | ||
337 | u8 dma_rx_sync; | ||
338 | u8 dma_tx_sync; | ||
339 | |||
340 | /* Protect the field .free, while checking if the mcbsp is in use */ | ||
341 | spinlock_t lock; | ||
342 | struct omap_mcbsp_platform_data *pdata; | ||
343 | struct clk *fclk; | ||
344 | struct omap_mcbsp_st_data *st_data; | ||
345 | int dma_op_mode; | ||
346 | u16 max_tx_thres; | ||
347 | u16 max_rx_thres; | ||
348 | void *reg_cache; | ||
349 | int reg_cache_size; | ||
350 | }; | ||
351 | |||
352 | /** | 54 | /** |
353 | * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod | 55 | * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod |
354 | * @sidetone: name of the sidetone device | 56 | * @sidetone: name of the sidetone device |
@@ -357,39 +59,4 @@ struct omap_mcbsp_dev_attr { | |||
357 | const char *sidetone; | 59 | const char *sidetone; |
358 | }; | 60 | }; |
359 | 61 | ||
360 | extern struct omap_mcbsp **mcbsp_ptr; | ||
361 | extern int omap_mcbsp_count; | ||
362 | |||
363 | int omap_mcbsp_init(void); | ||
364 | void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); | ||
365 | void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); | ||
366 | void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); | ||
367 | u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); | ||
368 | u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); | ||
369 | u16 omap_mcbsp_get_fifo_size(unsigned int id); | ||
370 | u16 omap_mcbsp_get_tx_delay(unsigned int id); | ||
371 | u16 omap_mcbsp_get_rx_delay(unsigned int id); | ||
372 | int omap_mcbsp_get_dma_op_mode(unsigned int id); | ||
373 | int omap_mcbsp_request(unsigned int id); | ||
374 | void omap_mcbsp_free(unsigned int id); | ||
375 | void omap_mcbsp_start(unsigned int id, int tx, int rx); | ||
376 | void omap_mcbsp_stop(unsigned int id, int tx, int rx); | ||
377 | |||
378 | /* McBSP functional clock source changing function */ | ||
379 | extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); | ||
380 | |||
381 | /* McBSP signal muxing API */ | ||
382 | void omap2_mcbsp1_mux_clkr_src(u8 mux); | ||
383 | void omap2_mcbsp1_mux_fsr_src(u8 mux); | ||
384 | |||
385 | int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); | ||
386 | int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); | ||
387 | |||
388 | /* Sidetone specific API */ | ||
389 | int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); | ||
390 | int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain); | ||
391 | int omap_st_enable(unsigned int id); | ||
392 | int omap_st_disable(unsigned int id); | ||
393 | int omap_st_is_enabled(unsigned int id); | ||
394 | |||
395 | #endif | 62 | #endif |
diff --git a/arch/arm/plat-omap/include/plat/omap4-keypad.h b/arch/arm/plat-omap/include/plat/omap4-keypad.h index 9fe6c8783236..8ad0a377a54b 100644 --- a/arch/arm/plat-omap/include/plat/omap4-keypad.h +++ b/arch/arm/plat-omap/include/plat/omap4-keypad.h | |||
@@ -1,15 +1,6 @@ | |||
1 | #ifndef ARCH_ARM_PLAT_OMAP4_KEYPAD_H | 1 | #ifndef ARCH_ARM_PLAT_OMAP4_KEYPAD_H |
2 | #define ARCH_ARM_PLAT_OMAP4_KEYPAD_H | 2 | #define ARCH_ARM_PLAT_OMAP4_KEYPAD_H |
3 | 3 | ||
4 | #include <linux/input/matrix_keypad.h> | ||
5 | |||
6 | struct omap4_keypad_platform_data { | ||
7 | const struct matrix_keymap_data *keymap_data; | ||
8 | |||
9 | u8 rows; | ||
10 | u8 cols; | ||
11 | }; | ||
12 | |||
13 | extern int omap4_keyboard_init(struct omap4_keypad_platform_data *, | 4 | extern int omap4_keyboard_init(struct omap4_keypad_platform_data *, |
14 | struct omap_board_data *); | 5 | struct omap_board_data *); |
15 | #endif | 6 | #endif |
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h deleted file mode 100644 index 8e5ebd74b129..000000000000 --- a/arch/arm/plat-omap/include/plat/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Copied from arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
4 | */ | ||
5 | #ifndef __ASM_ARCH_SYSTEM_H | ||
6 | #define __ASM_ARCH_SYSTEM_H | ||
7 | |||
8 | #include <asm/proc-fns.h> | ||
9 | |||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/vram.h b/arch/arm/plat-omap/include/plat/vram.h index 0aa4ecd12c7d..4d65b7d06e6c 100644 --- a/arch/arm/plat-omap/include/plat/vram.h +++ b/arch/arm/plat-omap/include/plat/vram.h | |||
@@ -23,40 +23,21 @@ | |||
23 | 23 | ||
24 | #include <linux/types.h> | 24 | #include <linux/types.h> |
25 | 25 | ||
26 | #define OMAP_VRAM_MEMTYPE_SDRAM 0 | ||
27 | #define OMAP_VRAM_MEMTYPE_SRAM 1 | ||
28 | #define OMAP_VRAM_MEMTYPE_MAX 1 | ||
29 | |||
30 | extern int omap_vram_add_region(unsigned long paddr, size_t size); | 26 | extern int omap_vram_add_region(unsigned long paddr, size_t size); |
31 | extern int omap_vram_free(unsigned long paddr, size_t size); | 27 | extern int omap_vram_free(unsigned long paddr, size_t size); |
32 | extern int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr); | 28 | extern int omap_vram_alloc(size_t size, unsigned long *paddr); |
33 | extern int omap_vram_reserve(unsigned long paddr, size_t size); | 29 | extern int omap_vram_reserve(unsigned long paddr, size_t size); |
34 | extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram, | 30 | extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram, |
35 | unsigned long *largest_free_block); | 31 | unsigned long *largest_free_block); |
36 | 32 | ||
37 | #ifdef CONFIG_OMAP2_VRAM | 33 | #ifdef CONFIG_OMAP2_VRAM |
38 | extern void omap_vram_set_sdram_vram(u32 size, u32 start); | 34 | extern void omap_vram_set_sdram_vram(u32 size, u32 start); |
39 | extern void omap_vram_set_sram_vram(u32 size, u32 start); | ||
40 | 35 | ||
41 | extern void omap_vram_reserve_sdram_memblock(void); | 36 | extern void omap_vram_reserve_sdram_memblock(void); |
42 | extern unsigned long omap_vram_reserve_sram(unsigned long sram_pstart, | ||
43 | unsigned long sram_vstart, | ||
44 | unsigned long sram_size, | ||
45 | unsigned long pstart_avail, | ||
46 | unsigned long size_avail); | ||
47 | #else | 37 | #else |
48 | static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { } | 38 | static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { } |
49 | static inline void omap_vram_set_sram_vram(u32 size, u32 start) { } | ||
50 | 39 | ||
51 | static inline void omap_vram_reserve_sdram_memblock(void) { } | 40 | static inline void omap_vram_reserve_sdram_memblock(void) { } |
52 | static inline unsigned long omap_vram_reserve_sram(unsigned long sram_pstart, | ||
53 | unsigned long sram_vstart, | ||
54 | unsigned long sram_size, | ||
55 | unsigned long pstart_avail, | ||
56 | unsigned long size_avail) | ||
57 | { | ||
58 | return 0; | ||
59 | } | ||
60 | #endif | 41 | #endif |
61 | 42 | ||
62 | #endif | 43 | #endif |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c deleted file mode 100644 index 4b15cd7926d7..000000000000 --- a/arch/arm/plat-omap/mcbsp.c +++ /dev/null | |||
@@ -1,1361 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-omap/mcbsp.c | ||
3 | * | ||
4 | * Copyright (C) 2004 Nokia Corporation | ||
5 | * Author: Samuel Ortiz <samuel.ortiz@nokia.com> | ||
6 | * | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * Multichannel mode not supported. | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/device.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/err.h> | ||
21 | #include <linux/clk.h> | ||
22 | #include <linux/delay.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/slab.h> | ||
25 | |||
26 | #include <plat/mcbsp.h> | ||
27 | #include <linux/pm_runtime.h> | ||
28 | |||
29 | struct omap_mcbsp **mcbsp_ptr; | ||
30 | int omap_mcbsp_count; | ||
31 | |||
32 | #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) | ||
33 | #define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; | ||
34 | |||
35 | static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) | ||
36 | { | ||
37 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; | ||
38 | |||
39 | if (mcbsp->pdata->reg_size == 2) { | ||
40 | ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; | ||
41 | __raw_writew((u16)val, addr); | ||
42 | } else { | ||
43 | ((u32 *)mcbsp->reg_cache)[reg] = val; | ||
44 | __raw_writel(val, addr); | ||
45 | } | ||
46 | } | ||
47 | |||
48 | static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) | ||
49 | { | ||
50 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; | ||
51 | |||
52 | if (mcbsp->pdata->reg_size == 2) { | ||
53 | return !from_cache ? __raw_readw(addr) : | ||
54 | ((u16 *)mcbsp->reg_cache)[reg]; | ||
55 | } else { | ||
56 | return !from_cache ? __raw_readl(addr) : | ||
57 | ((u32 *)mcbsp->reg_cache)[reg]; | ||
58 | } | ||
59 | } | ||
60 | |||
61 | static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) | ||
62 | { | ||
63 | __raw_writel(val, mcbsp->st_data->io_base_st + reg); | ||
64 | } | ||
65 | |||
66 | static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) | ||
67 | { | ||
68 | return __raw_readl(mcbsp->st_data->io_base_st + reg); | ||
69 | } | ||
70 | |||
71 | #define MCBSP_READ(mcbsp, reg) \ | ||
72 | omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0) | ||
73 | #define MCBSP_WRITE(mcbsp, reg, val) \ | ||
74 | omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val) | ||
75 | #define MCBSP_READ_CACHE(mcbsp, reg) \ | ||
76 | omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1) | ||
77 | |||
78 | #define MCBSP_ST_READ(mcbsp, reg) \ | ||
79 | omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg) | ||
80 | #define MCBSP_ST_WRITE(mcbsp, reg, val) \ | ||
81 | omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val) | ||
82 | |||
83 | static void omap_mcbsp_dump_reg(u8 id) | ||
84 | { | ||
85 | struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); | ||
86 | |||
87 | dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); | ||
88 | dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", | ||
89 | MCBSP_READ(mcbsp, DRR2)); | ||
90 | dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", | ||
91 | MCBSP_READ(mcbsp, DRR1)); | ||
92 | dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", | ||
93 | MCBSP_READ(mcbsp, DXR2)); | ||
94 | dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", | ||
95 | MCBSP_READ(mcbsp, DXR1)); | ||
96 | dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", | ||
97 | MCBSP_READ(mcbsp, SPCR2)); | ||
98 | dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", | ||
99 | MCBSP_READ(mcbsp, SPCR1)); | ||
100 | dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", | ||
101 | MCBSP_READ(mcbsp, RCR2)); | ||
102 | dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", | ||
103 | MCBSP_READ(mcbsp, RCR1)); | ||
104 | dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", | ||
105 | MCBSP_READ(mcbsp, XCR2)); | ||
106 | dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", | ||
107 | MCBSP_READ(mcbsp, XCR1)); | ||
108 | dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", | ||
109 | MCBSP_READ(mcbsp, SRGR2)); | ||
110 | dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", | ||
111 | MCBSP_READ(mcbsp, SRGR1)); | ||
112 | dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", | ||
113 | MCBSP_READ(mcbsp, PCR0)); | ||
114 | dev_dbg(mcbsp->dev, "***********************\n"); | ||
115 | } | ||
116 | |||
117 | static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) | ||
118 | { | ||
119 | struct omap_mcbsp *mcbsp_tx = dev_id; | ||
120 | u16 irqst_spcr2; | ||
121 | |||
122 | irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2); | ||
123 | dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2); | ||
124 | |||
125 | if (irqst_spcr2 & XSYNC_ERR) { | ||
126 | dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", | ||
127 | irqst_spcr2); | ||
128 | /* Writing zero to XSYNC_ERR clears the IRQ */ | ||
129 | MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); | ||
130 | } | ||
131 | |||
132 | return IRQ_HANDLED; | ||
133 | } | ||
134 | |||
135 | static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) | ||
136 | { | ||
137 | struct omap_mcbsp *mcbsp_rx = dev_id; | ||
138 | u16 irqst_spcr1; | ||
139 | |||
140 | irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1); | ||
141 | dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1); | ||
142 | |||
143 | if (irqst_spcr1 & RSYNC_ERR) { | ||
144 | dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", | ||
145 | irqst_spcr1); | ||
146 | /* Writing zero to RSYNC_ERR clears the IRQ */ | ||
147 | MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); | ||
148 | } | ||
149 | |||
150 | return IRQ_HANDLED; | ||
151 | } | ||
152 | |||
153 | /* | ||
154 | * omap_mcbsp_config simply write a config to the | ||
155 | * appropriate McBSP. | ||
156 | * You either call this function or set the McBSP registers | ||
157 | * by yourself before calling omap_mcbsp_start(). | ||
158 | */ | ||
159 | void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) | ||
160 | { | ||
161 | struct omap_mcbsp *mcbsp; | ||
162 | |||
163 | if (!omap_mcbsp_check_valid_id(id)) { | ||
164 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
165 | return; | ||
166 | } | ||
167 | mcbsp = id_to_mcbsp_ptr(id); | ||
168 | |||
169 | dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", | ||
170 | mcbsp->id, mcbsp->phys_base); | ||
171 | |||
172 | /* We write the given config */ | ||
173 | MCBSP_WRITE(mcbsp, SPCR2, config->spcr2); | ||
174 | MCBSP_WRITE(mcbsp, SPCR1, config->spcr1); | ||
175 | MCBSP_WRITE(mcbsp, RCR2, config->rcr2); | ||
176 | MCBSP_WRITE(mcbsp, RCR1, config->rcr1); | ||
177 | MCBSP_WRITE(mcbsp, XCR2, config->xcr2); | ||
178 | MCBSP_WRITE(mcbsp, XCR1, config->xcr1); | ||
179 | MCBSP_WRITE(mcbsp, SRGR2, config->srgr2); | ||
180 | MCBSP_WRITE(mcbsp, SRGR1, config->srgr1); | ||
181 | MCBSP_WRITE(mcbsp, MCR2, config->mcr2); | ||
182 | MCBSP_WRITE(mcbsp, MCR1, config->mcr1); | ||
183 | MCBSP_WRITE(mcbsp, PCR0, config->pcr0); | ||
184 | if (mcbsp->pdata->has_ccr) { | ||
185 | MCBSP_WRITE(mcbsp, XCCR, config->xccr); | ||
186 | MCBSP_WRITE(mcbsp, RCCR, config->rccr); | ||
187 | } | ||
188 | } | ||
189 | EXPORT_SYMBOL(omap_mcbsp_config); | ||
190 | |||
191 | /** | ||
192 | * omap_mcbsp_dma_params - returns the dma channel number | ||
193 | * @id - mcbsp id | ||
194 | * @stream - indicates the direction of data flow (rx or tx) | ||
195 | * | ||
196 | * Returns the dma channel number for the rx channel or tx channel | ||
197 | * based on the value of @stream for the requested mcbsp given by @id | ||
198 | */ | ||
199 | int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) | ||
200 | { | ||
201 | struct omap_mcbsp *mcbsp; | ||
202 | |||
203 | if (!omap_mcbsp_check_valid_id(id)) { | ||
204 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
205 | return -ENODEV; | ||
206 | } | ||
207 | mcbsp = id_to_mcbsp_ptr(id); | ||
208 | |||
209 | if (stream) | ||
210 | return mcbsp->dma_rx_sync; | ||
211 | else | ||
212 | return mcbsp->dma_tx_sync; | ||
213 | } | ||
214 | EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); | ||
215 | |||
216 | /** | ||
217 | * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register | ||
218 | * @id - mcbsp id | ||
219 | * @stream - indicates the direction of data flow (rx or tx) | ||
220 | * | ||
221 | * Returns the address of mcbsp data transmit register or data receive register | ||
222 | * to be used by DMA for transferring/receiving data based on the value of | ||
223 | * @stream for the requested mcbsp given by @id | ||
224 | */ | ||
225 | int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) | ||
226 | { | ||
227 | struct omap_mcbsp *mcbsp; | ||
228 | int data_reg; | ||
229 | |||
230 | if (!omap_mcbsp_check_valid_id(id)) { | ||
231 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
232 | return -ENODEV; | ||
233 | } | ||
234 | mcbsp = id_to_mcbsp_ptr(id); | ||
235 | |||
236 | if (mcbsp->pdata->reg_size == 2) { | ||
237 | if (stream) | ||
238 | data_reg = OMAP_MCBSP_REG_DRR1; | ||
239 | else | ||
240 | data_reg = OMAP_MCBSP_REG_DXR1; | ||
241 | } else { | ||
242 | if (stream) | ||
243 | data_reg = OMAP_MCBSP_REG_DRR; | ||
244 | else | ||
245 | data_reg = OMAP_MCBSP_REG_DXR; | ||
246 | } | ||
247 | |||
248 | return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; | ||
249 | } | ||
250 | EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); | ||
251 | |||
252 | static void omap_st_on(struct omap_mcbsp *mcbsp) | ||
253 | { | ||
254 | unsigned int w; | ||
255 | |||
256 | if (mcbsp->pdata->enable_st_clock) | ||
257 | mcbsp->pdata->enable_st_clock(mcbsp->id, 1); | ||
258 | |||
259 | /* Enable McBSP Sidetone */ | ||
260 | w = MCBSP_READ(mcbsp, SSELCR); | ||
261 | MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN); | ||
262 | |||
263 | /* Enable Sidetone from Sidetone Core */ | ||
264 | w = MCBSP_ST_READ(mcbsp, SSELCR); | ||
265 | MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN); | ||
266 | } | ||
267 | |||
268 | static void omap_st_off(struct omap_mcbsp *mcbsp) | ||
269 | { | ||
270 | unsigned int w; | ||
271 | |||
272 | w = MCBSP_ST_READ(mcbsp, SSELCR); | ||
273 | MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN)); | ||
274 | |||
275 | w = MCBSP_READ(mcbsp, SSELCR); | ||
276 | MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN)); | ||
277 | |||
278 | if (mcbsp->pdata->enable_st_clock) | ||
279 | mcbsp->pdata->enable_st_clock(mcbsp->id, 0); | ||
280 | } | ||
281 | |||
282 | static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) | ||
283 | { | ||
284 | u16 val, i; | ||
285 | |||
286 | val = MCBSP_ST_READ(mcbsp, SSELCR); | ||
287 | |||
288 | if (val & ST_COEFFWREN) | ||
289 | MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); | ||
290 | |||
291 | MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN); | ||
292 | |||
293 | for (i = 0; i < 128; i++) | ||
294 | MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]); | ||
295 | |||
296 | i = 0; | ||
297 | |||
298 | val = MCBSP_ST_READ(mcbsp, SSELCR); | ||
299 | while (!(val & ST_COEFFWRDONE) && (++i < 1000)) | ||
300 | val = MCBSP_ST_READ(mcbsp, SSELCR); | ||
301 | |||
302 | MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); | ||
303 | |||
304 | if (i == 1000) | ||
305 | dev_err(mcbsp->dev, "McBSP FIR load error!\n"); | ||
306 | } | ||
307 | |||
308 | static void omap_st_chgain(struct omap_mcbsp *mcbsp) | ||
309 | { | ||
310 | u16 w; | ||
311 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
312 | |||
313 | w = MCBSP_ST_READ(mcbsp, SSELCR); | ||
314 | |||
315 | MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \ | ||
316 | ST_CH1GAIN(st_data->ch1gain)); | ||
317 | } | ||
318 | |||
319 | int omap_st_set_chgain(unsigned int id, int channel, s16 chgain) | ||
320 | { | ||
321 | struct omap_mcbsp *mcbsp; | ||
322 | struct omap_mcbsp_st_data *st_data; | ||
323 | int ret = 0; | ||
324 | |||
325 | if (!omap_mcbsp_check_valid_id(id)) { | ||
326 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
327 | return -ENODEV; | ||
328 | } | ||
329 | |||
330 | mcbsp = id_to_mcbsp_ptr(id); | ||
331 | st_data = mcbsp->st_data; | ||
332 | |||
333 | if (!st_data) | ||
334 | return -ENOENT; | ||
335 | |||
336 | spin_lock_irq(&mcbsp->lock); | ||
337 | if (channel == 0) | ||
338 | st_data->ch0gain = chgain; | ||
339 | else if (channel == 1) | ||
340 | st_data->ch1gain = chgain; | ||
341 | else | ||
342 | ret = -EINVAL; | ||
343 | |||
344 | if (st_data->enabled) | ||
345 | omap_st_chgain(mcbsp); | ||
346 | spin_unlock_irq(&mcbsp->lock); | ||
347 | |||
348 | return ret; | ||
349 | } | ||
350 | EXPORT_SYMBOL(omap_st_set_chgain); | ||
351 | |||
352 | int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain) | ||
353 | { | ||
354 | struct omap_mcbsp *mcbsp; | ||
355 | struct omap_mcbsp_st_data *st_data; | ||
356 | int ret = 0; | ||
357 | |||
358 | if (!omap_mcbsp_check_valid_id(id)) { | ||
359 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
360 | return -ENODEV; | ||
361 | } | ||
362 | |||
363 | mcbsp = id_to_mcbsp_ptr(id); | ||
364 | st_data = mcbsp->st_data; | ||
365 | |||
366 | if (!st_data) | ||
367 | return -ENOENT; | ||
368 | |||
369 | spin_lock_irq(&mcbsp->lock); | ||
370 | if (channel == 0) | ||
371 | *chgain = st_data->ch0gain; | ||
372 | else if (channel == 1) | ||
373 | *chgain = st_data->ch1gain; | ||
374 | else | ||
375 | ret = -EINVAL; | ||
376 | spin_unlock_irq(&mcbsp->lock); | ||
377 | |||
378 | return ret; | ||
379 | } | ||
380 | EXPORT_SYMBOL(omap_st_get_chgain); | ||
381 | |||
382 | static int omap_st_start(struct omap_mcbsp *mcbsp) | ||
383 | { | ||
384 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
385 | |||
386 | if (st_data && st_data->enabled && !st_data->running) { | ||
387 | omap_st_fir_write(mcbsp, st_data->taps); | ||
388 | omap_st_chgain(mcbsp); | ||
389 | |||
390 | if (!mcbsp->free) { | ||
391 | omap_st_on(mcbsp); | ||
392 | st_data->running = 1; | ||
393 | } | ||
394 | } | ||
395 | |||
396 | return 0; | ||
397 | } | ||
398 | |||
399 | int omap_st_enable(unsigned int id) | ||
400 | { | ||
401 | struct omap_mcbsp *mcbsp; | ||
402 | struct omap_mcbsp_st_data *st_data; | ||
403 | |||
404 | if (!omap_mcbsp_check_valid_id(id)) { | ||
405 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
406 | return -ENODEV; | ||
407 | } | ||
408 | |||
409 | mcbsp = id_to_mcbsp_ptr(id); | ||
410 | st_data = mcbsp->st_data; | ||
411 | |||
412 | if (!st_data) | ||
413 | return -ENODEV; | ||
414 | |||
415 | spin_lock_irq(&mcbsp->lock); | ||
416 | st_data->enabled = 1; | ||
417 | omap_st_start(mcbsp); | ||
418 | spin_unlock_irq(&mcbsp->lock); | ||
419 | |||
420 | return 0; | ||
421 | } | ||
422 | EXPORT_SYMBOL(omap_st_enable); | ||
423 | |||
424 | static int omap_st_stop(struct omap_mcbsp *mcbsp) | ||
425 | { | ||
426 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
427 | |||
428 | if (st_data && st_data->running) { | ||
429 | if (!mcbsp->free) { | ||
430 | omap_st_off(mcbsp); | ||
431 | st_data->running = 0; | ||
432 | } | ||
433 | } | ||
434 | |||
435 | return 0; | ||
436 | } | ||
437 | |||
438 | int omap_st_disable(unsigned int id) | ||
439 | { | ||
440 | struct omap_mcbsp *mcbsp; | ||
441 | struct omap_mcbsp_st_data *st_data; | ||
442 | int ret = 0; | ||
443 | |||
444 | if (!omap_mcbsp_check_valid_id(id)) { | ||
445 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
446 | return -ENODEV; | ||
447 | } | ||
448 | |||
449 | mcbsp = id_to_mcbsp_ptr(id); | ||
450 | st_data = mcbsp->st_data; | ||
451 | |||
452 | if (!st_data) | ||
453 | return -ENODEV; | ||
454 | |||
455 | spin_lock_irq(&mcbsp->lock); | ||
456 | omap_st_stop(mcbsp); | ||
457 | st_data->enabled = 0; | ||
458 | spin_unlock_irq(&mcbsp->lock); | ||
459 | |||
460 | return ret; | ||
461 | } | ||
462 | EXPORT_SYMBOL(omap_st_disable); | ||
463 | |||
464 | int omap_st_is_enabled(unsigned int id) | ||
465 | { | ||
466 | struct omap_mcbsp *mcbsp; | ||
467 | struct omap_mcbsp_st_data *st_data; | ||
468 | |||
469 | if (!omap_mcbsp_check_valid_id(id)) { | ||
470 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
471 | return -ENODEV; | ||
472 | } | ||
473 | |||
474 | mcbsp = id_to_mcbsp_ptr(id); | ||
475 | st_data = mcbsp->st_data; | ||
476 | |||
477 | if (!st_data) | ||
478 | return -ENODEV; | ||
479 | |||
480 | |||
481 | return st_data->enabled; | ||
482 | } | ||
483 | EXPORT_SYMBOL(omap_st_is_enabled); | ||
484 | |||
485 | /* | ||
486 | * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. | ||
487 | * The threshold parameter is 1 based, and it is converted (threshold - 1) | ||
488 | * for the THRSH2 register. | ||
489 | */ | ||
490 | void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) | ||
491 | { | ||
492 | struct omap_mcbsp *mcbsp; | ||
493 | |||
494 | if (!omap_mcbsp_check_valid_id(id)) { | ||
495 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
496 | return; | ||
497 | } | ||
498 | mcbsp = id_to_mcbsp_ptr(id); | ||
499 | if (mcbsp->pdata->buffer_size == 0) | ||
500 | return; | ||
501 | |||
502 | if (threshold && threshold <= mcbsp->max_tx_thres) | ||
503 | MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); | ||
504 | } | ||
505 | EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); | ||
506 | |||
507 | /* | ||
508 | * omap_mcbsp_set_rx_threshold configures the receive threshold in words. | ||
509 | * The threshold parameter is 1 based, and it is converted (threshold - 1) | ||
510 | * for the THRSH1 register. | ||
511 | */ | ||
512 | void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) | ||
513 | { | ||
514 | struct omap_mcbsp *mcbsp; | ||
515 | |||
516 | if (!omap_mcbsp_check_valid_id(id)) { | ||
517 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
518 | return; | ||
519 | } | ||
520 | mcbsp = id_to_mcbsp_ptr(id); | ||
521 | if (mcbsp->pdata->buffer_size == 0) | ||
522 | return; | ||
523 | |||
524 | if (threshold && threshold <= mcbsp->max_rx_thres) | ||
525 | MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); | ||
526 | } | ||
527 | EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); | ||
528 | |||
529 | /* | ||
530 | * omap_mcbsp_get_max_tx_thres just return the current configured | ||
531 | * maximum threshold for transmission | ||
532 | */ | ||
533 | u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) | ||
534 | { | ||
535 | struct omap_mcbsp *mcbsp; | ||
536 | |||
537 | if (!omap_mcbsp_check_valid_id(id)) { | ||
538 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
539 | return -ENODEV; | ||
540 | } | ||
541 | mcbsp = id_to_mcbsp_ptr(id); | ||
542 | |||
543 | return mcbsp->max_tx_thres; | ||
544 | } | ||
545 | EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold); | ||
546 | |||
547 | /* | ||
548 | * omap_mcbsp_get_max_rx_thres just return the current configured | ||
549 | * maximum threshold for reception | ||
550 | */ | ||
551 | u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) | ||
552 | { | ||
553 | struct omap_mcbsp *mcbsp; | ||
554 | |||
555 | if (!omap_mcbsp_check_valid_id(id)) { | ||
556 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
557 | return -ENODEV; | ||
558 | } | ||
559 | mcbsp = id_to_mcbsp_ptr(id); | ||
560 | |||
561 | return mcbsp->max_rx_thres; | ||
562 | } | ||
563 | EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); | ||
564 | |||
565 | u16 omap_mcbsp_get_fifo_size(unsigned int id) | ||
566 | { | ||
567 | struct omap_mcbsp *mcbsp; | ||
568 | |||
569 | if (!omap_mcbsp_check_valid_id(id)) { | ||
570 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
571 | return -ENODEV; | ||
572 | } | ||
573 | mcbsp = id_to_mcbsp_ptr(id); | ||
574 | |||
575 | return mcbsp->pdata->buffer_size; | ||
576 | } | ||
577 | EXPORT_SYMBOL(omap_mcbsp_get_fifo_size); | ||
578 | |||
579 | /* | ||
580 | * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO | ||
581 | */ | ||
582 | u16 omap_mcbsp_get_tx_delay(unsigned int id) | ||
583 | { | ||
584 | struct omap_mcbsp *mcbsp; | ||
585 | u16 buffstat; | ||
586 | |||
587 | if (!omap_mcbsp_check_valid_id(id)) { | ||
588 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
589 | return -ENODEV; | ||
590 | } | ||
591 | mcbsp = id_to_mcbsp_ptr(id); | ||
592 | if (mcbsp->pdata->buffer_size == 0) | ||
593 | return 0; | ||
594 | |||
595 | /* Returns the number of free locations in the buffer */ | ||
596 | buffstat = MCBSP_READ(mcbsp, XBUFFSTAT); | ||
597 | |||
598 | /* Number of slots are different in McBSP ports */ | ||
599 | return mcbsp->pdata->buffer_size - buffstat; | ||
600 | } | ||
601 | EXPORT_SYMBOL(omap_mcbsp_get_tx_delay); | ||
602 | |||
603 | /* | ||
604 | * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO | ||
605 | * to reach the threshold value (when the DMA will be triggered to read it) | ||
606 | */ | ||
607 | u16 omap_mcbsp_get_rx_delay(unsigned int id) | ||
608 | { | ||
609 | struct omap_mcbsp *mcbsp; | ||
610 | u16 buffstat, threshold; | ||
611 | |||
612 | if (!omap_mcbsp_check_valid_id(id)) { | ||
613 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
614 | return -ENODEV; | ||
615 | } | ||
616 | mcbsp = id_to_mcbsp_ptr(id); | ||
617 | if (mcbsp->pdata->buffer_size == 0) | ||
618 | return 0; | ||
619 | |||
620 | /* Returns the number of used locations in the buffer */ | ||
621 | buffstat = MCBSP_READ(mcbsp, RBUFFSTAT); | ||
622 | /* RX threshold */ | ||
623 | threshold = MCBSP_READ(mcbsp, THRSH1); | ||
624 | |||
625 | /* Return the number of location till we reach the threshold limit */ | ||
626 | if (threshold <= buffstat) | ||
627 | return 0; | ||
628 | else | ||
629 | return threshold - buffstat; | ||
630 | } | ||
631 | EXPORT_SYMBOL(omap_mcbsp_get_rx_delay); | ||
632 | |||
633 | /* | ||
634 | * omap_mcbsp_get_dma_op_mode just return the current configured | ||
635 | * operating mode for the mcbsp channel | ||
636 | */ | ||
637 | int omap_mcbsp_get_dma_op_mode(unsigned int id) | ||
638 | { | ||
639 | struct omap_mcbsp *mcbsp; | ||
640 | int dma_op_mode; | ||
641 | |||
642 | if (!omap_mcbsp_check_valid_id(id)) { | ||
643 | printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1); | ||
644 | return -ENODEV; | ||
645 | } | ||
646 | mcbsp = id_to_mcbsp_ptr(id); | ||
647 | |||
648 | dma_op_mode = mcbsp->dma_op_mode; | ||
649 | |||
650 | return dma_op_mode; | ||
651 | } | ||
652 | EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); | ||
653 | |||
654 | int omap_mcbsp_request(unsigned int id) | ||
655 | { | ||
656 | struct omap_mcbsp *mcbsp; | ||
657 | void *reg_cache; | ||
658 | int err; | ||
659 | |||
660 | if (!omap_mcbsp_check_valid_id(id)) { | ||
661 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
662 | return -ENODEV; | ||
663 | } | ||
664 | mcbsp = id_to_mcbsp_ptr(id); | ||
665 | |||
666 | reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); | ||
667 | if (!reg_cache) { | ||
668 | return -ENOMEM; | ||
669 | } | ||
670 | |||
671 | spin_lock(&mcbsp->lock); | ||
672 | if (!mcbsp->free) { | ||
673 | dev_err(mcbsp->dev, "McBSP%d is currently in use\n", | ||
674 | mcbsp->id); | ||
675 | err = -EBUSY; | ||
676 | goto err_kfree; | ||
677 | } | ||
678 | |||
679 | mcbsp->free = false; | ||
680 | mcbsp->reg_cache = reg_cache; | ||
681 | spin_unlock(&mcbsp->lock); | ||
682 | |||
683 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) | ||
684 | mcbsp->pdata->ops->request(id); | ||
685 | |||
686 | pm_runtime_get_sync(mcbsp->dev); | ||
687 | |||
688 | /* Enable wakeup behavior */ | ||
689 | if (mcbsp->pdata->has_wakeup) | ||
690 | MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); | ||
691 | |||
692 | /* | ||
693 | * Make sure that transmitter, receiver and sample-rate generator are | ||
694 | * not running before activating IRQs. | ||
695 | */ | ||
696 | MCBSP_WRITE(mcbsp, SPCR1, 0); | ||
697 | MCBSP_WRITE(mcbsp, SPCR2, 0); | ||
698 | |||
699 | err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, | ||
700 | 0, "McBSP", (void *)mcbsp); | ||
701 | if (err != 0) { | ||
702 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | ||
703 | "for McBSP%d\n", mcbsp->tx_irq, | ||
704 | mcbsp->id); | ||
705 | goto err_clk_disable; | ||
706 | } | ||
707 | |||
708 | if (mcbsp->rx_irq) { | ||
709 | err = request_irq(mcbsp->rx_irq, | ||
710 | omap_mcbsp_rx_irq_handler, | ||
711 | 0, "McBSP", (void *)mcbsp); | ||
712 | if (err != 0) { | ||
713 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | ||
714 | "for McBSP%d\n", mcbsp->rx_irq, | ||
715 | mcbsp->id); | ||
716 | goto err_free_irq; | ||
717 | } | ||
718 | } | ||
719 | |||
720 | return 0; | ||
721 | err_free_irq: | ||
722 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
723 | err_clk_disable: | ||
724 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | ||
725 | mcbsp->pdata->ops->free(id); | ||
726 | |||
727 | /* Disable wakeup behavior */ | ||
728 | if (mcbsp->pdata->has_wakeup) | ||
729 | MCBSP_WRITE(mcbsp, WAKEUPEN, 0); | ||
730 | |||
731 | pm_runtime_put_sync(mcbsp->dev); | ||
732 | |||
733 | spin_lock(&mcbsp->lock); | ||
734 | mcbsp->free = true; | ||
735 | mcbsp->reg_cache = NULL; | ||
736 | err_kfree: | ||
737 | spin_unlock(&mcbsp->lock); | ||
738 | kfree(reg_cache); | ||
739 | |||
740 | return err; | ||
741 | } | ||
742 | EXPORT_SYMBOL(omap_mcbsp_request); | ||
743 | |||
744 | void omap_mcbsp_free(unsigned int id) | ||
745 | { | ||
746 | struct omap_mcbsp *mcbsp; | ||
747 | void *reg_cache; | ||
748 | |||
749 | if (!omap_mcbsp_check_valid_id(id)) { | ||
750 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
751 | return; | ||
752 | } | ||
753 | mcbsp = id_to_mcbsp_ptr(id); | ||
754 | |||
755 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | ||
756 | mcbsp->pdata->ops->free(id); | ||
757 | |||
758 | /* Disable wakeup behavior */ | ||
759 | if (mcbsp->pdata->has_wakeup) | ||
760 | MCBSP_WRITE(mcbsp, WAKEUPEN, 0); | ||
761 | |||
762 | pm_runtime_put_sync(mcbsp->dev); | ||
763 | |||
764 | if (mcbsp->rx_irq) | ||
765 | free_irq(mcbsp->rx_irq, (void *)mcbsp); | ||
766 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
767 | |||
768 | reg_cache = mcbsp->reg_cache; | ||
769 | |||
770 | spin_lock(&mcbsp->lock); | ||
771 | if (mcbsp->free) | ||
772 | dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id); | ||
773 | else | ||
774 | mcbsp->free = true; | ||
775 | mcbsp->reg_cache = NULL; | ||
776 | spin_unlock(&mcbsp->lock); | ||
777 | |||
778 | if (reg_cache) | ||
779 | kfree(reg_cache); | ||
780 | } | ||
781 | EXPORT_SYMBOL(omap_mcbsp_free); | ||
782 | |||
783 | /* | ||
784 | * Here we start the McBSP, by enabling transmitter, receiver or both. | ||
785 | * If no transmitter or receiver is active prior calling, then sample-rate | ||
786 | * generator and frame sync are started. | ||
787 | */ | ||
788 | void omap_mcbsp_start(unsigned int id, int tx, int rx) | ||
789 | { | ||
790 | struct omap_mcbsp *mcbsp; | ||
791 | int enable_srg = 0; | ||
792 | u16 w; | ||
793 | |||
794 | if (!omap_mcbsp_check_valid_id(id)) { | ||
795 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
796 | return; | ||
797 | } | ||
798 | mcbsp = id_to_mcbsp_ptr(id); | ||
799 | |||
800 | if (mcbsp->st_data) | ||
801 | omap_st_start(mcbsp); | ||
802 | |||
803 | /* Only enable SRG, if McBSP is master */ | ||
804 | w = MCBSP_READ_CACHE(mcbsp, PCR0); | ||
805 | if (w & (FSXM | FSRM | CLKXM | CLKRM)) | ||
806 | enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | | ||
807 | MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); | ||
808 | |||
809 | if (enable_srg) { | ||
810 | /* Start the sample generator */ | ||
811 | w = MCBSP_READ_CACHE(mcbsp, SPCR2); | ||
812 | MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6)); | ||
813 | } | ||
814 | |||
815 | /* Enable transmitter and receiver */ | ||
816 | tx &= 1; | ||
817 | w = MCBSP_READ_CACHE(mcbsp, SPCR2); | ||
818 | MCBSP_WRITE(mcbsp, SPCR2, w | tx); | ||
819 | |||
820 | rx &= 1; | ||
821 | w = MCBSP_READ_CACHE(mcbsp, SPCR1); | ||
822 | MCBSP_WRITE(mcbsp, SPCR1, w | rx); | ||
823 | |||
824 | /* | ||
825 | * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec | ||
826 | * REVISIT: 100us may give enough time for two CLKSRG, however | ||
827 | * due to some unknown PM related, clock gating etc. reason it | ||
828 | * is now at 500us. | ||
829 | */ | ||
830 | udelay(500); | ||
831 | |||
832 | if (enable_srg) { | ||
833 | /* Start frame sync */ | ||
834 | w = MCBSP_READ_CACHE(mcbsp, SPCR2); | ||
835 | MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7)); | ||
836 | } | ||
837 | |||
838 | if (mcbsp->pdata->has_ccr) { | ||
839 | /* Release the transmitter and receiver */ | ||
840 | w = MCBSP_READ_CACHE(mcbsp, XCCR); | ||
841 | w &= ~(tx ? XDISABLE : 0); | ||
842 | MCBSP_WRITE(mcbsp, XCCR, w); | ||
843 | w = MCBSP_READ_CACHE(mcbsp, RCCR); | ||
844 | w &= ~(rx ? RDISABLE : 0); | ||
845 | MCBSP_WRITE(mcbsp, RCCR, w); | ||
846 | } | ||
847 | |||
848 | /* Dump McBSP Regs */ | ||
849 | omap_mcbsp_dump_reg(id); | ||
850 | } | ||
851 | EXPORT_SYMBOL(omap_mcbsp_start); | ||
852 | |||
853 | void omap_mcbsp_stop(unsigned int id, int tx, int rx) | ||
854 | { | ||
855 | struct omap_mcbsp *mcbsp; | ||
856 | int idle; | ||
857 | u16 w; | ||
858 | |||
859 | if (!omap_mcbsp_check_valid_id(id)) { | ||
860 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
861 | return; | ||
862 | } | ||
863 | |||
864 | mcbsp = id_to_mcbsp_ptr(id); | ||
865 | |||
866 | /* Reset transmitter */ | ||
867 | tx &= 1; | ||
868 | if (mcbsp->pdata->has_ccr) { | ||
869 | w = MCBSP_READ_CACHE(mcbsp, XCCR); | ||
870 | w |= (tx ? XDISABLE : 0); | ||
871 | MCBSP_WRITE(mcbsp, XCCR, w); | ||
872 | } | ||
873 | w = MCBSP_READ_CACHE(mcbsp, SPCR2); | ||
874 | MCBSP_WRITE(mcbsp, SPCR2, w & ~tx); | ||
875 | |||
876 | /* Reset receiver */ | ||
877 | rx &= 1; | ||
878 | if (mcbsp->pdata->has_ccr) { | ||
879 | w = MCBSP_READ_CACHE(mcbsp, RCCR); | ||
880 | w |= (rx ? RDISABLE : 0); | ||
881 | MCBSP_WRITE(mcbsp, RCCR, w); | ||
882 | } | ||
883 | w = MCBSP_READ_CACHE(mcbsp, SPCR1); | ||
884 | MCBSP_WRITE(mcbsp, SPCR1, w & ~rx); | ||
885 | |||
886 | idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | | ||
887 | MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); | ||
888 | |||
889 | if (idle) { | ||
890 | /* Reset the sample rate generator */ | ||
891 | w = MCBSP_READ_CACHE(mcbsp, SPCR2); | ||
892 | MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6)); | ||
893 | } | ||
894 | |||
895 | if (mcbsp->st_data) | ||
896 | omap_st_stop(mcbsp); | ||
897 | } | ||
898 | EXPORT_SYMBOL(omap_mcbsp_stop); | ||
899 | |||
900 | int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) | ||
901 | { | ||
902 | struct omap_mcbsp *mcbsp; | ||
903 | const char *src; | ||
904 | |||
905 | if (!omap_mcbsp_check_valid_id(id)) { | ||
906 | pr_err("%s: Invalid id (%d)\n", __func__, id + 1); | ||
907 | return -EINVAL; | ||
908 | } | ||
909 | mcbsp = id_to_mcbsp_ptr(id); | ||
910 | |||
911 | if (fck_src_id == MCBSP_CLKS_PAD_SRC) | ||
912 | src = "clks_ext"; | ||
913 | else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) | ||
914 | src = "clks_fclk"; | ||
915 | else | ||
916 | return -EINVAL; | ||
917 | |||
918 | if (mcbsp->pdata->set_clk_src) | ||
919 | return mcbsp->pdata->set_clk_src(mcbsp->dev, mcbsp->fclk, src); | ||
920 | else | ||
921 | return -EINVAL; | ||
922 | } | ||
923 | EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); | ||
924 | |||
925 | void omap2_mcbsp1_mux_clkr_src(u8 mux) | ||
926 | { | ||
927 | struct omap_mcbsp *mcbsp; | ||
928 | const char *src; | ||
929 | |||
930 | if (mux == CLKR_SRC_CLKR) | ||
931 | src = "clkr"; | ||
932 | else if (mux == CLKR_SRC_CLKX) | ||
933 | src = "clkx"; | ||
934 | else | ||
935 | return; | ||
936 | |||
937 | mcbsp = id_to_mcbsp_ptr(0); | ||
938 | if (mcbsp->pdata->mux_signal) | ||
939 | mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src); | ||
940 | } | ||
941 | EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); | ||
942 | |||
943 | void omap2_mcbsp1_mux_fsr_src(u8 mux) | ||
944 | { | ||
945 | struct omap_mcbsp *mcbsp; | ||
946 | const char *src; | ||
947 | |||
948 | if (mux == FSR_SRC_FSR) | ||
949 | src = "fsr"; | ||
950 | else if (mux == FSR_SRC_FSX) | ||
951 | src = "fsx"; | ||
952 | else | ||
953 | return; | ||
954 | |||
955 | mcbsp = id_to_mcbsp_ptr(0); | ||
956 | if (mcbsp->pdata->mux_signal) | ||
957 | mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); | ||
958 | } | ||
959 | EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); | ||
960 | |||
961 | #define max_thres(m) (mcbsp->pdata->buffer_size) | ||
962 | #define valid_threshold(m, val) ((val) <= max_thres(m)) | ||
963 | #define THRESHOLD_PROP_BUILDER(prop) \ | ||
964 | static ssize_t prop##_show(struct device *dev, \ | ||
965 | struct device_attribute *attr, char *buf) \ | ||
966 | { \ | ||
967 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ | ||
968 | \ | ||
969 | return sprintf(buf, "%u\n", mcbsp->prop); \ | ||
970 | } \ | ||
971 | \ | ||
972 | static ssize_t prop##_store(struct device *dev, \ | ||
973 | struct device_attribute *attr, \ | ||
974 | const char *buf, size_t size) \ | ||
975 | { \ | ||
976 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ | ||
977 | unsigned long val; \ | ||
978 | int status; \ | ||
979 | \ | ||
980 | status = strict_strtoul(buf, 0, &val); \ | ||
981 | if (status) \ | ||
982 | return status; \ | ||
983 | \ | ||
984 | if (!valid_threshold(mcbsp, val)) \ | ||
985 | return -EDOM; \ | ||
986 | \ | ||
987 | mcbsp->prop = val; \ | ||
988 | return size; \ | ||
989 | } \ | ||
990 | \ | ||
991 | static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store); | ||
992 | |||
993 | THRESHOLD_PROP_BUILDER(max_tx_thres); | ||
994 | THRESHOLD_PROP_BUILDER(max_rx_thres); | ||
995 | |||
996 | static const char *dma_op_modes[] = { | ||
997 | "element", "threshold", "frame", | ||
998 | }; | ||
999 | |||
1000 | static ssize_t dma_op_mode_show(struct device *dev, | ||
1001 | struct device_attribute *attr, char *buf) | ||
1002 | { | ||
1003 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); | ||
1004 | int dma_op_mode, i = 0; | ||
1005 | ssize_t len = 0; | ||
1006 | const char * const *s; | ||
1007 | |||
1008 | dma_op_mode = mcbsp->dma_op_mode; | ||
1009 | |||
1010 | for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) { | ||
1011 | if (dma_op_mode == i) | ||
1012 | len += sprintf(buf + len, "[%s] ", *s); | ||
1013 | else | ||
1014 | len += sprintf(buf + len, "%s ", *s); | ||
1015 | } | ||
1016 | len += sprintf(buf + len, "\n"); | ||
1017 | |||
1018 | return len; | ||
1019 | } | ||
1020 | |||
1021 | static ssize_t dma_op_mode_store(struct device *dev, | ||
1022 | struct device_attribute *attr, | ||
1023 | const char *buf, size_t size) | ||
1024 | { | ||
1025 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); | ||
1026 | const char * const *s; | ||
1027 | int i = 0; | ||
1028 | |||
1029 | for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) | ||
1030 | if (sysfs_streq(buf, *s)) | ||
1031 | break; | ||
1032 | |||
1033 | if (i == ARRAY_SIZE(dma_op_modes)) | ||
1034 | return -EINVAL; | ||
1035 | |||
1036 | spin_lock_irq(&mcbsp->lock); | ||
1037 | if (!mcbsp->free) { | ||
1038 | size = -EBUSY; | ||
1039 | goto unlock; | ||
1040 | } | ||
1041 | mcbsp->dma_op_mode = i; | ||
1042 | |||
1043 | unlock: | ||
1044 | spin_unlock_irq(&mcbsp->lock); | ||
1045 | |||
1046 | return size; | ||
1047 | } | ||
1048 | |||
1049 | static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store); | ||
1050 | |||
1051 | static const struct attribute *additional_attrs[] = { | ||
1052 | &dev_attr_max_tx_thres.attr, | ||
1053 | &dev_attr_max_rx_thres.attr, | ||
1054 | &dev_attr_dma_op_mode.attr, | ||
1055 | NULL, | ||
1056 | }; | ||
1057 | |||
1058 | static const struct attribute_group additional_attr_group = { | ||
1059 | .attrs = (struct attribute **)additional_attrs, | ||
1060 | }; | ||
1061 | |||
1062 | static ssize_t st_taps_show(struct device *dev, | ||
1063 | struct device_attribute *attr, char *buf) | ||
1064 | { | ||
1065 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); | ||
1066 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
1067 | ssize_t status = 0; | ||
1068 | int i; | ||
1069 | |||
1070 | spin_lock_irq(&mcbsp->lock); | ||
1071 | for (i = 0; i < st_data->nr_taps; i++) | ||
1072 | status += sprintf(&buf[status], (i ? ", %d" : "%d"), | ||
1073 | st_data->taps[i]); | ||
1074 | if (i) | ||
1075 | status += sprintf(&buf[status], "\n"); | ||
1076 | spin_unlock_irq(&mcbsp->lock); | ||
1077 | |||
1078 | return status; | ||
1079 | } | ||
1080 | |||
1081 | static ssize_t st_taps_store(struct device *dev, | ||
1082 | struct device_attribute *attr, | ||
1083 | const char *buf, size_t size) | ||
1084 | { | ||
1085 | struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); | ||
1086 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
1087 | int val, tmp, status, i = 0; | ||
1088 | |||
1089 | spin_lock_irq(&mcbsp->lock); | ||
1090 | memset(st_data->taps, 0, sizeof(st_data->taps)); | ||
1091 | st_data->nr_taps = 0; | ||
1092 | |||
1093 | do { | ||
1094 | status = sscanf(buf, "%d%n", &val, &tmp); | ||
1095 | if (status < 0 || status == 0) { | ||
1096 | size = -EINVAL; | ||
1097 | goto out; | ||
1098 | } | ||
1099 | if (val < -32768 || val > 32767) { | ||
1100 | size = -EINVAL; | ||
1101 | goto out; | ||
1102 | } | ||
1103 | st_data->taps[i++] = val; | ||
1104 | buf += tmp; | ||
1105 | if (*buf != ',') | ||
1106 | break; | ||
1107 | buf++; | ||
1108 | } while (1); | ||
1109 | |||
1110 | st_data->nr_taps = i; | ||
1111 | |||
1112 | out: | ||
1113 | spin_unlock_irq(&mcbsp->lock); | ||
1114 | |||
1115 | return size; | ||
1116 | } | ||
1117 | |||
1118 | static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store); | ||
1119 | |||
1120 | static const struct attribute *sidetone_attrs[] = { | ||
1121 | &dev_attr_st_taps.attr, | ||
1122 | NULL, | ||
1123 | }; | ||
1124 | |||
1125 | static const struct attribute_group sidetone_attr_group = { | ||
1126 | .attrs = (struct attribute **)sidetone_attrs, | ||
1127 | }; | ||
1128 | |||
1129 | static int __devinit omap_st_add(struct omap_mcbsp *mcbsp, | ||
1130 | struct resource *res) | ||
1131 | { | ||
1132 | struct omap_mcbsp_st_data *st_data; | ||
1133 | int err; | ||
1134 | |||
1135 | st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL); | ||
1136 | if (!st_data) { | ||
1137 | err = -ENOMEM; | ||
1138 | goto err1; | ||
1139 | } | ||
1140 | |||
1141 | st_data->io_base_st = ioremap(res->start, resource_size(res)); | ||
1142 | if (!st_data->io_base_st) { | ||
1143 | err = -ENOMEM; | ||
1144 | goto err2; | ||
1145 | } | ||
1146 | |||
1147 | err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group); | ||
1148 | if (err) | ||
1149 | goto err3; | ||
1150 | |||
1151 | mcbsp->st_data = st_data; | ||
1152 | return 0; | ||
1153 | |||
1154 | err3: | ||
1155 | iounmap(st_data->io_base_st); | ||
1156 | err2: | ||
1157 | kfree(st_data); | ||
1158 | err1: | ||
1159 | return err; | ||
1160 | |||
1161 | } | ||
1162 | |||
1163 | static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) | ||
1164 | { | ||
1165 | struct omap_mcbsp_st_data *st_data = mcbsp->st_data; | ||
1166 | |||
1167 | sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); | ||
1168 | iounmap(st_data->io_base_st); | ||
1169 | kfree(st_data); | ||
1170 | } | ||
1171 | |||
1172 | /* | ||
1173 | * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. | ||
1174 | * 730 has only 2 McBSP, and both of them are MPU peripherals. | ||
1175 | */ | ||
1176 | static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | ||
1177 | { | ||
1178 | struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; | ||
1179 | struct omap_mcbsp *mcbsp; | ||
1180 | int id = pdev->id - 1; | ||
1181 | struct resource *res; | ||
1182 | int ret = 0; | ||
1183 | |||
1184 | if (!pdata) { | ||
1185 | dev_err(&pdev->dev, "McBSP device initialized without" | ||
1186 | "platform data\n"); | ||
1187 | ret = -EINVAL; | ||
1188 | goto exit; | ||
1189 | } | ||
1190 | |||
1191 | dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); | ||
1192 | |||
1193 | if (id >= omap_mcbsp_count) { | ||
1194 | dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); | ||
1195 | ret = -EINVAL; | ||
1196 | goto exit; | ||
1197 | } | ||
1198 | |||
1199 | mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); | ||
1200 | if (!mcbsp) { | ||
1201 | ret = -ENOMEM; | ||
1202 | goto exit; | ||
1203 | } | ||
1204 | |||
1205 | spin_lock_init(&mcbsp->lock); | ||
1206 | mcbsp->id = id + 1; | ||
1207 | mcbsp->free = true; | ||
1208 | |||
1209 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); | ||
1210 | if (!res) { | ||
1211 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1212 | if (!res) { | ||
1213 | dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory" | ||
1214 | "resource\n", __func__, pdev->id); | ||
1215 | ret = -ENOMEM; | ||
1216 | goto exit; | ||
1217 | } | ||
1218 | } | ||
1219 | mcbsp->phys_base = res->start; | ||
1220 | mcbsp->reg_cache_size = resource_size(res); | ||
1221 | mcbsp->io_base = ioremap(res->start, resource_size(res)); | ||
1222 | if (!mcbsp->io_base) { | ||
1223 | ret = -ENOMEM; | ||
1224 | goto err_ioremap; | ||
1225 | } | ||
1226 | |||
1227 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); | ||
1228 | if (!res) | ||
1229 | mcbsp->phys_dma_base = mcbsp->phys_base; | ||
1230 | else | ||
1231 | mcbsp->phys_dma_base = res->start; | ||
1232 | |||
1233 | mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); | ||
1234 | mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); | ||
1235 | |||
1236 | /* From OMAP4 there will be a single irq line */ | ||
1237 | if (mcbsp->tx_irq == -ENXIO) | ||
1238 | mcbsp->tx_irq = platform_get_irq(pdev, 0); | ||
1239 | |||
1240 | res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); | ||
1241 | if (!res) { | ||
1242 | dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n", | ||
1243 | __func__, pdev->id); | ||
1244 | ret = -ENODEV; | ||
1245 | goto err_res; | ||
1246 | } | ||
1247 | mcbsp->dma_rx_sync = res->start; | ||
1248 | |||
1249 | res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); | ||
1250 | if (!res) { | ||
1251 | dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n", | ||
1252 | __func__, pdev->id); | ||
1253 | ret = -ENODEV; | ||
1254 | goto err_res; | ||
1255 | } | ||
1256 | mcbsp->dma_tx_sync = res->start; | ||
1257 | |||
1258 | mcbsp->fclk = clk_get(&pdev->dev, "fck"); | ||
1259 | if (IS_ERR(mcbsp->fclk)) { | ||
1260 | ret = PTR_ERR(mcbsp->fclk); | ||
1261 | dev_err(&pdev->dev, "unable to get fck: %d\n", ret); | ||
1262 | goto err_res; | ||
1263 | } | ||
1264 | |||
1265 | mcbsp->pdata = pdata; | ||
1266 | mcbsp->dev = &pdev->dev; | ||
1267 | mcbsp_ptr[id] = mcbsp; | ||
1268 | platform_set_drvdata(pdev, mcbsp); | ||
1269 | pm_runtime_enable(mcbsp->dev); | ||
1270 | |||
1271 | mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; | ||
1272 | if (mcbsp->pdata->buffer_size) { | ||
1273 | /* | ||
1274 | * Initially configure the maximum thresholds to a safe value. | ||
1275 | * The McBSP FIFO usage with these values should not go under | ||
1276 | * 16 locations. | ||
1277 | * If the whole FIFO without safety buffer is used, than there | ||
1278 | * is a possibility that the DMA will be not able to push the | ||
1279 | * new data on time, causing channel shifts in runtime. | ||
1280 | */ | ||
1281 | mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; | ||
1282 | mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; | ||
1283 | |||
1284 | ret = sysfs_create_group(&mcbsp->dev->kobj, | ||
1285 | &additional_attr_group); | ||
1286 | if (ret) { | ||
1287 | dev_err(mcbsp->dev, | ||
1288 | "Unable to create additional controls\n"); | ||
1289 | goto err_thres; | ||
1290 | } | ||
1291 | } else { | ||
1292 | mcbsp->max_tx_thres = -EINVAL; | ||
1293 | mcbsp->max_rx_thres = -EINVAL; | ||
1294 | } | ||
1295 | |||
1296 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); | ||
1297 | if (res) { | ||
1298 | ret = omap_st_add(mcbsp, res); | ||
1299 | if (ret) { | ||
1300 | dev_err(mcbsp->dev, | ||
1301 | "Unable to create sidetone controls\n"); | ||
1302 | goto err_st; | ||
1303 | } | ||
1304 | } | ||
1305 | |||
1306 | return 0; | ||
1307 | |||
1308 | err_st: | ||
1309 | if (mcbsp->pdata->buffer_size) | ||
1310 | sysfs_remove_group(&mcbsp->dev->kobj, | ||
1311 | &additional_attr_group); | ||
1312 | err_thres: | ||
1313 | clk_put(mcbsp->fclk); | ||
1314 | err_res: | ||
1315 | iounmap(mcbsp->io_base); | ||
1316 | err_ioremap: | ||
1317 | kfree(mcbsp); | ||
1318 | exit: | ||
1319 | return ret; | ||
1320 | } | ||
1321 | |||
1322 | static int __devexit omap_mcbsp_remove(struct platform_device *pdev) | ||
1323 | { | ||
1324 | struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); | ||
1325 | |||
1326 | platform_set_drvdata(pdev, NULL); | ||
1327 | if (mcbsp) { | ||
1328 | |||
1329 | if (mcbsp->pdata && mcbsp->pdata->ops && | ||
1330 | mcbsp->pdata->ops->free) | ||
1331 | mcbsp->pdata->ops->free(mcbsp->id); | ||
1332 | |||
1333 | if (mcbsp->pdata->buffer_size) | ||
1334 | sysfs_remove_group(&mcbsp->dev->kobj, | ||
1335 | &additional_attr_group); | ||
1336 | |||
1337 | if (mcbsp->st_data) | ||
1338 | omap_st_remove(mcbsp); | ||
1339 | |||
1340 | clk_put(mcbsp->fclk); | ||
1341 | |||
1342 | iounmap(mcbsp->io_base); | ||
1343 | kfree(mcbsp); | ||
1344 | } | ||
1345 | |||
1346 | return 0; | ||
1347 | } | ||
1348 | |||
1349 | static struct platform_driver omap_mcbsp_driver = { | ||
1350 | .probe = omap_mcbsp_probe, | ||
1351 | .remove = __devexit_p(omap_mcbsp_remove), | ||
1352 | .driver = { | ||
1353 | .name = "omap-mcbsp", | ||
1354 | }, | ||
1355 | }; | ||
1356 | |||
1357 | int __init omap_mcbsp_init(void) | ||
1358 | { | ||
1359 | /* Register the McBSP driver */ | ||
1360 | return platform_driver_register(&omap_mcbsp_driver); | ||
1361 | } | ||
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 21f1fda8b661..32a09931350c 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
35 | #include <mach/regs-clock.h> | ||
35 | #include <asm/irq.h> | 36 | #include <asm/irq.h> |
36 | #include <asm/cacheflush.h> | 37 | #include <asm/cacheflush.h> |
37 | 38 | ||
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void) | |||
190 | return __raw_readl(S3C2410_GSTATUS1); | 191 | return __raw_readl(S3C2410_GSTATUS1); |
191 | } | 192 | } |
192 | 193 | ||
194 | static void s3c24xx_default_idle(void) | ||
195 | { | ||
196 | unsigned long tmp; | ||
197 | int i; | ||
198 | |||
199 | /* idle the system by using the idle mode which will wait for an | ||
200 | * interrupt to happen before restarting the system. | ||
201 | */ | ||
202 | |||
203 | /* Warning: going into idle state upsets jtag scanning */ | ||
204 | |||
205 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
206 | S3C2410_CLKCON); | ||
207 | |||
208 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
209 | for (i = 0; i < 50; i++) | ||
210 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
211 | |||
212 | /* this bit is not cleared on re-start... */ | ||
213 | |||
214 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
215 | S3C2410_CLKCON); | ||
216 | } | ||
217 | |||
193 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 218 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
194 | { | 219 | { |
220 | arm_pm_idle = s3c24xx_default_idle; | ||
221 | |||
195 | /* initialise the io descriptors we need for initialisation */ | 222 | /* initialise the io descriptors we need for initialisation */ |
196 | iotable_init(mach_desc, size); | 223 | iotable_init(mach_desc, size); |
197 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 224 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c index 68296b1fe7e5..699f93171297 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/plat-s3c24xx/pm-simtec.c | |||
@@ -52,7 +52,7 @@ static __init int pm_simtec_init(void) | |||
52 | !machine_is_aml_m5900()) | 52 | !machine_is_aml_m5900()) |
53 | return 0; | 53 | return 0; |
54 | 54 | ||
55 | printk(KERN_INFO "Simtec Board Power Manangement" COPYRIGHT "\n"); | 55 | printk(KERN_INFO "Simtec Board Power Management" COPYRIGHT "\n"); |
56 | 56 | ||
57 | gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30; | 57 | gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30; |
58 | gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28; | 58 | gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28; |
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index 8f39aa5b26ea..9a78012d6f43 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h | |||
@@ -91,6 +91,9 @@ | |||
91 | #define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13) | 91 | #define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13) |
92 | #define VIDCON1_VSTATUS_ACTIVE (0x2 << 13) | 92 | #define VIDCON1_VSTATUS_ACTIVE (0x2 << 13) |
93 | #define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13) | 93 | #define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13) |
94 | #define VIDCON1_VCLK_MASK (0x3 << 9) | ||
95 | #define VIDCON1_VCLK_HOLD (0x0 << 9) | ||
96 | #define VIDCON1_VCLK_RUN (0x1 << 9) | ||
94 | 97 | ||
95 | #define VIDCON1_INV_VCLK (1 << 7) | 98 | #define VIDCON1_INV_VCLK (1 << 7) |
96 | #define VIDCON1_INV_HSYNC (1 << 6) | 99 | #define VIDCON1_INV_HSYNC (1 << 6) |
@@ -164,15 +167,17 @@ | |||
164 | #define VIDTCON1_HSPW(_x) ((_x) << 0) | 167 | #define VIDTCON1_HSPW(_x) ((_x) << 0) |
165 | 168 | ||
166 | #define VIDTCON2 (0x18) | 169 | #define VIDTCON2 (0x18) |
170 | #define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23) | ||
167 | #define VIDTCON2_LINEVAL_MASK (0x7ff << 11) | 171 | #define VIDTCON2_LINEVAL_MASK (0x7ff << 11) |
168 | #define VIDTCON2_LINEVAL_SHIFT (11) | 172 | #define VIDTCON2_LINEVAL_SHIFT (11) |
169 | #define VIDTCON2_LINEVAL_LIMIT (0x7ff) | 173 | #define VIDTCON2_LINEVAL_LIMIT (0x7ff) |
170 | #define VIDTCON2_LINEVAL(_x) ((_x) << 11) | 174 | #define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11) |
171 | 175 | ||
176 | #define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22) | ||
172 | #define VIDTCON2_HOZVAL_MASK (0x7ff << 0) | 177 | #define VIDTCON2_HOZVAL_MASK (0x7ff << 0) |
173 | #define VIDTCON2_HOZVAL_SHIFT (0) | 178 | #define VIDTCON2_HOZVAL_SHIFT (0) |
174 | #define VIDTCON2_HOZVAL_LIMIT (0x7ff) | 179 | #define VIDTCON2_HOZVAL_LIMIT (0x7ff) |
175 | #define VIDTCON2_HOZVAL(_x) ((_x) << 0) | 180 | #define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0) |
176 | 181 | ||
177 | /* WINCONx */ | 182 | /* WINCONx */ |
178 | 183 | ||
@@ -228,25 +233,29 @@ | |||
228 | /* Local input channels (windows 0-2) */ | 233 | /* Local input channels (windows 0-2) */ |
229 | #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) | 234 | #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) |
230 | 235 | ||
236 | #define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) | ||
231 | #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) | 237 | #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) |
232 | #define VIDOSDxA_TOPLEFT_X_SHIFT (11) | 238 | #define VIDOSDxA_TOPLEFT_X_SHIFT (11) |
233 | #define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff) | 239 | #define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff) |
234 | #define VIDOSDxA_TOPLEFT_X(_x) ((_x) << 11) | 240 | #define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11) |
235 | 241 | ||
242 | #define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) | ||
236 | #define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0) | 243 | #define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0) |
237 | #define VIDOSDxA_TOPLEFT_Y_SHIFT (0) | 244 | #define VIDOSDxA_TOPLEFT_Y_SHIFT (0) |
238 | #define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff) | 245 | #define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff) |
239 | #define VIDOSDxA_TOPLEFT_Y(_x) ((_x) << 0) | 246 | #define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0) |
240 | 247 | ||
248 | #define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) | ||
241 | #define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11) | 249 | #define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11) |
242 | #define VIDOSDxB_BOTRIGHT_X_SHIFT (11) | 250 | #define VIDOSDxB_BOTRIGHT_X_SHIFT (11) |
243 | #define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff) | 251 | #define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff) |
244 | #define VIDOSDxB_BOTRIGHT_X(_x) ((_x) << 11) | 252 | #define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11) |
245 | 253 | ||
254 | #define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) | ||
246 | #define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0) | 255 | #define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0) |
247 | #define VIDOSDxB_BOTRIGHT_Y_SHIFT (0) | 256 | #define VIDOSDxB_BOTRIGHT_Y_SHIFT (0) |
248 | #define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff) | 257 | #define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff) |
249 | #define VIDOSDxB_BOTRIGHT_Y(_x) ((_x) << 0) | 258 | #define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0) |
250 | 259 | ||
251 | /* For VIDOSD[1..4]C */ | 260 | /* For VIDOSD[1..4]C */ |
252 | #define VIDISD14C_ALPHA0_R(_x) ((_x) << 20) | 261 | #define VIDISD14C_ALPHA0_R(_x) ((_x) << 20) |
@@ -278,15 +287,17 @@ | |||
278 | #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) | 287 | #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) |
279 | #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) | 288 | #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) |
280 | 289 | ||
290 | #define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27) | ||
281 | #define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13) | 291 | #define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13) |
282 | #define VIDW_BUF_SIZE_OFFSET_SHIFT (13) | 292 | #define VIDW_BUF_SIZE_OFFSET_SHIFT (13) |
283 | #define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff) | 293 | #define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff) |
284 | #define VIDW_BUF_SIZE_OFFSET(_x) ((_x) << 13) | 294 | #define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13) |
285 | 295 | ||
296 | #define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26) | ||
286 | #define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0) | 297 | #define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0) |
287 | #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0) | 298 | #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0) |
288 | #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff) | 299 | #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff) |
289 | #define VIDW_BUF_SIZE_PAGEWIDTH(_x) ((_x) << 0) | 300 | #define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0) |
290 | 301 | ||
291 | /* Interrupt controls and status */ | 302 | /* Interrupt controls and status */ |
292 | 303 | ||
@@ -384,3 +395,9 @@ | |||
384 | #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0) | 395 | #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0) |
385 | #define WPALCON_W0PAL_16BPP_565 (0x6 << 0) | 396 | #define WPALCON_W0PAL_16BPP_565 (0x6 << 0) |
386 | 397 | ||
398 | /* Blending equation control */ | ||
399 | #define BLENDCON (0x260) | ||
400 | #define BLENDCON_NEW_MASK (1 << 0) | ||
401 | #define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0) | ||
402 | #define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0) | ||
403 | |||
diff --git a/arch/arm/plat-spear/include/plat/keyboard.h b/arch/arm/plat-spear/include/plat/keyboard.h index 68b5394fc583..c16cc31ecbed 100644 --- a/arch/arm/plat-spear/include/plat/keyboard.h +++ b/arch/arm/plat-spear/include/plat/keyboard.h | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/input/matrix_keypad.h> | 15 | #include <linux/input/matrix_keypad.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | 17 | ||
18 | #define DECLARE_KEYMAP(_name) \ | 18 | #define DECLARE_9x9_KEYMAP(_name) \ |
19 | int _name[] = { \ | 19 | int _name[] = { \ |
20 | KEY(0, 0, KEY_ESC), \ | 20 | KEY(0, 0, KEY_ESC), \ |
21 | KEY(0, 1, KEY_1), \ | 21 | KEY(0, 1, KEY_1), \ |
@@ -62,24 +62,6 @@ int _name[] = { \ | |||
62 | KEY(4, 6, KEY_Z), \ | 62 | KEY(4, 6, KEY_Z), \ |
63 | KEY(4, 7, KEY_X), \ | 63 | KEY(4, 7, KEY_X), \ |
64 | KEY(4, 8, KEY_C), \ | 64 | KEY(4, 8, KEY_C), \ |
65 | KEY(4, 0, KEY_L), \ | ||
66 | KEY(4, 1, KEY_SEMICOLON), \ | ||
67 | KEY(4, 2, KEY_APOSTROPHE), \ | ||
68 | KEY(4, 3, KEY_GRAVE), \ | ||
69 | KEY(4, 4, KEY_LEFTSHIFT), \ | ||
70 | KEY(4, 5, KEY_BACKSLASH), \ | ||
71 | KEY(4, 6, KEY_Z), \ | ||
72 | KEY(4, 7, KEY_X), \ | ||
73 | KEY(4, 8, KEY_C), \ | ||
74 | KEY(4, 0, KEY_L), \ | ||
75 | KEY(4, 1, KEY_SEMICOLON), \ | ||
76 | KEY(4, 2, KEY_APOSTROPHE), \ | ||
77 | KEY(4, 3, KEY_GRAVE), \ | ||
78 | KEY(4, 4, KEY_LEFTSHIFT), \ | ||
79 | KEY(4, 5, KEY_BACKSLASH), \ | ||
80 | KEY(4, 6, KEY_Z), \ | ||
81 | KEY(4, 7, KEY_X), \ | ||
82 | KEY(4, 8, KEY_C), \ | ||
83 | KEY(5, 0, KEY_V), \ | 65 | KEY(5, 0, KEY_V), \ |
84 | KEY(5, 1, KEY_B), \ | 66 | KEY(5, 1, KEY_B), \ |
85 | KEY(5, 2, KEY_N), \ | 67 | KEY(5, 2, KEY_N), \ |
@@ -118,10 +100,55 @@ int _name[] = { \ | |||
118 | KEY(8, 8, KEY_KP0), \ | 100 | KEY(8, 8, KEY_KP0), \ |
119 | } | 101 | } |
120 | 102 | ||
103 | #define DECLARE_6x6_KEYMAP(_name) \ | ||
104 | int _name[] = { \ | ||
105 | KEY(0, 0, KEY_RESERVED), \ | ||
106 | KEY(0, 1, KEY_1), \ | ||
107 | KEY(0, 2, KEY_2), \ | ||
108 | KEY(0, 3, KEY_3), \ | ||
109 | KEY(0, 4, KEY_4), \ | ||
110 | KEY(0, 5, KEY_5), \ | ||
111 | KEY(1, 0, KEY_Q), \ | ||
112 | KEY(1, 1, KEY_W), \ | ||
113 | KEY(1, 2, KEY_E), \ | ||
114 | KEY(1, 3, KEY_R), \ | ||
115 | KEY(1, 4, KEY_T), \ | ||
116 | KEY(1, 5, KEY_Y), \ | ||
117 | KEY(2, 0, KEY_D), \ | ||
118 | KEY(2, 1, KEY_F), \ | ||
119 | KEY(2, 2, KEY_G), \ | ||
120 | KEY(2, 3, KEY_H), \ | ||
121 | KEY(2, 4, KEY_J), \ | ||
122 | KEY(2, 5, KEY_K), \ | ||
123 | KEY(3, 0, KEY_B), \ | ||
124 | KEY(3, 1, KEY_N), \ | ||
125 | KEY(3, 2, KEY_M), \ | ||
126 | KEY(3, 3, KEY_COMMA), \ | ||
127 | KEY(3, 4, KEY_DOT), \ | ||
128 | KEY(3, 5, KEY_SLASH), \ | ||
129 | KEY(4, 0, KEY_F6), \ | ||
130 | KEY(4, 1, KEY_F7), \ | ||
131 | KEY(4, 2, KEY_F8), \ | ||
132 | KEY(4, 3, KEY_F9), \ | ||
133 | KEY(4, 4, KEY_F10), \ | ||
134 | KEY(4, 5, KEY_NUMLOCK), \ | ||
135 | KEY(5, 0, KEY_KP2), \ | ||
136 | KEY(5, 1, KEY_KP3), \ | ||
137 | KEY(5, 2, KEY_KP0), \ | ||
138 | KEY(5, 3, KEY_KPDOT), \ | ||
139 | KEY(5, 4, KEY_RO), \ | ||
140 | KEY(5, 5, KEY_ZENKAKUHANKAKU), \ | ||
141 | } | ||
142 | |||
143 | #define KEYPAD_9x9 0 | ||
144 | #define KEYPAD_6x6 1 | ||
145 | #define KEYPAD_2x2 2 | ||
146 | |||
121 | /** | 147 | /** |
122 | * struct kbd_platform_data - spear keyboard platform data | 148 | * struct kbd_platform_data - spear keyboard platform data |
123 | * keymap: pointer to keymap data (table and size) | 149 | * keymap: pointer to keymap data (table and size) |
124 | * rep: enables key autorepeat | 150 | * rep: enables key autorepeat |
151 | * mode: choose keyboard support(9x9, 6x6, 2x2) | ||
125 | * | 152 | * |
126 | * This structure is supposed to be used by platform code to supply | 153 | * This structure is supposed to be used by platform code to supply |
127 | * keymaps to drivers that implement keyboards. | 154 | * keymaps to drivers that implement keyboards. |
@@ -129,6 +156,7 @@ int _name[] = { \ | |||
129 | struct kbd_platform_data { | 156 | struct kbd_platform_data { |
130 | const struct matrix_keymap_data *keymap; | 157 | const struct matrix_keymap_data *keymap; |
131 | bool rep; | 158 | bool rep; |
159 | unsigned int mode; | ||
132 | }; | 160 | }; |
133 | 161 | ||
134 | /* This function is used to set platform data field of pdev->dev */ | 162 | /* This function is used to set platform data field of pdev->dev */ |
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h deleted file mode 100644 index 86c6f83b44cc..000000000000 --- a/arch/arm/plat-spear/include/plat/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/include/plat/system.h | ||
3 | * | ||
4 | * SPEAr platform specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __PLAT_SYSTEM_H | ||
15 | #define __PLAT_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __PLAT_SYSTEM_H */ | ||