diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-davinci/psc.c | 16 |
2 files changed, 11 insertions, 9 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 8bf279a88b4b..8bc3fc256171 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -233,7 +233,7 @@ | |||
233 | #define PTCMD 0x120 | 233 | #define PTCMD 0x120 |
234 | #define PTSTAT 0x128 | 234 | #define PTSTAT 0x128 |
235 | #define PDSTAT 0x200 | 235 | #define PDSTAT 0x200 |
236 | #define PDCTL1 0x304 | 236 | #define PDCTL 0x300 |
237 | #define MDSTAT 0x800 | 237 | #define MDSTAT 0x800 |
238 | #define MDCTL 0xA00 | 238 | #define MDCTL 0xA00 |
239 | 239 | ||
@@ -246,6 +246,8 @@ | |||
246 | #define MDSTAT_STATE_MASK 0x3f | 246 | #define MDSTAT_STATE_MASK 0x3f |
247 | #define PDSTAT_STATE_MASK 0x1f | 247 | #define PDSTAT_STATE_MASK 0x1f |
248 | #define MDCTL_FORCE BIT(31) | 248 | #define MDCTL_FORCE BIT(31) |
249 | #define PDCTL_NEXT BIT(1) | ||
250 | #define PDCTL_EPCGOOD BIT(8) | ||
249 | 251 | ||
250 | #ifndef __ASSEMBLER__ | 252 | #ifndef __ASSEMBLER__ |
251 | 253 | ||
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index a0e17707c981..d7e210f4b55c 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) | |||
52 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 52 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
53 | unsigned int id, bool enable, u32 flags) | 53 | unsigned int id, bool enable, u32 flags) |
54 | { | 54 | { |
55 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; | 55 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl; |
56 | void __iomem *psc_base; | 56 | void __iomem *psc_base; |
57 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 57 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
58 | u32 next_state = PSC_STATE_ENABLE; | 58 | u32 next_state = PSC_STATE_ENABLE; |
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, | |||
79 | mdctl |= MDCTL_FORCE; | 79 | mdctl |= MDCTL_FORCE; |
80 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); | 80 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); |
81 | 81 | ||
82 | pdstat = __raw_readl(psc_base + PDSTAT); | 82 | pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain); |
83 | if ((pdstat & PDSTAT_STATE_MASK) == 0) { | 83 | if ((pdstat & PDSTAT_STATE_MASK) == 0) { |
84 | pdctl1 = __raw_readl(psc_base + PDCTL1); | 84 | pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); |
85 | pdctl1 |= 0x1; | 85 | pdctl |= PDCTL_NEXT; |
86 | __raw_writel(pdctl1, psc_base + PDCTL1); | 86 | __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); |
87 | 87 | ||
88 | ptcmd = 1 << domain; | 88 | ptcmd = 1 << domain; |
89 | __raw_writel(ptcmd, psc_base + PTCMD); | 89 | __raw_writel(ptcmd, psc_base + PTCMD); |
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, | |||
92 | epcpr = __raw_readl(psc_base + EPCPR); | 92 | epcpr = __raw_readl(psc_base + EPCPR); |
93 | } while ((((epcpr >> domain) & 1) == 0)); | 93 | } while ((((epcpr >> domain) & 1) == 0)); |
94 | 94 | ||
95 | pdctl1 = __raw_readl(psc_base + PDCTL1); | 95 | pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); |
96 | pdctl1 |= 0x100; | 96 | pdctl |= PDCTL_EPCGOOD; |
97 | __raw_writel(pdctl1, psc_base + PDCTL1); | 97 | __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); |
98 | } else { | 98 | } else { |
99 | ptcmd = 1 << domain; | 99 | ptcmd = 1 << domain; |
100 | __raw_writel(ptcmd, psc_base + PTCMD); | 100 | __raw_writel(ptcmd, psc_base + PTCMD); |