65 files changed, 2931 insertions, 814 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9759fec0b704..67f1fdbad7f9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -330,6 +330,8 @@ config ARCH_AT91
         select IRQ_DOMAIN
         select NEED_MACH_GPIO_H
         select NEED_MACH_IO_H if PCCARD
+        select PINCTRL
+        select PINCTRL_AT91 if USE_OF
         help
           This enables support for systems based on Atmel
           AT91RM9200 and AT91SAM9* processors.
@@ -587,6 +589,7 @@ config ARCH_MMP
         select GPIO_PXA
         select IRQ_DOMAIN
         select NEED_MACH_GPIO_H
+        select PINCTRL
         select PLAT_PXA
         select SPARSE_IRQ
         help
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9fa5fa0..fb5b07737ca7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1,21 +1,37 @@
 ifeq ($(CONFIG_OF),y)
 
-dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
-        at91sam9263ek.dtb \
-        at91sam9g20ek_2mmc.dtb \
-        at91sam9g20ek.dtb \
-        at91sam9g25ek.dtb \
-        at91sam9m10g45ek.dtb \
-        at91sam9n12ek.dtb \
-        ethernut5.dtb \
-        evk-pro3.dtb \
-        kizbox.dtb \
-        tny_a9260.dtb \
-        tny_a9263.dtb \
-        tny_a9g20.dtb \
-        usb_a9260.dtb \
-        usb_a9263.dtb \
-        usb_a9g20.dtb
+# Keep at91 dtb files sorted alphabetically for each SoC
+# rm9200
+dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
+# sam9260
+dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
+dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
+dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
+dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
+dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
+dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
+# sam9263
+dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
+dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
+# sam9g20
+dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
+dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb
+dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
+dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
+# sam9g45
+dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
+# sam9n12
+dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
+# sam9x5
+dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
+
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
         dove-cubox.dtb \
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
new file mode 100644
index 000000000000..74d92cd29d87
--- /dev/null
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -0,0 +1,178 @@
+/*
+ * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
+ *
+ *  Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+/dts-v1/;
+/include/ "at91sam9260.dtsi"
+
+/ {
+        model = "Somfy Animeo IP";
+        compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
+
+        aliases {
+                serial0 = &usart1;
+                serial1 = &usart2;
+                serial2 = &usart0;
+                serial3 = &dbgu;
+                serial4 = &usart3;
+                serial5 = &uart0;
+                serial6 = &uart1;
+        };
+
+        chosen {
+                linux,stdout-path = &usart2;
+        };
+
+        memory {
+                reg = <0x20000000 0x4000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <18432000>;
+                };
+        };
+
+        ahb {
+                apb {
+                        usart0: serial@fffb0000 {
+                                pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
+                                linux,rs485-enabled-at-boot-time;
+                                status = "okay";
+                        };
+
+                        usart1: serial@fffb4000 {
+                                pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
+                                linux,rs485-enabled-at-boot-time;
+                                status = "okay";
+                        };
+
+                        usart2: serial@fffb8000 {
+                                pinctrl-0 = <&pinctrl_usart2>;
+                                status = "okay";
+                        };
+
+                        macb0: ethernet@fffc4000 {
+                                pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
+                                phy-mode = "mii";
+                                status = "okay";
+                        };
+
+                        mmc0: mmc@fffa8000 {
+                                pinctrl-0 = <&pinctrl_mmc0_clk
+                                             &pinctrl_mmc0_slot1_cmd_dat0
+                                             &pinctrl_mmc0_slot1_dat1_3>;
+                                status = "okay";
+
+                                slot@1 {
+                                        reg = <1>;
+                                        bus-width = <4>;
+                                };
+                        };
+                };
+
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "soft";
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x8000>;
+                        };
+
+                        barebox@8000 {
+                                label = "barebox";
+                                reg = <0x8000 0x40000>;
+                        };
+
+                        bareboxenv@48000 {
+                                label = "bareboxenv";
+                                reg = <0x48000 0x8000>;
+                        };
+
+                        user_block@0x50000 {
+                                label = "user_block";
+                                reg = <0x50000 0xb0000>;
+                        };
+
+                        kernel@100000 {
+                                label = "kernel";
+                                reg = <0x100000 0x1b0000>;
+                        };
+
+                        root@2b0000 {
+                                label = "root";
+                                reg = <0x2b0000 0x1D50000>;
+                        };
+                };
+
+                usb0: ohci@00500000 {
+                        num-ports = <2>;
+                        atmel,vbus-gpio = <&pioB 15 1>;
+                        status = "okay";
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                power_green {
+                        label = "power_green";
+                        gpios = <&pioC 17 0>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                power_red {
+                        label = "power_red";
+                        gpios = <&pioA 2 0>;
+                };
+
+                tx_green {
+                        label = "tx_green";
+                        gpios = <&pioC 19 0>;
+                };
+
+                tx_red {
+                        label = "tx_red";
+                        gpios = <&pioC 18 0>;
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                keyswitch_in {
+                        label = "keyswitch_in";
+                        gpios = <&pioB 1 0>;
+                        linux,code = <28>;
+                        gpio-key,wakeup;
+                };
+
+                error_in {
+                        label = "error_in";
+                        gpios = <&pioB 2 0>;
+                        linux,code = <29>;
+                        gpio-key,wakeup;
+                };
+
+                btn {
+                        label = "btn";
+                        gpios = <&pioC 23 0>;
+                        linux,code = <31>;
+                        gpio-key,wakeup;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
new file mode 100644
index 000000000000..e154f242c680
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -0,0 +1,349 @@
+/*
+ * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
+ *
+ *  Copyright (C) 2011 Atmel,
+ *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
+ *                2012 Joachim Eastwood <manabian@gmail.com>
+ *
+ * Based on at91sam9260.dtsi
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        model = "Atmel AT91RM9200 family SoC";
+        compatible = "atmel,at91rm9200";
+        interrupt-parent = <&aic>;
+
+        aliases {
+                serial0 = &dbgu;
+                serial1 = &usart0;
+                serial2 = &usart1;
+                serial3 = &usart2;
+                serial4 = &usart3;
+                gpio0 = &pioA;
+                gpio1 = &pioB;
+                gpio2 = &pioC;
+                gpio3 = &pioD;
+                tcb0 = &tcb0;
+                tcb1 = &tcb1;
+        };
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm920t";
+                };
+        };
+
+        memory {
+                reg = <0x20000000 0x04000000>;
+        };
+
+        ahb {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                apb {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        aic: interrupt-controller@fffff000 {
+                                #interrupt-cells = <3>;
+                                compatible = "atmel,at91rm9200-aic";
+                                interrupt-controller;
+                                reg = <0xfffff000 0x200>;
+                                atmel,external-irqs = <25 26 27 28 29 30 31>;
+                        };
+
+                        ramc0: ramc@ffffff00 {
+                                compatible = "atmel,at91rm9200-sdramc";
+                                reg = <0xffffff00 0x100>;
+                        };
+
+                        pmc: pmc@fffffc00 {
+                                compatible = "atmel,at91rm9200-pmc";
+                                reg = <0xfffffc00 0x100>;
+                        };
+
+                        st: timer@fffffd00 {
+                                compatible = "atmel,at91rm9200-st";
+                                reg = <0xfffffd00 0x100>;
+                                interrupts = <1 4 7>;
+                        };
+
+                        tcb0: timer@fffa0000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfffa0000 0x100>;
+                                interrupts = <17 4 0 18 4 0 19 4 0>;
+                        };
+
+                        tcb1: timer@fffa4000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfffa4000 0x100>;
+                                interrupts = <20 4 0 21 4 0 22 4 0>;
+                        };
+
+                        pinctrl@fffff400 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff400 0xfffff400 0x800>;
+
+                                atmel,mux-mask = <
+                                        /*    A         B     */
+                                         0xffffffff 0xffffffff  /* pioA */
+                                         0xffffffff 0x083fffff  /* pioB */
+                                         0xffff3fff 0x00000000  /* pioC */
+                                         0x03ff87ff 0x0fffff80  /* pioD */
+                                        >;
+
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <0 30 0x1 0x0   /* PA30 periph A */
+                                                         0 31 0x1 0x1>; /* PA31 periph with pullup */
+                                        };
+                                };
+
+                                uart0 {
+                                        pinctrl_uart0: uart0-0 {
+                                                atmel,pins =
+                                                        <0 17 0x1 0x0   /* PA17 periph A */
+                                                         0 18 0x1 0x0>; /* PA18 periph A */
+                                        };
+
+                                        pinctrl_uart0_rts: uart0_rts-0 {
+                                                atmel,pins =
+                                                        <0 20 0x1 0x0>; /* PA20 periph A */
+                                        };
+
+                                        pinctrl_uart0_cts: uart0_cts-0 {
+                                                atmel,pins =
+                                                        <0 21 0x1 0x0>; /* PA21 periph A */
+                                        };
+                                };
+
+                                uart1 {
+                                        pinctrl_uart1: uart1-0 {
+                                                atmel,pins =
+                                                        <1 20 0x1 0x1   /* PB20 periph A with pullup */
+                                                         1 21 0x1 0x0>; /* PB21 periph A */
+                                        };
+
+                                        pinctrl_uart1_rts: uart1_rts-0 {
+                                                atmel,pins =
+                                                        <1 24 0x1 0x0>; /* PB24 periph A */
+                                        };
+
+                                        pinctrl_uart1_cts: uart1_cts-0 {
+                                                atmel,pins =
+                                                        <1 26 0x1 0x0>; /* PB26 periph A */
+                                        };
+
+                                        pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
+                                                atmel,pins =
+                                                        <1 19 0x1 0x0   /* PB19 periph A */
+                                                         1 25 0x1 0x0>; /* PB25 periph A */
+                                        };
+
+                                        pinctrl_uart1_dcd: uart1_dcd-0 {
+                                                atmel,pins =
+                                                        <1 23 0x1 0x0>; /* PB23 periph A */
+                                        };
+
+                                        pinctrl_uart1_ri: uart1_ri-0 {
+                                                atmel,pins =
+                                                        <1 18 0x1 0x0>; /* PB18 periph A */
+                                        };
+                                };
+
+                                uart2 {
+                                        pinctrl_uart2: uart2-0 {
+                                                atmel,pins =
+                                                        <0 22 0x1 0x0   /* PA22 periph A */
+                                                         0 23 0x1 0x1>; /* PA23 periph A with pullup */
+                                        };
+
+                                        pinctrl_uart2_rts: uart2_rts-0 {
+                                                atmel,pins =
+                                                        <0 30 0x2 0x0>; /* PA30 periph B */
+                                        };
+
+                                        pinctrl_uart2_cts: uart2_cts-0 {
+                                                atmel,pins =
+                                                        <0 31 0x2 0x0>; /* PA31 periph B */
+                                        };
+                                };
+
+                                uart3 {
+                                        pinctrl_uart3: uart3-0 {
+                                                atmel,pins =
+                                                        <0 5 0x2 0x1    /* PA5 periph B with pullup */
+                                                         0 6 0x2 0x0>;  /* PA6 periph B */
+                                        };
+
+                                        pinctrl_uart3_rts: uart3_rts-0 {
+                                                atmel,pins =
+                                                        <1 0 0x2 0x0>;  /* PB0 periph B */
+                                        };
+
+                                        pinctrl_uart3_cts: uart3_cts-0 {
+                                                atmel,pins =
+                                                        <1 1 0x2 0x0>;  /* PB1 periph B */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <2 2 0x0 0x1    /* PC2 gpio RDY pin pull_up */
+                                                         1 1 0x0 0x1>;  /* PB1 gpio CD pin pull_up */
+                                        };
+                                };
+
+                                pioA: gpio@fffff400 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff600 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff800 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioD: gpio@fffffa00 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffffa00 0x200>;
+                                        interrupts = <5 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+                        };
+
+                        dbgu: serial@fffff200 {
+                                compatible = "atmel,at91rm9200-usart";
+                                reg = <0xfffff200 0x200>;
+                                interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
+                                status = "disabled";
+                        };
+
+                        usart0: serial@fffc0000 {
+                                compatible = "atmel,at91rm9200-usart";
+                                reg = <0xfffc0000 0x200>;
+                                interrupts = <6 4 5>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart0>;
+                                status = "disabled";
+                        };
+
+                        usart1: serial@fffc4000 {
+                                compatible = "atmel,at91rm9200-usart";
+                                reg = <0xfffc4000 0x200>;
+                                interrupts = <7 4 5>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart1>;
+                                status = "disabled";
+                        };
+
+                        usart2: serial@fffc8000 {
+                                compatible = "atmel,at91rm9200-usart";
+                                reg = <0xfffc8000 0x200>;
+                                interrupts = <8 4 5>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart2>;
+                                status = "disabled";
+                        };
+
+                        usart3: serial@fffcc000 {
+                                compatible = "atmel,at91rm9200-usart";
+                                reg = <0xfffcc000 0x200>;
+                                interrupts = <23 4 5>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart3>;
+                                status = "disabled";
+                        };
+
+                        usb1: gadget@fffb0000 {
+                                compatible = "atmel,at91rm9200-udc";
+                                reg = <0xfffb0000 0x4000>;
+                                interrupts = <11 4 2>;
+                                status = "disabled";
+                        };
+                };
+
+                nand0: nand@40000000 {
+                        compatible = "atmel,at91rm9200-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x40000000 0x10000000>;
+                        atmel,nand-addr-offset = <21>;
+                        atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
+                        nand-ecc-mode = "soft";
+                        gpios = <&pioC 2 0
+                                 0
+                                 &pioB 1 0
+                                >;
+                        status = "disabled";
+                };
+
+                usb0: ohci@00300000 {
+                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+                        reg = <0x00300000 0x100000>;
+                        interrupts = <23 4 2>;
+                        status = "disabled";
+                };
+        };
+
+        i2c@0 {
+                compatible = "i2c-gpio";
+                gpios = <&pioA 23 0 /* sda */
+                         &pioA 24 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+};
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
new file mode 100644
index 000000000000..8aa48931e0a2
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -0,0 +1,79 @@
+/*
+ * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
+ *
+ *  Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com>
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+/include/ "at91rm9200.dtsi"
+
+/ {
+        model = "Atmel AT91RM9200 evaluation kit";
+        compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
+
+        memory {
+                reg = <0x20000000 0x4000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <18432000>;
+                };
+        };
+
+        ahb {
+                apb {
+                        dbgu: serial@fffff200 {
+                                status = "okay";
+                        };
+
+                        usart1: serial@fffc4000 {
+                                pinctrl-0 =
+                                                <&pinctrl_uart1
+                                                 &pinctrl_uart1_rts
+                                                 &pinctrl_uart1_cts
+                                                 &pinctrl_uart1_dtr_dsr
+                                                 &pinctrl_uart1_dcd
+                                                 &pinctrl_uart1_ri>;
+                                status = "okay";
+                        };
+
+                        usb1: gadget@fffb0000 {
+                                atmel,vbus-gpio = <&pioD 4 0>;
+                                status = "okay";
+                        };
+                };
+
+                usb0: ohci@00300000 {
+                        num-ports = <2>;
+                        status = "okay";
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                ds2 {
+                        label = "green";
+                        gpios = <&pioB 0 0x1>;
+                        linux,default-trigger = "mmc0";
+                };
+
+                ds4 {
+                        label = "yellow";
+                        gpios = <&pioB 1 0x1>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                ds6 {
+                        label = "red";
+                        gpios = <&pioB 2 0x1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index d410581a5a85..b1d3fab60e0a 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -21,8 +21,8 @@
                 serial2 = &usart1;
                 serial3 = &usart2;
                 serial4 = &usart3;
-                serial5 = &usart4;
-                serial6 = &usart5;
+                serial5 = &uart0;
+                serial6 = &uart1;
                 gpio0 = &pioA;
                 gpio1 = &pioB;
                 gpio2 = &pioC;
@@ -98,40 +98,250 @@
                                 interrupts = <26 4 0 27 4 0 28 4 0>;
                         };
 
-                        pioA: gpio@fffff400 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff400 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                        pinctrl@fffff400 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff400 0xfffff400 0x600>;
+
+                                atmel,mux-mask = <
+                                      /*    A         B     */
+                                       0xffffffff 0xffc00c3b  /* pioA */
+                                       0xffffffff 0x7fff3ccf  /* pioB */
+                                       0xffffffff 0x007fffff  /* pioC */
+                                      >;
+
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <1 14 0x1 0x0   /* PB14 periph A */
+                                                         1 15 0x1 0x1>; /* PB15 periph with pullup */
+                                        };
+                                };
 
-                        pioB: gpio@fffff600 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff600 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                usart0 {
+                                        pinctrl_usart0: usart0-0 {
+                                                atmel,pins =
+                                                        <1 4 0x1 0x0    /* PB4 periph A */
+                                                         1 5 0x1 0x0>;  /* PB5 periph A */
+                                        };
+
+                                        pinctrl_usart0_rts: usart0_rts-0 {
+                                                atmel,pins =
+                                                        <1 26 0x1 0x0>; /* PB26 periph A */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <1 27 0x1 0x0>; /* PB27 periph A */
+                                        };
+
+                                        pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
+                                                atmel,pins =
+                                                        <1 24 0x1 0x0   /* PB24 periph A */
+                                                         1 22 0x1 0x0>; /* PB22 periph A */
+                                        };
+
+                                        pinctrl_usart0_dcd: usart0_dcd-0 {
+                                                atmel,pins =
+                                                        <1 23 0x1 0x0>; /* PB23 periph A */
+                                        };
+
+                                        pinctrl_usart0_ri: usart0_ri-0 {
+                                                atmel,pins =
+                                                        <1 25 0x1 0x0>; /* PB25 periph A */
+                                        };
+                                };
 
-                        pioC: gpio@fffff800 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff800 0x100>;
-                                interrupts = <4 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                                usart1 {
+                                        pinctrl_usart1: usart1-0 {
+                                                atmel,pins =
+                                                        <2 6 0x1 0x1    /* PB6 periph A with pullup */
+                                                         2 7 0x1 0x0>;  /* PB7 periph A */
+                                        };
+
+                                        pinctrl_usart1_rts: usart1_rts-0 {
+                                                atmel,pins =
+                                                        <1 28 0x1 0x0>; /* PB28 periph A */
+                                        };
+
+                                        pinctrl_usart1_cts: usart1_cts-0 {
+                                                atmel,pins =
+                                                        <1 29 0x1 0x0>; /* PB29 periph A */
+                                        };
+                                };
+
+                                usart2 {
+                                        pinctrl_usart2: usart2-0 {
+                                                atmel,pins =
+                                                        <1 8 0x1 0x1    /* PB8 periph A with pullup */
+                                                         1 9 0x1 0x0>;  /* PB9 periph A */
+                                        };
+
+                                        pinctrl_usart2_rts: usart2_rts-0 {
+                                                atmel,pins =
+                                                        <0 4 0x1 0x0>;  /* PA4 periph A */
+                                        };
+
+                                        pinctrl_usart2_cts: usart2_cts-0 {
+                                                atmel,pins =
+                                                        <0 5 0x1 0x0>;  /* PA5 periph A */
+                                        };
+                                };
+
+                                usart3 {
+                                        pinctrl_usart3: usart3-0 {
+                                                atmel,pins =
+                                                        <2 10 0x1 0x1   /* PB10 periph A with pullup */
+                                                         2 11 0x1 0x0>; /* PB11 periph A */
+                                        };
+
+                                        pinctrl_usart3_rts: usart3_rts-0 {
+                                                atmel,pins =
+                                                        <3 8 0x2 0x0>;  /* PB8 periph B */
+                                        };
+
+                                        pinctrl_usart3_cts: usart3_cts-0 {
+                                                atmel,pins =
+                                                        <3 10 0x2 0x0>; /* PB10 periph B */
+                                        };
+                                };
+
+                                uart0 {
+                                        pinctrl_uart0: uart0-0 {
+                                                atmel,pins =
+                                                        <0 31 0x2 0x1   /* PA31 periph B with pullup */
+                                                         0 30 0x2 0x0>; /* PA30 periph B */
+                                        };
+                                };
+
+                                uart1 {
+                                        pinctrl_uart1: uart1-0 {
+                                                atmel,pins =
+                                                        <2 12 0x1 0x1   /* PB12 periph A with pullup */
+                                                         2 13 0x1 0x0>; /* PB13 periph A */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
+                                                         2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                macb {
+                                        pinctrl_macb_rmii: macb_rmii-0 {
+                                                atmel,pins =
+                                                        <0 12 0x1 0x0   /* PA12 periph A */
+                                                         0 13 0x1 0x0   /* PA13 periph A */
+                                                         0 14 0x1 0x0   /* PA14 periph A */
+                                                         0 15 0x1 0x0   /* PA15 periph A */
+                                                         0 16 0x1 0x0   /* PA16 periph A */
+                                                         0 17 0x1 0x0   /* PA17 periph A */
+                                                         0 18 0x1 0x0   /* PA18 periph A */
+                                                         0 19 0x1 0x0   /* PA19 periph A */
+                                                         0 20 0x1 0x0   /* PA20 periph A */
+                                                         0 21 0x1 0x0>; /* PA21 periph A */
+                                        };
+
+                                        pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+                                                atmel,pins =
+                                                        <0 22 0x2 0x0   /* PA22 periph B */
+                                                         0 23 0x2 0x0   /* PA23 periph B */
+                                                         0 24 0x2 0x0   /* PA24 periph B */
+                                                         0 25 0x2 0x0   /* PA25 periph B */
+                                                         0 26 0x2 0x0   /* PA26 periph B */
+                                                         0 27 0x2 0x0   /* PA27 periph B */
+                                                         0 28 0x2 0x0   /* PA28 periph B */
+                                                         0 29 0x2 0x0>; /* PA29 periph B */
+                                        };
+
+                                        pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
+                                                atmel,pins =
+                                                        <0 10 0x2 0x0   /* PA10 periph B */
+                                                         0 11 0x2 0x0   /* PA11 periph B */
+                                                         0 24 0x2 0x0   /* PA24 periph B */
+                                                         0 25 0x2 0x0   /* PA25 periph B */
+                                                         0 26 0x2 0x0   /* PA26 periph B */
+                                                         0 27 0x2 0x0   /* PA27 periph B */
+                                                         0 28 0x2 0x0   /* PA28 periph B */
+                                                         0 29 0x2 0x0>; /* PA29 periph B */
+                                        };
+                                };
+
+                                mmc0 {
+                                        pinctrl_mmc0_clk: mmc0_clk-0 {
+                                                atmel,pins =
+                                                        <0 8 0x1 0x0>;  /* PA8 periph A */
+                                        };
+
+                                        pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 7 0x1 0x1    /* PA7 periph A with pullup */
+                                                         0 6 0x1 0x1>;  /* PA6 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 9 0x1 0x1    /* PA9 periph A with pullup */
+                                                         0 10 0x1 0x1   /* PA10 periph A with pullup */
+                                                         0 11 0x1 0x1>; /* PA11 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 1 0x2 0x1    /* PA1 periph B with pullup */
+                                                         0 0 0x2 0x1>;  /* PA0 periph B with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 5 0x2 0x1    /* PA5 periph B with pullup */
+                                                         0 4 0x2 0x1    /* PA4 periph B with pullup */
+                                                         0 3 0x2 0x1>;  /* PA3 periph B with pullup */
+                                        };
+                                };
+
+                                pioA: gpio@fffff400 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff600 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff800 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
                         };
 
                         dbgu: serial@fffff200 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffff200 0x200>;
                                 interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
                                 status = "disabled";
                         };
 
@@ -141,6 +351,8 @@
                                 interrupts = <6 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart0>;
                                 status = "disabled";
                         };
 
@@ -150,6 +362,8 @@
                                 interrupts = <7 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1>;
                                 status = "disabled";
                         };
 
@@ -159,6 +373,8 @@
                                 interrupts = <8 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart2>;
                                 status = "disabled";
                         };
 
@@ -168,24 +384,30 @@
                                 interrupts = <23 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart3>;
                                 status = "disabled";
                         };
 
-                        usart4: serial@fffd4000 {
+                        uart0: serial@fffd4000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffd4000 0x200>;
                                 interrupts = <24 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart0>;
                                 status = "disabled";
                         };
 
-                        usart5: serial@fffd8000 {
+                        uart1: serial@fffd8000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffd8000 0x200>;
                                 interrupts = <25 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart1>;
                                 status = "disabled";
                         };
 
@@ -193,6 +415,8 @@
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xfffc4000 0x100>;
                                 interrupts = <21 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_macb_rmii>;
                                 status = "disabled";
                         };
 
@@ -212,6 +436,15 @@
                                 status = "disabled";
                         };
 
+                        mmc0: mmc@fffa8000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xfffa8000 0x600>;
+                                interrupts = <9 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
+
                         adc0: adc@fffe0000 {
                                 compatible = "atmel,at91sam9260-adc";
                                 reg = <0xfffe0000 0x100>;
@@ -257,6 +490,8 @@
                               >;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
                         gpios = <&pioC 13 0
                                  &pioC 14 0
                                  0
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3e6e5c1abbf3..66106eecf1ed 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -89,60 +89,243 @@
                                 reg = <0xfffffd10 0x10>;
                         };
 
-                        pioA: gpio@fffff200 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff200 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                        pinctrl@fffff200 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff200 0xfffff200 0xa00>;
 
-                        pioB: gpio@fffff400 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff400 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                atmel,mux-mask = <
+                                      /*    A         B     */
+                                       0xfffffffb 0xffffe07f  /* pioA */
+                                       0x0007ffff 0x39072fff  /* pioB */
+                                       0xffffffff 0x3ffffff8  /* pioC */
+                                       0xfffffbff 0xffffffff  /* pioD */
+                                       0xffe00fff 0xfbfcff00  /* pioE */
+                                      >;
 
-                        pioC: gpio@fffff600 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff600 0x100>;
-                                interrupts = <4 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <2 30 0x1 0x0   /* PC30 periph A */
+                                                         2 31 0x1 0x1>; /* PC31 periph with pullup */
+                                        };
+                                };
 
-                        pioD: gpio@fffff800 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff800 0x100>;
-                                interrupts = <4 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                usart0 {
+                                        pinctrl_usart0: usart0-0 {
+                                                atmel,pins =
+                                                        <0 26 0x1 0x1   /* PA26 periph A with pullup */
+                                                         0 27 0x1 0x0>; /* PA27 periph A */
+                                        };
 
-                        pioE: gpio@fffffa00 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffffa00 0x100>;
-                                interrupts = <4 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                                        pinctrl_usart0_rts: usart0_rts-0 {
+                                                atmel,pins =
+                                                        <0 28 0x1 0x0>; /* PA28 periph A */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <0 29 0x1 0x0>; /* PA29 periph A */
+                                        };
+                                };
+
+                                usart1 {
+                                        pinctrl_usart1: usart1-0 {
+                                                atmel,pins =
+                                                        <3 0 0x1 0x1    /* PD0 periph A with pullup */
+                                                         3 1 0x1 0x0>;  /* PD1 periph A */
+                                        };
+
+                                        pinctrl_usart1_rts: usart1_rts-0 {
+                                                atmel,pins =
+                                                        <3 7 0x2 0x0>;  /* PD7 periph B */
+                                        };
+
+                                        pinctrl_usart1_cts: usart1_cts-0 {
+                                                atmel,pins =
+                                                        <3 8 0x2 0x0>;  /* PD8 periph B */
+                                        };
+                                };
+
+                                usart2 {
+                                        pinctrl_usart2: usart2-0 {
+                                                atmel,pins =
+                                                        <3 2 0x1 0x1    /* PD2 periph A with pullup */
+                                                         3 3 0x1 0x0>;  /* PD3 periph A */
+                                        };
+
+                                        pinctrl_usart2_rts: usart2_rts-0 {
+                                                atmel,pins =
+                                                        <3 5 0x2 0x0>;  /* PD5 periph B */
+                                        };
+
+                                        pinctrl_usart2_cts: usart2_cts-0 {
+                                                atmel,pins =
+                                                        <4 6 0x2 0x0>;  /* PD6 periph B */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <0 22 0x0 0x1   /* PA22 gpio RDY pin pull_up*/
+                                                         3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                macb {
+                                        pinctrl_macb_rmii: macb_rmii-0 {
+                                                atmel,pins =
+                                                        <2 25 0x2 0x0   /* PC25 periph B */
+                                                         4 21 0x1 0x0   /* PE21 periph A */
+                                                         4 23 0x1 0x0   /* PE23 periph A */
+                                                         4 24 0x1 0x0   /* PE24 periph A */
+                                                         4 25 0x1 0x0   /* PE25 periph A */
+                                                         4 26 0x1 0x0   /* PE26 periph A */
+                                                         4 27 0x1 0x0   /* PE27 periph A */
+                                                         4 28 0x1 0x0   /* PE28 periph A */
+                                                         4 29 0x1 0x0   /* PE29 periph A */
+                                                         4 30 0x1 0x0>; /* PE30 periph A */
+                                        };
+
+                                        pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+                                                atmel,pins =
+                                                        <2 20 0x2 0x0   /* PC20 periph B */
+                                                         2 21 0x2 0x0   /* PC21 periph B */
+                                                         2 22 0x2 0x0   /* PC22 periph B */
+                                                         2 23 0x2 0x0   /* PC23 periph B */
+                                                         2 24 0x2 0x0   /* PC24 periph B */
+                                                         2 25 0x2 0x0   /* PC25 periph B */
+                                                         2 27 0x2 0x0   /* PC27 periph B */
+                                                         4 22 0x2 0x0>; /* PE22 periph B */
+                                        };
+                                };
+
+                                mmc0 {
+                                        pinctrl_mmc0_clk: mmc0_clk-0 {
+                                                atmel,pins =
+                                                        <0 12 0x1 0x0>; /* PA12 periph A */
+                                        };
+
+                                        pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 1 0x1 0x1    /* PA1 periph A with pullup */
+                                                         0 0 0x1 0x1>;  /* PA0 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 3 0x1 0x1    /* PA3 periph A with pullup */
+                                                         0 4 0x1 0x1    /* PA4 periph A with pullup */
+                                                         0 5 0x1 0x1>;  /* PA5 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 16 0x1 0x1   /* PA16 periph A with pullup */
+                                                         0 17 0x1 0x1>; /* PA17 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 18 0x1 0x1   /* PA18 periph A with pullup */
+                                                         0 19 0x1 0x1   /* PA19 periph A with pullup */
+                                                         0 20 0x1 0x1>; /* PA20 periph A with pullup */
+                                        };
+                                };
+
+                                mmc1 {
+                                        pinctrl_mmc1_clk: mmc1_clk-0 {
+                                                atmel,pins =
+                                                        <0 6 0x1 0x0>;  /* PA6 periph A */
+                                        };
+
+                                        pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 7 0x1 0x1    /* PA7 periph A with pullup */
+                                                         0 8 0x1 0x1>;  /* PA8 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 9 0x1 0x1    /* PA9 periph A with pullup */
+                                                         0 10 0x1 0x1   /* PA10 periph A with pullup */
+                                                         0 11 0x1 0x1>; /* PA11 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 21 0x1 0x1   /* PA21 periph A with pullup */
+                                                         0 22 0x1 0x1>; /* PA22 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 23 0x1 0x1   /* PA23 periph A with pullup */
+                                                         0 24 0x1 0x1   /* PA24 periph A with pullup */
+                                                         0 25 0x1 0x1>; /* PA25 periph A with pullup */
+                                        };
+                                };
+
+                                pioA: gpio@fffff200 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff200 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff400 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff600 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioD: gpio@fffff800 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioE: gpio@fffffa00 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffffa00 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
                         };
 
                         dbgu: serial@ffffee00 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xffffee00 0x200>;
                                 interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
                                 status = "disabled";
                         };
 
@@ -152,6 +335,8 @@
                                 interrupts = <7 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart0>;
                                 status = "disabled";
                         };
 
@@ -161,6 +346,8 @@
                                 interrupts = <8 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1>;
                                 status = "disabled";
                         };
 
@@ -170,6 +357,8 @@
                                 interrupts = <9 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart2>;
                                 status = "disabled";
                         };
 
@@ -177,6 +366,8 @@
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xfffbc000 0x100>;
                                 interrupts = <21 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_macb_rmii>;
                                 status = "disabled";
                         };
 
@@ -195,6 +386,24 @@
                                 #size-cells = <0>;
                                 status = "disabled";
                         };
+
+                        mmc0: mmc@fff80000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xfff80000 0x600>;
+                                interrupts = <10 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
+
+                        mmc1: mmc@fff84000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xfff84000 0x600>;
+                                interrupts = <11 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
@@ -206,6 +415,8 @@
                               >;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
                         gpios = <&pioA 22 0
                                  &pioD 15 0
                                  0
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index f86ac4b609fc..1eb08728f527 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -38,6 +38,10 @@
                         };
 
                         usart0: serial@fff8c000 {
+                                pinctrl-0 = <
+                                        &pinctrl_usart0
+                                        &pinctrl_usart0_rts
+                                        &pinctrl_usart0_cts>;
                                 status = "okay";
                         };
 
@@ -50,6 +54,31 @@
                                 atmel,vbus-gpio = <&pioA 25 0>;
                                 status = "okay";
                         };
+
+                        mmc0: mmc@fff80000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0
+                                        &pinctrl_mmc0_clk
+                                        &pinctrl_mmc0_slot0_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioE 18 0>;
+                                        wp-gpios = <&pioE 19 0>;
+                                };
+                        };
+
+                        pinctrl@fffff200 {
+                                mmc0 {
+                                        pinctrl_board_mmc0: mmc0-board {
+                                                atmel,pins =
+                                                        <5 18 0x0 0x5   /* PE18 gpio CD pin pull up and deglitch */
+                                                         5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
+                                        };
+                                };
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g15.dtsi b/arch/arm/boot/dts/at91sam9g15.dtsi
new file mode 100644
index 000000000000..fbe7a7089c2a
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g15.dtsi
@@ -0,0 +1,28 @@
+/*
+ * at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G15 SoC";
+        compatible = "atmel, at91sam9g15, atmel,at91sam9x5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff400 {
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe0399f 0x00000000  /* pioA */
+                                       0x00040000 0x00047e3f 0x00000000  /* pioB */
+                                       0xfdffffff 0x00000000 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9g15ek.dts b/arch/arm/boot/dts/at91sam9g15ek.dts
new file mode 100644
index 000000000000..86dd3f6d938f
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g15ek.dts
@@ -0,0 +1,16 @@
+/*
+ * at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+/include/ "at91sam9g15.dtsi"
+/include/ "at91sam9x5ek.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G25-EK";
+        compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
index f1b2e148ac8c..66467b113126 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
+++ b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
@@ -12,6 +12,32 @@
         model = "Atmel at91sam9g20ek 2 mmc";
         compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
 
+        ahb {
+                apb{
+                        mmc0: mmc@fffa8000 {
+                                /* clk already mux wuth slot0 */
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0_slot0
+                                        &pinctrl_mmc0_slot0_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioC 2 0>;
+                                };
+                        };
+
+                        pinctrl@fffff400 {
+                                mmc0_slot0 {
+                                        pinctrl_board_mmc0_slot0: mmc0_slot0-board {
+                                                atmel,pins =
+                                                        <2 2 0x0 0x5>;  /* PC2 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+                        };
+                };
+        };
+
         leds {
                 compatible = "gpio-leds";
 
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index e6391a4e6649..32a500a0e481 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -35,6 +35,13 @@
                         };
 
                         usart0: serial@fffb0000 {
+                                pinctrl-0 =
+                                        <&pinctrl_usart0
+                                         &pinctrl_usart0_rts
+                                         &pinctrl_usart0_cts
+                                         &pinctrl_usart0_dtr_dsr
+                                         &pinctrl_usart0_dcd
+                                         &pinctrl_usart0_ri>;
                                 status = "okay";
                         };
 
@@ -51,6 +58,29 @@
                                 atmel,vbus-gpio = <&pioC 5 0>;
                                 status = "okay";
                         };
+
+                        mmc0: mmc@fffa8000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0_slot1
+                                        &pinctrl_mmc0_clk
+                                        &pinctrl_mmc0_slot1_cmd_dat0
+                                        &pinctrl_mmc0_slot1_dat1_3>;
+                                status = "okay";
+                                slot@1 {
+                                        reg = <1>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioC 9 0>;
+                                };
+                        };
+
+                        pinctrl@fffff400 {
+                                mmc0_slot1 {
+                                        pinctrl_board_mmc0_slot1: mmc0_slot1-board {
+                                                atmel,pins =
+                                                        <2 9 0x0 0x5>;  /* PC9 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi
new file mode 100644
index 000000000000..05a718fb83c4
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g25.dtsi
@@ -0,0 +1,28 @@
+/*
+ * at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G25 SoC";
+        compatible = "atmel, at91sam9g25, atmel,at91sam9x5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff400 {
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe0399f 0xc000001c  /* pioA */
+                                       0x0007ffff 0x8000fe3f 0x00000000  /* pioB */
+                                       0x80000000 0x07c0ffff 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 877c08f06763..c5ab16fba059 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -7,55 +7,10 @@
  * Licensed under GPLv2 or later.
  */
 /dts-v1/;
-/include/ "at91sam9x5.dtsi"
-/include/ "at91sam9x5cm.dtsi"
+/include/ "at91sam9g25.dtsi"
+/include/ "at91sam9x5ek.dtsi"
 
 / {
         model = "Atmel AT91SAM9G25-EK";
         compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
-
-        chosen {
-                bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
-        };
-
-        ahb {
-                apb {
-                        dbgu: serial@fffff200 {
-                                status = "okay";
-                        };
-
-                        usart0: serial@f801c000 {
-                                status = "okay";
-                        };
-
-                        macb0: ethernet@f802c000 {
-                                phy-mode = "rmii";
-                                status = "okay";
-                        };
-
-                        i2c0: i2c@f8010000 {
-                                status = "okay";
-                        };
-
-                        i2c1: i2c@f8014000 {
-                                status = "okay";
-                        };
-
-                        i2c2: i2c@f8018000 {
-                                status = "okay";
-                        };
-                };
-
-                usb0: ohci@00600000 {
-                        status = "okay";
-                        num-ports = <2>;
-                        atmel,vbus-gpio = <&pioD 19 1
-                                           &pioD 20 1
-                                          >;
-                };
-
-                usb1: ehci@00700000 {
-                        status = "okay";
-                };
-        };
 };
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
new file mode 100644
index 000000000000..f9d14a722794
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -0,0 +1,28 @@
+/*
+ * at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G35 SoC";
+        compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff400 {
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe0399f 0xc000000c  /* pioA */
+                                       0x000406ff 0x00047e3f 0x00000000  /* pioB */
+                                       0xfdffffff 0x00000000 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9g35ek.dts b/arch/arm/boot/dts/at91sam9g35ek.dts
new file mode 100644
index 000000000000..95944bdd798d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g35ek.dts
@@ -0,0 +1,16 @@
+/*
+ * at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+/include/ "at91sam9g35.dtsi"
+/include/ "at91sam9x5ek.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G35-EK";
+        compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3add030d61f8..0741caeeced1 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -108,60 +108,243 @@
                                 interrupts = <21 4 0>;
                         };
 
-                        pioA: gpio@fffff200 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff200 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                        pinctrl@fffff200 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff200 0xfffff200 0xa00>;
+
+                                atmel,mux-mask = <
+                                      /*    A         B     */
+                                       0xffffffff 0xffc003ff  /* pioA */
+                                       0xffffffff 0x800f8f00  /* pioB */
+                                       0xffffffff 0x00000e00  /* pioC */
+                                       0xffffffff 0xff0c1381  /* pioD */
+                                       0xffffffff 0x81ffff81  /* pioE */
+                                      >;
+
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <1 12 0x1 0x0   /* PB12 periph A */
+                                                         1 13 0x1 0x0>; /* PB13 periph A */
+                                        };
+                                };
 
-                        pioB: gpio@fffff400 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff400 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                usart0 {
+                                        pinctrl_usart0: usart0-0 {
+                                                atmel,pins =
+                                                        <1 19 0x1 0x1   /* PB19 periph A with pullup */
+                                                         1 18 0x1 0x0>; /* PB18 periph A */
+                                        };
+
+                                        pinctrl_usart0_rts: usart0_rts-0 {
+                                                atmel,pins =
+                                                        <1 17 0x2 0x0>; /* PB17 periph B */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <1 15 0x2 0x0>; /* PB15 periph B */
+                                        };
+                                };
 
-                        pioC: gpio@fffff600 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff600 0x100>;
-                                interrupts = <4 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                uart1 {
+                                        pinctrl_usart1: usart1-0 {
+                                                atmel,pins =
+                                                        <1 4 0x1 0x1    /* PB4 periph A with pullup */
+                                                         1 5 0x1 0x0>;  /* PB5 periph A */
+                                        };
+
+                                        pinctrl_usart1_rts: usart1_rts-0 {
+                                                atmel,pins =
+                                                        <3 16 0x1 0x0>; /* PD16 periph A */
+                                        };
+
+                                        pinctrl_usart1_cts: usart1_cts-0 {
+                                                atmel,pins =
+                                                        <3 17 0x1 0x0>; /* PD17 periph A */
+                                        };
+                                };
 
-                        pioD: gpio@fffff800 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffff800 0x100>;
-                                interrupts = <5 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                usart2 {
+                                        pinctrl_usart2: usart2-0 {
+                                                atmel,pins =
+                                                        <1 6 0x1 0x1    /* PB6 periph A with pullup */
+                                                         1 7 0x1 0x0>;  /* PB7 periph A */
+                                        };
+
+                                        pinctrl_usart2_rts: usart2_rts-0 {
+                                                atmel,pins =
+                                                        <2 9 0x2 0x0>;  /* PC9 periph B */
+                                        };
+
+                                        pinctrl_usart2_cts: usart2_cts-0 {
+                                                atmel,pins =
+                                                        <2 11 0x2 0x0>; /* PC11 periph B */
+                                        };
+                                };
 
-                        pioE: gpio@fffffa00 {
-                                compatible = "atmel,at91rm9200-gpio";
-                                reg = <0xfffffa00 0x100>;
-                                interrupts = <5 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                                usart3 {
+                                        pinctrl_usart3: usart3-0 {
+                                                atmel,pins =
+                                                        <1 8 0x1 0x1    /* PB9 periph A with pullup */
+                                                         1 9 0x1 0x0>;  /* PB8 periph A */
+                                        };
+
+                                        pinctrl_usart3_rts: usart3_rts-0 {
+                                                atmel,pins =
+                                                        <0 23 0x2 0x0>; /* PA23 periph B */
+                                        };
+
+                                        pinctrl_usart3_cts: usart3_cts-0 {
+                                                atmel,pins =
+                                                        <0 24 0x2 0x0>; /* PA24 periph B */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <2 8 0x0 0x1    /* PC8 gpio RDY pin pull_up*/
+                                                         2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                macb {
+                                        pinctrl_macb_rmii: macb_rmii-0 {
+                                                atmel,pins =
+                                                        <0 10 0x1 0x0   /* PA10 periph A */
+                                                         0 11 0x1 0x0   /* PA11 periph A */
+                                                         0 12 0x1 0x0   /* PA12 periph A */
+                                                         0 13 0x1 0x0   /* PA13 periph A */
+                                                         0 14 0x1 0x0   /* PA14 periph A */
+                                                         0 15 0x1 0x0   /* PA15 periph A */
+                                                         0 16 0x1 0x0   /* PA16 periph A */
+                                                         0 17 0x1 0x0   /* PA17 periph A */
+                                                         0 18 0x1 0x0   /* PA18 periph A */
+                                                         0 19 0x1 0x0>; /* PA19 periph A */
+                                        };
+
+                                        pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+                                                atmel,pins =
+                                                        <0 6 0x2 0x0    /* PA6 periph B */
+                                                         0 7 0x2 0x0    /* PA7 periph B */
+                                                         0 8 0x2 0x0    /* PA8 periph B */
+                                                         0 9 0x2 0x0    /* PA9 periph B */
+                                                         0 27 0x2 0x0   /* PA27 periph B */
+                                                         0 28 0x2 0x0   /* PA28 periph B */
+                                                         0 29 0x2 0x0   /* PA29 periph B */
+                                                         0 30 0x2 0x0>; /* PA30 periph B */
+                                        };
+                                };
+
+                                mmc0 {
+                                        pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x1 0x0    /* PA0 periph A */
+                                                         0 1 0x1 0x1    /* PA1 periph A with pullup */
+                                                         0 2 0x1 0x1>;  /* PA2 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 3 0x1 0x1    /* PA3 periph A with pullup */
+                                                         0 4 0x1 0x1    /* PA4 periph A with pullup */
+                                                         0 5 0x1 0x1>;  /* PA5 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
+                                                atmel,pins =
+                                                        <0 6 0x1 0x1    /* PA6 periph A with pullup */
+                                                         0 7 0x1 0x1    /* PA7 periph A with pullup */
+                                                         0 8 0x1 0x1    /* PA8 periph A with pullup */
+                                                         0 9 0x1 0x1>;  /* PA9 periph A with pullup */
+                                        };
+                                };
+
+                                mmc1 {
+                                        pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 31 0x1 0x0   /* PA31 periph A */
+                                                         0 22 0x1 0x1   /* PA22 periph A with pullup */
+                                                         0 23 0x1 0x1>; /* PA23 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 24 0x1 0x1   /* PA24 periph A with pullup */
+                                                         0 25 0x1 0x1   /* PA25 periph A with pullup */
+                                                         0 26 0x1 0x1>; /* PA26 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
+                                                atmel,pins =
+                                                        <0 27 0x1 0x1   /* PA27 periph A with pullup */
+                                                         0 28 0x1 0x1   /* PA28 periph A with pullup */
+                                                         0 29 0x1 0x1   /* PA29 periph A with pullup */
+                                                         0 20 0x1 0x1>; /* PA30 periph A with pullup */
+                                        };
+                                };
+
+                                pioA: gpio@fffff200 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff200 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff400 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff600 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <4 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioD: gpio@fffff800 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <5 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioE: gpio@fffffa00 {
+                                        compatible = "atmel,at91rm9200-gpio";
+                                        reg = <0xfffffa00 0x200>;
+                                        interrupts = <5 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
                         };
 
                         dbgu: serial@ffffee00 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xffffee00 0x200>;
                                 interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
                                 status = "disabled";
                         };
 
@@ -171,6 +354,8 @@
                                 interrupts = <7 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart0>;
                                 status = "disabled";
                         };
 
@@ -180,6 +365,8 @@
                                 interrupts = <8 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1>;
                                 status = "disabled";
                         };
 
@@ -189,6 +376,8 @@
                                 interrupts = <9 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart2>;
                                 status = "disabled";
                         };
 
@@ -198,6 +387,8 @@
                                 interrupts = <10 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart3>;
                                 status = "disabled";
                         };
 
@@ -205,6 +396,8 @@
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xfffbc000 0x100>;
                                 interrupts = <25 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_macb_rmii>;
                                 status = "disabled";
                         };
 
@@ -262,6 +455,24 @@
                                         trigger-value = <0x6>;
                                 };
                         };
+
+                        mmc0: mmc@fff80000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xfff80000 0x600>;
+                                interrupts = <11 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
+
+                        mmc1: mmc@fffd0000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xfffd0000 0x600>;
+                                interrupts = <29 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
@@ -273,6 +484,8 @@
                               >;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
                         gpios = <&pioC 8 0
                                  &pioC 14 0
                                  0
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 15e1dd43f625..20c31913c270 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -39,6 +39,10 @@
                         };
 
                         usart1: serial@fff90000 {
+                                pinctrl-0 =
+                                        <&pinctrl_usart1
+                                         &pinctrl_usart1_rts
+                                         &pinctrl_usart1_cts>;
                                 status = "okay";
                         };
 
@@ -54,6 +58,50 @@
                         i2c1: i2c@fff88000 {
                                 status = "okay";
                         };
+
+                        mmc0: mmc@fff80000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0
+                                        &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 10 0>;
+                                };
+                        };
+
+                        mmc1: mmc@fffd0000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc1
+                                        &pinctrl_mmc1_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc1_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 11 0>;
+                                        wp-gpios = <&pioD 29 0>;
+                                };
+                        };
+
+                        pinctrl@fffff200 {
+                                mmc0 {
+                                        pinctrl_board_mmc0: mmc0-board {
+                                                atmel,pins =
+                                                        <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+
+                                mmc1 {
+                                        pinctrl_board_mmc1: mmc1-board {
+                                                atmel,pins =
+                                                        <3 11 0x0 0x5   /* PD11 gpio CD pin pull up and deglitch */
+                                                         3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
+                                        };
+                                };
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 82508d68aa7e..e9efb34f4379 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -84,6 +84,15 @@
                                 reg = <0xfffffe10 0x10>;
                         };
 
+                        mmc0: mmc@f0008000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xf0008000 0x600>;
+                                interrupts = <12 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
+                        };
+
                         tcb0: timer@f8008000 {
                                 compatible = "atmel,at91sam9x5-tcb";
                                 reg = <0xf8008000 0x100>;
@@ -102,50 +111,186 @@
                                 interrupts = <20 4 0>;
                         };
 
-                        pioA: gpio@fffff400 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff400 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                        pinctrl@fffff400 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff400 0xfffff400 0x800>;
 
-                        pioB: gpio@fffff600 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff600 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe07983 0x00000000  /* pioA */
+                                       0x00040000 0x00047e0f 0x00000000  /* pioB */
+                                       0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
 
-                        pioC: gpio@fffff800 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff800 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <0 9 0x1 0x0    /* PA9 periph A */
+                                                         0 10 0x1 0x1>; /* PA10 periph with pullup */
+                                        };
+                                };
 
-                        pioD: gpio@fffffa00 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffffa00 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                                usart0 {
+                                        pinctrl_usart0: usart0-0 {
+                                                atmel,pins =
+                                                        <0 1 0x1 0x1    /* PA1 periph A with pullup */
+                                                         0 0 0x1 0x0>;  /* PA0 periph A */
+                                        };
+
+                                        pinctrl_usart0_rts: usart0_rts-0 {
+                                                atmel,pins =
+                                                        <0 2 0x1 0x0>;  /* PA2 periph A */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <0 3 0x1 0x0>;  /* PA3 periph A */
+                                        };
+                                };
+
+                                usart1 {
+                                        pinctrl_usart1: usart1-0 {
+                                                atmel,pins =
+                                                        <0 6 0x1 0x1    /* PA6 periph A with pullup */
+                                                         0 5 0x1 0x0>;  /* PA5 periph A */
+                                        };
+                                };
+
+                                usart2 {
+                                        pinctrl_usart2: usart2-0 {
+                                                atmel,pins =
+                                                        <0 8 0x1 0x1    /* PA8 periph A with pullup */
+                                                         0 7 0x1 0x0>;  /* PA7 periph A */
+                                        };
+
+                                        pinctrl_usart2_rts: usart2_rts-0 {
+                                                atmel,pins =
+                                                        <1 0 0x2 0x0>;  /* PB0 periph B */
+                                        };
+
+                                        pinctrl_usart2_cts: usart2_cts-0 {
+                                                atmel,pins =
+                                                        <1 1 0x2 0x0>;  /* PB1 periph B */
+                                        };
+                                };
+
+                                usart3 {
+                                        pinctrl_usart3: usart3-0 {
+                                                atmel,pins =
+                                                        <2 23 0x2 0x1   /* PC23 periph B with pullup */
+                                                         2 22 0x2 0x0>; /* PC22 periph B */
+                                        };
+
+                                        pinctrl_usart3_rts: usart3_rts-0 {
+                                                atmel,pins =
+                                                        <2 24 0x2 0x0>; /* PC24 periph B */
+                                        };
+
+                                        pinctrl_usart3_cts: usart3_cts-0 {
+                                                atmel,pins =
+                                                        <2 25 0x2 0x0>; /* PC25 periph B */
+                                        };
+                                };
+
+                                uart0 {
+                                        pinctrl_uart0: uart0-0 {
+                                                atmel,pins =
+                                                        <2 9 0x3 0x1    /* PC9 periph C with pullup */
+                                                         2 8 0x3 0x0>;  /* PC8 periph C */
+                                        };
+                                };
+
+                                uart1 {
+                                        pinctrl_uart1: uart1-0 {
+                                                atmel,pins =
+                                                        <2 16 0x3 0x1   /* PC17 periph C with pullup */
+                                                         2 17 0x3 0x0>; /* PC16 periph C */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <3 5 0x0 0x1    /* PD5 gpio RDY pin pull_up*/
+                                                         3 4 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                mmc0 {
+                                        pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 17 0x1 0x0   /* PA17 periph A */
+                                                         0 16 0x1 0x1   /* PA16 periph A with pullup */
+                                                         0 15 0x1 0x1>; /* PA15 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 18 0x1 0x1   /* PA18 periph A with pullup */
+                                                         0 19 0x1 0x1   /* PA19 periph A with pullup */
+                                                         0 20 0x1 0x1>; /* PA20 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
+                                                atmel,pins =
+                                                        <0 11 0x2 0x1   /* PA11 periph B with pullup */
+                                                         0 12 0x2 0x1   /* PA12 periph B with pullup */
+                                                         0 13 0x2 0x1   /* PA13 periph B with pullup */
+                                                         0 14 0x2 0x1>; /* PA14 periph B with pullup */
+                                        };
+                                };
+
+                                pioA: gpio@fffff400 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff600 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff800 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioD: gpio@fffffa00 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffffa00 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
                         };
 
                         dbgu: serial@fffff200 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffff200 0x200>;
                                 interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
                                 status = "disabled";
                         };
 
@@ -155,6 +300,8 @@
                                 interrupts = <5 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart0>;
                                 status = "disabled";
                         };
 
@@ -164,6 +311,8 @@
                                 interrupts = <6 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1>;
                                 status = "disabled";
                         };
 
@@ -173,6 +322,8 @@
                                 interrupts = <7 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart2>;
                                 status = "disabled";
                         };
 
@@ -182,6 +333,8 @@
                                 interrupts = <8 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart3>;
                                 status = "disabled";
                         };
 
@@ -215,6 +368,8 @@
                                >;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
                         gpios = <&pioD 5 0
                                  &pioD 4 0
                                  0
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 912b2c283d6f..0376bf4fd66b 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -45,6 +45,28 @@
                         i2c1: i2c@f8014000 {
                                 status = "okay";
                         };
+
+                        mmc0: mmc@f0008000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0
+                                        &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioA 7 0>;
+                                };
+                        };
+
+                        pinctrl@fffff400 {
+                                mmc0 {
+                                        pinctrl_board_mmc0: mmc0-board {
+                                                atmel,pins =
+                                                        <0 7 0x0 0x5>;  /* PA7 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
new file mode 100644
index 000000000000..54eb33ba6d22
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -0,0 +1,49 @@
+/*
+ * at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9X25 SoC";
+        compatible = "atmel, at91sam9x25, atmel,at91sam9x5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff400 {
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe03fff 0xc000001c  /* pioA */
+                                       0x0007ffff 0x00047e3f 0x00000000  /* pioB */
+                                       0x80000000 0xfffd0000 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
+
+                                macb1 {
+                                        pinctrl_macb1_rmii: macb1_rmii-0 {
+                                                atmel,pins =
+                                                        <2 16 0x2 0x0   /* PC16 periph B */
+                                                         2 18 0x2 0x0   /* PC18 periph B */
+                                                         2 19 0x2 0x0   /* PC19 periph B */
+                                                         2 20 0x2 0x0   /* PC20 periph B */
+                                                         2 21 0x2 0x0   /* PC21 periph B */
+                                                         2 27 0x2 0x0   /* PC27 periph B */
+                                                         2 28 0x2 0x0   /* PC28 periph B */
+                                                         2 29 0x2 0x0   /* PC29 periph B */
+                                                         2 30 0x2 0x0   /* PC30 periph B */
+                                                         2 31 0x2 0x0>; /* PC31 periph B */
+                                        };
+                                };
+                        };
+
+                        macb1: ethernet@f8030000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_macb1_rmii>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts
new file mode 100644
index 000000000000..af907eaa1f25
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x25ek.dts
@@ -0,0 +1,16 @@
+/*
+ * at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+/include/ "at91sam9x25.dtsi"
+/include/ "at91sam9x5ek.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G25-EK";
+        compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+};
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
new file mode 100644
index 000000000000..fb102d6126ce
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -0,0 +1,28 @@
+/*
+ * at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9X35 SoC";
+        compatible = "atmel, at91sam9x35, atmel,at91sam9x5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff400 {
+                                atmel,mux-mask = <
+                                      /*    A         B          C     */
+                                       0xffffffff 0xffe03fff 0xc000000c  /* pioA */
+                                       0x000406ff 0x00047e3f 0x00000000  /* pioB */
+                                       0xfdffffff 0x00000000 0xb83fffff  /* pioC */
+                                       0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                      >;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9x35ek.dts b/arch/arm/boot/dts/at91sam9x35ek.dts
new file mode 100644
index 000000000000..5ccb607b5414
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x35ek.dts
@@ -0,0 +1,16 @@
+/*
+ * at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+/include/ "at91sam9x35.dtsi"
+/include/ "at91sam9x5ek.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9X35-EK";
+        compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 03fc136421c5..7ee49e8daf98 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -111,50 +111,244 @@
                                 interrupts = <21 4 0>;
                         };
 
-                        pioA: gpio@fffff400 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff400 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
-                        };
+                        pinctrl@fffff400 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+                                ranges = <0xfffff400 0xfffff400 0x800>;
+
+                                /* shared pinctrl settings */
+                                dbgu {
+                                        pinctrl_dbgu: dbgu-0 {
+                                                atmel,pins =
+                                                        <0 9 0x1 0x0    /* PA9 periph A */
+                                                         0 10 0x1 0x1>; /* PA10 periph A with pullup */
+                                        };
+                                };
 
-                        pioB: gpio@fffff600 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff600 0x100>;
-                                interrupts = <2 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                                usart0 {
+                                        pinctrl_usart0: usart0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x1 0x1    /* PA0 periph A with pullup */
+                                                         0 1 0x1 0x0>;  /* PA1 periph A */
+                                        };
+
+                                        pinctrl_usart0_rts: usart0_rts-0 {
+                                                atmel,pins =
+                                                        <0 2 0x1 0x0>;  /* PA2 periph A */
+                                        };
+
+                                        pinctrl_usart0_cts: usart0_cts-0 {
+                                                atmel,pins =
+                                                        <0 3 0x1 0x0>;  /* PA3 periph A */
+                                        };
+                                };
+
+                                usart1 {
+                                        pinctrl_usart1: usart1-0 {
+                                                atmel,pins =
+                                                        <0 5 0x1 0x1    /* PA5 periph A with pullup */
+                                                         0 6 0x1 0x0>;  /* PA6 periph A */
+                                        };
+
+                                        pinctrl_usart1_rts: usart1_rts-0 {
+                                                atmel,pins =
+                                                        <3 27 0x3 0x0>; /* PC27 periph C */
+                                        };
+
+                                        pinctrl_usart1_cts: usart1_cts-0 {
+                                                atmel,pins =
+                                                        <3 28 0x3 0x0>; /* PC28 periph C */
+                                        };
+                                };
+
+                                usart2 {
+                                        pinctrl_usart2: usart2-0 {
+                                                atmel,pins =
+                                                        <0 7 0x1 0x1    /* PA7 periph A with pullup */
+                                                         0 8 0x1 0x0>;  /* PA8 periph A */
+                                        };
+
+                                        pinctrl_uart2_rts: uart2_rts-0 {
+                                                atmel,pins =
+                                                        <0 0 0x2 0x0>;  /* PB0 periph B */
+                                        };
+
+                                        pinctrl_uart2_cts: uart2_cts-0 {
+                                                atmel,pins =
+                                                        <0 1 0x2 0x0>;  /* PB1 periph B */
+                                        };
+                                };
+
+                                usart3 {
+                                        pinctrl_uart3: usart3-0 {
+                                                atmel,pins =
+                                                        <3 23 0x2 0x1   /* PC22 periph B with pullup */
+                                                         3 23 0x2 0x0>; /* PC23 periph B */
+                                        };
+
+                                        pinctrl_usart3_rts: usart3_rts-0 {
+                                                atmel,pins =
+                                                        <3 24 0x2 0x0>; /* PC24 periph B */
+                                        };
+
+                                        pinctrl_usart3_cts: usart3_cts-0 {
+                                                atmel,pins =
+                                                        <3 25 0x2 0x0>; /* PC25 periph B */
+                                        };
+                                };
+
+                                uart0 {
+                                        pinctrl_uart0: uart0-0 {
+                                                atmel,pins =
+                                                        <3 8 0x3 0x0    /* PC8 periph C */
+                                                         3 9 0x3 0x1>;  /* PC9 periph C with pullup */
+                                        };
+                                };
+
+                                uart1 {
+                                        pinctrl_uart1: uart1-0 {
+                                                atmel,pins =
+                                                        <3 16 0x3 0x0   /* PC16 periph C */
+                                                         3 17 0x3 0x1>; /* PC17 periph C with pullup */
+                                        };
+                                };
+
+                                nand {
+                                        pinctrl_nand: nand-0 {
+                                                atmel,pins =
+                                                        <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
+                                                         3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                macb0 {
+                                        pinctrl_macb0_rmii: macb0_rmii-0 {
+                                                atmel,pins =
+                                                        <1 0 0x1 0x0    /* PB0 periph A */
+                                                         1 1 0x1 0x0    /* PB1 periph A */
+                                                         1 2 0x1 0x0    /* PB2 periph A */
+                                                         1 3 0x1 0x0    /* PB3 periph A */
+                                                         1 4 0x1 0x0    /* PB4 periph A */
+                                                         1 5 0x1 0x0    /* PB5 periph A */
+                                                         1 6 0x1 0x0    /* PB6 periph A */
+                                                         1 7 0x1 0x0    /* PB7 periph A */
+                                                         1 9 0x1 0x0    /* PB9 periph A */
+                                                         1 10 0x1 0x0>; /* PB10 periph A */
+                                        };
+
+                                        pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
+                                                atmel,pins =
+                                                        <1 8 0x1 0x0    /* PA8 periph A */
+                                                         1 11 0x1 0x0   /* PA11 periph A */
+                                                         1 12 0x1 0x0   /* PA12 periph A */
+                                                         1 13 0x1 0x0   /* PA13 periph A */
+                                                         1 14 0x1 0x0   /* PA14 periph A */
+                                                         1 15 0x1 0x0   /* PA15 periph A */
+                                                         1 16 0x1 0x0   /* PA16 periph A */
+                                                         1 17 0x1 0x0>; /* PA17 periph A */
+                                        };
+                                };
+
+                                mmc0 {
+                                        pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 17 0x1 0x0   /* PA17 periph A */
+                                                         0 16 0x1 0x1   /* PA16 periph A with pullup */
+                                                         0 15 0x1 0x1>; /* PA15 periph A with pullup */
+                                        };
+
+                                        pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 18 0x1 0x1   /* PA18 periph A with pullup */
+                                                         0 19 0x1 0x1   /* PA19 periph A with pullup */
+                                                         0 20 0x1 0x1>; /* PA20 periph A with pullup */
+                                        };
+                                };
+
+                                mmc1 {
+                                        pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
+                                                atmel,pins =
+                                                        <0 13 0x2 0x0   /* PA13 periph B */
+                                                         0 12 0x2 0x1   /* PA12 periph B with pullup */
+                                                         0 11 0x2 0x1>; /* PA11 periph B with pullup */
+                                        };
+
+                                        pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+                                                atmel,pins =
+                                                        <0 2 0x2 0x1    /* PA2 periph B with pullup */
+                                                         0 3 0x2 0x1    /* PA3 periph B with pullup */
+                                                         0 4 0x2 0x1>;  /* PA4 periph B with pullup */
+                                        };
+                                };
+
+                                pioA: gpio@fffff400 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff400 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioB: gpio@fffff600 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff600 0x200>;
+                                        interrupts = <2 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        #gpio-lines = <19>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioC: gpio@fffff800 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffff800 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                pioD: gpio@fffffa00 {
+                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                        reg = <0xfffffa00 0x200>;
+                                        interrupts = <3 4 1>;
+                                        #gpio-cells = <2>;
+                                        gpio-controller;
+                                        #gpio-lines = <22>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
                         };
 
-                        pioC: gpio@fffff800 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffff800 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                        mmc0: mmc@f0008000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xf0008000 0x600>;
+                                interrupts = <12 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
                         };
 
-                        pioD: gpio@fffffa00 {
-                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-                                reg = <0xfffffa00 0x100>;
-                                interrupts = <3 4 1>;
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                        mmc1: mmc@f000c000 {
+                                compatible = "atmel,hsmci";
+                                reg = <0xf000c000 0x600>;
+                                interrupts = <26 4 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "disabled";
                         };
 
                         dbgu: serial@fffff200 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffff200 0x200>;
                                 interrupts = <1 4 7>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_dbgu>;
                                 status = "disabled";
                         };
 
@@ -164,6 +358,8 @@
                                 interrupts = <5 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart0>;
                                 status = "disabled";
                         };
 
@@ -173,6 +369,8 @@
                                 interrupts = <6 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1>;
                                 status = "disabled";
                         };
 
@@ -182,6 +380,8 @@
                                 interrupts = <7 4 5>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart2>;
                                 status = "disabled";
                         };
 
@@ -189,6 +389,8 @@
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xf802c000 0x100>;
                                 interrupts = <24 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_macb0_rmii>;
                                 status = "disabled";
                         };
 
@@ -273,6 +475,8 @@
                               >;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_nand>;
                         gpios = <&pioD 5 0
                                  &pioD 4 0
                                  0
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
new file mode 100644
index 000000000000..8a7cf1d9cf5d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -0,0 +1,101 @@
+/*
+ * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/include/ "at91sam9x5cm.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9X5-EK";
+        compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+
+        chosen {
+                bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+        };
+
+        ahb {
+                apb {
+                        mmc0: mmc@f0008000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0
+                                        &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 15 0>;
+                                };
+                        };
+
+                        mmc1: mmc@f000c000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc1
+                                        &pinctrl_mmc1_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc1_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 14 0>;
+                                };
+                        };
+
+                        dbgu: serial@fffff200 {
+                                status = "okay";
+                        };
+
+                        usart0: serial@f801c000 {
+                                status = "okay";
+                        };
+
+                        macb0: ethernet@f802c000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@f8010000 {
+                                status = "okay";
+                        };
+
+                        i2c1: i2c@f8014000 {
+                                status = "okay";
+                        };
+
+                        i2c2: i2c@f8018000 {
+                                status = "okay";
+                        };
+
+                        pinctrl@fffff400 {
+                                mmc0 {
+                                        pinctrl_board_mmc0: mmc0-board {
+                                                atmel,pins =
+                                                        <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+
+                                mmc1 {
+                                        pinctrl_board_mmc1: mmc1-board {
+                                                atmel,pins =
+                                                        <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+                        };
+                };
+
+                usb0: ohci@00600000 {
+                        status = "okay";
+                        num-ports = <2>;
+                        atmel,vbus-gpio = <&pioD 19 1
+                                           &pioD 20 1
+                                          >;
+                };
+
+                usb1: ehci@00700000 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
new file mode 100644
index 000000000000..387fedb58988
--- /dev/null
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -0,0 +1,165 @@
+/*
+ * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
+ *
+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+/include/ "at91sam9g45.dtsi"
+
+/ {
+        model = "Ronetix pm9g45";
+        compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+        };
+
+        memory {
+                reg = <0x70000000 0x8000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        ahb {
+                apb {
+                        dbgu: serial@ffffee00 {
+                                status = "okay";
+                        };
+
+                        pinctrl@fffff200 {
+
+                                board {
+                                        pinctrl_board_nand: nand0-board {
+                                                atmel,pins =
+                                                        <3 3 0x0 0x1    /* PD3 gpio RDY pin pull_up*/
+                                                         2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+                                        };
+                                };
+
+                                mmc {
+                                        pinctrl_board_mmc: mmc0-board {
+                                                atmel,pins =
+                                                        <3 6 0x0 0x5>;  /* PD6 gpio CD pin pull_up and deglitch */
+                                        };
+                                };
+                        };
+
+                        mmc0: mmc@fff80000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc
+                                        &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 6 0>;
+                                };
+                        };
+
+                        macb0: ethernet@fffbc000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
+
+                };
+
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "soft";
+                        nand-on-flash-bbt;
+                        pinctrl-0 = <&pinctrl_board_nand>;
+
+                        gpios = <&pioD 3 0
+                                 &pioC 14 0
+                                 0
+                                >;
+
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x20000>;
+                        };
+
+                        barebox@20000 {
+                                label = "barebox";
+                                reg = <0x20000 0x40000>;
+                        };
+
+                        bareboxenv@60000 {
+                                label = "bareboxenv";
+                                reg = <0x60000 0x1A0000>;
+                        };
+
+                        kernel@200000 {
+                                label = "bareboxenv2";
+                                reg = <0x200000 0x300000>;
+                        };
+
+                        kernel@500000 {
+                                label = "root";
+                                reg = <0x500000 0x400000>;
+                        };
+
+                        data@900000 {
+                                label = "data";
+                                reg = <0x900000 0x8340000>;
+                        };
+                };
+
+                usb0: ohci@00700000 {
+                        status = "okay";
+                        num-ports = <2>;
+                };
+
+                usb1: ehci@00800000 {
+                        status = "okay";
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                led0 {
+                        label = "led0";
+                        gpios = <&pioD 0 1>;
+                        linux,default-trigger = "nand-disk";
+                };
+
+                led1 {
+                        label = "led1";
+                        gpios = <&pioD 31 0>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                right {
+                        label = "SW4";
+                        gpios = <&pioE 7 1>;
+                        linux,code = <106>;
+                };
+
+                up {
+                        label = "SW3";
+                        gpios = <&pioE 8 1>;
+                        linux,code = <103>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index dd4358bc26e2..2e4c5727468e 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -181,6 +181,10 @@
                                status = "okay";
                         };
 
+                        gpio@d8400000 {
+                               status = "okay";
+                        };
+
                         i2c0: i2c@e0280000 {
                                status = "okay";
                         };
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 419ea7413d23..7cd25eb4f8e0 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -70,6 +70,12 @@
                         status = "disabled";
                 };
 
+                pinmux: pinmux@e0700000 {
+                        compatible = "st,spear1310-pinmux";
+                        reg = <0xe0700000 0x1000>;
+                        #gpio-range-cells = <2>;
+                };
+
                 spi1: spi@5d400000 {
                         compatible = "arm,pl022", "arm,primecell";
                         reg = <0x5d400000 0x1000>;
@@ -179,6 +185,27 @@
                         thermal@e07008c4 {
                                 st,thermal-flags = <0x7000>;
                         };
+
+                        gpiopinctrl: gpio@d8400000 {
+                                compatible = "st,spear-plgpio";
+                                reg = <0xd8400000 0x1000>;
+                                interrupts = <0 100 0x4>;
+                                #interrupt-cells = <1>;
+                                interrupt-controller;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                gpio-ranges = <&pinmux 0 246>;
+                                status = "disabled";
+
+                                st-plgpio,ngpio = <246>;
+                                st-plgpio,enb-reg = <0xd0>;
+                                st-plgpio,wdata-reg = <0x90>;
+                                st-plgpio,dir-reg = <0xb0>;
+                                st-plgpio,ie-reg = <0x30>;
+                                st-plgpio,rdata-reg = <0x70>;
+                                st-plgpio,mis-reg = <0x10>;
+                                st-plgpio,eit-reg = <0x50>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index c9a54e06fb68..045f7123ffac 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -193,6 +193,10 @@
                                status = "okay";
                         };
 
+                        gpio@e2800000 {
+                               status = "okay";
+                        };
+
                         i2c0: i2c@e0280000 {
                                status = "okay";
                         };
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index d71fe2a68f09..6c09eb0a1b2b 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -24,6 +24,12 @@
                         status = "disabled";
                 };
 
+                pinmux: pinmux@e0700000 {
+                        compatible = "st,spear1340-pinmux";
+                        reg = <0xe0700000 0x1000>;
+                        #gpio-range-cells = <2>;
+                };
+
                 spi1: spi@5d400000 {
                         compatible = "arm,pl022", "arm,primecell";
                         reg = <0x5d400000 0x1000>;
@@ -51,6 +57,26 @@
                         thermal@e07008c4 {
                                 st,thermal-flags = <0x2a00>;
                         };
+
+                        gpiopinctrl: gpio@e2800000 {
+                                compatible = "st,spear-plgpio";
+                                reg = <0xe2800000 0x1000>;
+                                interrupts = <0 107 0x4>;
+                                #interrupt-cells = <1>;
+                                interrupt-controller;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                gpio-ranges = <&pinmux 0 252>;
+                                status = "disabled";
+
+                                st-plgpio,ngpio = <250>;
+                                st-plgpio,wdata-reg = <0x40>;
+                                st-plgpio,dir-reg = <0x00>;
+                                st-plgpio,ie-reg = <0x80>;
+                                st-plgpio,rdata-reg = <0x20>;
+                                st-plgpio,mis-reg = <0xa0>;
+                                st-plgpio,eit-reg = <0x60>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index 62fc4fb3e5f9..930303e48df9 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -22,9 +22,10 @@
                           0xb0000000 0xb0000000 0x10000000
                           0xd0000000 0xd0000000 0x30000000>;
 
-                pinmux@b4000000 {
+                pinmux: pinmux@b4000000 {
                         compatible = "st,spear310-pinmux";
                         reg = <0xb4000000 0x1000>;
+                        #gpio-range-cells = <2>;
                 };
 
                 fsmc: flash@44000000 {
@@ -75,6 +76,25 @@
                                 reg = <0xb2200000 0x1000>;
                                 status = "disabled";
                         };
+
+                        gpiopinctrl: gpio@b4000000 {
+                                compatible = "st,spear-plgpio";
+                                reg = <0xb4000000 0x1000>;
+                                #interrupt-cells = <1>;
+                                interrupt-controller;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                gpio-ranges = <&pinmux 0 102>;
+                                status = "disabled";
+
+                                st-plgpio,ngpio = <102>;
+                                st-plgpio,enb-reg = <0x10>;
+                                st-plgpio,wdata-reg = <0x20>;
+                                st-plgpio,dir-reg = <0x30>;
+                                st-plgpio,ie-reg = <0x50>;
+                                st-plgpio,rdata-reg = <0x40>;
+                                st-plgpio,mis-reg = <0x60>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 082328bd64ab..ad4bfc68ee05 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -164,6 +164,10 @@
                                status = "okay";
                         };
 
+                        gpio@b3000000 {
+                               status = "okay";
+                        };
+
                         i2c0: i2c@d0180000 {
                                status = "okay";
                         };
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 1f49d69595a0..67d7ada71275 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -21,9 +21,10 @@
                 ranges = <0x40000000 0x40000000 0x80000000
                           0xd0000000 0xd0000000 0x30000000>;
 
-                pinmux@b3000000 {
+                pinmux: pinmux@b3000000 {
                         compatible = "st,spear320-pinmux";
                         reg = <0xb3000000 0x1000>;
+                        #gpio-range-cells = <2>;
                 };
 
                 clcd@90000000 {
@@ -90,6 +91,26 @@
                                 reg = <0xa4000000 0x1000>;
                                 status = "disabled";
                         };
+
+                        gpiopinctrl: gpio@b3000000 {
+                                compatible = "st,spear-plgpio";
+                                reg = <0xb3000000 0x1000>;
+                                #interrupt-cells = <1>;
+                                interrupt-controller;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                gpio-ranges = <&pinmux 0 102>;
+                                status = "disabled";
+
+                                st-plgpio,ngpio = <102>;
+                                st-plgpio,enb-reg = <0x24>;
+                                st-plgpio,wdata-reg = <0x34>;
+                                st-plgpio,dir-reg = <0x44>;
+                                st-plgpio,ie-reg = <0x64>;
+                                st-plgpio,rdata-reg = <0x54>;
+                                st-plgpio,mis-reg = <0x84>;
+                                st-plgpio,eit-reg = <0x94>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 67bc571ed0c3..b175577d7abb 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -111,6 +111,7 @@ CONFIG_I2C=y
 CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
+CONFIG_PINCTRL_AT91=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_AT91SAM9X_WATCHDOG=y
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 043624219b55..e34c1bdb804d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -494,8 +494,17 @@ endif
 
 comment "Generic Board Type"
 
+config MACH_AT91RM9200_DT
+        bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
+        depends on SOC_AT91RM9200
+        select USE_OF
+        help
+          Select this if you want to experiment device-tree with
+          an Atmel RM9200 Evaluation Kit.
+
 config MACH_AT91SAM_DT
         bool "Atmel AT91SAM Evaluation Kits with device-tree support"
+        depends on SOC_AT91SAM9
         select USE_OF
         help
           Select this if you want to experiment device-tree with
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 3bb7a51efc9d..b38a1dcb79b8 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260)	+= board-snapper9260.o
 obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 
 # AT91SAM board with device-tree
+obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o
 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
 
 # AT91X40 board-specific support
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 5269825194a8..6cceb42a4c33 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -194,6 +194,24 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_ID("pioB", &pioB_clk),
         CLKDEV_CON_ID("pioC", &pioC_clk),
         CLKDEV_CON_ID("pioD", &pioD_clk),
+        /* usart lookup table for DT entries */
+        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+        CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
+        /* tc lookup table for DT entries */
+        CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
+        CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -361,10 +379,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0       /* Advanced Interrupt Controller (IRQ6) */
 };
 
-struct at91_init_soc __initdata at91rm9200_soc = {
+AT91_SOC_START(rm9200)
         .map_io = at91rm9200_map_io,
         .default_irq_priority = at91rm9200_default_irq_priority,
         .ioremap_registers = at91rm9200_ioremap_registers,
         .register_clocks = at91rm9200_register_clocks,
         .init = at91rm9200_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index aaa443b48c91..cafe98836c8a 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -24,6 +24,9 @@
 #include <linux/irq.h>
 #include <linux/clockchips.h>
 #include <linux/export.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 
@@ -91,7 +94,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 static struct irqaction at91rm9200_timer_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91rm9200_timer_interrupt
+        .handler        = at91rm9200_timer_interrupt,
+        .irq            = NR_IRQS_LEGACY + AT91_ID_SYS,
 };
 
 static cycle_t read_clk32k(struct clocksource *cs)
@@ -179,8 +183,60 @@ static struct clock_event_device clkevt = {
 void __iomem *at91_st_base;
 EXPORT_SYMBOL_GPL(at91_st_base);
 
+#ifdef CONFIG_OF
+static struct of_device_id at91rm9200_st_timer_ids[] = {
+        { .compatible = "atmel,at91rm9200-st" },
+        { /* sentinel */ }
+};
+
+static int __init of_at91rm9200_st_init(void)
+{
+        struct device_node *np;
+        int ret;
+
+        np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
+        if (!np)
+                goto err;
+
+        at91_st_base = of_iomap(np, 0);
+        if (!at91_st_base)
+                goto node_err;
+
+        /* Get the interrupts property */
+        ret = irq_of_parse_and_map(np, 0);
+        if (!ret)
+                goto ioremap_err;
+        at91rm9200_timer_irq.irq = ret;
+
+        of_node_put(np);
+
+        return 0;
+
+ioremap_err:
+        iounmap(at91_st_base);
+node_err:
+        of_node_put(np);
+err:
+        return -EINVAL;
+}
+#else
+static int __init of_at91rm9200_st_init(void)
+{
+        return -EINVAL;
+}
+#endif
+
 void __init at91rm9200_ioremap_st(u32 addr)
 {
+#ifdef CONFIG_OF
+        struct device_node *np;
+
+        np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
+        if (np) {
+                of_node_put(np);
+                return;
+        }
+#endif
         at91_st_base = ioremap(addr, 256);
         if (!at91_st_base)
                 panic("Impossible to ioremap ST\n");
@@ -191,13 +247,16 @@ void __init at91rm9200_ioremap_st(u32 addr)
  */
 void __init at91rm9200_timer_init(void)
 {
+        /* For device tree enabled device: initialize here */
+        of_at91rm9200_st_init();
+
         /* Disable all timer interrupts, and clear any pending ones */
         at91_st_write(AT91_ST_IDR,
                 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
         at91_st_read(AT91_ST_SR);
 
         /* Make IRQs happen for the system timer */
-        setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
+        setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
 
         /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
          * directly for the clocksource and all clockevents, after adjusting
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index f8202615f4a8..c9e029e44d8a 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -230,11 +230,15 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
         CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
         CLKDEV_CON_ID("pioB", &pioB_clk),
         CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -390,10 +394,10 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-struct at91_init_soc __initdata at91sam9260_soc = {
+AT91_SOC_START(sam9260)
         .map_io = at91sam9260_map_io,
         .default_irq_priority = at91sam9260_default_irq_priority,
         .ioremap_registers = at91sam9260_ioremap_registers,
         .register_clocks = at91sam9260_register_clocks,
         .init = at91sam9260_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 04295c04b3e0..4d262f346fd9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -334,10 +334,10 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-struct at91_init_soc __initdata at91sam9261_soc = {
+AT91_SOC_START(sam9261)
         .map_io = at91sam9261_map_io,
         .default_irq_priority = at91sam9261_default_irq_priority,
         .ioremap_registers = at91sam9261_ioremap_registers,
         .register_clocks = at91sam9261_register_clocks,
         .init = at91sam9261_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index d6f9c23927c4..ed390f6fa232 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -211,7 +211,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
         CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -365,10 +372,10 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller (IRQ1) */
 };
 
-struct at91_init_soc __initdata at91sam9263_soc = {
+AT91_SOC_START(sam9263)
         .map_io = at91sam9263_map_io,
         .default_irq_priority = at91sam9263_default_irq_priority,
         .ioremap_registers = at91sam9263_ioremap_registers,
         .register_clocks = at91sam9263_register_clocks,
         .init = at91sam9263_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..c5c2acc4bf22 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -256,10 +256,18 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
         CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
         CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
         CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
+
         CLKDEV_CON_ID("pioA", &pioA_clk),
         CLKDEV_CON_ID("pioB", &pioB_clk),
         CLKDEV_CON_ID("pioC", &pioC_clk),
@@ -409,10 +417,10 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller (IRQ0) */
 };
 
-struct at91_init_soc __initdata at91sam9g45_soc = {
+AT91_SOC_START(sam9g45)
         .map_io = at91sam9g45_map_io,
         .default_irq_priority = at91sam9g45_default_irq_priority,
         .ioremap_registers = at91sam9g45_ioremap_registers,
         .register_clocks = at91sam9g45_register_clocks,
         .init = at91sam9g45_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 732d3d3f4ec5..70b3a99244ab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -168,13 +168,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
         CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
         CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
         CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
-        CLKDEV_CON_ID("pioA", &pioAB_clk),
-        CLKDEV_CON_ID("pioB", &pioAB_clk),
-        CLKDEV_CON_ID("pioC", &pioCD_clk),
-        CLKDEV_CON_ID("pioD", &pioCD_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
         /* additional fake clock for macb_hclk */
         CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
         CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
@@ -223,13 +224,10 @@ static void __init at91sam9n12_map_io(void)
 void __init at91sam9n12_initialize(void)
 {
         at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
-
-        /* Register GPIO subsystem (using DT) */
-        at91_gpio_init(NULL, 0);
 }
 
-struct at91_init_soc __initdata at91sam9n12_soc = {
+AT91_SOC_START(sam9n12)
         .map_io = at91sam9n12_map_io,
         .register_clocks = at91sam9n12_register_clocks,
         .init = at91sam9n12_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 72e908412222..cbe72e44c13f 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -338,10 +338,10 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-struct at91_init_soc __initdata at91sam9rl_soc = {
+AT91_SOC_START(sam9rl)
         .map_io = at91sam9rl_map_io,
         .default_irq_priority = at91sam9rl_default_irq_priority,
         .ioremap_registers = at91sam9rl_ioremap_registers,
         .register_clocks = at91sam9rl_register_clocks,
         .init = at91sam9rl_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e5035380dcbc..3c729f0e2d3c 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -229,15 +229,17 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
         CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
         CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
         CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
         CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
         CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
-        CLKDEV_CON_ID("pioA", &pioAB_clk),
-        CLKDEV_CON_ID("pioB", &pioAB_clk),
-        CLKDEV_CON_ID("pioC", &pioCD_clk),
-        CLKDEV_CON_ID("pioD", &pioCD_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
+        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
         /* additional fake clock for macb_hclk */
         CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
         CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
@@ -313,18 +315,11 @@ static void __init at91sam9x5_map_io(void)
         at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
 }
 
-void __init at91sam9x5_initialize(void)
-{
-        /* Register GPIO subsystem (using DT) */
-        at91_gpio_init(NULL, 0);
-}
-
 /* --------------------------------------------------------------------
  *  Interrupt initialization
  * -------------------------------------------------------------------- */
 
-struct at91_init_soc __initdata at91sam9x5_soc = {
+AT91_SOC_START(sam9x5)
         .map_io = at91sam9x5_map_io,
         .register_clocks = at91sam9x5_register_clocks,
-        .init = at91sam9x5_initialize,
-};
+AT91_SOC_END
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index e8f45c4e0ea8..3b6a94820fa0 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -30,8 +30,6 @@
 static const struct of_device_id irq_of_match[] __initconst = {
 
         { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
-        { .compatible = "atmel,at91rm9200-gpio", .data = at91_gpio_of_irq_setup },
-        { .compatible = "atmel,at91sam9x5-gpio", .data = at91_gpio_of_irq_setup },
         { /*sentinel*/ }
 };
 
diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-rm9200-dt.c
new file mode 100644
index 000000000000..5f9ce3da3fde
--- /dev/null
+++ b/arch/arm/mach-at91/board-rm9200-dt.c
@@ -0,0 +1,57 @@
+/*
+ *  Setup code for AT91RM9200 Evaluation Kits with Device Tree support
+ *
+ *  Copyright (C) 2011 Atmel,
+ *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *                2012 Joachim Eastwood <manabian@gmail.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/setup.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include "at91_aic.h"
+#include "generic.h"
+
+
+static const struct of_device_id irq_of_match[] __initconst = {
+        { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
+        { /*sentinel*/ }
+};
+
+static void __init at91rm9200_dt_init_irq(void)
+{
+        of_irq_init(irq_of_match);
+}
+
+static void __init at91rm9200_dt_device_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char *at91rm9200_dt_board_compat[] __initdata = {
+        "atmel,at91rm9200",
+        NULL
+};
+
+DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
+        .timer          = &at91rm9200_timer,
+        .map_io         = at91_map_io,
+        .handle_irq     = at91_aic_handle_irq,
+        .init_early     = at91rm9200_dt_initialize,
+        .init_irq       = at91rm9200_dt_init_irq,
+        .init_machine   = at91rm9200_dt_device_init,
+        .dt_compat      = at91rm9200_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index b62f560e6c75..fc593d615e7d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base,
 extern void __init at91rm9200_set_type(int type);
 extern void __init at91_initialize(unsigned long main_clock);
 extern void __init at91x40_initialize(unsigned long main_clock);
+extern void __init at91rm9200_dt_initialize(void);
 extern void __init at91_dt_initialize(void);
 
  /* Interrupts */
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index be42cf0e74bd..c5d7e1e9d757 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -23,8 +23,6 @@
 #include <linux/io.h>
 #include <linux/irqdomain.h>
 #include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/of_gpio.h>
 
 #include <asm/mach/irq.h>
 
@@ -33,6 +31,8 @@
 
 #include "generic.h"
 
+#define MAX_NB_GPIO_PER_BANK    32
+
 struct at91_gpio_chip {
         struct gpio_chip        chip;
         struct at91_gpio_chip   *next;          /* Bank sharing same clock */
@@ -46,6 +46,7 @@ struct at91_gpio_chip {
 
 #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
 
+static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset);
 static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip);
 static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val);
 static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset);
@@ -55,26 +56,27 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                                         unsigned offset);
 static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
 
-#define AT91_GPIO_CHIP(name, nr_gpio)                                   \
+#define AT91_GPIO_CHIP(name)                                            \
         {                                                               \
                 .chip = {                                               \
                         .label            = name,                       \
+                        .request          = at91_gpiolib_request,       \
                         .direction_input  = at91_gpiolib_direction_input, \
                         .direction_output = at91_gpiolib_direction_output, \
                         .get              = at91_gpiolib_get,           \
                         .set              = at91_gpiolib_set,           \
                         .dbg_show         = at91_gpiolib_dbg_show,      \
                         .to_irq           = at91_gpiolib_to_irq,        \
-                        .ngpio            = nr_gpio,                    \
+                        .ngpio            = MAX_NB_GPIO_PER_BANK,       \
                 },                                                      \
         }
 
 static struct at91_gpio_chip gpio_chip[] = {
-        AT91_GPIO_CHIP("pioA", 32),
-        AT91_GPIO_CHIP("pioB", 32),
-        AT91_GPIO_CHIP("pioC", 32),
-        AT91_GPIO_CHIP("pioD", 32),
-        AT91_GPIO_CHIP("pioE", 32),
+        AT91_GPIO_CHIP("pioA"),
+        AT91_GPIO_CHIP("pioB"),
+        AT91_GPIO_CHIP("pioC"),
+        AT91_GPIO_CHIP("pioD"),
+        AT91_GPIO_CHIP("pioE"),
 };
 
 static int gpio_banks;
@@ -89,7 +91,7 @@ static unsigned long at91_gpio_caps;
 
 static inline void __iomem *pin_to_controller(unsigned pin)
 {
-        pin /= 32;
+        pin /= MAX_NB_GPIO_PER_BANK;
         if (likely(pin < gpio_banks))
                 return gpio_chip[pin].regbase;
 
@@ -98,7 +100,7 @@ static inline void __iomem *pin_to_controller(unsigned pin)
 
 static inline unsigned pin_to_mask(unsigned pin)
 {
-        return 1 << (pin % 32);
+        return 1 << (pin % MAX_NB_GPIO_PER_BANK);
 }
 
 
@@ -713,80 +715,6 @@ postcore_initcall(at91_gpio_debugfs_init);
  */
 static struct lock_class_key gpio_lock_class;
 
-#if defined(CONFIG_OF)
-static int at91_gpio_irq_map(struct irq_domain *h, unsigned int virq,
-                                                        irq_hw_number_t hw)
-{
-        struct at91_gpio_chip   *at91_gpio = h->host_data;
-
-        irq_set_lockdep_class(virq, &gpio_lock_class);
-
-        /*
-         * Can use the "simple" and not "edge" handler since it's
-         * shorter, and the AIC handles interrupts sanely.
-         */
-        irq_set_chip_and_handler(virq, &gpio_irqchip,
-                                 handle_simple_irq);
-        set_irq_flags(virq, IRQF_VALID);
-        irq_set_chip_data(virq, at91_gpio);
-
-        return 0;
-}
-
-static struct irq_domain_ops at91_gpio_ops = {
-        .map    = at91_gpio_irq_map,
-        .xlate  = irq_domain_xlate_twocell,
-};
-
-int __init at91_gpio_of_irq_setup(struct device_node *node,
-                                     struct device_node *parent)
-{
-        struct at91_gpio_chip   *prev = NULL;
-        int                     alias_idx = of_alias_get_id(node, "gpio");
-        struct at91_gpio_chip   *at91_gpio = &gpio_chip[alias_idx];
-
-        /* Setup proper .irq_set_type function */
-        if (has_pio3())
-                gpio_irqchip.irq_set_type = alt_gpio_irq_type;
-        else
-                gpio_irqchip.irq_set_type = gpio_irq_type;
-
-        /* Disable irqs of this PIO controller */
-        __raw_writel(~0, at91_gpio->regbase + PIO_IDR);
-
-        /* Setup irq domain */
-        at91_gpio->domain = irq_domain_add_linear(node, at91_gpio->chip.ngpio,
-                                                &at91_gpio_ops, at91_gpio);
-        if (!at91_gpio->domain)
-                panic("at91_gpio.%d: couldn't allocate irq domain (DT).\n",
-                        at91_gpio->pioc_idx);
-
-        /* Setup chained handler */
-        if (at91_gpio->pioc_idx)
-                prev = &gpio_chip[at91_gpio->pioc_idx - 1];
-
-        /* The toplevel handler handles one bank of GPIOs, except
-         * on some SoC it can handles up to three...
-         * We only set up the handler for the first of the list.
-         */
-        if (prev && prev->next == at91_gpio)
-                return 0;
-
-        at91_gpio->pioc_virq = irq_create_mapping(irq_find_host(parent),
-                                                        at91_gpio->pioc_hwirq);
-        irq_set_chip_data(at91_gpio->pioc_virq, at91_gpio);
-        irq_set_chained_handler(at91_gpio->pioc_virq, gpio_irq_handler);
-
-        return 0;
-}
-#else
-int __init at91_gpio_of_irq_setup(struct device_node *node,
-                                     struct device_node *parent)
-{
-        return -EINVAL;
-}
-#endif
-
 /*
  * irqdomain initialization: pile up irqdomains on top of AIC range
  */
@@ -862,6 +790,16 @@ void __init at91_gpio_irq_setup(void)
 }
 
 /* gpiolib support */
+static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+        void __iomem *pio = at91_gpio->regbase;
+        unsigned mask = 1 << offset;
+
+        __raw_writel(mask, pio + PIO_PER);
+        return 0;
+}
+
 static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                                         unsigned offset)
 {
@@ -975,81 +913,11 @@ err:
         return -EINVAL;
 }
 
-#ifdef CONFIG_OF_GPIO
-static void __init of_at91_gpio_init_one(struct device_node *np)
-{
-        int alias_idx;
-        struct at91_gpio_chip *at91_gpio;
-
-        if (!np)
-                return;
-
-        alias_idx = of_alias_get_id(np, "gpio");
-        if (alias_idx >= MAX_GPIO_BANKS) {
-                pr_err("at91_gpio, failed alias idx(%d) > MAX_GPIO_BANKS(%d), ignoring.\n",
-                                                alias_idx, MAX_GPIO_BANKS);
-                return;
-        }
-
-        at91_gpio = &gpio_chip[alias_idx];
-        at91_gpio->chip.base = alias_idx * at91_gpio->chip.ngpio;
-
-        at91_gpio->regbase = of_iomap(np, 0);
-        if (!at91_gpio->regbase) {
-                pr_err("at91_gpio.%d, failed to map registers, ignoring.\n",
-                                                                alias_idx);
-                return;
-        }
-
-        /* Get the interrupts property */
-        if (of_property_read_u32(np, "interrupts", &at91_gpio->pioc_hwirq)) {
-                pr_err("at91_gpio.%d, failed to get interrupts property, ignoring.\n",
-                                                                alias_idx);
-                goto ioremap_err;
-        }
-
-        /* Get capabilities from compatibility property */
-        if (of_device_is_compatible(np, "atmel,at91sam9x5-gpio"))
-                at91_gpio_caps |= AT91_GPIO_CAP_PIO3;
-
-        /* Setup clock */
-        if (at91_gpio_setup_clk(alias_idx))
-                goto ioremap_err;
-
-        at91_gpio->chip.of_node = np;
-        gpio_banks = max(gpio_banks, alias_idx + 1);
-        at91_gpio->pioc_idx = alias_idx;
-        return;
-
-ioremap_err:
-        iounmap(at91_gpio->regbase);
-}
-
-static int __init of_at91_gpio_init(void)
-{
-        struct device_node *np = NULL;
-
-        /*
-         * This isn't ideal, but it gets things hooked up until this
-         * driver is converted into a platform_device
-         */
-        for_each_compatible_node(np, NULL, "atmel,at91rm9200-gpio")
-                of_at91_gpio_init_one(np);
-
-        return gpio_banks > 0 ? 0 : -EINVAL;
-}
-#else
-static int __init of_at91_gpio_init(void)
-{
-        return -EINVAL;
-}
-#endif
-
 static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
 {
         struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
 
-        at91_gpio->chip.base = idx * at91_gpio->chip.ngpio;
+        at91_gpio->chip.base = idx * MAX_NB_GPIO_PER_BANK;
         at91_gpio->pioc_hwirq = pioc_hwirq;
         at91_gpio->pioc_idx = idx;
 
@@ -1079,11 +947,11 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
 
         BUG_ON(nr_banks > MAX_GPIO_BANKS);
 
-        if (of_at91_gpio_init() < 0) {
-                /* No GPIO controller found in device tree */
-                for (i = 0; i < nr_banks; i++)
-                        at91_gpio_init_one(i, data[i].regbase, data[i].id);
-        }
+        if (of_have_populated_dt())
+                return;
+
+        for (i = 0; i < nr_banks; i++)
+                at91_gpio_init_one(i, data[i].regbase, data[i].id);
 
         for (i = 0; i < gpio_banks; i++) {
                 at91_gpio = &gpio_chip[i];
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 0b32c81730a5..19cdd0b5b391 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -10,6 +10,7 @@
 #include <linux/mm.h>
 #include <linux/pm.h>
 #include <linux/of_address.h>
+#include <linux/pinctrl/machine.h>
 
 #include <asm/system_misc.h>
 #include <asm/mach/map.h>
@@ -338,6 +339,7 @@ static void at91_dt_rstc(void)
 }
 
 static struct of_device_id ramc_ids[] = {
+        { .compatible = "atmel,at91rm9200-sdramc" },
         { .compatible = "atmel,at91sam9260-sdramc" },
         { .compatible = "atmel,at91sam9g45-ddramc" },
         { /*sentinel*/ }
@@ -436,6 +438,19 @@ end:
         of_node_put(np);
 }
 
+void __init at91rm9200_dt_initialize(void)
+{
+        at91_dt_ramc();
+
+        /* Init clock subsystem */
+        at91_dt_clock_init();
+
+        /* Register the processor-specific clocks */
+        at91_boot_soc.register_clocks();
+
+        at91_boot_soc.init();
+}
+
 void __init at91_dt_initialize(void)
 {
         at91_dt_rstc();
@@ -448,7 +463,8 @@ void __init at91_dt_initialize(void)
         /* Register the processor-specific clocks */
         at91_boot_soc.register_clocks();
 
-        at91_boot_soc.init();
+        if (at91_boot_soc.init)
+                at91_boot_soc.init();
 }
 #endif
 
@@ -463,4 +479,6 @@ void __init at91_initialize(unsigned long main_clock)
         at91_boot_soc.register_clocks();
 
         at91_boot_soc.init();
+
+        pinctrl_provide_dummies();
 }
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a9cfeb153719..9c6d3d4f9a23 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -5,6 +5,7 @@
  */
 
 struct at91_init_soc {
+        int builtin;
         unsigned int *default_irq_priority;
         void (*map_io)(void);
         void (*ioremap_registers)(void);
@@ -22,9 +23,18 @@ extern struct at91_init_soc at91sam9rl_soc;
 extern struct at91_init_soc at91sam9x5_soc;
 extern struct at91_init_soc at91sam9n12_soc;
 
+#define AT91_SOC_START(_name)                           \
+struct at91_init_soc __initdata at91##_name##_soc       \
+ __used                                                 \
+                                                = {     \
+        .builtin        = 1,                            \
+
+#define AT91_SOC_END                                    \
+};
+
 static inline int at91_soc_is_enabled(void)
 {
-        return at91_boot_soc.init != NULL;
+        return at91_boot_soc.builtin;
 }
 
 #if !defined(CONFIG_SOC_AT91RM9200)
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index bfa1eab91f41..22ef8a1abe08 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -24,6 +24,7 @@
 #include <linux/i2c.h>
 #include <linux/io.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 #include <asm/hardware/vic.h>
 #include <asm/sizes.h>
 #include <asm/mach-types.h>
@@ -32,9 +33,7 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/time.h>
 
-#include <plat/gpio-nomadik.h>
 #include <plat/mtu.h>
-#include <plat/pincfg.h>
 
 #include <linux/platform_data/mtd-nomadik-nand.h>
 #include <mach/fsmc.h>
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index b617eaed0ce5..1273931303fb 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -26,8 +26,8 @@
 #include <linux/irq.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_data/clk-nomadik.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
-#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c
index 6d14454d4609..0c2f6628299a 100644
--- a/arch/arm/mach-nomadik/i2c-8815nhk.c
+++ b/arch/arm/mach-nomadik/i2c-8815nhk.c
@@ -4,8 +4,7 @@
 #include <linux/i2c-algo-bit.h>
 #include <linux/i2c-gpio.h>
 #include <linux/platform_device.h>
-#include <plat/gpio-nomadik.h>
-#include <plat/pincfg.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
 /*
  * There are two busses in the 8815NHK.
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..ece8a2dfb814 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1445,8 +1445,6 @@ static struct platform_device pinctrl_device = {
 static struct u300_gpio_platform u300_gpio_plat = {
         .ports = 7,
         .gpio_base = 0,
-        .gpio_irq_base = IRQ_U300_GPIO_BASE,
-        .pinctrl_device = &pinctrl_device,
 };
 
 static struct platform_device gpio_device = {
@@ -1590,6 +1588,7 @@ static struct platform_device *platform_devs[] __initdata = {
         &i2c1_device,
         &keypad_device,
         &rtc_device,
+        &pinctrl_device,
         &gpio_device,
         &nand_device,
         &wdog_device,
@@ -1804,7 +1803,7 @@ MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
         /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
         .atag_offset    = 0x100,
         .map_io         = u300_map_io,
-        .nr_irqs        = NR_IRQS_U300,
+        .nr_irqs        = 0,
         .init_irq       = u300_init_irq,
         .handle_irq     = vic_handle_irq,
         .timer          = &u300_timer,
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index e27425a63fa1..21d5e76a6cd3 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,79 +12,69 @@
 #ifndef __MACH_IRQS_H
 #define __MACH_IRQS_H
 
-#define IRQ_U300_INTCON0_START          1
-#define IRQ_U300_INTCON1_START          33
+#define IRQ_U300_INTCON0_START          32
+#define IRQ_U300_INTCON1_START          64
 /* These are on INTCON0 - 30 lines */
-#define IRQ_U300_IRQ0_EXT               1
-#define IRQ_U300_IRQ1_EXT               2
-#define IRQ_U300_DMA                    3
-#define IRQ_U300_VIDEO_ENC_0            4
-#define IRQ_U300_VIDEO_ENC_1            5
-#define IRQ_U300_AAIF_RX                6
-#define IRQ_U300_AAIF_TX                7
-#define IRQ_U300_AAIF_VGPIO             8
-#define IRQ_U300_AAIF_WAKEUP            9
-#define IRQ_U300_PCM_I2S0_FRAME         10
-#define IRQ_U300_PCM_I2S0_FIFO          11
-#define IRQ_U300_PCM_I2S1_FRAME         12
-#define IRQ_U300_PCM_I2S1_FIFO          13
-#define IRQ_U300_XGAM_GAMCON            14
-#define IRQ_U300_XGAM_CDI               15
-#define IRQ_U300_XGAM_CDICON            16
-#define IRQ_U300_XGAM_PDI               18
-#define IRQ_U300_XGAM_PDICON            19
-#define IRQ_U300_XGAM_GAMEACC           20
-#define IRQ_U300_XGAM_MCIDCT            21
-#define IRQ_U300_APEX                   22
-#define IRQ_U300_UART0                  23
-#define IRQ_U300_SPI                    24
-#define IRQ_U300_TIMER_APP_OS           25
-#define IRQ_U300_TIMER_APP_DD           26
-#define IRQ_U300_TIMER_APP_GP1          27
-#define IRQ_U300_TIMER_APP_GP2          28
-#define IRQ_U300_TIMER_OS               29
-#define IRQ_U300_TIMER_MS               30
-#define IRQ_U300_KEYPAD_KEYBF           31
-#define IRQ_U300_KEYPAD_KEYBR           32
+#define IRQ_U300_IRQ0_EXT               32
+#define IRQ_U300_IRQ1_EXT               33
+#define IRQ_U300_DMA                    34
+#define IRQ_U300_VIDEO_ENC_0            35
+#define IRQ_U300_VIDEO_ENC_1            36
+#define IRQ_U300_AAIF_RX                37
+#define IRQ_U300_AAIF_TX                38
+#define IRQ_U300_AAIF_VGPIO             39
+#define IRQ_U300_AAIF_WAKEUP            40
+#define IRQ_U300_PCM_I2S0_FRAME         41
+#define IRQ_U300_PCM_I2S0_FIFO          42
+#define IRQ_U300_PCM_I2S1_FRAME         43
+#define IRQ_U300_PCM_I2S1_FIFO          44
+#define IRQ_U300_XGAM_GAMCON            45
+#define IRQ_U300_XGAM_CDI               46
+#define IRQ_U300_XGAM_CDICON            47
+#define IRQ_U300_XGAM_PDI               49
+#define IRQ_U300_XGAM_PDICON            50
+#define IRQ_U300_XGAM_GAMEACC           51
+#define IRQ_U300_XGAM_MCIDCT            52
+#define IRQ_U300_APEX                   53
+#define IRQ_U300_UART0                  54
+#define IRQ_U300_SPI                    55
+#define IRQ_U300_TIMER_APP_OS           56
+#define IRQ_U300_TIMER_APP_DD           57
+#define IRQ_U300_TIMER_APP_GP1          58
+#define IRQ_U300_TIMER_APP_GP2          59
+#define IRQ_U300_TIMER_OS               60
+#define IRQ_U300_TIMER_MS               61
+#define IRQ_U300_KEYPAD_KEYBF           62
+#define IRQ_U300_KEYPAD_KEYBR           63
 /* These are on INTCON1 - 32 lines */
-#define IRQ_U300_GPIO_PORT0             33
-#define IRQ_U300_GPIO_PORT1             34
-#define IRQ_U300_GPIO_PORT2             35
+#define IRQ_U300_GPIO_PORT0             64
+#define IRQ_U300_GPIO_PORT1             65
+#define IRQ_U300_GPIO_PORT2             66
 
 /* These are for DB3150, DB3200 and DB3350 */
-#define IRQ_U300_WDOG                   36
-#define IRQ_U300_EVHIST                 37
-#define IRQ_U300_MSPRO                  38
-#define IRQ_U300_MMCSD_MCIINTR0         39
-#define IRQ_U300_MMCSD_MCIINTR1         40
-#define IRQ_U300_I2C0                   41
-#define IRQ_U300_I2C1                   42
-#define IRQ_U300_RTC                    43
-#define IRQ_U300_NFIF                   44
-#define IRQ_U300_NFIF2                  45
+#define IRQ_U300_WDOG                   67
+#define IRQ_U300_EVHIST                 68
+#define IRQ_U300_MSPRO                  69
+#define IRQ_U300_MMCSD_MCIINTR0         70
+#define IRQ_U300_MMCSD_MCIINTR1         71
+#define IRQ_U300_I2C0                   72
+#define IRQ_U300_I2C1                   73
+#define IRQ_U300_RTC                    74
+#define IRQ_U300_NFIF                   75
+#define IRQ_U300_NFIF2                  76
 
 /* The DB3350-specific interrupt lines */
-#define IRQ_U300_ISP_F0                 46
-#define IRQ_U300_ISP_F1                 47
-#define IRQ_U300_ISP_F2                 48
-#define IRQ_U300_ISP_F3                 49
-#define IRQ_U300_ISP_F4                 50
-#define IRQ_U300_GPIO_PORT3             51
-#define IRQ_U300_SYSCON_PLL_LOCK        52
-#define IRQ_U300_UART1                  53
-#define IRQ_U300_GPIO_PORT4             54
-#define IRQ_U300_GPIO_PORT5             55
-#define IRQ_U300_GPIO_PORT6             56
-#define U300_VIC_IRQS_END               57
-
-/* Maximum 8*7 GPIO lines */
-#ifdef CONFIG_PINCTRL_COH901
-#define IRQ_U300_GPIO_BASE              (U300_VIC_IRQS_END)
-#define IRQ_U300_GPIO_END               (IRQ_U300_GPIO_BASE + 56)
-#else
-#define IRQ_U300_GPIO_END               (U300_VIC_IRQS_END)
-#endif
-
-#define NR_IRQS_U300                    (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
+#define IRQ_U300_ISP_F0                 77
+#define IRQ_U300_ISP_F1                 78
+#define IRQ_U300_ISP_F2                 79
+#define IRQ_U300_ISP_F3                 80
+#define IRQ_U300_ISP_F4                 81
+#define IRQ_U300_GPIO_PORT3             82
+#define IRQ_U300_SYSCON_PLL_LOCK        83
+#define IRQ_U300_UART1                  84
+#define IRQ_U300_GPIO_PORT4             85
+#define IRQ_U300_GPIO_PORT5             86
+#define IRQ_U300_GPIO_PORT6             87
+#define U300_VIC_IRQS_END               88
 
 #endif
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 070629a95625..33631c9f1218 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -7,9 +7,8 @@
 #include <linux/platform_device.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
-#include <plat/gpio-nomadik.h>
-#include <plat/pincfg.h>
 #include <plat/ste_dma40.h>
 
 #include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index a267c6d30e37..c34d4efd0d5c 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -9,10 +9,9 @@
 #include <linux/bug.h>
 #include <linux/string.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
 #include <asm/mach-types.h>
-#include <plat/pincfg.h>
-#include <plat/gpio-nomadik.h>
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 416d436111f2..0a3dd601a400 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -37,13 +37,13 @@
 #include <linux/of_platform.h>
 #include <linux/leds.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 
 #include <plat/ste_dma40.h>
-#include <plat/gpio-nomadik.h>
 
 #include <mach/hardware.h>
 #include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index bcdfe6b1d453..113d9c47a842 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,14 +17,14 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/mfd/abx500/ab8500.h>
+#include <linux/platform_data/usb-musb-ux500.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
 #include <asm/pmu.h>
 #include <asm/mach/map.h>
-#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
 #include <mach/devices.h>
-#include <linux/platform_data/usb-musb-ux500.h>
 #include <mach/db8500-regs.h>
 
 #include "devices-db8500.h"
@@ -158,7 +158,7 @@ static void __init db8500_add_gpios(struct device *parent)
 
         dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
                          IRQ_DB8500_GPIO0, &pdata);
-        dbx500_add_pinctrl(parent, "pinctrl-db8500");
+        dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
 }
 
 static int usb_db8500_rx_dma_cfg[] = {
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index dfdd4a54668d..692a77a1c153 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -11,8 +11,7 @@
 #include <linux/irq.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
-
-#include <plat/gpio-nomadik.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index 7fbf0ba336e1..96fa4ac89e2e 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -129,12 +129,18 @@ void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
                       int irq, struct nmk_gpio_platform_data *pdata);
 
 static inline void
-dbx500_add_pinctrl(struct device *parent, const char *name)
+dbx500_add_pinctrl(struct device *parent, const char *name,
+                   resource_size_t base)
 {
+        struct resource res[] = {
+                DEFINE_RES_MEM(base, SZ_8K),
+        };
         struct platform_device_info pdevinfo = {
                 .parent = parent,
                 .name = name,
                 .id = -1,
+                .res = res,
+                .num_res = ARRAY_SIZE(res),
         };
 
         platform_device_register_full(&pdevinfo);
diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
deleted file mode 100644
index c08a54d9d889..000000000000
--- a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Structures and registers for GPIO access in the Nomadik SoC
- *
- * Copyright (C) 2008 STMicroelectronics
- *     Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
- * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_NOMADIK_GPIO
-#define __PLAT_NOMADIK_GPIO
-
-/*
- * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
- * the "gpio" namespace for generic and cross-machine functions
- */
-
-/* Register in the logic block */
-#define NMK_GPIO_DAT    0x00
-#define NMK_GPIO_DATS   0x04
-#define NMK_GPIO_DATC   0x08
-#define NMK_GPIO_PDIS   0x0c
-#define NMK_GPIO_DIR    0x10
-#define NMK_GPIO_DIRS   0x14
-#define NMK_GPIO_DIRC   0x18
-#define NMK_GPIO_SLPC   0x1c
-#define NMK_GPIO_AFSLA  0x20
-#define NMK_GPIO_AFSLB  0x24
-#define NMK_GPIO_LOWEMI 0x28
-
-#define NMK_GPIO_RIMSC  0x40
-#define NMK_GPIO_FIMSC  0x44
-#define NMK_GPIO_IS     0x48
-#define NMK_GPIO_IC     0x4c
-#define NMK_GPIO_RWIMSC 0x50
-#define NMK_GPIO_FWIMSC 0x54
-#define NMK_GPIO_WKS    0x58
-
-/* Alternate functions: function C is set in hw by setting both A and B */
-#define NMK_GPIO_ALT_GPIO       0
-#define NMK_GPIO_ALT_A  1
-#define NMK_GPIO_ALT_B  2
-#define NMK_GPIO_ALT_C  (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
-
-#define NMK_GPIO_ALT_CX_SHIFT 2
-#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-
-/* Pull up/down values */
-enum nmk_gpio_pull {
-        NMK_GPIO_PULL_NONE,
-        NMK_GPIO_PULL_UP,
-        NMK_GPIO_PULL_DOWN,
-};
-
-/* Sleep mode */
-enum nmk_gpio_slpm {
-        NMK_GPIO_SLPM_INPUT,
-        NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
-        NMK_GPIO_SLPM_NOCHANGE,
-        NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
-};
-
-extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
-extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
-#ifdef CONFIG_PINCTRL_NOMADIK
-extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
-#else
-static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
-{
-        return -ENODEV;
-}
-#endif
-extern int nmk_gpio_get_mode(int gpio);
-
-extern void nmk_gpio_wakeups_suspend(void);
-extern void nmk_gpio_wakeups_resume(void);
-
-extern void nmk_gpio_clocks_enable(void);
-extern void nmk_gpio_clocks_disable(void);
-
-extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
-
-/*
- * Platform data to register a block: only the initial gpio/irq number.
- */
-struct nmk_gpio_platform_data {
-        char *name;
-        int first_gpio;
-        int first_irq;
-        int num_gpio;
-        u32 (*get_secondary_status)(unsigned int bank);
-        void (*set_ioforce)(bool enable);
-        bool supports_sleepmode;
-};
-
-#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
deleted file mode 100644
index 3b8ec60af351..000000000000
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License, version 2
- * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
- *
- * Based on arch/arm/mach-pxa/include/mach/mfp.h:
- *   Copyright (C) 2007 Marvell International Ltd.
- *   eric miao <eric.miao@marvell.com>
- */
-
-#ifndef __PLAT_PINCFG_H
-#define __PLAT_PINCFG_H
-
-/*
- * pin configurations are represented by 32-bit integers:
- *
- *      bit  0.. 8 - Pin Number (512 Pins Maximum)
- *      bit  9..10 - Alternate Function Selection
- *      bit 11..12 - Pull up/down state
- *      bit     13 - Sleep mode behaviour
- *      bit     14 - Direction
- *      bit     15 - Value (if output)
- *      bit 16..18 - SLPM pull up/down state
- *      bit 19..20 - SLPM direction
- *      bit 21..22 - SLPM Value (if output)
- *      bit 23..25 - PDIS value (if input)
- *      bit     26 - Gpio mode
- *      bit     27 - Sleep mode
- *
- * to facilitate the definition, the following macros are provided
- *
- * PIN_CFG_DEFAULT - default config (0):
- *                   pull up/down = disabled
- *                   sleep mode = input/wakeup
- *                   direction = input
- *                   value = low
- *                   SLPM direction = same as normal
- *                   SLPM pull = same as normal
- *                   SLPM value = same as normal
- *
- * PIN_CFG         - default config with alternate function
- */
-
-typedef unsigned long pin_cfg_t;
-
-#define PIN_NUM_MASK            0x1ff
-#define PIN_NUM(x)              ((x) & PIN_NUM_MASK)
-
-#define PIN_ALT_SHIFT           9
-#define PIN_ALT_MASK            (0x3 << PIN_ALT_SHIFT)
-#define PIN_ALT(x)              (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
-#define PIN_GPIO                (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
-#define PIN_ALT_A               (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
-#define PIN_ALT_B               (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
-#define PIN_ALT_C               (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
-
-#define PIN_PULL_SHIFT          11
-#define PIN_PULL_MASK           (0x3 << PIN_PULL_SHIFT)
-#define PIN_PULL(x)             (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
-#define PIN_PULL_NONE           (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
-#define PIN_PULL_UP             (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
-#define PIN_PULL_DOWN           (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
-
-#define PIN_SLPM_SHIFT          13
-#define PIN_SLPM_MASK           (0x1 << PIN_SLPM_SHIFT)
-#define PIN_SLPM(x)             (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
-#define PIN_SLPM_MAKE_INPUT     (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
-#define PIN_SLPM_NOCHANGE       (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
-/* These two replace the above in DB8500v2+ */
-#define PIN_SLPM_WAKEUP_ENABLE  (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
-#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
-#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
-
-#define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
-#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
-
-#define PIN_DIR_SHIFT           14
-#define PIN_DIR_MASK            (0x1 << PIN_DIR_SHIFT)
-#define PIN_DIR(x)              (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
-#define PIN_DIR_INPUT           (0 << PIN_DIR_SHIFT)
-#define PIN_DIR_OUTPUT          (1 << PIN_DIR_SHIFT)
-
-#define PIN_VAL_SHIFT           15
-#define PIN_VAL_MASK            (0x1 << PIN_VAL_SHIFT)
-#define PIN_VAL(x)              (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
-#define PIN_VAL_LOW             (0 << PIN_VAL_SHIFT)
-#define PIN_VAL_HIGH            (1 << PIN_VAL_SHIFT)
-
-#define PIN_SLPM_PULL_SHIFT     16
-#define PIN_SLPM_PULL_MASK      (0x7 << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL(x)        \
-        (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_NONE      \
-        ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_UP        \
-        ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_DOWN      \
-        ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
-
-#define PIN_SLPM_DIR_SHIFT      19
-#define PIN_SLPM_DIR_MASK       (0x3 << PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR(x)         \
-        (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR_INPUT      ((1 + 0) << PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR_OUTPUT     ((1 + 1) << PIN_SLPM_DIR_SHIFT)
-
-#define PIN_SLPM_VAL_SHIFT      21
-#define PIN_SLPM_VAL_MASK       (0x3 << PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL(x)         \
-        (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL_LOW        ((1 + 0) << PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL_HIGH       ((1 + 1) << PIN_SLPM_VAL_SHIFT)
-
-#define PIN_SLPM_PDIS_SHIFT             23
-#define PIN_SLPM_PDIS_MASK              (0x3 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS(x)        \
-        (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_NO_CHANGE         (0 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_DISABLED          (1 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_ENABLED           (2 << PIN_SLPM_PDIS_SHIFT)
-
-#define PIN_LOWEMI_SHIFT        25
-#define PIN_LOWEMI_MASK         (0x1 << PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI(x)           (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI_DISABLED     (0 << PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI_ENABLED      (1 << PIN_LOWEMI_SHIFT)
-
-#define PIN_GPIOMODE_SHIFT      26
-#define PIN_GPIOMODE_MASK       (0x1 << PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE(x)         (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE_DISABLED   (0 << PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE_ENABLED    (1 << PIN_GPIOMODE_SHIFT)
-
-#define PIN_SLEEPMODE_SHIFT     27
-#define PIN_SLEEPMODE_MASK      (0x1 << PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE(x)        (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE_DISABLED  (0 << PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE_ENABLED   (1 << PIN_SLEEPMODE_SHIFT)
-
-
-/* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */
-#define PIN_INPUT_PULLDOWN      (PIN_DIR_INPUT | PIN_PULL_DOWN)
-#define PIN_INPUT_PULLUP        (PIN_DIR_INPUT | PIN_PULL_UP)
-#define PIN_INPUT_NOPULL        (PIN_DIR_INPUT | PIN_PULL_NONE)
-#define PIN_OUTPUT_LOW          (PIN_DIR_OUTPUT | PIN_VAL_LOW)
-#define PIN_OUTPUT_HIGH         (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
-
-#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
-#define PIN_SLPM_INPUT_PULLUP   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
-#define PIN_SLPM_INPUT_NOPULL   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
-#define PIN_SLPM_OUTPUT_LOW     (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
-#define PIN_SLPM_OUTPUT_HIGH    (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
-
-#define PIN_CFG_DEFAULT         (0)
-
-#define PIN_CFG(num, alt)               \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt))
-
-#define PIN_CFG_INPUT(num, alt, pull)           \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
-
-#define PIN_CFG_OUTPUT(num, alt, val)           \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
-
-extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
-extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
-extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
-
-#endif