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-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c64
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c13
-rw-r--r--arch/arm/mach-s3c64xx/setup-ide.c10
-rw-r--r--arch/arm/mach-s3c64xx/setup-keypad.c15
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci-gpio.c41
-rw-r--r--arch/arm/mach-s5p6442/dev-audio.c30
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c6
-rw-r--r--arch/arm/mach-s5p64x0/dev-audio.c26
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c38
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c0.c12
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c1.c12
-rw-r--r--arch/arm/mach-s5pc100/dev-audio.c32
-rw-r--r--arch/arm/mach-s5pc100/dev-spi.c22
-rw-r--r--arch/arm/mach-s5pc100/setup-fb-24bpp.c30
-rw-r--r--arch/arm/mach-s5pc100/setup-i2c0.c6
-rw-r--r--arch/arm/mach-s5pc100/setup-i2c1.c6
-rw-r--r--arch/arm/mach-s5pc100/setup-ide.c41
-rw-r--r--arch/arm/mach-s5pc100/setup-keypad.c15
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci-gpio.c35
-rw-r--r--arch/arm/mach-s5pv210/dev-audio.c46
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c19
-rw-r--r--arch/arm/mach-s5pv210/setup-fb-24bpp.c34
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c0.c6
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c1.c6
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c2.c6
-rw-r--r--arch/arm/mach-s5pv210/setup-ide.c49
-rw-r--r--arch/arm/mach-s5pv210/setup-keypad.c14
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c57
-rw-r--r--arch/arm/mach-s5pv310/setup-i2c0.c6
-rw-r--r--arch/arm/mach-s5pv310/setup-i2c1.c6
-rw-r--r--arch/arm/mach-s5pv310/setup-i2c2.c6
-rw-r--r--arch/arm/plat-samsung/gpio-config.c31
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h38
33 files changed, 258 insertions, 520 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index 9648fbc36eec..4a5c682a3727 100644
--- a/arch/arm/mach-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -22,44 +22,33 @@
22#include <plat/audio.h> 22#include <plat/audio.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25#include <mach/gpio-bank-c.h>
26#include <mach/gpio-bank-d.h>
27#include <mach/gpio-bank-e.h>
28#include <mach/gpio-bank-h.h>
29
30static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) 25static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
31{ 26{
27 unsigned int base;
28
32 switch (pdev->id) { 29 switch (pdev->id) {
33 case 0: 30 case 0:
34 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK); 31 base = S3C64XX_GPD(0);
35 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
36 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
37 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
38 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
39 break; 32 break;
40 case 1: 33 case 1:
41 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK); 34 base = S3C64XX_GPE(0);
42 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK); 35 break;
43 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
44 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
45 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
46 default: 36 default:
47 printk(KERN_DEBUG "Invalid I2S Controller number!"); 37 printk(KERN_DEBUG "Invalid I2S Controller number!");
48 return -EINVAL; 38 return -EINVAL;
49 } 39 }
50 40
41 s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));
42
51 return 0; 43 return 0;
52} 44}
53 45
54static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) 46static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
55{ 47{
56 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0); 48 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5));
57 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1); 49 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5));
58 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2); 50 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5));
59 s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK); 51 s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(5));
60 s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
61 s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
62 s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
63 52
64 return 0; 53 return 0;
65} 54}
@@ -168,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4);
168 157
169static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) 158static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
170{ 159{
160 unsigned int base;
161
171 switch (pdev->id) { 162 switch (pdev->id) {
172 case 0: 163 case 0:
173 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); 164 base = S3C64XX_GPD(0);
174 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
175 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
176 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
177 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
178 break; 165 break;
179 case 1: 166 case 1:
180 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); 167 base = S3C64XX_GPE(0);
181 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
182 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
183 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
184 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
185 break; 168 break;
186 default: 169 default:
187 printk(KERN_DEBUG "Invalid PCM Controller number!"); 170 printk(KERN_DEBUG "Invalid PCM Controller number!");
188 return -EINVAL; 171 return -EINVAL;
189 } 172 }
190 173
174 s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
191 return 0; 175 return 0;
192} 176}
193 177
@@ -261,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1);
261 245
262static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) 246static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
263{ 247{
264 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); 248 return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4));
265 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
266 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
267 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
268 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
269
270 return 0;
271} 249}
272 250
273static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) 251static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
274{ 252{
275 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); 253 return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4));
276 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
277 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
278 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
279 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
280
281 return 0;
282} 254}
283 255
284static struct resource s3c64xx_ac97_resource[] = { 256static struct resource s3c64xx_ac97_resource[] = {
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 000736877df2..8f3091182f9c 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -23,15 +23,6 @@
23 23
24extern void s3c64xx_fb_gpio_setup_24bpp(void) 24extern void s3c64xx_fb_gpio_setup_24bpp(void)
25{ 25{
26 unsigned int gpio; 26 s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
27 27 s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
28 for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
29 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
30 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
31 }
32
33 for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
34 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
35 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
36 }
37} 28}
diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c
index c12c315f33bc..de645e99ba97 100644
--- a/arch/arm/mach-s3c64xx/setup-ide.c
+++ b/arch/arm/mach-s3c64xx/setup-ide.c
@@ -21,7 +21,6 @@
21void s3c64xx_ide_setup_gpio(void) 21void s3c64xx_ide_setup_gpio(void)
22{ 22{
23 u32 reg; 23 u32 reg;
24 u32 gpio = 0;
25 24
26 reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); 25 reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);
27 26
@@ -32,15 +31,12 @@ void s3c64xx_ide_setup_gpio(void)
32 s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); 31 s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));
33 32
34 /* Set XhiDATA[15:0] pins as CF Data[15:0] */ 33 /* Set XhiDATA[15:0] pins as CF Data[15:0] */
35 for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++) 34 s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5));
36 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5));
37 35
38 /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ 36 /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */
39 for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++) 37 s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6));
40 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));
41 38
42 /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ 39 /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */
43 s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); 40 s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));
44 for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++) 41 s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6));
45 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));
46} 42}
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c
index abc34e4e1a93..d1fd7228ee75 100644
--- a/arch/arm/mach-s3c64xx/setup-keypad.c
+++ b/arch/arm/mach-s3c64xx/setup-keypad.c
@@ -15,20 +15,9 @@
15 15
16void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) 16void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
17{ 17{
18 unsigned int gpio;
19 unsigned int end;
20
21 /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ 18 /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
22 end = S3C64XX_GPK(8 + rows); 19 s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
23 for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) {
24 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
25 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
26 }
27 20
28 /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ 21 /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
29 end = S3C64XX_GPL(0 + cols); 22 s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
30 for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34} 23}
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index 322359591374..6eac071afae2 100644
--- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
@@ -24,16 +24,9 @@
24void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) 24void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
25{ 25{
26 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 26 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
27 unsigned int gpio;
28 unsigned int end;
29 27
30 end = S3C64XX_GPG(2 + width); 28 /* Set all the necessary GPG pins to special-function 2 */
31 29 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
32 /* Set all the necessary GPG pins to special-function 0 */
33 for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
34 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
35 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
36 }
37 30
38 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 31 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
39 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); 32 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
@@ -44,16 +37,9 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
44void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) 37void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
45{ 38{
46 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 39 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
47 unsigned int gpio;
48 unsigned int end;
49 40
50 end = S3C64XX_GPH(2 + width); 41 /* Set all the necessary GPH pins to special-function 2 */
51 42 s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2));
52 /* Set all the necessary GPG pins to special-function 0 */
53 for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
54 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
55 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
56 }
57 43
58 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 44 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
59 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); 45 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
@@ -63,20 +49,9 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
63 49
64void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) 50void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
65{ 51{
66 unsigned int gpio; 52 /* Set all the necessary GPH pins to special-function 3 */
67 unsigned int end; 53 s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3));
68 54
69 end = S3C64XX_GPH(6 + width); 55 /* Set all the necessary GPC pins to special-function 3 */
70 56 s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3));
71 /* Set all the necessary GPH pins to special-function 1 */
72 for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
73 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
74 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
75 }
76
77 /* Set all the necessary GPC pins to special-function 1 */
78 for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
79 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
80 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
81 }
82} 57}
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
index 7a4e34720b7b..3462197ff352 100644
--- a/arch/arm/mach-s5p6442/dev-audio.c
+++ b/arch/arm/mach-s5p6442/dev-audio.c
@@ -21,22 +21,16 @@
21 21
22static int s5p6442_cfg_i2s(struct platform_device *pdev) 22static int s5p6442_cfg_i2s(struct platform_device *pdev)
23{ 23{
24 unsigned int base;
25
24 /* configure GPIO for i2s port */ 26 /* configure GPIO for i2s port */
25 switch (pdev->id) { 27 switch (pdev->id) {
26 case 1: 28 case 1:
27 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2)); 29 base = S5P6442_GPC1(0);
28 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2));
32 break; 30 break;
33 31
34 case -1: 32 case -1:
35 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2)); 33 base = S5P6442_GPC0(0);
36 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2));
37 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2));
38 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2));
39 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2));
40 break; 34 break;
41 35
42 default: 36 default:
@@ -44,6 +38,7 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev)
44 return -EINVAL; 38 return -EINVAL;
45 } 39 }
46 40
41 s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
47 return 0; 42 return 0;
48} 43}
49 44
@@ -111,21 +106,15 @@ struct platform_device s5p6442_device_iis1 = {
111 106
112static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev) 107static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
113{ 108{
109 unsigned int base;
110
114 switch (pdev->id) { 111 switch (pdev->id) {
115 case 0: 112 case 0:
116 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3)); 113 base = S5P6442_GPC0(0);
117 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3));
118 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3));
119 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3));
120 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3));
121 break; 114 break;
122 115
123 case 1: 116 case 1:
124 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3)); 117 base = S5P6442_GPC1(0);
125 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3));
126 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3));
127 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3));
128 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3));
129 break; 118 break;
130 119
131 default: 120 default:
@@ -133,6 +122,7 @@ static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
133 return -EINVAL; 122 return -EINVAL;
134 } 123 }
135 124
125 s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));
136 return 0; 126 return 0;
137} 127}
138 128
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
index e894651a88bd..cce8c2470709 100644
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -38,11 +38,9 @@ static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
38 switch (pdev->id) { 38 switch (pdev->id) {
39 case 0: 39 case 0:
40 s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); 40 s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); 41 s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); 42 s3c_gpio_cfgall_range(S5P6442_GPB(2), 2,
45 s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); 43 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
46 break; 44 break;
47 45
48 default: 46 default:
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
index fa097bd68ca4..396bacc0a39a 100644
--- a/arch/arm/mach-s5p64x0/dev-audio.c
+++ b/arch/arm/mach-s5p64x0/dev-audio.c
@@ -24,13 +24,8 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev)
24 /* configure GPIO for i2s port */ 24 /* configure GPIO for i2s port */
25 switch (pdev->id) { 25 switch (pdev->id) {
26 case -1: 26 case -1:
27 s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); 27 s3c_gpio_cfgpin_range(S5P6440_GPR(4), 5, S3C_GPIO_SFN(5));
28 s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); 28 s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(5));
29 s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
30 s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
31 s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
32 s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
33 s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
34 break; 29 break;
35 30
36 default: 31 default:
@@ -47,13 +42,9 @@ static int s5p6450_cfg_i2s(struct platform_device *pdev)
47 switch (pdev->id) { 42 switch (pdev->id) {
48 case -1: 43 case -1:
49 s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); 44 s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
50 s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); 45 s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5));
51 s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); 46 s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5));
52 s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); 47
53 s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
54 s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
55 s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
56 s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
57 break; 48 break;
58 49
59 default: 50 default:
@@ -116,11 +107,8 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
116{ 107{
117 switch (pdev->id) { 108 switch (pdev->id) {
118 case 0: 109 case 0:
119 s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); 110 s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2));
120 s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); 111 s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2));
121 s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
122 s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
123 s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
124 break; 112 break;
125 113
126 default: 114 default:
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index 5b69ec4c8af3..e78ee18c76e3 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -39,23 +39,15 @@ static char *s5p64x0_spi_src_clks[] = {
39 */ 39 */
40static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) 40static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
41{ 41{
42 unsigned int base;
43
42 switch (pdev->id) { 44 switch (pdev->id) {
43 case 0: 45 case 0:
44 s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); 46 base = S5P6440_GPC(0);
45 s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
46 s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
47 s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
48 s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
49 s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
50 break; 47 break;
51 48
52 case 1: 49 case 1:
53 s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); 50 base = S5P6440_GPC(4);
54 s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
55 s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
56 s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
57 s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
58 s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
59 break; 51 break;
60 52
61 default: 53 default:
@@ -63,28 +55,23 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
63 return -EINVAL; 55 return -EINVAL;
64 } 56 }
65 57
58 s3c_gpio_cfgall_range(base, 3,
59 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
60
66 return 0; 61 return 0;
67} 62}
68 63
69static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) 64static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
70{ 65{
66 unsigned int base;
67
71 switch (pdev->id) { 68 switch (pdev->id) {
72 case 0: 69 case 0:
73 s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); 70 base = S5P6450_GPC(0);
74 s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
75 s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
76 s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
77 s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
78 s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
79 break; 71 break;
80 72
81 case 1: 73 case 1:
82 s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); 74 base = S5P6450_GPC(4);
83 s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
84 s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
85 s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
86 s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
87 s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
88 break; 75 break;
89 76
90 default: 77 default:
@@ -92,6 +79,9 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
92 return -EINVAL; 79 return -EINVAL;
93 } 80 }
94 81
82 s3c_gpio_cfgall_range(base, 3,
83 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
84
95 return 0; 85 return 0;
96} 86}
97 87
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
index dc4cc65a5019..46b463917c54 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c0.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c0.c
@@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */
25 25
26void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) 26void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
27{ 27{
28 s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); 28 s3c_gpio_cfgall_range(S5P6440_GPB(5), 2,
29 s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); 29 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
30 s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
31 s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
32} 30}
33 31
34void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) 32void s5p6450_i2c0_cfg_gpio(struct platform_device *dev)
35{ 33{
36 s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); 34 s3c_gpio_cfgall_range(S5P6450_GPB(5), 2,
37 s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); 35 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
38 s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2));
39 s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP);
40} 36}
41 37
42void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } 38void s3c_i2c0_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
index 2edd7912f8e4..6ad3b986021c 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */
25 25
26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) 26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
27{ 27{
28 s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); 28 s3c_gpio_cfgall_range(S5P6440_GPR(9), 2,
29 s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); 29 S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
30 s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
31 s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
32} 30}
33 31
34void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) 32void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
35{ 33{
36 s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6)); 34 s3c_gpio_cfgall_range(S5P6450_GPR(9), 2,
37 s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); 35 S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
38 s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6));
39 s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
40} 36}
41 37
42void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } 38void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c
index a699ed6acc23..7f6d01e74b8e 100644
--- a/arch/arm/mach-s5pc100/dev-audio.c
+++ b/arch/arm/mach-s5pc100/dev-audio.c
@@ -24,19 +24,11 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev)
24 /* configure GPIO for i2s port */ 24 /* configure GPIO for i2s port */
25 switch (pdev->id) { 25 switch (pdev->id) {
26 case 1: 26 case 1:
27 s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); 27 s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2));
32 break; 28 break;
33 29
34 case 2: 30 case 2:
35 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); 31 s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4));
36 s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4));
37 s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4));
38 s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4));
39 s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4));
40 break; 32 break;
41 33
42 case -1: /* Dedicated pins */ 34 case -1: /* Dedicated pins */
@@ -144,19 +136,11 @@ static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev)
144{ 136{
145 switch (pdev->id) { 137 switch (pdev->id) {
146 case 0: 138 case 0:
147 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); 139 s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5));
148 s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5));
149 s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5));
150 s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5));
151 s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5));
152 break; 140 break;
153 141
154 case 1: 142 case 1:
155 s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); 143 s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3));
156 s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3));
157 s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3));
158 s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3));
159 s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3));
160 break; 144 break;
161 145
162 default: 146 default:
@@ -231,13 +215,7 @@ struct platform_device s5pc100_device_pcm1 = {
231 215
232static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) 216static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)
233{ 217{
234 s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); 218 return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4));
235 s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4));
236 s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4));
237 s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4));
238 s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4));
239
240 return 0;
241} 219}
242 220
243static struct resource s5pc100_ac97_resource[] = { 221static struct resource s5pc100_ac97_resource[] = {
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index a0ef7c302c16..57b19794d9bb 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -38,30 +38,20 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
38{ 38{
39 switch (pdev->id) { 39 switch (pdev->id) {
40 case 0: 40 case 0:
41 s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); 41 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
42 s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); 42 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
43 s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2));
44 s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP);
46 s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP);
47 break; 43 break;
48 44
49 case 1: 45 case 1:
50 s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); 46 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
51 s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); 47 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
52 s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2));
53 s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP);
55 s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP);
56 break; 48 break;
57 49
58 case 2: 50 case 2:
59 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); 51 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
60 s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3));
61 s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3));
62 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); 52 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
63 s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); 53 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
64 s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); 54 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
65 break; 55 break;
66 56
67 default: 57 default:
diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
index 6eba6cb8e2f4..d31c0f3fe222 100644
--- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
@@ -22,27 +22,15 @@
22 22
23#define DISR_OFFSET 0x7008 23#define DISR_OFFSET 0x7008
24 24
25void s5pc100_fb_gpio_setup_24bpp(void) 25static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr)
26{ 26{
27 unsigned int gpio = 0; 27 s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2));
28 28}
29 for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) {
30 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
31 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
32 }
33
34 for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) {
35 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
36 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
37 }
38
39 for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) {
40 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
41 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
42 }
43 29
44 for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { 30void s5pc100_fb_gpio_setup_24bpp(void)
45 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 31{
46 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); 32 s5pc100_fb_setgpios(S5PC100_GPF0(0), 8);
47 } 33 s5pc100_fb_setgpios(S5PC100_GPF1(0), 8);
34 s5pc100_fb_setgpios(S5PC100_GPF2(0), 8);
35 s5pc100_fb_setgpios(S5PC100_GPF3(0), 4);
48} 36}
diff --git a/arch/arm/mach-s5pc100/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c
index dd3174e6ecc5..eaef7a3bda49 100644
--- a/arch/arm/mach-s5pc100/setup-i2c0.c
+++ b/arch/arm/mach-s5pc100/setup-i2c0.c
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
23 23
24void s3c_i2c0_cfg_gpio(struct platform_device *dev) 24void s3c_i2c0_cfg_gpio(struct platform_device *dev)
25{ 25{
26 s3c_gpio_cfgpin(S5PC100_GPD(3), S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgall_range(S5PC100_GPD(3), 2,
27 s3c_gpio_setpull(S5PC100_GPD(3), S3C_GPIO_PULL_UP); 27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PC100_GPD(4), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PC100_GPD(4), S3C_GPIO_PULL_UP);
30} 28}
diff --git a/arch/arm/mach-s5pc100/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c
index d1fec26b69ee..aaff74a90dee 100644
--- a/arch/arm/mach-s5pc100/setup-i2c1.c
+++ b/arch/arm/mach-s5pc100/setup-i2c1.c
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
23 23
24void s3c_i2c1_cfg_gpio(struct platform_device *dev) 24void s3c_i2c1_cfg_gpio(struct platform_device *dev)
25{ 25{
26 s3c_gpio_cfgpin(S5PC100_GPD(5), S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgall_range(S5PC100_GPD(5), 2,
27 s3c_gpio_setpull(S5PC100_GPD(5), S3C_GPIO_PULL_UP); 27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PC100_GPD(6), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PC100_GPD(6), S3C_GPIO_PULL_UP);
30} 28}
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c
index 83575671fb59..223aae044466 100644
--- a/arch/arm/mach-s5pc100/setup-ide.c
+++ b/arch/arm/mach-s5pc100/setup-ide.c
@@ -17,52 +17,39 @@
17#include <mach/regs-clock.h> 17#include <mach/regs-clock.h>
18#include <plat/gpio-cfg.h> 18#include <plat/gpio-cfg.h>
19 19
20static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr)
21{
22 s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4));
23
24 for (; nr > 0; nr--, base++)
25 s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
26}
27
20void s5pc100_ide_setup_gpio(void) 28void s5pc100_ide_setup_gpio(void)
21{ 29{
22 u32 reg; 30 u32 reg;
23 u32 gpio = 0;
24 31
25 /* Independent CF interface, CF chip select configuration */ 32 /* Independent CF interface, CF chip select configuration */
26 reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); 33 reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f);
27 writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); 34 writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG);
28 35
29 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ 36 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
30 for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) { 37 s5pc100_ide_cfg_gpios(S5PC100_GPJ0(0), 8);
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
34 }
35 38
36 /*CF_Data[0 - 7] */ 39 /*CF_Data[0 - 7] */
37 for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) { 40 s5pc100_ide_cfg_gpios(S5PC100_GPJ2(0), 8);
38 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
39 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
40 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
41 }
42 41
43 /* CF_Data[8 - 15] */ 42 /* CF_Data[8 - 15] */
44 for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) { 43 s5pc100_ide_cfg_gpios(S5PC100_GPJ3(0), 8);
45 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
46 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
47 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
48 }
49 44
50 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ 45 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
51 for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) { 46 s5pc100_ide_cfg_gpios(S5PC100_GPJ4(0), 4);
52 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
53 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
54 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
55 }
56 47
57 /* EBI_OE, EBI_WE */ 48 /* EBI_OE, EBI_WE */
58 for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++) 49 s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0));
59 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
60 50
61 /* CF_OE, CF_WE */ 51 /* CF_OE, CF_WE */
62 for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) { 52 s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2));
63 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
64 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
65 }
66 53
67 /* CF_CD */ 54 /* CF_CD */
68 s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); 55 s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c
index d0837a72a58e..ada377f0c206 100644
--- a/arch/arm/mach-s5pc100/setup-keypad.c
+++ b/arch/arm/mach-s5pc100/setup-keypad.c
@@ -15,20 +15,9 @@
15 15
16void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) 16void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
17{ 17{
18 unsigned int gpio;
19 unsigned int end;
20
21 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ 18 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
22 end = S5PC100_GPH3(rows); 19 s3c_gpio_cfgrange_nopull(S5PC100_GPH3(0), rows, S3C_GPIO_SFN(3));
23 for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) {
24 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
25 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
26 }
27 20
28 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ 21 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
29 end = S5PC100_GPH2(cols); 22 s3c_gpio_cfgrange_nopull(S5PC100_GPH2(0), cols, S3C_GPIO_SFN(3));
30 for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34} 23}
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
index dc7208c639ea..03c02d04c68c 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
@@ -25,8 +25,6 @@
25void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) 25void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
26{ 26{
27 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 27 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
28 unsigned int gpio;
29 unsigned int end;
30 unsigned int num; 28 unsigned int num;
31 29
32 num = width; 30 num = width;
@@ -34,20 +32,11 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
34 if (width == 8) 32 if (width == 8)
35 num = width - 2; 33 num = width - 2;
36 34
37 end = S5PC100_GPG0(2 + num);
38
39 /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ 35 /* Set all the necessary GPG0/GPG1 pins to special-function 0 */
40 for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { 36 s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
42 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
43 }
44 37
45 if (width == 8) { 38 if (width == 8)
46 for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { 39 s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2));
47 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
48 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
49 }
50 }
51 40
52 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 41 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
53 s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); 42 s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP);
@@ -58,16 +47,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
58void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) 47void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
59{ 48{
60 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 49 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
61 unsigned int gpio;
62 unsigned int end;
63
64 end = S5PC100_GPG2(2 + width);
65 50
66 /* Set all the necessary GPG2 pins to special-function 2 */ 51 /* Set all the necessary GPG2 pins to special-function 2 */
67 for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { 52 s3c_gpio_cfgrange_nopull(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2));
68 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
69 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
70 }
71 53
72 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 54 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
73 s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); 55 s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP);
@@ -78,16 +60,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
78void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) 60void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
79{ 61{
80 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 62 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
81 unsigned int gpio;
82 unsigned int end;
83
84 end = S5PC100_GPG3(2 + width);
85 63
86 /* Set all the necessary GPG3 pins to special-function 2 */ 64 /* Set all the necessary GPG3 pins to special-function 2 */
87 for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { 65 s3c_gpio_cfgrange_nopull(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2));
88 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
89 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
90 }
91 66
92 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 67 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
93 s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); 68 s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index 21dc6cf955c3..b274b6be7bd5 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -24,29 +24,15 @@ static int s5pv210_cfg_i2s(struct platform_device *pdev)
24 /* configure GPIO for i2s port */ 24 /* configure GPIO for i2s port */
25 switch (pdev->id) { 25 switch (pdev->id) {
26 case 1: 26 case 1:
27 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(2)); 27 s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(2));
32 break; 28 break;
33 29
34 case 2: 30 case 2:
35 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(4)); 31 s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(4));
36 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(4));
37 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(4));
38 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(4));
39 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4));
40 break; 32 break;
41 33
42 case -1: 34 case -1:
43 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2)); 35 s3c_gpio_cfgpin_range(S5PV210_GPI(0), 7, S3C_GPIO_SFN(2));
44 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2));
45 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2));
46 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(2));
47 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(2));
48 s3c_gpio_cfgpin(S5PV210_GPI(5), S3C_GPIO_SFN(2));
49 s3c_gpio_cfgpin(S5PV210_GPI(6), S3C_GPIO_SFN(2));
50 break; 36 break;
51 37
52 default: 38 default:
@@ -151,25 +137,13 @@ static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev)
151{ 137{
152 switch (pdev->id) { 138 switch (pdev->id) {
153 case 0: 139 case 0:
154 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(3)); 140 s3c_gpio_cfgpin_range(S5PV210_GPI(0), 5, S3C_GPIO_SFN(3));
155 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(3));
156 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(3));
157 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(3));
158 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(3));
159 break; 141 break;
160 case 1: 142 case 1:
161 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(3)); 143 s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(3));
162 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(3));
163 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(3));
164 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(3));
165 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(3));
166 break; 144 break;
167 case 2: 145 case 2:
168 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(2)); 146 s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(2));
169 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(2));
170 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(2));
171 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(2));
172 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(2));
173 break; 147 break;
174 default: 148 default:
175 printk(KERN_DEBUG "Invalid PCM Controller number!"); 149 printk(KERN_DEBUG "Invalid PCM Controller number!");
@@ -271,13 +245,7 @@ struct platform_device s5pv210_device_pcm2 = {
271 245
272static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev) 246static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev)
273{ 247{
274 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(4)); 248 return s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(4));
275 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(4));
276 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(4));
277 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(4));
278 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(4));
279
280 return 0;
281} 249}
282 250
283static struct resource s5pv210_ac97_resource[] = { 251static struct resource s5pv210_ac97_resource[] = {
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index 826cdbc43e20..e3249a47e3b1 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -35,23 +35,15 @@ static char *spi_src_clks[] = {
35 */ 35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) 36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{ 37{
38 unsigned int base;
39
38 switch (pdev->id) { 40 switch (pdev->id) {
39 case 0: 41 case 0:
40 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); 42 base = S5PV210_GPB(0);
41 s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP);
46 break; 43 break;
47 44
48 case 1: 45 case 1:
49 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); 46 base = S5PV210_GPB(4);
50 s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2));
51 s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2));
52 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
53 s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP);
55 break; 47 break;
56 48
57 default: 49 default:
@@ -59,6 +51,9 @@ static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
59 return -EINVAL; 51 return -EINVAL;
60 } 52 }
61 53
54 s3c_gpio_cfgall_range(base, 3,
55 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
56
62 return 0; 57 return 0;
63} 58}
64 59
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
index 928cf1f125fa..e932ebfac56d 100644
--- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -21,33 +21,21 @@
21#include <mach/regs-clock.h> 21#include <mach/regs-clock.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23 23
24void s5pv210_fb_gpio_setup_24bpp(void) 24static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr)
25{ 25{
26 unsigned int gpio = 0; 26 s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2));
27
28 for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) {
29 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
30 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
31 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
32 }
33 27
34 for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) { 28 for (; nr > 0; nr--, base++)
35 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 29 s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
36 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); 30}
37 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
38 }
39 31
40 for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) {
41 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
42 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
43 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
44 }
45 32
46 for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) { 33void s5pv210_fb_gpio_setup_24bpp(void)
47 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 34{
48 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); 35 s5pv210_fb_cfg_gpios(S5PV210_GPF0(0), 8);
49 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 36 s5pv210_fb_cfg_gpios(S5PV210_GPF1(0), 8);
50 } 37 s5pv210_fb_cfg_gpios(S5PV210_GPF2(0), 8);
38 s5pv210_fb_cfg_gpios(S5PV210_GPF3(0), 4);
51 39
52 /* Set DISPLAY_CONTROL register for Display path selection. 40 /* Set DISPLAY_CONTROL register for Display path selection.
53 * 41 *
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
index d38f7cb7e662..0f1cc3a1c1e8 100644
--- a/arch/arm/mach-s5pv210/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
23 23
24void s3c_i2c0_cfg_gpio(struct platform_device *dev) 24void s3c_i2c0_cfg_gpio(struct platform_device *dev)
25{ 25{
26 s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgall_range(S5PV210_GPD1(0), 2,
27 s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP); 27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP);
30} 28}
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c
index 148bb7857d89..f61365a34c56 100644
--- a/arch/arm/mach-s5pv210/setup-i2c1.c
+++ b/arch/arm/mach-s5pv210/setup-i2c1.c
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
23 23
24void s3c_i2c1_cfg_gpio(struct platform_device *dev) 24void s3c_i2c1_cfg_gpio(struct platform_device *dev)
25{ 25{
26 s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgall_range(S5PV210_GPD1(2), 2,
27 s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP); 27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP);
30} 28}
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c
index 2396cb8c373e..2f91b5cefbc6 100644
--- a/arch/arm/mach-s5pv210/setup-i2c2.c
+++ b/arch/arm/mach-s5pv210/setup-i2c2.c
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
23 23
24void s3c_i2c2_cfg_gpio(struct platform_device *dev) 24void s3c_i2c2_cfg_gpio(struct platform_device *dev)
25{ 25{
26 s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgall_range(S5PV210_GPD1(4), 2,
27 s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP); 27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP);
30} 28}
diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c
index b558b1cc8d60..ea123d546bd2 100644
--- a/arch/arm/mach-s5pv210/setup-ide.c
+++ b/arch/arm/mach-s5pv210/setup-ide.c
@@ -15,36 +15,25 @@
15 15
16#include <plat/gpio-cfg.h> 16#include <plat/gpio-cfg.h>
17 17
18static void s5pv210_ide_cfg_gpios(unsigned int base, unsigned int nr)
19{
20 s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4));
21
22 for (; nr > 0; nr--, base++)
23 s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
24}
25
18void s5pv210_ide_setup_gpio(void) 26void s5pv210_ide_setup_gpio(void)
19{ 27{
20 unsigned int gpio = 0; 28 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
21 29 s5pv210_ide_cfg_gpios(S5PV210_GPJ0(0), 8);
22 for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) { 30
23 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, 31 /* CF_Data[0 - 7] */
24 CF_DMACK */ 32 s5pv210_ide_cfg_gpios(S5PV210_GPJ2(0), 8);
25 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); 33
26 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); 34 /* CF_Data[8 - 15] */
27 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 35 s5pv210_ide_cfg_gpios(S5PV210_GPJ3(0), 8);
28 } 36
29 37 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
30 for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) { 38 s5pv210_ide_cfg_gpios(S5PV210_GPJ4(0), 4);
31 /*CF_Data[0 - 7] */
32 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
33 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
34 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
35 }
36
37 for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
38 /* CF_Data[8 - 15] */
39 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
40 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
41 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
42 }
43
44 for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
45 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
46 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
47 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
48 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
49 }
50} 39}
diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c
index 37b2790aafc3..c56420a52f48 100644
--- a/arch/arm/mach-s5pv210/setup-keypad.c
+++ b/arch/arm/mach-s5pv210/setup-keypad.c
@@ -16,19 +16,9 @@
16 16
17void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) 17void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
18{ 18{
19 unsigned int gpio, end;
20
21 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ 19 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
22 end = S5PV210_GPH3(rows); 20 s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3));
23 for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
24 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
25 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
26 }
27 21
28 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ 22 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
29 end = S5PV210_GPH2(cols); 23 s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3));
30 for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34} 24}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index b18587b1ec58..746777d56df9 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -26,26 +26,17 @@
26void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) 26void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
27{ 27{
28 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 28 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
29 unsigned int gpio;
30 29
31 /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ 30 /* Set all the necessary GPG0/GPG1 pins to special-function 2 */
32 for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) { 31 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2));
33 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 32
34 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
35 }
36 switch (width) { 33 switch (width) {
37 case 8: 34 case 8:
38 /* GPG1[3:6] special-funtion 3 */ 35 /* GPG1[3:6] special-funtion 3 */
39 for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { 36 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3));
40 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
41 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
42 }
43 case 4: 37 case 4:
44 /* GPG0[3:6] special-funtion 2 */ 38 /* GPG0[3:6] special-funtion 2 */
45 for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) { 39 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2));
46 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
47 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
48 }
49 default: 40 default:
50 break; 41 break;
51 } 42 }
@@ -59,19 +50,12 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
59void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) 50void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
60{ 51{
61 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 52 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
62 unsigned int gpio;
63 53
64 /* Set all the necessary GPG1[0:1] pins to special-function 2 */ 54 /* Set all the necessary GPG1[0:1] pins to special-function 2 */
65 for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) { 55 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(0), 2, S3C_GPIO_SFN(2));
66 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
67 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
68 }
69 56
70 /* Data pin GPG1[3:6] to special-function 2 */ 57 /* Data pin GPG1[3:6] to special-function 2 */
71 for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { 58 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(2));
72 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
73 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
74 }
75 59
76 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 60 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
77 s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); 61 s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
@@ -82,27 +66,17 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
82void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) 66void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
83{ 67{
84 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 68 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
85 unsigned int gpio;
86 69
87 /* Set all the necessary GPG2[0:1] pins to special-function 2 */ 70 /* Set all the necessary GPG2[0:1] pins to special-function 2 */
88 for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) { 71 s3c_gpio_cfgrange_nopull(S5PV210_GPG2(0), 2, S3C_GPIO_SFN(2));
89 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
90 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
91 }
92 72
93 switch (width) { 73 switch (width) {
94 case 8: 74 case 8:
95 /* Data pin GPG3[3:6] to special-function 3 */ 75 /* Data pin GPG3[3:6] to special-function 3 */
96 for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { 76 s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(3));
97 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
98 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
99 }
100 case 4: 77 case 4:
101 /* Data pin GPG2[3:6] to special-function 2 */ 78 /* Data pin GPG2[3:6] to special-function 2 */
102 for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) { 79 s3c_gpio_cfgrange_nopull(S5PV210_GPG2(3), 4, S3C_GPIO_SFN(2));
103 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
104 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
105 }
106 default: 80 default:
107 break; 81 break;
108 } 82 }
@@ -116,19 +90,12 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
116void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) 90void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
117{ 91{
118 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; 92 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
119 unsigned int gpio;
120 93
121 /* Set all the necessary GPG3[0:2] pins to special-function 2 */ 94 /* Set all the necessary GPG3[0:1] pins to special-function 2 */
122 for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) { 95 s3c_gpio_cfgrange_nopull(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2));
123 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
124 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
125 }
126 96
127 /* Data pin GPG3[3:6] to special-function 2 */ 97 /* Data pin GPG3[3:6] to special-function 2 */
128 for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { 98 s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2));
129 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
130 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
131 }
132 99
133 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 100 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
134 s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); 101 s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c
index 436712807383..f47f8f3152ec 100644
--- a/arch/arm/mach-s5pv310/setup-i2c0.c
+++ b/arch/arm/mach-s5pv310/setup-i2c0.c
@@ -21,8 +21,6 @@ struct platform_device; /* don't need the contents */
21 21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev) 22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{ 23{
24 s3c_gpio_cfgpin(S5PV310_GPD1(0), S3C_GPIO_SFN(2)); 24 s3c_gpio_cfgall_range(S5PV310_GPD1(0), 2,
25 s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP); 25 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
26 s3c_gpio_cfgpin(S5PV310_GPD1(1), S3C_GPIO_SFN(2));
27 s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP);
28} 26}
diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-s5pv310/setup-i2c1.c
index 1ecd5bc35b5a..9d07e4e2f14c 100644
--- a/arch/arm/mach-s5pv310/setup-i2c1.c
+++ b/arch/arm/mach-s5pv310/setup-i2c1.c
@@ -18,8 +18,6 @@ struct platform_device; /* don't need the contents */
18 18
19void s3c_i2c1_cfg_gpio(struct platform_device *dev) 19void s3c_i2c1_cfg_gpio(struct platform_device *dev)
20{ 20{
21 s3c_gpio_cfgpin(S5PV310_GPD1(2), S3C_GPIO_SFN(2)); 21 s3c_gpio_cfgall_range(S5PV310_GPD1(2), 2,
22 s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP); 22 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
23 s3c_gpio_cfgpin(S5PV310_GPD1(3), S3C_GPIO_SFN(2));
24 s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP);
25} 23}
diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-s5pv310/setup-i2c2.c
index 4c0d8def660a..4163b1233daf 100644
--- a/arch/arm/mach-s5pv310/setup-i2c2.c
+++ b/arch/arm/mach-s5pv310/setup-i2c2.c
@@ -18,8 +18,6 @@ struct platform_device; /* don't need the contents */
18 18
19void s3c_i2c2_cfg_gpio(struct platform_device *dev) 19void s3c_i2c2_cfg_gpio(struct platform_device *dev)
20{ 20{
21 s3c_gpio_cfgpin(S5PV310_GPA0(6), S3C_GPIO_SFN(3)); 21 s3c_gpio_cfgall_range(S5PV310_GPA0(6), 2,
22 s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP); 22 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
23 s3c_gpio_cfgpin(S5PV310_GPA0(7), S3C_GPIO_SFN(3));
24 s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP);
25} 23}
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index e3d41eaed1ff..8a372110a850 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -41,6 +41,37 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
41} 41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin); 42EXPORT_SYMBOL(s3c_gpio_cfgpin);
43 43
44int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
45 unsigned int cfg)
46{
47 int ret;
48
49 for (; nr > 0; nr--, start++) {
50 ret = s3c_gpio_cfgpin(start, cfg);
51 if (ret != 0)
52 return ret;
53 }
54
55 return 0;
56}
57EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range);
58
59int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
60 unsigned int cfg, s3c_gpio_pull_t pull)
61{
62 int ret;
63
64 for (; nr > 0; nr--, start++) {
65 s3c_gpio_setpull(start, pull);
66 ret = s3c_gpio_cfgpin(start, cfg);
67 if (ret != 0)
68 return ret;
69 }
70
71 return 0;
72}
73EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range);
74
44unsigned s3c_gpio_getcfg(unsigned int pin) 75unsigned s3c_gpio_getcfg(unsigned int pin)
45{ 76{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); 77 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 5b43b95da68e..e4b5cf126fa9 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -108,6 +108,19 @@ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
108 */ 108 */
109extern unsigned s3c_gpio_getcfg(unsigned int pin); 109extern unsigned s3c_gpio_getcfg(unsigned int pin);
110 110
111/**
112 * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
113 * @start: The pin number to start at
114 * @nr: The number of pins to configure from @start.
115 * @cfg: The configuration for the pin's function
116 *
117 * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
118 *
119 * @sa s3c_gpio_cfgpin.
120 */
121extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
122 unsigned int cfg);
123
111/* Define values for the pull-{up,down} available for each gpio pin. 124/* Define values for the pull-{up,down} available for each gpio pin.
112 * 125 *
113 * These values control the state of the weak pull-{up,down} resistors 126 * These values control the state of the weak pull-{up,down} resistors
@@ -140,6 +153,31 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
140*/ 153*/
141extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); 154extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
142 155
156/* configure `all` aspects of an gpio */
157
158/**
159 * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
160 * @start: The gpio number to start at.
161 * @nr: The number of gpio to configure from @start.
162 * @cfg: The configuration to use
163 * @pull: The pull setting to use.
164 *
165 * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
166 * @gpio and running for @size.
167 *
168 * @sa s3c_gpio_cfgpin
169 * @sa s3c_gpio_setpull
170 * @sa s3c_gpio_cfgpin_range
171 */
172extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
173 unsigned int cfg, s3c_gpio_pull_t pull);
174
175static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
176 unsigned int cfg)
177{
178 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
179}
180
143/* Define values for the drvstr available for each gpio pin. 181/* Define values for the drvstr available for each gpio pin.
144 * 182 *
145 * These values control the value of the output signal driver strength, 183 * These values control the value of the output signal driver strength,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 14:51:37 -0500