diff options
Diffstat (limited to 'arch/arm')
46 files changed, 145 insertions, 97 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a48aecc17eac..dfb0312f4e73 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622 | |||
1280 | depends on CPU_V7 | 1280 | depends on CPU_V7 |
1281 | help | 1281 | help |
1282 | This option enables the workaround for the 743622 Cortex-A9 | 1282 | This option enables the workaround for the 743622 Cortex-A9 |
1283 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | 1283 | (r2p*) erratum. Under very rare conditions, a faulty |
1284 | optimisation in the Cortex-A9 Store Buffer may lead to data | 1284 | optimisation in the Cortex-A9 Store Buffer may lead to data |
1285 | corruption. This workaround sets a specific bit in the diagnostic | 1285 | corruption. This workaround sets a specific bit in the diagnostic |
1286 | register of the Cortex-A9 which disables the Store Buffer | 1286 | register of the Cortex-A9 which disables the Store Buffer |
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore index ce1c5ff746e7..3c79f85975aa 100644 --- a/arch/arm/boot/.gitignore +++ b/arch/arm/boot/.gitignore | |||
@@ -3,3 +3,4 @@ zImage | |||
3 | xipImage | 3 | xipImage |
4 | bootpImage | 4 | bootpImage |
5 | uImage | 5 | uImage |
6 | *.dtb | ||
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h index b5a5be2536c1..90114faa9f3c 100644 --- a/arch/arm/include/asm/pmu.h +++ b/arch/arm/include/asm/pmu.h | |||
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type); | |||
134 | 134 | ||
135 | u64 armpmu_event_update(struct perf_event *event, | 135 | u64 armpmu_event_update(struct perf_event *event, |
136 | struct hw_perf_event *hwc, | 136 | struct hw_perf_event *hwc, |
137 | int idx, int overflow); | 137 | int idx); |
138 | 138 | ||
139 | int armpmu_event_set_period(struct perf_event *event, | 139 | int armpmu_event_set_period(struct perf_event *event, |
140 | struct hw_perf_event *hwc, | 140 | struct hw_perf_event *hwc, |
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 4dd0edab6a65..1651d4950744 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c | |||
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm) | |||
242 | 242 | ||
243 | memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); | 243 | memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); |
244 | 244 | ||
245 | vma.vm_flags = VM_EXEC; | ||
245 | vma.vm_mm = mm; | 246 | vma.vm_mm = mm; |
246 | 247 | ||
247 | flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE); | 248 | flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE); |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 5bb91bf3d47f..b2abfa18f137 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event, | |||
180 | u64 | 180 | u64 |
181 | armpmu_event_update(struct perf_event *event, | 181 | armpmu_event_update(struct perf_event *event, |
182 | struct hw_perf_event *hwc, | 182 | struct hw_perf_event *hwc, |
183 | int idx, int overflow) | 183 | int idx) |
184 | { | 184 | { |
185 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); | 185 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
186 | u64 delta, prev_raw_count, new_raw_count; | 186 | u64 delta, prev_raw_count, new_raw_count; |
@@ -193,13 +193,7 @@ again: | |||
193 | new_raw_count) != prev_raw_count) | 193 | new_raw_count) != prev_raw_count) |
194 | goto again; | 194 | goto again; |
195 | 195 | ||
196 | new_raw_count &= armpmu->max_period; | 196 | delta = (new_raw_count - prev_raw_count) & armpmu->max_period; |
197 | prev_raw_count &= armpmu->max_period; | ||
198 | |||
199 | if (overflow) | ||
200 | delta = armpmu->max_period - prev_raw_count + new_raw_count + 1; | ||
201 | else | ||
202 | delta = new_raw_count - prev_raw_count; | ||
203 | 197 | ||
204 | local64_add(delta, &event->count); | 198 | local64_add(delta, &event->count); |
205 | local64_sub(delta, &hwc->period_left); | 199 | local64_sub(delta, &hwc->period_left); |
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event) | |||
216 | if (hwc->idx < 0) | 210 | if (hwc->idx < 0) |
217 | return; | 211 | return; |
218 | 212 | ||
219 | armpmu_event_update(event, hwc, hwc->idx, 0); | 213 | armpmu_event_update(event, hwc, hwc->idx); |
220 | } | 214 | } |
221 | 215 | ||
222 | static void | 216 | static void |
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags) | |||
232 | if (!(hwc->state & PERF_HES_STOPPED)) { | 226 | if (!(hwc->state & PERF_HES_STOPPED)) { |
233 | armpmu->disable(hwc, hwc->idx); | 227 | armpmu->disable(hwc, hwc->idx); |
234 | barrier(); /* why? */ | 228 | barrier(); /* why? */ |
235 | armpmu_event_update(event, hwc, hwc->idx, 0); | 229 | armpmu_event_update(event, hwc, hwc->idx); |
236 | hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; | 230 | hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; |
237 | } | 231 | } |
238 | } | 232 | } |
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event) | |||
518 | hwc->config_base |= (unsigned long)mapping; | 512 | hwc->config_base |= (unsigned long)mapping; |
519 | 513 | ||
520 | if (!hwc->sample_period) { | 514 | if (!hwc->sample_period) { |
521 | hwc->sample_period = armpmu->max_period; | 515 | /* |
516 | * For non-sampling runs, limit the sample_period to half | ||
517 | * of the counter width. That way, the new counter value | ||
518 | * is far less likely to overtake the previous one unless | ||
519 | * you have some serious IRQ latency issues. | ||
520 | */ | ||
521 | hwc->sample_period = armpmu->max_period >> 1; | ||
522 | hwc->last_period = hwc->sample_period; | 522 | hwc->last_period = hwc->sample_period; |
523 | local64_set(&hwc->period_left, hwc->sample_period); | 523 | local64_set(&hwc->period_left, hwc->sample_period); |
524 | } | 524 | } |
@@ -680,6 +680,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu) | |||
680 | } | 680 | } |
681 | 681 | ||
682 | /* | 682 | /* |
683 | * PMU hardware loses all context when a CPU goes offline. | ||
684 | * When a CPU is hotplugged back in, since some hardware registers are | ||
685 | * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading | ||
686 | * junk values out of them. | ||
687 | */ | ||
688 | static int __cpuinit pmu_cpu_notify(struct notifier_block *b, | ||
689 | unsigned long action, void *hcpu) | ||
690 | { | ||
691 | if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) | ||
692 | return NOTIFY_DONE; | ||
693 | |||
694 | if (cpu_pmu && cpu_pmu->reset) | ||
695 | cpu_pmu->reset(NULL); | ||
696 | |||
697 | return NOTIFY_OK; | ||
698 | } | ||
699 | |||
700 | static struct notifier_block __cpuinitdata pmu_cpu_notifier = { | ||
701 | .notifier_call = pmu_cpu_notify, | ||
702 | }; | ||
703 | |||
704 | /* | ||
683 | * CPU PMU identification and registration. | 705 | * CPU PMU identification and registration. |
684 | */ | 706 | */ |
685 | static int __init | 707 | static int __init |
@@ -730,6 +752,7 @@ init_hw_perf_events(void) | |||
730 | pr_info("enabled with %s PMU driver, %d counters available\n", | 752 | pr_info("enabled with %s PMU driver, %d counters available\n", |
731 | cpu_pmu->name, cpu_pmu->num_events); | 753 | cpu_pmu->name, cpu_pmu->num_events); |
732 | cpu_pmu_init(cpu_pmu); | 754 | cpu_pmu_init(cpu_pmu); |
755 | register_cpu_notifier(&pmu_cpu_notifier); | ||
733 | armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); | 756 | armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); |
734 | } else { | 757 | } else { |
735 | pr_info("no hardware support available\n"); | 758 | pr_info("no hardware support available\n"); |
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index 533be9930ec2..b78af0cc6ef3 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c | |||
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc, | |||
467 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); | 467 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); |
468 | } | 468 | } |
469 | 469 | ||
470 | static int counter_is_active(unsigned long pmcr, int idx) | ||
471 | { | ||
472 | unsigned long mask = 0; | ||
473 | if (idx == ARMV6_CYCLE_COUNTER) | ||
474 | mask = ARMV6_PMCR_CCOUNT_IEN; | ||
475 | else if (idx == ARMV6_COUNTER0) | ||
476 | mask = ARMV6_PMCR_COUNT0_IEN; | ||
477 | else if (idx == ARMV6_COUNTER1) | ||
478 | mask = ARMV6_PMCR_COUNT1_IEN; | ||
479 | |||
480 | if (mask) | ||
481 | return pmcr & mask; | ||
482 | |||
483 | WARN_ONCE(1, "invalid counter number (%d)\n", idx); | ||
484 | return 0; | ||
485 | } | ||
486 | |||
487 | static irqreturn_t | 470 | static irqreturn_t |
488 | armv6pmu_handle_irq(int irq_num, | 471 | armv6pmu_handle_irq(int irq_num, |
489 | void *dev) | 472 | void *dev) |
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num, | |||
513 | struct perf_event *event = cpuc->events[idx]; | 496 | struct perf_event *event = cpuc->events[idx]; |
514 | struct hw_perf_event *hwc; | 497 | struct hw_perf_event *hwc; |
515 | 498 | ||
516 | if (!counter_is_active(pmcr, idx)) | 499 | /* Ignore if we don't have an event. */ |
500 | if (!event) | ||
517 | continue; | 501 | continue; |
518 | 502 | ||
519 | /* | 503 | /* |
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num, | |||
524 | continue; | 508 | continue; |
525 | 509 | ||
526 | hwc = &event->hw; | 510 | hwc = &event->hw; |
527 | armpmu_event_update(event, hwc, idx, 1); | 511 | armpmu_event_update(event, hwc, idx); |
528 | data.period = event->hw.last_period; | 512 | data.period = event->hw.last_period; |
529 | if (!armpmu_event_set_period(event, hwc, idx)) | 513 | if (!armpmu_event_set_period(event, hwc, idx)) |
530 | continue; | 514 | continue; |
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 6933244c68f9..4d7095af2ab3 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c | |||
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx) | |||
809 | 809 | ||
810 | counter = ARMV7_IDX_TO_COUNTER(idx); | 810 | counter = ARMV7_IDX_TO_COUNTER(idx); |
811 | asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); | 811 | asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); |
812 | isb(); | ||
813 | /* Clear the overflow flag in case an interrupt is pending. */ | ||
814 | asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter))); | ||
815 | isb(); | ||
816 | |||
812 | return idx; | 817 | return idx; |
813 | } | 818 | } |
814 | 819 | ||
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) | |||
955 | struct perf_event *event = cpuc->events[idx]; | 960 | struct perf_event *event = cpuc->events[idx]; |
956 | struct hw_perf_event *hwc; | 961 | struct hw_perf_event *hwc; |
957 | 962 | ||
963 | /* Ignore if we don't have an event. */ | ||
964 | if (!event) | ||
965 | continue; | ||
966 | |||
958 | /* | 967 | /* |
959 | * We have a single interrupt for all counters. Check that | 968 | * We have a single interrupt for all counters. Check that |
960 | * each counter has overflowed before we process it. | 969 | * each counter has overflowed before we process it. |
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) | |||
963 | continue; | 972 | continue; |
964 | 973 | ||
965 | hwc = &event->hw; | 974 | hwc = &event->hw; |
966 | armpmu_event_update(event, hwc, idx, 1); | 975 | armpmu_event_update(event, hwc, idx); |
967 | data.period = event->hw.last_period; | 976 | data.period = event->hw.last_period; |
968 | if (!armpmu_event_set_period(event, hwc, idx)) | 977 | if (!armpmu_event_set_period(event, hwc, idx)) |
969 | continue; | 978 | continue; |
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c index 3b99d8269829..71a21e6712f5 100644 --- a/arch/arm/kernel/perf_event_xscale.c +++ b/arch/arm/kernel/perf_event_xscale.c | |||
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev) | |||
255 | struct perf_event *event = cpuc->events[idx]; | 255 | struct perf_event *event = cpuc->events[idx]; |
256 | struct hw_perf_event *hwc; | 256 | struct hw_perf_event *hwc; |
257 | 257 | ||
258 | if (!event) | ||
259 | continue; | ||
260 | |||
258 | if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx)) | 261 | if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx)) |
259 | continue; | 262 | continue; |
260 | 263 | ||
261 | hwc = &event->hw; | 264 | hwc = &event->hw; |
262 | armpmu_event_update(event, hwc, idx, 1); | 265 | armpmu_event_update(event, hwc, idx); |
263 | data.period = event->hw.last_period; | 266 | data.period = event->hw.last_period; |
264 | if (!armpmu_event_set_period(event, hwc, idx)) | 267 | if (!armpmu_event_set_period(event, hwc, idx)) |
265 | continue; | 268 | continue; |
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev) | |||
592 | struct perf_event *event = cpuc->events[idx]; | 595 | struct perf_event *event = cpuc->events[idx]; |
593 | struct hw_perf_event *hwc; | 596 | struct hw_perf_event *hwc; |
594 | 597 | ||
595 | if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx)) | 598 | if (!event) |
599 | continue; | ||
600 | |||
601 | if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx)) | ||
596 | continue; | 602 | continue; |
597 | 603 | ||
598 | hwc = &event->hw; | 604 | hwc = &event->hw; |
599 | armpmu_event_update(event, hwc, idx, 1); | 605 | armpmu_event_update(event, hwc, idx); |
600 | data.period = event->hw.last_period; | 606 | data.period = event->hw.last_period; |
601 | if (!armpmu_event_set_period(event, hwc, idx)) | 607 | if (!armpmu_event_set_period(event, hwc, idx)) |
602 | continue; | 608 | continue; |
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx) | |||
663 | static void | 669 | static void |
664 | xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) | 670 | xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) |
665 | { | 671 | { |
666 | unsigned long flags, ien, evtsel; | 672 | unsigned long flags, ien, evtsel, of_flags; |
667 | struct pmu_hw_events *events = cpu_pmu->get_hw_events(); | 673 | struct pmu_hw_events *events = cpu_pmu->get_hw_events(); |
668 | 674 | ||
669 | ien = xscale2pmu_read_int_enable(); | 675 | ien = xscale2pmu_read_int_enable(); |
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) | |||
672 | switch (idx) { | 678 | switch (idx) { |
673 | case XSCALE_CYCLE_COUNTER: | 679 | case XSCALE_CYCLE_COUNTER: |
674 | ien &= ~XSCALE2_CCOUNT_INT_EN; | 680 | ien &= ~XSCALE2_CCOUNT_INT_EN; |
681 | of_flags = XSCALE2_CCOUNT_OVERFLOW; | ||
675 | break; | 682 | break; |
676 | case XSCALE_COUNTER0: | 683 | case XSCALE_COUNTER0: |
677 | ien &= ~XSCALE2_COUNT0_INT_EN; | 684 | ien &= ~XSCALE2_COUNT0_INT_EN; |
678 | evtsel &= ~XSCALE2_COUNT0_EVT_MASK; | 685 | evtsel &= ~XSCALE2_COUNT0_EVT_MASK; |
679 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT; | 686 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT; |
687 | of_flags = XSCALE2_COUNT0_OVERFLOW; | ||
680 | break; | 688 | break; |
681 | case XSCALE_COUNTER1: | 689 | case XSCALE_COUNTER1: |
682 | ien &= ~XSCALE2_COUNT1_INT_EN; | 690 | ien &= ~XSCALE2_COUNT1_INT_EN; |
683 | evtsel &= ~XSCALE2_COUNT1_EVT_MASK; | 691 | evtsel &= ~XSCALE2_COUNT1_EVT_MASK; |
684 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT; | 692 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT; |
693 | of_flags = XSCALE2_COUNT1_OVERFLOW; | ||
685 | break; | 694 | break; |
686 | case XSCALE_COUNTER2: | 695 | case XSCALE_COUNTER2: |
687 | ien &= ~XSCALE2_COUNT2_INT_EN; | 696 | ien &= ~XSCALE2_COUNT2_INT_EN; |
688 | evtsel &= ~XSCALE2_COUNT2_EVT_MASK; | 697 | evtsel &= ~XSCALE2_COUNT2_EVT_MASK; |
689 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT; | 698 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT; |
699 | of_flags = XSCALE2_COUNT2_OVERFLOW; | ||
690 | break; | 700 | break; |
691 | case XSCALE_COUNTER3: | 701 | case XSCALE_COUNTER3: |
692 | ien &= ~XSCALE2_COUNT3_INT_EN; | 702 | ien &= ~XSCALE2_COUNT3_INT_EN; |
693 | evtsel &= ~XSCALE2_COUNT3_EVT_MASK; | 703 | evtsel &= ~XSCALE2_COUNT3_EVT_MASK; |
694 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT; | 704 | evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT; |
705 | of_flags = XSCALE2_COUNT3_OVERFLOW; | ||
695 | break; | 706 | break; |
696 | default: | 707 | default: |
697 | WARN_ONCE(1, "invalid counter number (%d)\n", idx); | 708 | WARN_ONCE(1, "invalid counter number (%d)\n", idx); |
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) | |||
701 | raw_spin_lock_irqsave(&events->pmu_lock, flags); | 712 | raw_spin_lock_irqsave(&events->pmu_lock, flags); |
702 | xscale2pmu_write_event_select(evtsel); | 713 | xscale2pmu_write_event_select(evtsel); |
703 | xscale2pmu_write_int_enable(ien); | 714 | xscale2pmu_write_int_enable(ien); |
715 | xscale2pmu_write_overflow_flags(of_flags); | ||
704 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); | 716 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); |
705 | } | 717 | } |
706 | 718 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index b7582dd10dc3..96e2adcd5a84 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -38,10 +38,6 @@ | |||
38 | #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) | 38 | #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) |
39 | static u64 hdmac_dmamask = DMA_BIT_MASK(32); | 39 | static u64 hdmac_dmamask = DMA_BIT_MASK(32); |
40 | 40 | ||
41 | static struct at_dma_platform_data atdma_pdata = { | ||
42 | .nr_channels = 8, | ||
43 | }; | ||
44 | |||
45 | static struct resource hdmac_resources[] = { | 41 | static struct resource hdmac_resources[] = { |
46 | [0] = { | 42 | [0] = { |
47 | .start = AT91SAM9G45_BASE_DMA, | 43 | .start = AT91SAM9G45_BASE_DMA, |
@@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = { | |||
56 | }; | 52 | }; |
57 | 53 | ||
58 | static struct platform_device at_hdmac_device = { | 54 | static struct platform_device at_hdmac_device = { |
59 | .name = "at_hdmac", | 55 | .name = "at91sam9g45_dma", |
60 | .id = -1, | 56 | .id = -1, |
61 | .dev = { | 57 | .dev = { |
62 | .dma_mask = &hdmac_dmamask, | 58 | .dma_mask = &hdmac_dmamask, |
63 | .coherent_dma_mask = DMA_BIT_MASK(32), | 59 | .coherent_dma_mask = DMA_BIT_MASK(32), |
64 | .platform_data = &atdma_pdata, | ||
65 | }, | 60 | }, |
66 | .resource = hdmac_resources, | 61 | .resource = hdmac_resources, |
67 | .num_resources = ARRAY_SIZE(hdmac_resources), | 62 | .num_resources = ARRAY_SIZE(hdmac_resources), |
@@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = { | |||
69 | 64 | ||
70 | void __init at91_add_device_hdmac(void) | 65 | void __init at91_add_device_hdmac(void) |
71 | { | 66 | { |
72 | dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); | 67 | #if defined(CONFIG_OF) |
73 | dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask); | 68 | struct device_node *of_node = |
74 | platform_device_register(&at_hdmac_device); | 69 | of_find_node_by_name(NULL, "dma-controller"); |
70 | |||
71 | if (of_node) | ||
72 | of_node_put(of_node); | ||
73 | else | ||
74 | #endif | ||
75 | platform_device_register(&at_hdmac_device); | ||
75 | } | 76 | } |
76 | #else | 77 | #else |
77 | void __init at91_add_device_hdmac(void) {} | 78 | void __init at91_add_device_hdmac(void) {} |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 61908dce9784..9be71c11d0f0 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -33,10 +33,6 @@ | |||
33 | #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) | 33 | #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) |
34 | static u64 hdmac_dmamask = DMA_BIT_MASK(32); | 34 | static u64 hdmac_dmamask = DMA_BIT_MASK(32); |
35 | 35 | ||
36 | static struct at_dma_platform_data atdma_pdata = { | ||
37 | .nr_channels = 2, | ||
38 | }; | ||
39 | |||
40 | static struct resource hdmac_resources[] = { | 36 | static struct resource hdmac_resources[] = { |
41 | [0] = { | 37 | [0] = { |
42 | .start = AT91SAM9RL_BASE_DMA, | 38 | .start = AT91SAM9RL_BASE_DMA, |
@@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = { | |||
51 | }; | 47 | }; |
52 | 48 | ||
53 | static struct platform_device at_hdmac_device = { | 49 | static struct platform_device at_hdmac_device = { |
54 | .name = "at_hdmac", | 50 | .name = "at91sam9rl_dma", |
55 | .id = -1, | 51 | .id = -1, |
56 | .dev = { | 52 | .dev = { |
57 | .dma_mask = &hdmac_dmamask, | 53 | .dma_mask = &hdmac_dmamask, |
58 | .coherent_dma_mask = DMA_BIT_MASK(32), | 54 | .coherent_dma_mask = DMA_BIT_MASK(32), |
59 | .platform_data = &atdma_pdata, | ||
60 | }, | 55 | }, |
61 | .resource = hdmac_resources, | 56 | .resource = hdmac_resources, |
62 | .num_resources = ARRAY_SIZE(hdmac_resources), | 57 | .num_resources = ARRAY_SIZE(hdmac_resources), |
@@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = { | |||
64 | 59 | ||
65 | void __init at91_add_device_hdmac(void) | 60 | void __init at91_add_device_hdmac(void) |
66 | { | 61 | { |
67 | dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); | ||
68 | platform_device_register(&at_hdmac_device); | 62 | platform_device_register(&at_hdmac_device); |
69 | } | 63 | } |
70 | #else | 64 | #else |
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c index d5fb44f16d31..d67d0b4feb6f 100644 --- a/arch/arm/mach-ep93xx/vision_ep9307.c +++ b/arch/arm/mach-ep93xx/vision_ep9307.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <mach/ep93xx_spi.h> | 34 | #include <mach/ep93xx_spi.h> |
35 | #include <mach/gpio-ep93xx.h> | 35 | #include <mach/gpio-ep93xx.h> |
36 | 36 | ||
37 | #include <asm/hardware/vic.h> | ||
37 | #include <asm/mach-types.h> | 38 | #include <asm/mach-types.h> |
38 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
39 | #include <asm/mach/arch.h> | 40 | #include <asm/mach/arch.h> |
@@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") | |||
361 | .atag_offset = 0x100, | 362 | .atag_offset = 0x100, |
362 | .map_io = vision_map_io, | 363 | .map_io = vision_map_io, |
363 | .init_irq = ep93xx_init_irq, | 364 | .init_irq = ep93xx_init_irq, |
365 | .handle_irq = vic_handle_irq, | ||
364 | .timer = &ep93xx_timer, | 366 | .timer = &ep93xx_timer, |
365 | .init_machine = vision_init_machine, | 367 | .init_machine = vision_init_machine, |
366 | .restart = ep93xx_restart, | 368 | .restart = ep93xx_restart, |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 0fc65ffde8ff..38939956c34f 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/i2c.h> | 13 | #include <linux/i2c.h> |
14 | #include <linux/gpio_keys.h> | 14 | #include <linux/gpio_keys.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | ||
16 | #include <linux/fb.h> | 17 | #include <linux/fb.h> |
17 | #include <linux/mfd/max8998.h> | 18 | #include <linux/mfd/max8998.h> |
18 | #include <linux/regulator/machine.h> | 19 | #include <linux/regulator/machine.h> |
@@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = { | |||
595 | .threshold = 0x28, | 596 | .threshold = 0x28, |
596 | .voltage = 2800000, /* 2.8V */ | 597 | .voltage = 2800000, /* 2.8V */ |
597 | .orient = MXT_DIAGONAL, | 598 | .orient = MXT_DIAGONAL, |
599 | .irqflags = IRQF_TRIGGER_FALLING, | ||
598 | }; | 600 | }; |
599 | 601 | ||
600 | static struct i2c_board_info i2c3_devs[] __initdata = { | 602 | static struct i2c_board_info i2c3_devs[] __initdata = { |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 6c5826605eae..719ee423abe2 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
343 | case 0xb944: | 343 | case 0xb944: |
344 | omap_revision = AM335X_REV_ES1_0; | 344 | omap_revision = AM335X_REV_ES1_0; |
345 | *cpu_rev = "1.0"; | 345 | *cpu_rev = "1.0"; |
346 | break; | ||
346 | case 0xb8f2: | 347 | case 0xb8f2: |
347 | switch (rev) { | 348 | switch (rev) { |
348 | case 0: | 349 | case 0: |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 2cc1aa004b94..415a6f1cf419 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -420,8 +420,7 @@ static void __exit omap2_mbox_exit(void) | |||
420 | platform_driver_unregister(&omap2_mbox_driver); | 420 | platform_driver_unregister(&omap2_mbox_driver); |
421 | } | 421 | } |
422 | 422 | ||
423 | /* must be ready before omap3isp is probed */ | 423 | module_init(omap2_mbox_init); |
424 | subsys_initcall(omap2_mbox_init); | ||
425 | module_exit(omap2_mbox_exit); | 424 | module_exit(omap2_mbox_exit); |
426 | 425 | ||
427 | MODULE_LICENSE("GPL v2"); | 426 | MODULE_LICENSE("GPL v2"); |
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index b8822048e409..ac49384d0285 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c | |||
@@ -150,7 +150,8 @@ err_out: | |||
150 | platform_device_put(omap_iommu_pdev[i]); | 150 | platform_device_put(omap_iommu_pdev[i]); |
151 | return err; | 151 | return err; |
152 | } | 152 | } |
153 | module_init(omap_iommu_init); | 153 | /* must be ready before omap3isp is probed */ |
154 | subsys_initcall(omap_iommu_init); | ||
154 | 155 | ||
155 | static void __exit omap_iommu_exit(void) | 156 | static void __exit omap_iommu_exit(void) |
156 | { | 157 | { |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index ebc595091312..70de277f5c15 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include "common.h" | 32 | #include "common.h" |
33 | #include "omap4-sar-layout.h" | 33 | #include "omap4-sar-layout.h" |
34 | #include <linux/export.h> | ||
34 | 35 | ||
35 | #ifdef CONFIG_CACHE_L2X0 | 36 | #ifdef CONFIG_CACHE_L2X0 |
36 | static void __iomem *l2cache_base; | 37 | static void __iomem *l2cache_base; |
@@ -55,6 +56,7 @@ void omap_bus_sync(void) | |||
55 | isb(); | 56 | isb(); |
56 | } | 57 | } |
57 | } | 58 | } |
59 | EXPORT_SYMBOL(omap_bus_sync); | ||
58 | 60 | ||
59 | /* Steal one page physical memory for barrier implementation */ | 61 | /* Steal one page physical memory for barrier implementation */ |
60 | int __init omap_barrier_reserve_memblock(void) | 62 | int __init omap_barrier_reserve_memblock(void) |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 10b20c652e5d..4b57757bf9d1 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = { | |||
270 | .constraints = { | 270 | .constraints = { |
271 | .min_uV = 3300000, | 271 | .min_uV = 3300000, |
272 | .max_uV = 3300000, | 272 | .max_uV = 3300000, |
273 | .apply_uV = true, | ||
274 | .valid_modes_mask = REGULATOR_MODE_NORMAL | 273 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
275 | | REGULATOR_MODE_STANDBY, | 274 | | REGULATOR_MODE_STANDBY, |
276 | .valid_ops_mask = REGULATOR_CHANGE_MODE | 275 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 0d729e6619df..42d5cca66257 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
@@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int); | |||
49 | #endif | 49 | #endif |
50 | 50 | ||
51 | extern struct syscore_ops pxa_irq_syscore_ops; | 51 | extern struct syscore_ops pxa_irq_syscore_ops; |
52 | extern struct syscore_ops pxa_gpio_syscore_ops; | ||
53 | extern struct syscore_ops pxa2xx_mfp_syscore_ops; | 52 | extern struct syscore_ops pxa2xx_mfp_syscore_ops; |
54 | extern struct syscore_ops pxa3xx_mfp_syscore_ops; | 53 | extern struct syscore_ops pxa3xx_mfp_syscore_ops; |
55 | 54 | ||
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index f14775536b83..29b62afc6f7c 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
@@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void) | |||
226 | { | 226 | { |
227 | int i; | 227 | int i; |
228 | 228 | ||
229 | /* running before pxa_gpio_probe() */ | ||
230 | #ifdef CONFIG_CPU_PXA26x | ||
231 | pxa_last_gpio = 89; | ||
232 | #else | ||
233 | pxa_last_gpio = 84; | ||
234 | #endif | ||
229 | for (i = 0; i <= pxa_last_gpio; i++) | 235 | for (i = 0; i <= pxa_last_gpio; i++) |
230 | gpio_desc[i].valid = 1; | 236 | gpio_desc[i].valid = 1; |
231 | 237 | ||
@@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void) | |||
295 | { | 301 | { |
296 | int i, gpio; | 302 | int i, gpio; |
297 | 303 | ||
304 | pxa_last_gpio = 120; /* running before pxa_gpio_probe() */ | ||
298 | for (i = 0; i <= pxa_last_gpio; i++) { | 305 | for (i = 0; i <= pxa_last_gpio; i++) { |
299 | /* skip GPIO2, 5, 6, 7, 8, they are not | 306 | /* skip GPIO2, 5, 6, 7, 8, they are not |
300 | * valid pins allow configuration | 307 | * valid pins allow configuration |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 00d6eacab8e4..3352b37b60cf 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -208,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = { | |||
208 | INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), | 208 | INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), |
209 | INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), | 209 | INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), |
210 | INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), | 210 | INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), |
211 | INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), | ||
211 | }; | 212 | }; |
212 | 213 | ||
213 | static struct clk_lookup pxa25x_hwuart_clkreg = | 214 | static struct clk_lookup pxa25x_hwuart_clkreg = |
@@ -367,7 +368,6 @@ static int __init pxa25x_init(void) | |||
367 | 368 | ||
368 | register_syscore_ops(&pxa_irq_syscore_ops); | 369 | register_syscore_ops(&pxa_irq_syscore_ops); |
369 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); | 370 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); |
370 | register_syscore_ops(&pxa_gpio_syscore_ops); | ||
371 | register_syscore_ops(&pxa2xx_clock_syscore_ops); | 371 | register_syscore_ops(&pxa2xx_clock_syscore_ops); |
372 | 372 | ||
373 | ret = platform_add_devices(pxa25x_devices, | 373 | ret = platform_add_devices(pxa25x_devices, |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index c1673b3441d4..6bce78edce7a 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -229,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = { | |||
229 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), | 229 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), |
230 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), | 230 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), |
231 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), | 231 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), |
232 | INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), | ||
232 | }; | 233 | }; |
233 | 234 | ||
234 | #ifdef CONFIG_PM | 235 | #ifdef CONFIG_PM |
@@ -455,7 +456,6 @@ static int __init pxa27x_init(void) | |||
455 | 456 | ||
456 | register_syscore_ops(&pxa_irq_syscore_ops); | 457 | register_syscore_ops(&pxa_irq_syscore_ops); |
457 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); | 458 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); |
458 | register_syscore_ops(&pxa_gpio_syscore_ops); | ||
459 | register_syscore_ops(&pxa2xx_clock_syscore_ops); | 459 | register_syscore_ops(&pxa2xx_clock_syscore_ops); |
460 | 460 | ||
461 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 461 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 4f402afa6609..3918a672238e 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -462,7 +462,6 @@ static int __init pxa3xx_init(void) | |||
462 | 462 | ||
463 | register_syscore_ops(&pxa_irq_syscore_ops); | 463 | register_syscore_ops(&pxa_irq_syscore_ops); |
464 | register_syscore_ops(&pxa3xx_mfp_syscore_ops); | 464 | register_syscore_ops(&pxa3xx_mfp_syscore_ops); |
465 | register_syscore_ops(&pxa_gpio_syscore_ops); | ||
466 | register_syscore_ops(&pxa3xx_clock_syscore_ops); | 465 | register_syscore_ops(&pxa3xx_clock_syscore_ops); |
467 | 466 | ||
468 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 467 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index d082a583df78..5ce434b95e87 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c | |||
@@ -283,7 +283,6 @@ static int __init pxa95x_init(void) | |||
283 | return ret; | 283 | return ret; |
284 | 284 | ||
285 | register_syscore_ops(&pxa_irq_syscore_ops); | 285 | register_syscore_ops(&pxa_irq_syscore_ops); |
286 | register_syscore_ops(&pxa_gpio_syscore_ops); | ||
287 | register_syscore_ops(&pxa3xx_clock_syscore_ops); | 286 | register_syscore_ops(&pxa3xx_clock_syscore_ops); |
288 | 287 | ||
289 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 288 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h index db8a98ac68c5..0c1eb1dfc534 100644 --- a/arch/arm/mach-s3c2440/common.h +++ b/arch/arm/mach-s3c2440/common.h | |||
@@ -12,6 +12,6 @@ | |||
12 | #ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H | 12 | #ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H |
13 | #define __ARCH_ARM_MACH_S3C2440_COMMON_H | 13 | #define __ARCH_ARM_MACH_S3C2440_COMMON_H |
14 | 14 | ||
15 | void s3c2440_restart(char mode, const char *cmd); | 15 | void s3c244x_restart(char mode, const char *cmd); |
16 | 16 | ||
17 | #endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ | 17 | #endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ |
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 24569550de1a..19b577bc09b8 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c | |||
@@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis") | |||
487 | .init_machine = anubis_init, | 487 | .init_machine = anubis_init, |
488 | .init_irq = s3c24xx_init_irq, | 488 | .init_irq = s3c24xx_init_irq, |
489 | .timer = &s3c24xx_timer, | 489 | .timer = &s3c24xx_timer, |
490 | .restart = s3c2440_restart, | 490 | .restart = s3c244x_restart, |
491 | MACHINE_END | 491 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index d6a9763110cd..d7ae49c90118 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c | |||
@@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB") | |||
222 | .init_machine = at2440evb_init, | 222 | .init_machine = at2440evb_init, |
223 | .init_irq = s3c24xx_init_irq, | 223 | .init_irq = s3c24xx_init_irq, |
224 | .timer = &s3c24xx_timer, | 224 | .timer = &s3c24xx_timer, |
225 | .restart = s3c2440_restart, | 225 | .restart = s3c244x_restart, |
226 | MACHINE_END | 226 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index 5859e609d28c..9a4a5bc008e6 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c | |||
@@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02") | |||
601 | .init_irq = s3c24xx_init_irq, | 601 | .init_irq = s3c24xx_init_irq, |
602 | .init_machine = gta02_machine_init, | 602 | .init_machine = gta02_machine_init, |
603 | .timer = &s3c24xx_timer, | 603 | .timer = &s3c24xx_timer, |
604 | .restart = s3c2440_restart, | 604 | .restart = s3c244x_restart, |
605 | MACHINE_END | 605 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index adbbb85bc4cd..5d66fb218a41 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
@@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440") | |||
701 | .init_machine = mini2440_init, | 701 | .init_machine = mini2440_init, |
702 | .init_irq = s3c24xx_init_irq, | 702 | .init_irq = s3c24xx_init_irq, |
703 | .timer = &s3c24xx_timer, | 703 | .timer = &s3c24xx_timer, |
704 | .restart = s3c2440_restart, | 704 | .restart = s3c244x_restart, |
705 | MACHINE_END | 705 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 40eaf844bc1f..5198e3e1c5be 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c | |||
@@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") | |||
158 | .init_machine = nexcoder_init, | 158 | .init_machine = nexcoder_init, |
159 | .init_irq = s3c24xx_init_irq, | 159 | .init_irq = s3c24xx_init_irq, |
160 | .timer = &s3c24xx_timer, | 160 | .timer = &s3c24xx_timer, |
161 | .restart = s3c2440_restart, | 161 | .restart = s3c244x_restart, |
162 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 4c480ef734f6..c5daeb612a88 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") | |||
436 | .init_irq = s3c24xx_init_irq, | 436 | .init_irq = s3c24xx_init_irq, |
437 | .init_machine = osiris_init, | 437 | .init_machine = osiris_init, |
438 | .timer = &s3c24xx_timer, | 438 | .timer = &s3c24xx_timer, |
439 | .restart = s3c2440_restart, | 439 | .restart = s3c244x_restart, |
440 | MACHINE_END | 440 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 80077f6472ee..6f68abf44fab 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c | |||
@@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950") | |||
822 | .init_irq = s3c24xx_init_irq, | 822 | .init_irq = s3c24xx_init_irq, |
823 | .init_machine = rx1950_init_machine, | 823 | .init_machine = rx1950_init_machine, |
824 | .timer = &s3c24xx_timer, | 824 | .timer = &s3c24xx_timer, |
825 | .restart = s3c2440_restart, | 825 | .restart = s3c244x_restart, |
826 | MACHINE_END | 826 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index 20103bafbd4b..56af35447598 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c | |||
@@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715") | |||
213 | .init_irq = rx3715_init_irq, | 213 | .init_irq = rx3715_init_irq, |
214 | .init_machine = rx3715_init_machine, | 214 | .init_machine = rx3715_init_machine, |
215 | .timer = &s3c24xx_timer, | 215 | .timer = &s3c24xx_timer, |
216 | .restart = s3c2440_restart, | 216 | .restart = s3c244x_restart, |
217 | MACHINE_END | 217 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 1deb60d12a60..83a1036d7dcb 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c | |||
@@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440") | |||
183 | .map_io = smdk2440_map_io, | 183 | .map_io = smdk2440_map_io, |
184 | .init_machine = smdk2440_machine_init, | 184 | .init_machine = smdk2440_machine_init, |
185 | .timer = &s3c24xx_timer, | 185 | .timer = &s3c24xx_timer, |
186 | .restart = s3c2440_restart, | 186 | .restart = s3c244x_restart, |
187 | MACHINE_END | 187 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index 517623a09fc5..2b3dddb49af7 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <plat/cpu.h> | 35 | #include <plat/cpu.h> |
36 | #include <plat/s3c244x.h> | 36 | #include <plat/s3c244x.h> |
37 | #include <plat/pm.h> | 37 | #include <plat/pm.h> |
38 | #include <plat/watchdog-reset.h> | ||
39 | 38 | ||
40 | #include <plat/gpio-core.h> | 39 | #include <plat/gpio-core.h> |
41 | #include <plat/gpio-cfg.h> | 40 | #include <plat/gpio-cfg.h> |
@@ -74,15 +73,3 @@ void __init s3c2440_map_io(void) | |||
74 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; | 73 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; |
75 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; | 74 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; |
76 | } | 75 | } |
77 | |||
78 | void s3c2440_restart(char mode, const char *cmd) | ||
79 | { | ||
80 | if (mode == 's') { | ||
81 | soft_restart(0); | ||
82 | } | ||
83 | |||
84 | arch_wdt_reset(); | ||
85 | |||
86 | /* we'll take a jump through zero as a poor second */ | ||
87 | soft_restart(0); | ||
88 | } | ||
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c index 36bc60f61d0a..d15852f642b7 100644 --- a/arch/arm/mach-s3c2440/s3c244x.c +++ b/arch/arm/mach-s3c2440/s3c244x.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <plat/pm.h> | 46 | #include <plat/pm.h> |
47 | #include <plat/pll.h> | 47 | #include <plat/pll.h> |
48 | #include <plat/nand-core.h> | 48 | #include <plat/nand-core.h> |
49 | #include <plat/watchdog-reset.h> | ||
49 | 50 | ||
50 | static struct map_desc s3c244x_iodesc[] __initdata = { | 51 | static struct map_desc s3c244x_iodesc[] __initdata = { |
51 | IODESC_ENT(CLKPWR), | 52 | IODESC_ENT(CLKPWR), |
@@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = { | |||
196 | .suspend = s3c244x_suspend, | 197 | .suspend = s3c244x_suspend, |
197 | .resume = s3c244x_resume, | 198 | .resume = s3c244x_resume, |
198 | }; | 199 | }; |
200 | |||
201 | void s3c244x_restart(char mode, const char *cmd) | ||
202 | { | ||
203 | if (mode == 's') | ||
204 | soft_restart(0); | ||
205 | |||
206 | arch_wdt_reset(); | ||
207 | |||
208 | /* we'll take a jump through zero as a poor second */ | ||
209 | soft_restart(0); | ||
210 | } | ||
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 33dad1da9310..12c431f3443f 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/mmc/sh_mobile_sdhi.h> | 38 | #include <linux/mmc/sh_mobile_sdhi.h> |
39 | #include <linux/mfd/tmio.h> | 39 | #include <linux/mfd/tmio.h> |
40 | #include <linux/sh_clk.h> | 40 | #include <linux/sh_clk.h> |
41 | #include <linux/videodev2.h> | ||
41 | #include <video/sh_mobile_lcdc.h> | 42 | #include <video/sh_mobile_lcdc.h> |
42 | #include <video/sh_mipi_dsi.h> | 43 | #include <video/sh_mipi_dsi.h> |
43 | #include <sound/sh_fsi.h> | 44 | #include <sound/sh_fsi.h> |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index d4cc2dec5734..82483d5f200c 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -801,7 +801,7 @@ static struct fsi_ak4642_info fsi2_ak4643_info = { | |||
801 | static struct platform_device fsi_ak4643_device = { | 801 | static struct platform_device fsi_ak4643_device = { |
802 | .name = "fsi-ak4642-audio", | 802 | .name = "fsi-ak4642-audio", |
803 | .dev = { | 803 | .dev = { |
804 | .platform_data = &fsi_info, | 804 | .platform_data = &fsi2_ak4643_info, |
805 | }, | 805 | }, |
806 | }; | 806 | }; |
807 | 807 | ||
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index fb90f0898d9c..c79baa9ef61b 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <linux/smsc911x.h> | 29 | #include <linux/smsc911x.h> |
30 | #include <linux/videodev2.h> | ||
30 | #include <mach/common.h> | 31 | #include <mach/common.h> |
31 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
@@ -241,7 +242,7 @@ static struct sh_mobile_lcdc_info lcdc0_info = { | |||
241 | .clock_source = LCDC_CLK_BUS, | 242 | .clock_source = LCDC_CLK_BUS, |
242 | .ch[0] = { | 243 | .ch[0] = { |
243 | .chan = LCDC_CHAN_MAINLCD, | 244 | .chan = LCDC_CHAN_MAINLCD, |
244 | .bpp = 16, | 245 | .fourcc = V4L2_PIX_FMT_RGB565, |
245 | .interface_type = RGB24, | 246 | .interface_type = RGB24, |
246 | .clock_divider = 5, | 247 | .clock_divider = 5, |
247 | .flags = 0, | 248 | .flags = 0, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index e761b280a602..911c6ec49c2d 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -1346,6 +1346,10 @@ static struct map_desc mackerel_io_desc[] __initdata = { | |||
1346 | static void __init mackerel_map_io(void) | 1346 | static void __init mackerel_map_io(void) |
1347 | { | 1347 | { |
1348 | iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); | 1348 | iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); |
1349 | /* DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't | ||
1350 | * enough to allocate the frame buffer memory. | ||
1351 | */ | ||
1352 | init_consistent_dma_size(12 << 20); | ||
1349 | 1353 | ||
1350 | /* setup early devices and console here as well */ | 1354 | /* setup early devices and console here as well */ |
1351 | sh7372_add_early_devices(); | 1355 | sh7372_add_early_devices(); |
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 52af00446a63..c59e8b892d6b 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig | |||
@@ -5,7 +5,7 @@ config UX500_SOC_COMMON | |||
5 | default y | 5 | default y |
6 | select ARM_GIC | 6 | select ARM_GIC |
7 | select HAS_MTU | 7 | select HAS_MTU |
8 | select ARM_ERRATA_753970 | 8 | select PL310_ERRATA_753970 |
9 | select ARM_ERRATA_754322 | 9 | select ARM_ERRATA_754322 |
10 | select ARM_ERRATA_764369 | 10 | select ARM_ERRATA_764369 |
11 | 11 | ||
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 9b3d0fbaee72..88c3ba151e87 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig | |||
@@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4 | |||
7 | select ARM_GIC | 7 | select ARM_GIC |
8 | select ARM_ERRATA_720789 | 8 | select ARM_ERRATA_720789 |
9 | select ARM_ERRATA_751472 | 9 | select ARM_ERRATA_751472 |
10 | select ARM_ERRATA_753970 | 10 | select PL310_ERRATA_753970 |
11 | select HAVE_SMP | 11 | select HAVE_SMP |
12 | select MIGHT_HAVE_CACHE_L2X0 | 12 | select MIGHT_HAVE_CACHE_L2X0 |
13 | 13 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0404ccbb8aa3..f1c8486f7501 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -230,9 +230,7 @@ __v7_setup: | |||
230 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 230 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
231 | #endif | 231 | #endif |
232 | #ifdef CONFIG_ARM_ERRATA_743622 | 232 | #ifdef CONFIG_ARM_ERRATA_743622 |
233 | teq r6, #0x20 @ present in r2p0 | 233 | teq r5, #0x00200000 @ only present in r2p* |
234 | teqne r6, #0x21 @ present in r2p1 | ||
235 | teqne r6, #0x22 @ present in r2p2 | ||
236 | mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register | 234 | mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register |
237 | orreq r10, r10, #1 << 6 @ set bit #6 | 235 | orreq r10, r10, #1 << 6 @ set bit #6 |
238 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 236 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 2efd6454bce0..37bbbbb981b2 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h | |||
@@ -428,8 +428,16 @@ | |||
428 | #define OMAP_GPMC_NR_IRQS 8 | 428 | #define OMAP_GPMC_NR_IRQS 8 |
429 | #define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) | 429 | #define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) |
430 | 430 | ||
431 | /* PRCM IRQ handler */ | ||
432 | #ifdef CONFIG_ARCH_OMAP2PLUS | ||
433 | #define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END) | ||
434 | #define OMAP_PRCM_NR_IRQS 64 | ||
435 | #define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS) | ||
436 | #else | ||
437 | #define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END | ||
438 | #endif | ||
431 | 439 | ||
432 | #define NR_IRQS OMAP_GPMC_IRQ_END | 440 | #define NR_IRQS OMAP_PRCM_IRQ_END |
433 | 441 | ||
434 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) | 442 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) |
435 | 443 | ||
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 9fe35348e03b..2bab4c99a234 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void) | |||
1249 | struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; | 1249 | struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; |
1250 | int channel; | 1250 | int channel; |
1251 | 1251 | ||
1252 | for (channel = dma_channels - 1; channel >= 0; cp++, channel--) | 1252 | for (channel = dma_channels - 1; channel >= 0; cp--, channel--) |
1253 | s3c2410_dma_resume_chan(cp); | 1253 | s3c2410_dma_resume_chan(cp); |
1254 | } | 1254 | } |
1255 | 1255 | ||
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index f10768e988d4..d21d744e4d99 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | |||
1409 | 1409 | ||
1410 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | 1410 | #ifdef CONFIG_S3C_DEV_USB_HSOTG |
1411 | static struct resource s3c_usb_hsotg_resources[] = { | 1411 | static struct resource s3c_usb_hsotg_resources[] = { |
1412 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), | 1412 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
1413 | [1] = DEFINE_RES_IRQ(IRQ_OTG), | 1413 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
1414 | }; | 1414 | }; |
1415 | 1415 | ||
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index 0c77e4298675..abb5bdecd509 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c | |||
@@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode, | |||
145 | static int clockevent_next_event(unsigned long cycles, | 145 | static int clockevent_next_event(unsigned long cycles, |
146 | struct clock_event_device *clk_event_dev) | 146 | struct clock_event_device *clk_event_dev) |
147 | { | 147 | { |
148 | u16 val; | 148 | u16 val = readw(gpt_base + CR(CLKEVT)); |
149 | |||
150 | if (val & CTRL_ENABLE) | ||
151 | writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT)); | ||
149 | 152 | ||
150 | writew(cycles, gpt_base + LOAD(CLKEVT)); | 153 | writew(cycles, gpt_base + LOAD(CLKEVT)); |
151 | 154 | ||
152 | val = readw(gpt_base + CR(CLKEVT)); | ||
153 | val |= CTRL_ENABLE | CTRL_INT_ENABLE; | 155 | val |= CTRL_ENABLE | CTRL_INT_ENABLE; |
154 | writew(val, gpt_base + CR(CLKEVT)); | 156 | writew(val, gpt_base + CR(CLKEVT)); |
155 | 157 | ||